Threshold voltage test circuit, system, and method

Abstract

This application provides a threshold voltage testing circuit, system, and method. The circuit includes a main control unit, multiple current and voltage input and measurement units, and multiple measurement branches containing multiple switching units. The main control unit sends synchronous control commands to the multiple current and voltage input and measurement units and the multiple measurement branches containing multiple switching units to simultaneously provide gate pre-bias voltage and drain current to multiple devices under test (DUTs) sequentially; and measures and records the gate-source voltage of the DUTs. This significantly shortens the Vth testing time of the entire wafer from several minutes to seconds or less, making it suitable for mass production. Simultaneously, this invention reduces the investment in testing equipment resources and time, greatly improving production capacity; and it can quickly screen out defective devices, ensuring the reliability of silicon carbide devices under harsh conditions such as high temperature and high pressure, making it suitable for key fields such as electric vehicles and renewable energy.

Description

Technical Field

[0001] This application belongs to the field of power device measurement technology, and in particular relates to a threshold voltage testing circuit, system and method. Background Technology

[0002] Silicon carbide (SiC) transistors, as core devices of third-generation semiconductors, exhibit revolutionary advantages in high-temperature, high-voltage, and high-frequency applications due to their wide bandgap characteristics. Compared to traditional silicon-based devices, they offer higher energy efficiency, stronger voltage withstand capability, faster switching speed, and superior heat dissipation, significantly improving the power density and reliability of power electronic systems. They can achieve high current outputs of hundreds or even thousands of amperes and are suitable for the needs of high-power devices. These characteristics make them an ideal choice in key areas such as electric vehicles, renewable energy, smart grids, and industrial power supplies, not only significantly improving energy conversion efficiency but also enabling miniaturization and weight reduction of devices, thus promoting the development of green energy and high-efficiency power electronics technologies. However, silicon carbide has limitations in materials and processes, requiring continuous optimization. Currently, reliability screening is necessary to ensure the quality of silicon carbide devices.

[0003] Currently, threshold voltage (Vth) testing of conventional silicon carbide (SiC) transistors typically employs a die-by-die testing approach, using a source measurement unit (SMU) to test each die (the smallest independent chip unit with complete circuit functionality, i.e., a "bare die") individually. Since a single wafer contains hundreds to thousands of dies, the test time for a single threshold voltage (Vth) can be hundreds of milliseconds, resulting in a total testing time of several minutes for the entire wafer. This is inefficient and costly in large-scale production scenarios, failing to meet the demands for rapid reliability screening. Existing technologies cannot achieve parallel testing, resulting in slow testing speeds and high resource investment.

[0004] The foregoing statements are for informational purposes only and are not intended to provide background information in connection with this application. Unless otherwise stated herein, the content described in this section is not prior art to the rest of this application. Summary of the Invention

[0005] The threshold voltage test circuit, system, and method proposed in this invention can simultaneously test the threshold voltage of multiple dies through multiple test channels, significantly shortening the Vth test time of the entire wafer from several minutes to seconds or less, making it suitable for mass production.

[0006] Meanwhile, this invention reduces the investment of testing equipment resources and time, greatly increasing production capacity; and it can quickly screen out defective devices, ensuring the reliability of silicon carbide devices under harsh conditions such as high temperature and high pressure, making it suitable for key fields such as electric vehicles and renewable energy.

[0007] According to a first aspect of the embodiments of this application, a threshold voltage test circuit is provided, including a main control unit, multiple current and voltage setting and measurement units, and multiple measurement branches including multiple switching units; The main control unit sends synchronous control commands to multiple current and voltage setting and measurement units, as well as multiple measurement branches containing multiple switching units, for the following purposes: Simultaneously, gate pre-bias voltage and drain current are sequentially provided to multiple devices under test; Measure and record the gate-source voltages of multiple devices under test (DUTs); the multiple DUTs are multiple dies on the same wafer.

[0008] In some embodiments of this application, gate pre-bias voltage and drain current are sequentially provided to multiple devices under test simultaneously, including: Simultaneously control one or more current and voltage input and measurement units to provide gate pre-bias voltage to multiple devices under test in the first time period; In the second time period, drain current is provided to multiple devices under test simultaneously.

[0009] In some embodiments of this application, a first time period is used to simultaneously provide gate pre-bias voltages to multiple devices under test, including: Simultaneously control one or more current and voltage input and measurement units to provide gate pre-bias voltage; Each current and voltage setting and measurement unit simultaneously provides a gate pre-bias voltage to at least one of the multiple devices under test (DUTs) during the first time period.

[0010] In some embodiments of this application, providing a gate pre-bias voltage to at least one device under test (DUT) among a plurality of DUTs simultaneously during a first time period includes: In the first time period, the switching unit corresponding to the test branch of each of the multiple devices under test is turned on; The corresponding current and voltage input and measurement units apply a pre-bias voltage to the gate of their respective connected devices under test.

[0011] In some embodiments of this application, the second time period simultaneously provides drain current to multiple devices under test, including: Simultaneously control one or more current and voltage input and measurement units to provide drain current; Each current and voltage setting and measurement unit simultaneously provides drain current to at least one of the multiple devices under test (DUTs) during the second time period.

[0012] In some embodiments of this application, drain current is simultaneously provided to at least one of a plurality of devices under test (DUTs) during a second time period, including: In the second time period, the switching unit corresponding to the test branch of each of the multiple devices under test is turned on; The corresponding current and voltage inputs and measurement units apply a specified test current to the drain of their respective connected devices under test.

[0013] In some embodiments of this application, measuring and recording the gate-source voltage of the device under test includes: After the gate-source voltage stabilizes, the gate voltages of multiple devices under test are measured and acquired simultaneously, and used as the threshold voltage (Vth) of the devices under test.

[0014] In some embodiments of this application, after the gate-source voltage stabilizes, the gate voltages of multiple devices under test are simultaneously measured and acquired, including: In the third time period, one or more current and voltage input and measurement units are simultaneously controlled to read and store the gate voltage of all devices under test in the branch. Control all switching units to disconnect and shut down the outputs of all current and voltage reference and measurement units.

[0015] According to a second aspect of the embodiments of this application, a threshold voltage testing system is provided, including a threshold voltage testing circuit, and: The synchronous control module is used to simultaneously provide gate pre-bias voltage and drain current to multiple devices under test in sequence. The measurement module is used to measure and record the gate-source voltage of multiple devices under test (DUTs); the multiple DUTs are multiple dies on the same wafer.

[0016] According to a third aspect of the embodiments of this application, a threshold voltage testing method is provided, comprising: Simultaneously, gate pre-bias voltage and drain current are sequentially provided to multiple devices under test; Measure and record the gate-source voltages of multiple devices under test (DUTs); the multiple DUTs are multiple dies on the same wafer.

[0017] According to a fourth aspect of the embodiments of this application, a threshold voltage testing device is provided, comprising: a storage unit for storing executable instructions; And a processing unit, which is connected to the memory to execute executable instructions to complete the threshold voltage test method.

[0018] This application discloses a threshold voltage testing circuit, system, and method. The circuit includes a main control unit, multiple current and voltage input and measurement units, and multiple measurement branches containing multiple switching units. The main control unit sends synchronous control commands to the multiple current and voltage input and measurement units and the multiple measurement branches containing multiple switching units to simultaneously provide gate pre-bias voltage and drain current to multiple devices under test (DUTs) sequentially. It also measures and records the gate-source voltage of the DUTs. This significantly shortens the Vth testing time for the entire wafer from several minutes to seconds or less, making it suitable for mass production. Simultaneously, this invention reduces the investment in testing equipment resources and time, greatly increasing production capacity. Furthermore, it can quickly screen out defective devices, ensuring the reliability of silicon carbide devices under harsh conditions such as high temperature and high pressure, making it suitable for critical fields such as electric vehicles and renewable energy. Attached Figure Description

[0019] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings: Figure 1 Diagram of gate pre-bias circuit for a single silicon carbide die; Figure 2 Circuit diagram for testing the gate-source voltage Vth of a single silicon carbide die; Figure 3 Timing diagram of Vth test for a single silicon carbide die; Figure 4 The diagram shows a schematic of a threshold voltage test circuit according to an embodiment of this application; Figure 5 The diagram shows a circuit diagram of a threshold voltage test circuit according to an embodiment of this application; Figure 6 A timing diagram for threshold voltage testing of a parallel branch according to an embodiment of this application is shown; Figure 7 The diagram shows a step-by-step schematic of a threshold voltage testing method according to an embodiment of this application; Figure 8 The diagram shows a step of synchronously controlling the pre-bias voltage and current according to an embodiment of this application; Figure 9 The diagram shows a schematic representation of a threshold voltage testing system according to an embodiment of this application. Figure 10 The diagram shows a schematic diagram of a threshold voltage testing device according to an embodiment of this application. Detailed Implementation

[0020] Regarding this application, in the field of power device measurement technology, silicon carbide (SiC) transistors, as core devices of third-generation semiconductors, can achieve high current outputs of hundreds or even thousands of amperes and are adapted to the needs of high-power equipment.

[0021] Since the threshold voltage Vth of a silicon carbide transistor directly affects the device's conduction characteristics, switching losses, and gate drive design, testing Vth can verify the stability of the manufacturing process (such as gate oxide quality) and the device's performance under harsh conditions such as high temperature and high pressure. Furthermore, Vth drift may indicate long-term reliability issues (such as gate degradation), making this test crucial for optimizing drive circuits and ensuring safe system operation, especially in critical applications such as new energy vehicles and industrial power supplies.

[0022] A single wafer contains hundreds or even thousands of dies (the smallest independent chip unit with complete circuit functions, also known as a bare die). Performing Vth testing on each one is time-consuming and inefficient, so there is an urgent need for a rapid testing method.

[0023] To address this problem, this invention proposes a parallel threshold voltage testing method that can quickly and effectively screen out defective devices.

[0024] A common implementation is to use a source test unit (SMU) to test each individual silicon carbide die.

[0025] like Figure 1 Gate pre-bias circuit and Vth test circuit diagram, and Figure 2 As shown in the Vth test timing diagram, each Vth test consists of two core steps: First, a pre-bias voltage is applied to the gate, which enables the device to enter a specific operating state, laying the foundation for accurate measurement of the threshold voltage in the future. Next, the threshold voltage is measured by applying a specified drain current and monitoring the voltage change of the device. When the gate-source voltage stabilizes, the corresponding gate voltage is the threshold voltage Vth. Taking a single 8-inch silicon carbide wafer as an example, it typically contains thousands of dies (the smallest independent chip unit with complete circuit functionality). Using existing individual testing methods, the time to complete a single Vth test is several hundred milliseconds, resulting in a cumulative Vth testing time of several minutes for each wafer. In large-scale production scenarios, this testing method requires a significant investment of time and equipment resources to meet the demands of production schedules and product quality inspection.

[0026] Therefore, a test method that can perform threshold voltage tests in parallel can effectively improve test efficiency and reduce test costs, which is of great significance for the reliability screening of SiC wafers and the application of SiC.

[0027] Based on this, the present invention addresses the problems of slow speed, low efficiency, high cost, and inability to perform parallel testing in existing technologies for threshold voltage testing of silicon carbide wafers, and proposes a parallel threshold voltage testing method for wafer reliability testing.

[0028] The present invention uses multiple current and voltage input and measurement units as the core, combined with multiple switching units (such as reed relays) and control logic, to realize parallel threshold voltage testing of the wafer under test.

[0029] The threshold voltage test circuit, system, and method of this invention simultaneously provide gate pre-bias voltage and drain current to multiple devices under test (DUTs) sequentially; and measure and record the gate-source voltage of the DUTs. This significantly reduces the Vth test time for the entire wafer from several minutes to seconds or less, making it suitable for mass production. Simultaneously, this invention reduces the investment in test equipment resources and time, greatly increasing production capacity; and it can quickly screen out defective devices, ensuring the reliability of silicon carbide devices under harsh conditions such as high temperature and high pressure, making it suitable for critical fields such as electric vehicles and renewable energy.

[0030] To make the technical solutions and advantages of the embodiments of this application clearer, the exemplary embodiments of this application will be described in further detail below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not an exhaustive list of all embodiments. It should be noted that, unless otherwise specified, the embodiments and features in the embodiments of this application can be combined with each other.

[0031] Example 1 This application also provides a threshold voltage test circuit. For details not disclosed in the threshold voltage test circuit of this embodiment, please refer to the specific implementation of the threshold voltage test method and system in other embodiments.

[0032] Figure 4 The diagram shows a schematic of a threshold voltage test circuit according to an embodiment of this application.

[0033] like Figure 4 As shown, a threshold voltage test circuit according to an embodiment of this application includes a main control unit 10, multiple current and voltage setting and measurement units, and multiple measurement branches including multiple switching units. The main control unit 10 sends synchronous control commands to multiple current and voltage setting and measurement units and multiple measurement branches including multiple switching units, for the following purposes: Simultaneously provides gate pre-bias voltage for multiple devices under test; Simultaneously, drain current is provided to multiple devices under test (DUTs), and the gate-source voltage of multiple DUTs is measured and recorded; the multiple DUTs are multiple dies on the same wafer.

[0034] Regarding the core components of the threshold voltage test circuit in this application embodiment: Multi-die current and voltage setting and measurement unit: used to simultaneously provide gate pre-bias voltage and drain current for multiple dies, and measure gate-source voltage.

[0035] Multiple switching units (such as reed relays): control the on and off of the test circuit to achieve channel switching.

[0036] Main control unit: coordinates the working timing of all switching units and measuring units to achieve synchronous control.

[0037] This enables the parallel execution of pre-bias and Vth measurement steps on multiple dies within the same time period through precise timing control, rather than sequential execution.

[0038] In practice, multiple devices under test (DUTs) on the wafer under test are connected to multiple current and voltage input and measurement units through switching units to form multiple independent test channels; The main control unit 10 sends synchronous control commands to the switching network and multiple current and voltage reference and measurement units to control each test channel to perform the following parallel operations: In the first time period, the switching units corresponding to each test channel are turned on, and the current and voltage setting and measurement units apply a pre-bias voltage to the gate of the device under test connected to them. In the second time period, the switching unit states of each test channel are switched, and the specified test current is applied to the drain of the device under test connected to each current and voltage setting and measurement unit. After the gate-source voltage stabilizes, each current and voltage input and measurement unit measures and obtains the gate voltage of its corresponding device under test in parallel, which is used as the threshold voltage (Vth) of the device under test.

[0039] Figure 5 The diagram shows a circuit diagram of a threshold voltage test circuit according to an embodiment of this application.

[0040] like Figure 5 The circuit diagram of the threshold voltage test circuit shown is an example of a circuit that includes three current and voltage setting and measurement units: current and voltage setting and measurement unit 1, current and voltage setting and measurement unit 2, and current and voltage setting and measurement unit 3.

[0041] Taking each current and voltage setpoint and measurement unit connected to three measurement branches as an example, such as the measurement branch where wafer chip DUT1 is located, the measurement branch where wafer chip DUT2 is located, and the measurement branch where wafer chip DUTa is located.

[0042] In this embodiment, each measurement branch includes four switching units. Taking the measurement branch where the wafer chip DUT1 is located as an example, it includes switching unit U1, switching unit U2, switching unit U3 and switching unit U4.

[0043] Taking the measurement branch of wafer chip DUT2 as an example, it includes switching unit U5, switching unit U6, switching unit U7, and switching unit U8.

[0044] The other measurement branches are shown in the figure in sequence, and will not be described in detail here.

[0045] like Figure 5 As shown, the overall system connection architecture is as follows: The main control unit, acting as the central controller of the system, is connected via a control bus to all current and voltage setting and measurement units (current and voltage setting and measurement unit 1, current and voltage setting and measurement unit 2, ..., current and voltage setting and measurement unit n) and all switching units (U1, U2, ...) in the switching network. This bus is used to issue synchronization timing commands, read measurement data, and monitor the system status.

[0046] Multiple current and voltage input and measurement units are physically arranged in parallel. The high-precision output / measurement terminal of each unit is connected to the corresponding common input terminal of the switching network, and its return / reference terminal is connected to the system reference ground (GND).

[0047] The test branch is a matrix consisting of a large number of controlled switches (such as reed relays). Its inputs receive excitation and measurement signals from each measurement unit, and its outputs are connected to the individual chips (DUT1, DUTb, DUTk, …, DUTn) on the wafer under test via probes or contact terminals.

[0048] The device under test (DUT) array exists in wafer form, and the gate (G), source (S), and drain (D) pins of each DUT (such as a MOSFET) are exposed to the test system through a switching network.

[0049] The detailed circuit connection for a single test branch (taking DUT1 as an example) is as follows: Each DUT corresponds to an independent test branch, the core of which consists of 4 switching units to precisely control the test process: Switch U1: Connected between the output terminal (Hi) of the current and voltage setting and measurement unit 1 and the gate (G) of DUT1. Its on / off state controls the application of the gate excitation voltage.

[0050] Switch U2: Connected between the source (S) of DUT1 and the system reference ground (GND). Its conduction ensures that the source is reliably grounded during testing, establishing a voltage reference.

[0051] Switch U3: Connected between the output terminal (Hi) of the current and voltage setting and measurement unit 1 and the drain (D) of DUT1. Its on / off state controls the application of the drain test current.

[0052] Switch U4: Connected between the drain (D) of DUT1 and the measurement input (Hi, usually multiplexed with the output) of the current and voltage setpoint and measurement unit 1. When it is turned on, it feeds back the drain voltage of DUT1 to the measurement unit for sampling. U3 and U4 are logically mutually exclusive and are used for the "apply current" and "measure voltage" stages, respectively.

[0053] Pre-biasing stage: The main control unit closes U1, U2, and U3, and opens U4. At this time, the output voltage of the current and voltage setting and measurement unit 1 forms the gate excitation through U1→DUT1_G; at the same time, an initial bias is applied through U3→DUT1_D. The current path flows from unit 1 (Hi) through U3, DUT1 (D to S), and U2 back to GND and unit 1 (Lo), realizing the pre-biasing of the DUT.

[0054] Vth Measurement Phase: The main control unit closes U1, U2, and U4, and opens U3. Measurement unit 1 switches to current source mode, outputting a specified small drain current (Id). The current path is: Unit 1 (Hi) through U1 → DUT1_G (but the gate is high impedance, so the current is extremely small), the main current path is through the internal channel of DUT1 from the drain to the source, and then through U2 back to GND. At this time, the drain voltage of DUT1 is fed back to measurement unit 1 through U4 for high-precision measurement. When the circuit is stable, the gate-to-source voltage (Vgs) measured by measurement unit 1 is the threshold voltage Vth.

[0055] Figure 5 The branch structures of other devices under test (DUTs) such as DUTb and DUTk are completely symmetrical with DUT1. They are controlled by switch groups (U4b-3, U4b-2, U4b-1, U4b) and (U4k-3, U4k-2, U4k-1, U4k), respectively, and connected to their respective current and voltage reference and measurement units. All branches are synchronously time-controlled by the same main control unit, thereby enabling parallel testing.

[0056] Figure 6 A timing diagram for threshold voltage testing of a parallel branch provided according to an embodiment of this application is shown.

[0057] like Figure 6 The following is a timing diagram of the parallel threshold voltage test, taking the branches containing wafers DUT1, DUTb, and DUTk as an example.

[0058] Switching units U1, U2, U3, U4, U4b-3, U4b-2, U4b-1, U4b, U4k-3, U4k-2, U4k-1, and U4k are controlled by a main control unit to control the switching on and off of the channels. The main control unit communicates with the current and voltage setting and measurement units, controls the operating status of the current and voltage setting and measurement units, and reads the data from the current and voltage setting and measurement units.

[0059] Figure 6 In the timing diagram, a high level represents the switching unit being turned on, and a low level represents the switching unit being turned off.

[0060] At time t0, switching units U1, U2, U3, U4, U4b-3, U4b-2, U4b-1, U4b, U4k-3, U4k-2, U4k-1, and U4k are all disconnected, and the test circuit is in the default state.

[0061] At time t1, switching units U1, U2, U3, U4b-3, U4b-2, U4b-1, U4k-3, U4k-2, and U4k-1 are turned on, while U4, U4b, and U4k are turned off. Current and voltage setting and measurement units 1, 2, and n begin applying gate pre-bias voltages to DUT1, DUTb, and DUTk. At this time, all other switches are turned off to ensure that the threshold voltage test is not affected by other devices under test.

[0062] At time t2, the outputs of current and voltage setting and measurement unit 1, current and voltage setting and measurement unit 2, and current and voltage setting and measurement unit n are turned off, the switching unit does not operate, and the gate pre-bias voltage has been applied.

[0063] At time t3, switching units U1, U2, U4, U4b-3, U4b-2, U4b, U4k-3, U4k-2, and U4k are turned on, while U3, U4b-1, and U4k-1 are turned off. Current and voltage setting and measurement units 1, 2, and n begin to output the specified drain current.

[0064] At time t4, after the gate-source voltage stabilizes, the main control unit reads the voltage values ​​of current-voltage setpoint and measurement unit 1, current-voltage setpoint and measurement unit 2, and current-voltage setpoint and measurement unit n. These values ​​are the threshold voltages of each die.

[0065] At time t5, after reading all the threshold voltage values, turn off the output of the current and voltage setpoint and measurement unit, and turn off all switching units.

[0066] Repeat the above process until the threshold voltage test of all dies is completed.

[0067] The proposed solution can achieve parallel threshold voltage measurement of hundreds, thousands, or even tens of thousands of wafer chips.

[0068] Preferably, the multiple current and voltage input and measurement units are multiple independent source measurement units (SMUs).

[0069] The switching unit in the switching network is a reed relay.

[0070] The "synchronous control command" is issued by the main control unit according to the preset timing diagram. The timing diagram defines the on / off state of each switching unit in the first and second time periods, as well as the start and end times of the output and measurement of each current and voltage setpoint and measurement unit.

[0071] Following the second time period, a third time period is also included: the main control unit reads and stores all current and voltage reference values ​​and threshold voltage values ​​measured by the measurement units, and then controls all switching units to disconnect and shut down the outputs of all current and voltage reference values ​​and measurement units.

[0072] The device under test is a silicon carbide (SiC) transistor.

[0073] A threshold voltage test circuit according to an embodiment of this application includes a main control unit, multiple current and voltage input and measurement units, and multiple measurement branches containing multiple switching units. The main control unit sends synchronous control commands to the multiple current and voltage input and measurement units and the multiple measurement branches containing multiple switching units to simultaneously provide gate pre-bias voltage and drain current to multiple devices under test (DUTs) sequentially; and measures and records the gate-source voltage of the DUTs. This significantly shortens the Vth test time of the entire wafer from several minutes to seconds or less, making it suitable for mass production. Simultaneously, this invention reduces the investment in testing equipment resources and time, greatly improving production capacity; and it can quickly screen out defective devices, ensuring the reliability of silicon carbide devices under harsh conditions such as high temperature and high pressure, making it suitable for key fields such as electric vehicles and renewable energy.

[0074] Example 2 For details not disclosed in the threshold voltage test method of this embodiment, please refer to the specific implementation of the threshold voltage test circuit or system in other embodiments.

[0075] Figure 7 The diagram illustrates the steps of a threshold voltage testing method according to an embodiment of this application.

[0076] like Figure 7 As shown in the figure, a threshold voltage testing method according to an embodiment of this application includes: S1: Simultaneously provides gate pre-bias voltage and drain current to multiple devices under test in sequence; S2: Measure and record the gate-source voltage of the device under test (DUT). Multiple DUTs are multiple dies on the same wafer.

[0077] This application simultaneously provides gate pre-bias voltage and drain current to multiple devices under test (DUTs) sequentially; and measures and records the gate-source voltage of the DUTs. This significantly shortens the Vth test time for the entire wafer.

[0078] Figure 8 The diagram shows a step of synchronously controlling the pre-bias voltage and current according to an embodiment of this application.

[0079] like Figure 8 As shown, gate pre-bias voltage and drain current are provided sequentially for multiple devices under test, including: Simultaneously control one or more current and voltage input and measurement units, S11: simultaneously provide gate pre-bias voltage to multiple devices under test in the first time period; S12: simultaneously provide drain current to multiple devices under test in the second time period.

[0080] In specific implementation, S11 simultaneously provides gate pre-bias voltages to multiple devices under test during the first time period, including: Simultaneously control one or more current and voltage input and measurement units to provide gate pre-bias voltage; A current and voltage setting and measurement unit simultaneously provides gate pre-bias voltage to one or more devices under test during the first time period.

[0081] The first time period includes simultaneously providing gate pre-bias voltages to one or more cells under test, including: In the first time period, the switching unit corresponding to the test branch where each device under test is located is turned on; The corresponding current and voltage input and measurement units apply a pre-bias voltage to the gate of their respective connected devices under test.

[0082] In specific implementation, S12: The second time period simultaneously provides drain current to multiple devices under test, including: Simultaneously control one or more current and voltage input and measurement units to provide drain current; A current and voltage setting and measurement unit simultaneously provides drain current to one or more devices under test during a second time period.

[0083] In the second time period, drain current is simultaneously provided to one or more devices under test, including: In the second time period, the switching unit corresponding to the test branch where each device under test is located is turned on; The corresponding current and voltage inputs and measurement units apply a specified test current to the drain of their respective connected devices under test.

[0084] In a preferred embodiment, S2 measures and records the gate-source voltage of the device under test, including: after the gate-source voltage stabilizes, simultaneously measuring and acquiring the gate voltages of multiple devices under test as the threshold voltage (Vth) of the device under test.

[0085] In practice, after the gate-source voltage stabilizes, during the third time period, one or more current and voltage input and measurement units are simultaneously controlled to read and store the gate voltage of all devices under test in their respective branches; finally, all switching units are controlled to disconnect and the outputs of all current and voltage input and measurement units are turned off.

[0086] Preferably, the multiple current and voltage input and measurement units are multiple independent source measurement units (SMUs).

[0087] The switching unit in the switching network is a reed relay.

[0088] The "synchronous control command" is issued by the main control unit according to the preset timing diagram. The timing diagram defines the on / off state of each switching unit in the first and second time periods, as well as the start and end times of the output and measurement of each current and voltage setpoint and measurement unit.

[0089] Following the second time period, a third time period is also included: the main control unit reads and stores all current and voltage reference values ​​and threshold voltage values ​​measured by the measurement units, and then controls all switching units to disconnect and shut down the outputs of all current and voltage reference values ​​and measurement units.

[0090] The device under test is a silicon carbide (SiC) transistor.

[0091] Figure 5 The diagram shows a circuit diagram of a threshold voltage test circuit according to an embodiment of this application.

[0092] like Figure 5 As shown, taking a three-unit current and voltage setting and measurement system as an example, namely current and voltage setting and measurement unit 1, current and voltage setting and measurement unit 2, and current and voltage setting and measurement unit 3.

[0093] Taking each current and voltage setpoint and measurement unit connected to three measurement branches as an example, such as the measurement branch where wafer chip DUT1 is located, the measurement branch where wafer chip DUT2 is located, and the measurement branch where wafer chip DUTa is located.

[0094] In this embodiment, each measurement branch includes four switching units. Taking the measurement branch where the wafer chip DUT1 is located as an example, it includes switching unit U1, switching unit U2, switching unit U3 and switching unit U4.

[0095] Taking the measurement branch of wafer chip DUT2 as an example, it includes switching unit U5, switching unit U6, switching unit U7, and switching unit U8.

[0096] The other measurement branches are shown in the figure in sequence, and will not be described in detail here.

[0097] Figure 6 A timing diagram for threshold voltage testing of a parallel branch provided according to an embodiment of this application is shown.

[0098] like Figure 5 As shown, each of the test circuits containing wafer chips DUT1~DUTn contains 4 switching units. Figure 6 A timing diagram for threshold voltage testing of a parallel branch provided according to an embodiment of this application is shown.

[0099] like Figure 6 The following is a timing diagram of the parallel threshold voltage test, taking the branches containing wafers DUT1, DUTb, and DUTk as an example.

[0100] Combination Figure 5 Circuit diagram and Figure 6 The timing diagram illustrates the implementation principle of this application.

[0101] The main control unit acts as the overall controller.

[0102] Multiple current and voltage input and measurement units: Each unit is responsible for testing one or more dies.

[0103] Switching unit network: Each die test branch contains 4 switching units (e.g., the branch where DUT1 is located corresponds to U1, U2, U3, and U4), which are used to control the connection of the gate and drain circuits.

[0104] Test timing (in) Figure 6 (For example) At time t0: All switching units are open, and the system is in the default state.

[0105] At time t1: Some switches are turned on (such as U1, U2, U3, etc.), and the current and voltage setting and measurement units begin to apply the gate pre-bias voltage.

[0106] At time t2: The measurement unit output is turned off, and the pre-bias voltage is applied.

[0107] At time t3: the switch state changes (e.g., U1, U2, and U4 are on, and U3 is off), and the measuring unit outputs the specified drain current.

[0108] At time t4: After the gate-source voltage stabilizes, the main control unit reads the voltage values ​​of each measurement unit as the threshold voltage Vth.

[0109] At time t5: All outputs and switching units are turned off, and the current batch test is completed.

[0110] Repeat the process: Repeat the above process until all dies have been tested. The document mentions that it can be scaled up to parallel testing of hundreds, thousands, or even tens of thousands of dies.

[0111] The method described in this application, through precise timing control, performs pre-bias and Vth measurement steps on multiple dies in parallel within the same time period, rather than sequentially. This significantly reduces the Vth testing time for the entire wafer from several minutes to seconds or less, making it suitable for mass production. Simultaneously, this invention reduces the investment in testing equipment resources and time, greatly increasing production capacity. Furthermore, it can quickly screen out defective devices, ensuring the reliability of silicon carbide devices under harsh conditions such as high temperature and high pressure, making it suitable for critical fields such as electric vehicles and renewable energy.

[0112] Example 3 This embodiment provides a threshold voltage testing system. For details not disclosed in the threshold voltage testing system of this embodiment, please refer to the specific implementation of the threshold voltage testing methods and devices in other embodiments.

[0113] Figure 9 The diagram shows a schematic of the threshold voltage testing system according to an embodiment of this application.

[0114] like Figure 9 As shown, the threshold voltage testing system of this application embodiment includes: Synchronous control module 11 is used to simultaneously provide gate pre-bias voltage and drain current to multiple devices under test in sequence; Measurement module 12 is used to measure and record the gate-source voltage of the device under test (DUT). Multiple DUTs are multiple dies on the same wafer.

[0115] The threshold voltage testing system of this application provides a synchronous control module 11 that simultaneously provides gate pre-bias voltage and drain current to multiple devices under test (DUTs) sequentially; and a measurement module 12 measures and records the gate-source voltage of the DUTs. This significantly reduces the Vth testing time for the entire wafer from several minutes to seconds or less, making it suitable for mass production. Simultaneously, this invention reduces the investment in testing equipment resources and time, greatly increasing production capacity; and it can quickly screen out defective devices, ensuring the reliability of silicon carbide devices under harsh conditions such as high temperature and high pressure, making it suitable for critical fields such as electric vehicles and renewable energy.

[0116] Example 4 This embodiment provides another threshold voltage testing device. For details not disclosed in the threshold voltage testing device of this embodiment, please refer to the specific implementation of the threshold voltage testing method or system in other embodiments.

[0117] Figure 10The diagram shows a schematic diagram of a threshold voltage testing device according to an embodiment of this application.

[0118] like Figure 10 As shown, the threshold voltage testing device 400 includes: a storage unit 402 for storing executable instructions; and a processing unit 401 for connecting to the storage unit 402 to execute the executable instructions to complete the threshold voltage testing method.

[0119] Those skilled in the art will understand that the illustration Figure 10 This is merely an example of a threshold voltage test device 400 and does not constitute a limitation on the threshold voltage test device 400. It may include more or fewer components than shown, or combine certain components, or different components. For example, the threshold voltage test device 400 may also include input / output devices, network access devices, buses, etc.

[0120] The processing unit 401 (Central Processing Unit, CPU) can also be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor, or the processing unit 401 can be any conventional processor. The processing unit 401 is the control center of the threshold voltage testing device 400, connecting all parts of the threshold voltage testing device 400 through various interfaces and lines.

[0121] Storage unit 402 can be used to store computer-readable instructions. Processing unit 401 implements various functions of threshold voltage testing device 400 by running or executing computer-readable instructions or modules stored in storage unit 402 and calling data stored in storage unit 402. Storage unit 402 may mainly include a program storage area and a data storage area. The program storage area may store the operating system, application programs required for at least one function (such as sound playback function, image playback function, etc.), etc.; the data storage area may store data created according to the use of threshold voltage testing device 400, etc. In addition, storage unit 402 may include hard disk, memory, plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, at least one disk storage device, flash memory device, read-only memory (ROM), random access memory (RAM), or other non-volatile / volatile storage devices.

[0122] If the threshold voltage testing device 400 integrates a module that is implemented as a software functional module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments of the present invention can also be implemented by instructing related hardware through computer-readable instructions. These computer-readable instructions can be stored in a computer-readable storage medium, and when executed by a processor, they can implement the steps of the various method embodiments described above.

[0123] Example 5 This embodiment provides a computer-readable storage medium having a computer program stored thereon; the computer program is executed by a processor to implement the threshold voltage testing method in other embodiments.

[0124] In summary, the threshold voltage testing system and storage medium of this application simultaneously provide gate pre-bias voltage and drain current to multiple devices under test (DUTs) sequentially, and measure and record the gate-source voltage of the DUTs. This significantly reduces the Vth testing time for the entire wafer from several minutes to seconds or less, making it suitable for mass production. Furthermore, this invention reduces the investment in testing equipment resources and time, greatly increasing production capacity; and it can quickly screen out defective devices, ensuring the reliability of silicon carbide devices under harsh conditions such as high temperature and high pressure, making it suitable for critical fields such as electric vehicles and renewable energy.

[0125] Those skilled in the art will understand that the terminology used in this invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The singular forms “a,” “the,” and “the” as used in this invention and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used herein refers to and includes any and all possible combinations of one or more of the associated listed items.

[0126] It should be understood that although the terms first, second, third, etc., may be used in this invention to describe various information, this information should not be limited to these terms. These terms are only used to distinguish information of the same type from one another. For example, first information may also be referred to as second information without departing from the scope of this invention, and similarly, second information may also be referred to as first information. Depending on the context, the word "if" as used herein may be interpreted as "when," "when," or "in response to a determination."

[0127] Although preferred embodiments of this application have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this application.

[0128] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. A threshold voltage testing circuit, characterized in that, It includes a main control unit, multiple current and voltage setting and measurement units, and multiple measurement branches containing multiple switching units; The main control unit sends synchronization control commands to the plurality of current and voltage setting and measurement units and the plurality of measurement branches including multiple switching units, for the following purposes: Simultaneously, gate pre-bias voltage and drain current are sequentially provided to multiple devices under test; Measure and record the gate-source voltage of the plurality of devices under test; the plurality of devices under test are multiple dies on the same wafer.

2. The threshold voltage testing circuit according to claim 1, characterized in that, The simultaneous provision of gate pre-bias voltage and drain current to multiple devices under test sequentially includes: Simultaneously control one or more current and voltage input and measurement units to provide gate pre-bias voltage to the multiple devices under test in the first time period; In the second time period, drain current is provided to the multiple devices under test simultaneously.

3. The threshold voltage testing circuit according to claim 2, characterized in that, The first time period simultaneously provides gate pre-bias voltages to multiple devices under test, including: Simultaneously control one or more current and voltage input and measurement units to provide gate pre-bias voltage; Each of the current and voltage setting and measurement units simultaneously provides a gate pre-bias voltage to at least one of the plurality of devices under test (DUTs) during the first time period.

4. The threshold voltage testing circuit according to claim 3, characterized in that, The step of simultaneously providing a gate pre-bias voltage to at least one device under test (DUT) among the plurality of DUTs in the first time period includes: In the first time period, the switching unit corresponding to the test branch where each of the multiple devices under test is located is turned on; The corresponding current and voltage input and measurement units apply a pre-bias voltage to the gate of their respective connected devices under test.

5. The threshold voltage testing circuit according to claim 2, characterized in that, The second time period simultaneously provides drain current to the plurality of devices under test, including: Simultaneously control one or more current and voltage input and measurement units to provide drain current; Each of the current and voltage setting and measurement units simultaneously provides drain current to at least one of the plurality of devices under test in the second time period.

6. The threshold voltage testing circuit according to claim 5, characterized in that, The provision of drain current to at least one of the devices under test (DUTs) during the second time period includes: In the second time period, the switching unit corresponding to the test branch where each of the multiple devices under test is located is turned on; The corresponding current and voltage inputs and measurement units apply a specified test current to the drain of their respective connected devices under test.

7. The threshold voltage testing circuit according to claim 1, characterized in that, The measurement and recording of the gate-source voltage of the device under test includes: After the gate-source voltage stabilizes, the gate voltages of the multiple devices under test are simultaneously measured and acquired, which are used as the threshold voltages (Vth) of the devices under test.

8. A threshold voltage testing system, characterized in that, Includes the threshold voltage test circuit according to any one of claims 1-7, and: The synchronous control module is used to simultaneously provide gate pre-bias voltage and drain current to multiple devices under test in sequence. A measurement module is used to measure and record the gate-source voltage of the plurality of devices under test; the plurality of devices under test are multiple dies on the same wafer.

9. A threshold voltage testing method using the threshold voltage testing circuit according to any one of claims 1-7, characterized in that, include: Simultaneously, gate pre-bias voltage and drain current are sequentially provided to multiple devices under test; Measure and record the gate-source voltages of the plurality of devices under test; The multiple devices under test are multiple bare dies on the same wafer.

10. A threshold voltage testing device, characterized in that, include: Storage unit, used to store executable instructions; And a processing unit, for connection to a memory to execute executable instructions to complete the threshold voltage test method as described in claim 9.

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