Semiconductor structure and its fabrication methods, semiconductor devices

Abstract

This application provides a semiconductor structure, its fabrication method, and a semiconductor device, relating to the field of semiconductor technology. These embodiments can reduce the size of the semiconductor structure and improve its stability and reliability. The semiconductor structure includes a semiconductor substrate, a second transistor structure, a first transistor structure, and a capacitor structure. The second transistor structure is disposed on one side of the semiconductor substrate. The first transistor structure is disposed on the side of the second transistor structure away from the semiconductor substrate. The capacitor structure is disposed between the first and second transistor structures; one electrode layer of the capacitor structure is coupled to both the first and second transistor structures.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor technology, and in particular to a semiconductor structure, its fabrication method, and a semiconductor device. Background Technology

[0002] With the development of integrated circuit technology, the size of semiconductor devices is shrinking, and the integration density requirements of electronic components such as transistors are increasing, posing a significant challenge to the data read and write performance of semiconductor devices. Especially in the application of Dynamic Random Access Memory (DRAM), the structure and relative arrangement of different electronic components within DRAM are one of the important factors affecting the performance of semiconductor devices. Summary of the Invention

[0003] In view of this, the present disclosure provides a semiconductor structure and its fabrication method, as well as a semiconductor device, which can reduce the size of the semiconductor structure and improve its stability and reliability.

[0004] On one hand, some embodiments of this application provide a semiconductor structure. The semiconductor structure includes: a semiconductor substrate, a second transistor structure, a first transistor structure, and a capacitor structure. The second transistor structure is disposed on one side of the semiconductor substrate. The first transistor structure is disposed on the side of the second transistor structure away from the semiconductor substrate. The capacitor structure is disposed between the first transistor structure and the second transistor structure; one electrode layer of the capacitor structure is coupled to both the first transistor structure and the second transistor structure.

[0005] In some examples, the capacitor structure includes a first electrode layer and a second electrode layer. The first electrode layer extends along the stacking direction of the first transistor structure and the second transistor structure. The second electrode layer extends along the stacking direction of the first transistor structure and the second transistor structure. The first electrode layer and the second electrode layer are spaced apart in a direction perpendicular to the stacking direction of the first transistor structure and the second transistor structure; the first electrode layer is coupled to both the first transistor structure and the second transistor structure.

[0006] In some examples, the semiconductor structure further includes a first line structure located on the side of the first transistor structure away from the capacitor structure.

[0007] The first transistor structure includes a first semiconductor layer and a first transition structure. The first semiconductor layer is coupled to a first electrode of the capacitor structure via a first contact structure. The first transition structure is disposed on the side of the first semiconductor layer away from the capacitor structure; the first transition structure extends along the direction of the first transistor structure away from the capacitor structure and is coupled to the first semiconductor layer and the first bit line structure. Specifically, the first transition structure and the first contact structure are coupled to opposite sides of the first semiconductor layer along a direction perpendicular to the stacking direction of the first transistor and the second transistor, respectively.

[0008] In some examples, the semiconductor structure also includes a first word line structure.

[0009] The first transistor structure further includes a first conductive layer. The first conductive layer is disposed on the side of the first semiconductor layer away from the capacitor structure, and is spaced apart from the first adapter structure along a stacking direction perpendicular to the first transistor structure and the second transistor structure; the first conductive layer is coupled to the first word line structure.

[0010] In some examples, the first semiconductor layer comprises indium gallium zinc oxide.

[0011] In some examples, the first transistor structure further includes: a first dielectric layer, a first conductive layer, and a second dielectric layer. The first dielectric layer is disposed on the side of the first semiconductor layer away from the capacitor structure. The first conductive layer is disposed on the side of the first dielectric layer away from the first semiconductor layer. The second dielectric layer is disposed on the side of the first conductive layer away from the first dielectric layer. The first semiconductor layer includes a first electrode region and a second electrode region spaced apart. The first electrode region is coupled to the first electrode plate layer via the first contact structure, and the second electrode region is coupled to the first bit line structure via the first transition structure.

[0012] In some examples, the second transistor structure includes a second conductive layer; the second conductive layer is coupled to the first electrode layer of the capacitor structure via a second contact structure. The second contact structure extends along the stacking direction of the first transistor structure and the second transistor structure.

[0013] In some examples, the second transistor structure further includes a second semiconductor layer disposed on the side of the second conductive layer away from the capacitor structure.

[0014] In some examples, the semiconductor structure further includes a second word line structure and a second bit line structure.

[0015] The second transistor structure includes: a second semiconductor layer, a third dielectric layer, a second conductive layer, and a fourth dielectric layer. The second semiconductor layer includes a third electrode region and a fourth electrode region spaced apart. The third dielectric layer is disposed on one side of the second semiconductor layer. The second conductive layer is disposed on the side of the third dielectric layer away from the second semiconductor layer; the second conductive layer is coupled to the first electrode layer via a second contact structure. The fourth dielectric layer is disposed on the side of the second conductive layer away from the third dielectric layer. The third electrode region is coupled to the second word line structure; the fourth electrode region is coupled to the second bit line structure.

[0016] In some examples, the semiconductor structure also includes a first word line structure and a first bit line structure.

[0017] The first transistor structure includes a second dielectric layer and a first pillar-shaped conductive structure disposed in the second dielectric layer. The first pillar-shaped conductive structure extends along the stacking direction of the first transistor structure and the second transistor structure, with one end coupled to the capacitor structure and the other end coupled to the first word line structure.

[0018] The first columnar conductive structure includes: a columnar first conductive layer, a first dielectric layer, and a first semiconductor layer. The columnar first conductive layer is coupled to the first word line structure. The first dielectric layer surrounds the columnar first conductive layer. The first semiconductor layer surrounds the first dielectric layer; the first semiconductor layer includes a first electrode region and a second electrode region spaced apart along the stacking direction of the first transistor structure and the second transistor structure; the second electrode region is coupled to the first electrode layer of the capacitor structure through a first contact structure; the first electrode region is coupled to the first bit line structure.

[0019] In some examples, the semiconductor structure further includes a second word line structure and a second bit line structure.

[0020] The second transistor structure includes a fourth dielectric layer and a second pillar-shaped conductive structure disposed in the fourth dielectric layer. The second pillar-shaped conductive structure extends along the stacking direction of the second transistor structure and the first transistor structure, with one end coupled to the capacitor structure and the other end coupled to the second word line structure.

[0021] The second columnar conductive structure includes: a columnar second conductive layer, a third dielectric layer, and a second semiconductor layer. One end of the columnar second conductive layer is coupled to the first electrode layer via a second contact structure. The third dielectric layer surrounds the columnar second conductive layer. The second semiconductor layer surrounds the third dielectric layer; the second semiconductor layer includes a third electrode region and a fourth electrode region disposed at intervals along the stacking direction of the second transistor structure and the first transistor structure; the third electrode region is coupled to the second word line structure; the fourth electrode region is coupled to the second bit line structure.

[0022] In some examples, the capacitor structure includes: a fifth dielectric layer and a columnar capacitor disposed in the fifth dielectric layer. The columnar capacitor includes: a columnar dielectric layer; a first electrode layer surrounding the columnar dielectric layer; a sixth dielectric layer surrounding the first electrode layer; and a second electrode layer surrounding the sixth dielectric layer.

[0023] In some examples, the material of the second semiconductor layer is the same as that of the first semiconductor layer.

[0024] In some examples, the layer structure of the first transistor structure is the same as that of the second transistor structure.

[0025] In some examples, the first transistor structure includes a planar transistor structure or a vertical transistor structure; the second transistor structure includes a planar transistor structure or a vertical transistor structure.

[0026] In the aforementioned semiconductor structure, the first and second transistor structures are stacked on the semiconductor substrate, which helps to reduce the size of the semiconductor structure and increase its integration density. Furthermore, the addition of a capacitor structure between the first and second transistor structures increases the spacing between them, reducing the impact of the fabrication process conditions of one transistor structure on the performance stability of the material layer in the subsequent fabrication of the other transistor structure, thereby improving the product performance of the semiconductor structure.

[0027] On the other hand, embodiments of this application provide a method for fabricating a semiconductor structure. The method includes providing a semiconductor substrate; forming a second transistor structure on one side of the semiconductor substrate; forming a capacitor structure on the side of the second transistor structure away from the semiconductor substrate; and forming a first transistor structure on the side of the capacitor structure away from the second transistor structure. wherein one electrode layer of the capacitor structure is coupled to both the first transistor structure and the second transistor structure.

[0028] In some examples, forming a capacitor structure located on the side of the second transistor structure away from the semiconductor substrate includes: forming a first electrode layer and a second electrode layer that extend along the direction of the second transistor structure away from the semiconductor substrate and are spaced apart.

[0029] In some examples, after the second transistor structure is formed, a first semiconductor layer of the first transistor structure is formed; the first semiconductor layer comprises indium gallium zinc oxide material.

[0030] In some examples, the fabrication method further includes: forming a first word line structure; the first word line structure being coupled to a first conductive layer of the first transistor structure; forming a first bit line structure; the first bit line structure being coupled to a first electrode region of the first semiconductor layer of the first transistor structure; forming a second word line structure; the second word line structure being coupled to a third electrode region of the second semiconductor layer of the second transistor structure; and forming a second bit line structure, the second bit line structure being coupled to a fourth electrode region of the second semiconductor layer of the second transistor structure.

[0031] The beneficial effects of the above-described semiconductor structure fabrication method are the same as those of the semiconductor structures provided in any of the above examples, and will not be repeated here. Furthermore, in the above-described semiconductor structure fabrication method, the second transistor structure can be formed first, followed by the capacitor structure, and finally the first transistor structure. This fabrication sequence of electronic components can reduce the adverse effects of the process temperature of the first-formed second transistor structure on the performance of the material layer of the subsequently formed first transistor structure. Especially, by fabricating the capacitor structure after the second transistor structure and before the first transistor structure, the properties of the capacitor structure's material layer and the effect of the material spacing further reduce the adverse effects of the process temperature of the first-formed second transistor structure on the performance of the material layer of the subsequently formed first transistor structure, thereby improving the product performance of the semiconductor structure.

[0032] In another aspect, embodiments of this application provide a semiconductor device. The semiconductor device includes at least one semiconductor structure as provided in any of the examples above and a peripheral circuit structure coupled to said at least one semiconductor structure.

[0033] The beneficial effects of the semiconductor device described above are the same as those of the semiconductor structure provided in any of the above examples, and will not be repeated here. Attached Figure Description

[0034] In the accompanying drawings, similar reference numerals may describe similar parts in different views. Similar reference numerals with different letter suffixes may indicate different examples of similar parts. The drawings illustrate, by way of example and not limitation, the various embodiments discussed herein.

[0035] Figure 1 This is a schematic diagram of a circuit diagram corresponding to a semiconductor structure provided in an embodiment of this application;

[0036] Figure 2 A schematic diagram of a semiconductor structure provided in an embodiment of this application. Figure 1 ;

[0037] Figure 3 A schematic diagram of a semiconductor structure provided in an embodiment of this application. Figure 2 ;

[0038] Figure 4 A schematic diagram of a semiconductor structure provided in an embodiment of this application. Figure 3 ;

[0039] Figure 5 A schematic diagram of a semiconductor structure provided in an embodiment of this application. Figure 4 ;

[0040] Figure 6 A schematic diagram of a semiconductor structure provided in an embodiment of this application. Figure 5 ;

[0041] Figure 7 A schematic diagram of a semiconductor structure provided in an embodiment of this application. Figure 6 ;

[0042] Figure 8 A schematic diagram of a semiconductor structure provided in an embodiment of this application. Figure 7 ;

[0043] Figure 9 A schematic diagram of a semiconductor structure provided in an embodiment of this application. Figure 8 ;

[0044] Figure 10 A schematic diagram of a semiconductor structure provided in an embodiment of this application. Figure 9 ;

[0045] Figure 11 A schematic diagram of a semiconductor structure provided in an embodiment of this application. Figure 10 ;

[0046] Figure 12 A schematic diagram of a semiconductor structure provided in another embodiment of this application. Figure 1 ;

[0047] Figure 13 A schematic diagram of a semiconductor structure provided in another embodiment of this application. Figure 2 ;

[0048] Figure 14A schematic diagram of a semiconductor structure provided in another embodiment of this application. Figure 3 ;

[0049] Figure 15 This is a schematic diagram of a semiconductor structure provided in yet another embodiment of this application;

[0050] Figure 16 A flowchart illustrating a method for fabricating a semiconductor structure according to an embodiment of this application. Figure 1 ;

[0051] Figure 17 A schematic diagram of the process flow for fabricating a semiconductor structure according to an embodiment of this application;

[0052] Figure 18 A schematic diagram of the process flow for fabricating a semiconductor structure according to another embodiment of this application;

[0053] Figure 19 A flowchart illustrating a method for fabricating a semiconductor structure according to an embodiment of this application. Figure 2 ;

[0054] Figure 20 A flowchart illustrating a method for fabricating a semiconductor structure according to an embodiment of this application. Figure 3 ;

[0055] Figure 21 This is a schematic diagram of the structure of a semiconductor device provided in an embodiment of this application;

[0056] Figure 22 A schematic diagram of the peripheral circuit structure of a semiconductor device provided in an embodiment of this application;

[0057] Figure 23 This is a schematic diagram of the structure of a memory system provided in an embodiment of this application;

[0058] Figure 24 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0059] The technical solution of this disclosure will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0060] In this embodiment of the disclosure, the terms "first," "second," etc., are used to distinguish similar objects, and not to describe a specific order or sequence.

[0061] In this embodiment of the disclosure, the term "A in contact with B" includes the case where A and B are in direct contact, or the case where there are other components between A and B and A is indirectly in contact with B.

[0062] It should be understood that the phrases "some embodiments" or "some examples" mentioned throughout the specification mean that a specific feature, structure, or characteristic related to an embodiment is included in at least one embodiment of this application. Therefore, "some embodiments" or "some examples" appearing throughout the specification do not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It should be understood that in the various embodiments of this application, the sequence numbers of the above-described processes do not imply a sequential order of execution; the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application. The sequence numbers of the above-described embodiments are merely descriptive and do not represent the superiority or inferiority of the embodiments.

[0063] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0064] It is understood that the meanings of “on”, “above” and “above” in this disclosure should be interpreted in the broadest sense, such that “on” means not only that it is “on” something without any intervening feature or layer (i.e., directly on something), but also that it is “on” something with an intervening feature or layer.

[0065] It should be noted that although this specification describes the embodiments, not every embodiment contains only one independent technical solution. This way of describing the specification is only for clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

[0066] With the development of integrated circuit technology, the size of semiconductor devices is shrinking, and the integration density requirements of electronic components such as transistors are increasing, posing a significant challenge to the data read and write performance of semiconductor devices. Especially in the application of Dynamic Random Access Memory (DRAM), the structure and relative arrangement of different electronic components within DRAM are one of the important factors affecting the performance of semiconductor devices.

[0067] For example, DRAM devices in related technologies can have a 1T1C structure. The capacitor has a planar structure, occupying a large area, which is not conducive to reducing the area occupied by the semiconductor structure.

[0068] For another example, in in-memory computing semiconductor devices, DRAM can have a 2T1C structure. However, the capacitor is a planar structure, occupying a large area, which is not conducive to reducing the area occupied by the semiconductor structure. Alternatively, in a vertical DRAM structure, the process conditions of the upper transistor can affect the performance of the lower transistor, reducing the stability and reliability of the semiconductor device.

[0069] To address the aforementioned issues, this application provides a semiconductor structure, its fabrication method, and a semiconductor device, which can reduce the size of the semiconductor structure and improve its stability and reliability.

[0070] In some embodiments, such as Figure 1 As shown, this application provides a semiconductor structure 100.

[0071] For example, semiconductor structure 100 can be a stacked structure of material layers corresponding to a memory cell. For instance, if the memory is DRAM, semiconductor structure 100 can be as follows: Figure 1 The layer structure of the 2T1C memory cell is shown. The control electrode (e.g., gate) of transistor T1 is coupled to the first word line WWL, the first electrode (e.g., source) of transistor T1 is coupled to the first bit line WBL, and the second electrode (e.g., drain) of transistor T1 is coupled to the memory node SN. The control electrode (e.g., gate) of transistor T2 is coupled to the memory node SN, the first electrode (e.g., source) of transistor T2 is coupled to the second bit line RBL, and the second electrode (e.g., drain) of transistor T2 is coupled to the second word line RWL. One plate of capacitor C is coupled to the memory node SN, and the other plate can be coupled to a DC power supply voltage (e.g., ground).

[0072] The following examples are based on Figure 1 Taking the connection relationship of electronic components in the circuit schematic shown as an example, an exemplary description of the layer structure of semiconductor structure 100 is given.

[0073] In some examples, such as Figure 2 As shown, the semiconductor structure 100 includes: a semiconductor substrate 110, a second transistor structure 120, a first transistor structure 130, and a capacitor structure 140.

[0074] The semiconductor substrate 110 can be a composite layer of one or more stacked materials, providing support and fabrication space for the subsequent fabrication of the first transistor structure 130, the second transistor structure 120, and the capacitor structure 140; alternatively, it can be removed or thinned after the subsequent structures are formed. The specific structure and arrangement of the semiconductor substrate 110 can be set according to actual needs and are not limited here. For example, the materials used in the semiconductor substrate 110 include one or more inorganic materials such as glass, quartz, silicon carbide, and silicon oxide, or organic materials such as epoxy resin or polyurethane.

[0075] The second transistor structure 120 is disposed on one side of the semiconductor substrate 110. For example, the second transistor structure 120 may be a layer structure forming a transistor. For instance, as... Figure 1 As shown, the second transistor structure 120 can be a layer structure of transistor T2 within a memory cell in the circuit structure.

[0076] The first transistor structure 130 is disposed on the side of the second transistor structure 120 away from the semiconductor substrate 110. For example, the first transistor structure 130 may be a layer structure forming a transistor. Figure 1 As shown, the first transistor structure 130 can be a layer structure of transistor T1 within a memory cell in the circuit structure.

[0077] Capacitor structure 140 is disposed between first transistor structure 130 and second transistor structure 120. For example, capacitor structure 140 may be a layer structure forming a capacitor. For instance, as... Figure 1 As shown, capacitor structure 140 can be a layer structure of capacitor C within a memory cell in a circuit structure.

[0078] In this capacitor structure 140, one electrode layer is coupled to both the first transistor structure 130 and the second transistor structure 120. Since one electrode layer of the capacitor structure 140 is simultaneously coupled to both the first transistor structure 130 and the second transistor structure 120, it can stabilize the amount of charge transferred between the first transistor structure 130 and the second transistor structure 120.

[0079] Thus, the second transistor structure 120 and the first transistor structure 130 are stacked on the semiconductor substrate 110, which helps to reduce the size of the semiconductor structure 100 and increase the integration density of the semiconductor structure. Furthermore, the capacitor structure 140 is placed between the first transistor structure 130 and the second transistor structure 120, which increases the spacing between the two structures, reduces the impact of the fabrication process conditions of one transistor structure on the performance stability of the material layer of the subsequently fabricated transistor structure, and improves the product performance of the semiconductor structure 100.

[0080] In some examples, such as Figure 3 As shown, the capacitor structure 140 includes: a first electrode layer 141 and a second electrode layer 142.

[0081] The first electrode layer 141 and the second electrode layer 142 can together constitute a capacitor. For example, the materials used for the first electrode layer 141 and the second electrode layer 142 include conductive materials, such as one or more of the following: copper, aluminum, tungsten, tantalum, titanium, nickel, platinum, tungsten nitride, tantalum nitride, or titanium nitride, or other elemental metals or metal compounds. The materials of the first electrode layer 141 and the second electrode layer 142 can be the same or different, depending on actual requirements.

[0082] The first electrode layer 141 extends along the stacking direction Y of the first transistor structure 130 and the second transistor structure 120. The second electrode layer 142 also extends along the stacking direction Y of the first transistor structure 130 and the second transistor structure 120. Furthermore, the first electrode layer 141 and the second electrode layer 142 are spaced apart along a direction X perpendicular to the stacking direction of the first transistor structure 130 and the second transistor structure 120; the first electrode layer 141 is coupled to both the first transistor structure 130 and the second transistor structure 120.

[0083] For example, considering that each electrode layer of the capacitor has a large area, when multiple transistors are stacked, the capacitor can also be configured as a vertical structure. For instance, the first electrode layer 141 and the second electrode layer 142 can be configured to extend along the stacking direction Y of the first transistor structure 130 and the second transistor structure 120, respectively, which can reduce the size of the semiconductor structure 100 and increase the integration density of electronic components.

[0084] Furthermore, since the dimensions of the first electrode layer 141 and the second electrode layer 142 are increased in the stacking direction Y of the first transistor structure 130 and the second transistor structure 120, the spacing between the first transistor structure 130 and the second transistor structure 120 can be increased, reducing the impact of the process conditions for manufacturing one transistor structure on the performance stability of the material layer of the subsequent transistor structure, and improving the product performance of the semiconductor structure 100.

[0085] Continue reading Figure 3 In some examples, capacitor structure 140 includes a fifth dielectric layer 145 and a columnar capacitor C disposed in the fifth dielectric layer 145.

[0086] The cylindrical capacitor C includes: a cylindrical dielectric layer 143; a first electrode layer 141 surrounding the cylindrical dielectric layer 143; a sixth dielectric layer 144 surrounding the first electrode layer 141; and a second electrode layer 142 surrounding the sixth dielectric layer 144.

[0087] For example, the materials used for the fifth dielectric layer 145 and the sixth dielectric layer 144 may include dielectric materials, such as one or more of silicon oxide, aluminum oxide, and hafnium oxide. The materials of the fifth dielectric layer 145 and the sixth dielectric layer 144 may be the same or different.

[0088] Based on the capacitor structure 140 described above, in some examples, the first transistor structure 130 in the semiconductor structure 100 may include a planar transistor structure or a vertical transistor structure; and the second transistor structure 120 may include a planar transistor structure or a vertical transistor structure.

[0089] For example, such as Figures 4 to 11 As shown, in the semiconductor structure 100, the first transistor structure 130 is a planar transistor structure, and the second transistor structure 120 is a planar transistor structure.

[0090] Or, such as Figures 12-14 As shown, the first transistor structure 130 in the semiconductor structure 100 includes a vertical transistor structure, and the second transistor structure 120 includes a vertical transistor structure.

[0091] Alternatively, the first transistor structure 130 in the semiconductor structure 100 may include a planar transistor structure, and the second transistor structure 120 may include a vertical transistor structure.

[0092] Or, as Figure 15 As shown, the first transistor structure 130 in the semiconductor structure 100 includes a vertical transistor structure, and the second transistor structure 120 includes a planar transistor structure.

[0093] The following examples illustrate the layer structure of the first transistor structure 130 and the second transistor structure 120 by combining different types of first transistor structures 130 and second transistor structures 120.

[0094] In some embodiments, such as Figures 4 to 11 As shown in the example below, a semiconductor structure 100 is provided in which the first transistor structure 130 is a planar transistor structure and the second transistor structure 120 is a planar transistor structure.

[0095] In some examples, such as Figure 4 As shown, the semiconductor structure 100 also includes a first line structure 151 located on the side of the first transistor structure 130 away from the capacitor structure 140. For example, the first line structure 151 may be made of conductive materials, such as one or more of elemental metals or metal compounds, including copper, aluminum, tungsten, tantalum, titanium, nickel, platinum, tungsten nitride, tantalum nitride, or titanium nitride.

[0096] For example, the first line structure 151 can be formed as follows: Figure 1 The layer structure of the first bit line WBL is shown. The example provided in this application does not impose specific limitations on the specific pattern of the first bit line structure 151. The connection relationship between the first bit line structure 151 and the transistor is illustrated in subsequent examples. Similarly, the specific patterns of the first word line structure 171, the second bit line structure 152, and the first word line structure 171 mentioned in subsequent examples are not specifically limited, as long as they reflect the connection relationship with the first transistor structure 130 or the second transistor structure 120.

[0097] like Figure 4 As shown, the first transistor structure 130 includes a first semiconductor layer 131 and a first transition structure 132.

[0098] The first semiconductor layer 131 is coupled to the first electrode layer 141 of the capacitor structure 140 via a first contact structure 161. For example, the material used for the first semiconductor layer 131 may include one or more of silicon (Si), germanium (Ge), gallium arsenide (GaAs), indium phosphide (InP), and gallium nitride (GaN); it may also include an oxide semiconductor material, such as indium gallium zinc oxide.

[0099] The first transition structure 132 is disposed on the side of the first semiconductor layer 131 away from the capacitor structure 140. The first transition structure 132 extends Y along the direction away from the capacitor structure 140 of the first transistor structure 130 and is coupled to the first semiconductor layer 131 and the first bit line structure 151.

[0100] The first adapter structure 132 and the first contact structure 161 are respectively coupled to the opposite sides of the first semiconductor layer 131 along the stacking direction Y perpendicular to the first transistor structure 130 and the second transistor structure 120.

[0101] Thus, the settings are as follows Figure 4 The first transition structure 132 and the first contact structure 161 shown are located on the upper and lower sides of the first semiconductor layer 131 along the stacking direction Y of the first transistor structure 130 and the second transistor structure 120, and are coupled to the first semiconductor layer 131. This helps to reduce the size of the first transistor structure 130 along the direction Y perpendicular to the semiconductor substrate 110 and reduce the size of the semiconductor structure 100.

[0102] In some examples, such as Figure 5 As shown, the semiconductor structure 100 also includes a first word line structure 171. For example, the first word line structure 171 may be made of conductive materials, such as one or more of elemental metals or metal compounds, including copper, aluminum, tungsten, tantalum, titanium, nickel, platinum, tungsten nitride, tantalum nitride, or titanium nitride.

[0103] It is understood that a portion of the first word line structure 171 serves as the first conductive layer (e.g., gate) 133 of the first transistor structure 130. To facilitate explanation of the connection relationship between the first word line structure 171 and the first transistor structure 130, as follows... Figure 5 In the cross-sectional structure of the semiconductor structure 100 shown, the first conductive layer (e.g., the gate) of the first transistor structure 130 is identified by the reference numeral "171 / 133". As provided in subsequent examples... Figure 10 In the cross-sectional structure of the semiconductor structure 100 shown, the first conductive layer (e.g., gate) of the first transistor structure 130 is identified by the reference numeral "133", and the first word line structure is identified by the reference numeral "171".

[0104] The first transistor structure 130 also includes a first conductive layer 133. The first conductive layer 133 is coupled to the first word line structure 171. It is understood that, combined with... Figure 1 The circuit schematic shown shows that the first conductive layer 133 can serve as the gate of transistor T1 and the first word line WWL.

[0105] The first conductive layer 133 is disposed on the side of the first semiconductor layer 131 away from the capacitor structure 140, and is spaced apart from the first transition structure 132 along the stacking direction X perpendicular to the first transistor structure 130 and the second transistor structure 120.

[0106] For example, the first conductive layer 133 may be made of conductive materials, such as one or more of the following: copper, aluminum, tungsten, tantalum, titanium, nickel, platinum, tungsten nitride, tantalum nitride, or titanium nitride.

[0107] Continue reading Figure 5 Based on the relative positional relationship between the first transition structure 132 and the first semiconductor layer 131 of the first transistor structure 130, the first contact structure 161, and the first first line structure 151, the first conductive layer 133 is set in the layer between the first semiconductor layer 131 and the first transition structure 132 along the stacking direction X perpendicular to the first transistor structure 130 and the second transistor structure 120. This does not additionally increase the size of the first transistor structure 130 along the direction Y perpendicular to the semiconductor substrate 110, which is beneficial to reducing the size of the semiconductor structure 100.

[0108] In some examples, such as Figure 4 and Figure 5 As shown, the first semiconductor layer 131 includes indium gallium zinc oxide material.

[0109] For example, based on the positional relationship between the first transistor structure 130, the second transistor structure 120, and the capacitor structure 140, the first semiconductor layer 131 is fabricated using indium gallium zinc oxide material. This can improve the performance of the first transistor structure 130 and also reduce the adverse effects of the process temperature of the second transistor structure 120 on the material properties of the first semiconductor layer 131, thereby improving the stability and reliability of the first transistor structure 130.

[0110] Understandably, the high electron mobility and stability of indium gallium zinc oxide (IGZO) materials are beneficial for improving the conductivity stability and reliability of electronic components. However, IGZO has a relatively low processing temperature and is susceptible to degradation in conductivity due to high temperatures. Therefore, for semiconductor structures using IGZO transistors, the processing conditions of other electronic components and their relative positions to the IGZO transistor structure are key factors affecting its performance. Especially when the IGZO transistor structure is used as a critical component for data readout from a memory, improving its performance stability is crucial for enhancing memory performance.

[0111] In some examples, such as Figure 6 As shown, the first transistor structure 130 further includes: a first dielectric layer 134, a first conductive layer 133 / 171, and a second dielectric layer 135.

[0112] The first dielectric layer 134 is disposed on the side of the first semiconductor layer 131 away from the capacitor structure 140. For example, the material used for the first dielectric layer 134 includes dielectric materials, such as one or more of silicon oxide, aluminum oxide, and hafnium oxide.

[0113] The first conductive layer 133 / 171 is disposed on the side of the first dielectric layer 134 away from the first semiconductor layer 131. For example, the material used for the first conductive layer 131 includes conductive materials, such as one or more of elemental metals or metal compounds such as copper, aluminum, tungsten, tantalum, titanium, nickel, platinum, tungsten nitride, tantalum nitride, or titanium nitride.

[0114] The second dielectric layer 135 is disposed on the side of the first conductive layer 133 / 171 away from the first dielectric layer 134. For example, the material used for the second dielectric layer 135 includes dielectric materials, such as one or more of silicon oxide, aluminum oxide, and hafnium oxide. The materials of the second dielectric layer 135 and the first dielectric layer 134 may be the same or different.

[0115] The first semiconductor layer 131 includes a first electrode region 1311 and a second electrode region 1312 spaced apart. The first electrode region 1311 is coupled to the first electrode layer 141 through a first contact structure 161, and the second electrode region 1312 is coupled to the first line structure 151 through a first transition structure 132.

[0116] Based on such Figure 6 The layer structure of the first transistor structure 130 shown can form a transistor T1 with a smaller size along the direction Y perpendicular to the semiconductor substrate 110, which is beneficial to reducing the size of the semiconductor structure 100.

[0117] In some examples, such as Figure 7 As shown, the second transistor structure 120 includes a second conductive layer 121.

[0118] The second conductive layer 121 is coupled to the first electrode layer 141 of the capacitor structure 140 via a second contact structure 162. For example, the first conductive layer 131 may be made of conductive materials, such as one or more of the following metallic elements or compounds: copper, aluminum, tungsten, tantalum, titanium, nickel, platinum, tungsten nitride, tantalum nitride, or titanium nitride.

[0119] The second contact structure 162 extends along the stacking direction Y of the first transistor structure 130 and the second transistor structure 120. For example, the material used for the second contact structure 162 includes conductive materials, such as one or more of elemental metals or metal compounds such as copper, aluminum, tungsten, tantalum, titanium, nickel, platinum, tungsten nitride, tantalum nitride, or titanium nitride.

[0120] By positioning the second contact structure 162 between the capacitor structure 140 and the second transistor structure 120, the spacing between the first transistor structure 130 and the second transistor structure 120 is increased. This helps to reduce the adverse effects of the process temperature of the second transistor structure 120 on the performance of the first transistor structure 130 (especially the first semiconductor layer 131), improves the electrical stability and reliability of the first transistor structure 130, and enhances the product performance of the semiconductor structure 100.

[0121] In some examples, such as Figure 8 As shown, the second transistor structure 120 further includes a second semiconductor layer 122. The second semiconductor layer 122 is disposed on the side of the second conductive layer 121 away from the capacitor structure 140.

[0122] Understandably, the process temperature for forming the second semiconductor layer 122 is relatively high. Therefore, placing the second semiconductor layer 122 further away from the first transistor structure 130 increases the time interval between fabricating the second semiconductor layer 122 and fabricating the first transistor structure 130 (especially the first semiconductor layer 131). This helps reduce the adverse effects of the process temperature of the second semiconductor layer 122 on the performance of the first transistor structure 130 (especially the first semiconductor layer 131), improves the electrical stability and reliability of the first transistor structure 130, and ultimately enhances the product performance of the semiconductor structure 100.

[0123] In some examples, such as Figure 9 As shown, the semiconductor structure 100 also includes a second word line structure 172 and a second bit line structure 152. For example, the materials used for the second word line structure 172 and the second bit line structure 152 include conductive materials, such as one or more of elemental metals or metal compounds such as copper, aluminum, tungsten, tantalum, titanium, nickel, platinum, tungsten nitride, tantalum nitride, or titanium nitride. The materials of the second word line structure 172 and the second bit line structure 152 can be the same or different, depending on actual needs.

[0124] The second transistor structure 120 includes: a second semiconductor layer 122, a third dielectric layer 123, a second conductive layer 121, and a fourth dielectric layer 124.

[0125] The second semiconductor layer 122 includes a third electrode region 1221 and a fourth electrode region 1222 spaced apart. The third electrode region 1221 is coupled to the second word line structure 172; the fourth electrode region 1222 is coupled to the second bit line structure 152.

[0126] The third dielectric layer 123 is disposed on one side of the second semiconductor layer 122.

[0127] The second conductive layer 121 is disposed on the side of the third dielectric layer 123 away from the second semiconductor layer 122; the second conductive layer 121 is coupled to the first electrode layer 141 through the second contact structure 162.

[0128] The fourth dielectric layer 124 is disposed on the side of the second conductive layer 121 away from the third dielectric layer 123.

[0129] It should be noted that, since the patterns of the second word line structure 172 and the second bit line structure 152 intersect, they can be fabricated separately on different layers of the semiconductor structure 100. Combined with the second transistor structure 120, they form... Figure 1 The connection relationship of the control electrode (e.g., gate), first electrode (e.g., source), and second electrode (e.g., drain) of transistor T2 is shown as follows: Figure 9 and Figure 10As shown, the pattern of the second word line structure 172 or the second bit line structure 152 can be disposed on the same layer as the pattern of the control electrode of the transistor T2 (i.e., the second conductive layer 121), which is beneficial to reduce the size of the semiconductor structure 100 along the direction Y perpendicular to the semiconductor substrate 110.

[0130] Based on the above examples, such as Figure 10 As shown, the semiconductor structure 100 may include, for example, Figure 3 The capacitor structure 140 shown is as follows: Figure 6 The first transistor structure 130 shown and as follows Figure 9 The second transistor structure 120 is shown. The first transistor structure 130 is coupled to the first word line structure 171 and the first bit line structure 151. The second transistor structure 120 is coupled to the second word line structure 172 and the second bit line structure 152. The first electrode layer 141 of the capacitor structure 140 is coupled to the first semiconductor layer 131 of the first transistor structure 130 and to the second conductive layer (e.g., gate) 121 of the second transistor structure 120.

[0131] In this way, the 2T1C semiconductor structure 100, which stacks three electronic components along the Y direction, can reduce the size of the semiconductor structure 100 along the X direction, which is beneficial to improving integration density. Moreover, the two electrode layers of the capacitor structure 140 extend along the Y direction. While meeting the size requirements of the capacitor structure 140, the spacing between the first transistor structure 130 and the second transistor structure 120 can be increased. This reduces the impact of the process conditions for fabricating one transistor structure on the performance stability of the material layer of the subsequently fabricated transistor structure, thereby improving the product performance of the semiconductor structure 100.

[0132] In addition, such as Figure 11 As shown, the patterns of the second word line structure 172, the second bit line structure 152, and the control electrode pattern of transistor T2 (i.e., the second conductive layer 121) can be respectively disposed on different layers. Combined with the second contact structure 162, which couples the second transistor structure 120 with the capacitor structure 140, space can also be provided for fabricating the patterns of the second word line structure 172 or the second bit line structure 152. For example, as... Figure 11 As shown, the pattern of the second bit line structure 152 is located in the same layer as the second contact structure 162, and the pattern of the second word line structure 172 is located in the layer between the second conductive layer 121 and the second contact structure 162. In this way, without increasing the dimension of the semiconductor structure 100 along the Y direction perpendicular to the semiconductor substrate 110, it also improves the fabrication space for the patterns of the second word line structure 172 and the second bit line structure 152, thereby enhancing the fabrication flexibility and conductivity of the second word line structure 172 and the second bit line structure 152.

[0133] Based on the capacitor structure 140 described above, in other embodiments, such as Figures 12-14 As shown in the example below, a semiconductor structure 100 has a first transistor structure 130 that is a vertical transistor structure and a second transistor structure 120 that is a vertical transistor structure, which can further reduce the size of the semiconductor structure 100, increase the integration density, and improve the conductivity stability and reliability of the semiconductor structure 100.

[0134] In some examples, such as Figure 12 As shown, the semiconductor structure 100 also includes a first word line structure 171 and a first bit line structure 151.

[0135] The first transistor structure 130 includes: a second dielectric layer 135 and a first columnar conductive structure 1301 disposed in the second dielectric layer 135.

[0136] The first columnar conductive structure 1301 extends along the stacking direction Y of the first transistor structure 130 and the second transistor structure 120, with one end coupled to the capacitor structure 140 and the other end coupled to the first word line structure 171.

[0137] Continue reading Figure 12 The first columnar conductive structure 1301 includes: a columnar first conductive layer 133, a first dielectric layer 134, and a first semiconductor layer 131.

[0138] The columnar first conductive layer 133 is coupled to the first word line structure 171.

[0139] The first dielectric layer 134 surrounds the columnar first conductive layer 133.

[0140] The first semiconductor layer 131 surrounds the first dielectric layer 134. The first semiconductor layer 131 includes a first electrode region 1311 and a second electrode region 1312 disposed at intervals along the stacking direction Y of the first transistor structure 130 and the second transistor structure 120; the second electrode region 1312 is coupled to the first electrode layer 141 of the capacitor structure 140 through a first contact structure 161; the first electrode region 1311 is coupled to the first bit line structure 151.

[0141] In some examples, such as Figure 13 As shown, the semiconductor structure 100 also includes a second word line structure 172 and a second bit line structure 152.

[0142] The second transistor structure 120 includes a fourth dielectric layer 124 and a second pillar-shaped conductive structure 1201 disposed in the fourth dielectric layer 124. The second pillar-shaped conductive structure 1201 extends along the stacking direction Y of the second transistor structure 120 and the first transistor structure 130, with one end coupled to the capacitor structure 140 and the other end coupled to the second word line structure 172.

[0143] Continue reading Figure 13 The second columnar conductive structure 1201 includes: a columnar second conductive layer 121, a third dielectric layer 123, and a second semiconductor layer 122.

[0144] One end of the columnar second conductive layer 121 is coupled to the first electrode layer 141 through the second contact structure 162.

[0145] The third dielectric layer 123 surrounds the columnar second conductive layer 121.

[0146] The second semiconductor layer 122 surrounds the third dielectric layer 123; the second semiconductor layer 122 includes a third electrode region 1221 and a fourth electrode region 1222 disposed at intervals along the stacking direction Y of the second transistor structure 120 and the first transistor structure 130; the third electrode region 1221 is coupled to the second word line structure 172; the fourth electrode region 1222 is coupled to the second bit line structure 152.

[0147] Based on the examples provided above, such as Figure 12 The first transistor structure 130 shown and as follows Figure 13 The second transistor structure 120 shown is a vertically oriented transistor, the first transistor structure 130 is a vertically oriented transistor, and the capacitor structure 140 is a vertically oriented capacitor. Thus, as... Figure 14 As shown, the 2T1C semiconductor structure 100 stacked along the Y direction can further reduce the size of the semiconductor structure 100 along the X direction, which is beneficial to improving the integration density.

[0148] In addition, the examples provided above can be combined with such examples. Figures 2 to 11 The first transistor structure 130 and the second transistor structure 120 shown are as follows: Figures 12-14 The first transistor structure 130 and the second transistor structure 120 shown are combined with other transistor combinations to meet practical needs.

[0149] For example, such as Figure 15 As shown, a semiconductor structure 100 is provided in which the first transistor structure 130 is a vertical transistor structure and the second transistor structure 120 is a planar transistor structure. The specific layer structures of the first transistor structure 130 and the second transistor structure 120 can be found in the examples above, and will not be repeated here.

[0150] In some examples, the material of the second semiconductor layer 122 is the same as that of the first semiconductor layer 131.

[0151] For example, the material used in the second semiconductor layer 122 may include one or more of the following: silicon (Si), germanium (Ge), gallium arsenide (GaAs), indium phosphide (InP), gallium nitride (GaN); or it may include oxide semiconductor materials, such as indium gallium zinc oxide.

[0152] The material used in the first semiconductor layer 131 may include one or more of silicon (Si), germanium (Ge), gallium arsenide (GaAs), indium phosphide (InP), and gallium nitride (GaN); it may also include oxide semiconductor materials, such as indium gallium zinc oxide.

[0153] For example, the material of the second semiconductor layer 122 and the first semiconductor layer 131 are both indium gallium zinc oxide (IGNOO). Based on the conductivity of IGNOO, the conductivity of the semiconductor structure 100 can be improved.

[0154] For example, the material of the second semiconductor layer 122 includes silicon doped with ions. The material of the first semiconductor layer 131 is indium gallium zinc oxide. Considering the fabrication process conditions of the second semiconductor layer 122 (e.g., doping with ions and annealing), the first semiconductor layer 131 is positioned away from the second semiconductor layer 122 in a direction perpendicular to the semiconductor substrate 110. This reduces the adverse effects of the process temperature of the second semiconductor layer 122 on the electrical properties of the first semiconductor layer 131 using indium gallium zinc oxide, thereby improving the stability and reliability of the first transistor structure 130.

[0155] In some examples, the layer structure of the first transistor structure 130 is the same as that of the second transistor structure 120.

[0156] For example, such as Figure 14 As shown, the relative positional relationship (and number of layers) of each functional layer of the first transistor structure 130 is the same as that of each functional layer of the second transistor structure 120, which indicates that the layer structure of the first transistor structure 130 and the second transistor structure 120 is the same.

[0157] The patterns of each functional layer in the first transistor structure 130 may be the same as or different from the patterns of each functional layer in the second transistor structure 120. This can be set according to actual needs.

[0158] Furthermore, the specific materials of each functional layer of the first transistor structure 130 may be the same as or different from the specific materials of each functional layer of the second transistor structure 120. This can be set according to actual needs.

[0159] The semiconductor structure 100 obtained in this way can be fabricated using the same process to fabricate the first transistor structure 130 and the second transistor structure 120, which simplifies the operation of the semiconductor structure 100. The specific layer structures of the first transistor structure 130 and the second transistor structure 120 are not specifically limited in this application and can be set according to actual needs.

[0160] Furthermore, when the first semiconductor layer 131 is made of indium gallium zinc oxide, the process conditions of the second semiconductor layer 122 of the second transistor structure 120 will not affect the stability and reliability of the performance of the first semiconductor layer 131.

[0161] Based on the semiconductor structure 100 provided in the above example, and the corresponding semiconductor structure 100 Figure 1 The diagram shows a circuit schematic of a memory cell, wherein the first transistor structure 130 (corresponding to...) Figure 1 Transistor T1), and second transistor structure 120 (corresponding to) Figure 1 Transistor T2 and capacitor structure 140 (corresponding to) Figure 1 Capacitor C in the middle), first word line structure 171 (corresponding to Figure 1 The first character line WWL), the first character line structure 151 (corresponding to) Figure 1 The first line WBL), the second line structure 172 (corresponding to) Figure 1 The second word line (RWL) and the second bit line structure 152 (corresponding to) Figure 1 The second bit line (RBL) in the middle.

[0162] Under the control of the transmission signals of the first word line (WWL), the first bit line (WBL), the second word line (RWL), and the second bit line (RWL), data storage and retrieval in a 2T1C structure can be realized. This can be applied to DRAM memories that integrate in-memory computing, improving the reliability of DRAM memory data read and write operations.

[0163] On the other hand, such as Figures 16-20 As shown, this application provides a method for fabricating a semiconductor structure 100. The fabrication method includes steps S100 to S400, S500, S600, S700, and S800.

[0164] S100: As Figure 16 and Figure 17 (a) Figure 18 As shown in (a), a semiconductor substrate 110 is provided.

[0165] For example, the semiconductor substrate 110 can be a composite layer of one or more stacked materials, providing support and fabrication space for the subsequent fabrication of the first transistor structure 130, the second transistor structure 120, and the capacitor structure 140; or, it can be removed or thinned after the subsequent structures are formed. The specific structure and arrangement of the semiconductor substrate 110 can be set according to actual needs and are not limited here. For example, the materials used in the semiconductor substrate 110 include one or more inorganic materials such as glass, quartz, silicon carbide, and silicon oxide, or organic materials such as epoxy resin or polyurethane.

[0166] S200: such as Figure 16 , Figure 17 (b) in the middle Figure 17 (d) in the middle, and Figure 18 (b) in the middle Figure 18 As shown in (d) in the figure, a second transistor structure 120 is formed on one side of the semiconductor substrate 110.

[0167] For example, multiple dielectric layers and multiple conductive layers are formed respectively, and patterned to obtain a second transistor structure 120 of a transistor device. For example, as Figure 1 As shown, the second transistor structure 120 can be a layer structure of transistor T2 within a memory cell in the circuit structure.

[0168] S300: such as Figure 16 , Figure 17 (e) in the middle, and Figure 18 (e) and Figure 18 As shown in (f), a capacitor structure 140 is formed on the side of the second transistor structure 120 away from the semiconductor substrate 110.

[0169] For example, multiple dielectric layers and multiple conductive layers are formed respectively, and patterned to obtain capacitor structure 140 of the capacitor. For example, as Figure 1 As shown, capacitor structure 140 can be a layer structure of capacitor C within a memory cell in a circuit structure.

[0170] S400: such as Figure 16 , Figure 17 (f) in Figure 17 (h) in, and Figure 18 (f) and Figure 18 As shown in (g), a first transistor structure 130 is formed on the side of the capacitor structure 140 away from the second transistor structure 120.

[0171] For example, multiple alternating layers of dielectric and conductive material are formed, and the dielectric and conductive material layers are patterned respectively to obtain a first transistor structure 130 of a transistor device. For example, as Figure 1 As shown, the first transistor structure 130 can be a layer structure of transistor T1 within a memory cell in the circuit structure.

[0172] In this configuration, one electrode layer of the capacitor structure 140 is coupled to both the first transistor structure 130 and the second transistor structure 120. For example, as... Figure 1 As shown, one plate layer of capacitor structure 140 is coupled to the drain of transistor T1 (i.e., first transistor structure 130) and to the control electrode of transistor T2 (i.e., second transistor structure 120). The equivalent circuit node of the three coupled is the storage node SN.

[0173] In the above-described method for fabricating semiconductor structure 100, a second transistor structure 120 can be formed first, followed by a capacitor structure 140, and finally a first transistor structure 130. This sequence of electronic component fabrication can reduce the adverse effects of the process temperature of the first transistor structure 120 on the performance of the material layer of the subsequently formed first transistor structure 130. In particular, the capacitor structure 140 is fabricated after the second transistor structure 120 and before the first transistor structure 130. Through the properties of the material layer of the capacitor structure 140 and the effect of the material spacing, the adverse effects of the process temperature of the first transistor structure 120 on the performance of the material layer of the subsequently formed first transistor structure 130 are further reduced, thereby improving the product performance of semiconductor structure 100.

[0174] In some examples, such as Figure 17 (e) in Figure 18 (f) and Figure 19 As shown, step S300: forming a capacitor structure 140 on the side of the second transistor structure 120 away from the semiconductor substrate 110, including step S310.

[0175] S310: As Figure 17 (e) and Figure 18 As shown in (f), a first electrode layer 141 and a second electrode layer 142 are formed, extending along the direction away from the semiconductor substrate 110 of the second transistor structure 120 and spaced apart.

[0176] Example, combination Figure 3 The capacitor structure 140 shown has a layered structure, including a fifth dielectric layer 145 and a columnar capacitor C disposed in the fifth dielectric layer 145. The columnar capacitor C includes: a columnar dielectric layer 143; a first electrode layer 141 surrounding the columnar dielectric layer 143; a sixth dielectric layer 144 surrounding the first electrode layer 141; and a second electrode layer 142 surrounding the sixth dielectric layer 144.

[0177] For example, an initial dielectric layer can be formed on the side of the second transistor structure 120 away from the semiconductor substrate 110. The initial dielectric layer is etched to form a columnar dielectric layer 143. A conductive material layer is deposited covering the surface of the columnar dielectric layer 143 to form a first electrode layer 141. A dielectric material is used to cover the surface of the first electrode layer 141 away from the columnar dielectric layer 143 to form a sixth dielectric layer 144. A conductive material layer is deposited covering the surface of the sixth dielectric layer 144 to form a second electrode layer 142. Dielectric material is filled between the plurality of columnar capacitors C to form a fifth dielectric layer 145. This allows the fabrication of a capacitor structure 140.

[0178] In the cross-sectional view of the capacitor structure 140 along a direction parallel to the semiconductor substrate 110, the first electrode layer 141 and the second electrode layer 142 form a set of concentric ring structures. The example provided in this application does not specifically limit the shape and size of the first electrode layer 141 and the second electrode layer 142 in the cross-sectional view of the capacitor structure 140 along a direction parallel to the semiconductor substrate 110. The shape and size can be determined according to the shape and size of the transition structures coupled to the first electrode layer 141 and respectively to the first transistor structure 130 and the second transistor structure 120, to achieve good conductivity.

[0179] For example, the materials used for the first electrode layer 141 and the second electrode layer 142 include conductive materials, such as tungsten, tantalum, titanium, nickel, platinum, tungsten nitride, tantalum nitride, or titanium nitride. The materials of the first electrode layer 141 and the second electrode layer 142 may be the same or different.

[0180] For example, the materials used for the fifth dielectric layer 145 and the sixth dielectric layer 144 include dielectric materials, such as silicon oxide, aluminum oxide, or hafnium oxide. The materials of the fifth dielectric layer 145 and the sixth dielectric layer 144 may be the same or different.

[0181] In some examples, such as Figure 17 (f) in Figure 18 (g) and Figure 19 As shown, after step S200: forming the second transistor structure 120, step S400 includes S410: forming the first semiconductor layer 131 of the first transistor structure 130. The first semiconductor layer 131 includes indium gallium zinc oxide material.

[0182] For example, after forming the second transistor structure 120 and the capacitor structure 140, on the side of the capacitor structure 140 away from the second transistor structure 120, a structure is fabricated as follows: Figure 6 The first transistor structure 130 shown or as... Figure 12 The first transistor structure 130 is shown.

[0183] For example, based on such Figure 6The diagram illustrates the first transistor structure 130 and the relative positions of its functional layers. The first transistor structure 130 includes: a first semiconductor layer 131, a first dielectric layer 134, a first conductive layer 133 / 171, and a second dielectric layer 135. The first dielectric layer 134 is disposed on the side of the first semiconductor layer 131 away from the capacitor structure 140. The first conductive layers 133 / 171 are disposed on the side of the first dielectric layer 134 away from the first semiconductor layer 131. The second dielectric layer 135 is disposed on the side of the first conductive layers 133 / 171 away from the first dielectric layer 134. The first semiconductor layer 131 includes a first electrode region 1311 and a second electrode region 1312 spaced apart. The first electrode region 1311 is coupled to the first electrode plate layer 141 via a first contact structure 161, and the second electrode region 1312 is coupled to the first bit line structure 151 via a first transition structure 132.

[0184] like Figure 17 As shown in (f), a semiconductor material layer is formed on the side of the first contact structure 161 away from the capacitor structure 140, and a first semiconductor layer 131 is formed after patterning etching.

[0185] For example, the material used in the first semiconductor layer 131 may include one or more of silicon (Si), germanium (Ge), gallium arsenide (GaAs), indium phosphide (InP), gallium nitride (GaN), etc.; it may also include oxide semiconductor materials, such as indium gallium zinc oxide.

[0186] Understandably, indium gallium zinc oxide (IGNOO) materials have relatively low processing temperatures and are easily affected by high temperatures, which can reduce their conductivity. Under the processing conditions of the second transistor structure 120, for example, the high processing temperature for ion doping and annealing of the second semiconductor layer 122 of the second transistor structure 120 can easily lead to a decrease in the electrical properties of the first semiconductor layer 131 using IGNOO material.

[0187] Thus, after the second semiconductor layer 122 of the second transistor structure 120 is fabricated, the fabricated multilayer functional layer and capacitor structure 140 are beneficial to reducing the adverse effects of the process temperature of the second semiconductor layer 122 on the electrical properties of the first semiconductor layer 131, improving the conductivity of the first transistor structure 130, and improving the product performance of the semiconductor structure 100.

[0188] For example, based on such Figure 12 The diagram illustrates the relative positions of the first transistor structure 130 and its functional layers. The first transistor structure 130 includes a second dielectric layer 135 and a first pillar-shaped conductive structure 1301 disposed in the second dielectric layer 135. The first pillar-shaped conductive structure 1301 extends along the stacking direction Y of the first transistor structure 130 and the second transistor structure 120, with one end coupled to a capacitor structure 140 and the other end coupled to a first word line structure 171.

[0189] Continue reading Figure 12 The first columnar conductive structure 1301 includes: a columnar first conductive layer 133, a first dielectric layer 134, and a first semiconductor layer 131. The columnar first conductive layer 133 is coupled to the first word line structure 171. The first dielectric layer 134 surrounds the columnar first conductive layer 133. The first semiconductor layer 131 surrounds the first dielectric layer 134. The first semiconductor layer 131 includes a first electrode region 1311 and a second electrode region 1312 disposed at intervals along the stacking direction Y of the first transistor structure 130 and the second transistor structure 120; the second electrode region 1312 is coupled to the first electrode layer 141 of the capacitor structure 140 through a first contact structure 161; the first electrode region 1311 is coupled to the first word line structure 151.

[0190] like Figure 18 As shown in (g), a second dielectric layer 135 and a first line structure 151 are formed on the side of the first contact structure 161 away from the capacitor structure 140, and a groove extends in a direction perpendicular to the semiconductor substrate 110.

[0191] Semiconductor material is deposited in the groove to form a first semiconductor layer 131 located on the inner wall of the groove. The first electrode region 1311 of the first semiconductor layer 131 is coupled to the first line structure 151, and the second electrode region 1312 is coupled to the first electrode layer 141 of the capacitor structure 140 through the first contact structure 161.

[0192] Then, a dielectric material is deposited in the groove to form a first dielectric layer 134 located on the side of the first semiconductor layer 131 away from the first first line structure 151 structure coupled to it. A conductive material is filled in the groove, and the conductive material fills the space in the first dielectric layer 134 to form a columnar first conductive layer 132, forming a first columnar conductive structure 1301.

[0193] In some examples, such as Figure 18 As shown, the preparation method also includes steps S500 to S800.

[0194] S500: Forming a first word line structure 171. The first word line structure 171 is coupled to the first conductive layer 133 of the first transistor structure 130.

[0195] For example, such as Figure 17 As shown in (g), a first word line structure 171 is formed simultaneously with the formation of the first conductive layer 133 of the first transistor structure 130. The first conductive layer 133 and the first word line structure 171 can be different conductive structures formed in one step using the same material and synchronous process. Furthermore, the first word line structure 171 is coupled to the first conductive layer 133 of the first transistor structure 130.

[0196] For example, such as Figure 18 As shown in (g), after the first transistor structure 130 is formed, the columnar first conductive layer 133 is coupled to the first word line structure 171 through the first transition structure 132.

[0197] S600: Forming the first bit line structure 151. The first bit line structure 151 is coupled to the first electrode region 1311 of the first semiconductor layer 131 of the first transistor structure 130.

[0198] For example, such as Figure 17 As shown in (g), after the first transistor structure 130 is formed, a first line structure 151 is formed on the side of the first transistor structure 130 away from the capacitor structure 140. The first line structure 151 is coupled to the first electrode region 1311 of the first semiconductor layer 131 of the first transistor structure 130 through a first transition structure 132.

[0199] For example, such as Figure 18 As shown in (g), after forming the second dielectric layer 135 of the first transistor structure 130, a conductive layer is formed on the side of the second dielectric layer 135 away from the capacitor structure 140. After a groove extending perpendicular to the semiconductor substrate 110 is subsequently formed in the conductive layer, the pattern of the first line structure 151 is obtained. The first line structure 151 and the second dielectric layer 135 together constitute the inner wall of the groove. Thus, the first electrode region 1311 of the first semiconductor layer 131 formed on the inner wall of the groove is coupled to the first line structure 151.

[0200] S700: Forming a second word line structure 172. The second word line structure 172 is coupled to the third electrode region 1221 of the second semiconductor layer 122 of the second transistor structure 120.

[0201] For example, such as Figure 17 As shown in (c), a second word line structure 172 is formed simultaneously with the formation of the second conductive layer 121 of the second transistor structure 120. The second conductive layer 121 and the second word line structure 172 can be different conductive structures formed in one step using the same material and synchronous process. Furthermore, the second word line structure 172 is coupled to the second conductive layer 121 of the first transistor structure 130.

[0202] Or, such as Figure 11 As shown, the second word line structure 172 is located on the side of the second transistor structure 120 away from the semiconductor substrate 110. That is, the second word line structure 172 is fabricated after the second transistor structure 120 is formed. The second word line structure 172 is coupled to the third electrode region 1221 of the second semiconductor layer 122 of the second transistor structure 120 through a transition structure.

[0203] For example, such as Figure 18 As shown in (g), a second word line structure 172 is formed on the semiconductor substrate 110 before the second transistor structure 120 is formed. Then, the second transistor structure 120 is formed on the side of the second word line structure 172 away from the semiconductor substrate 110. The second word line structure 172 is coupled to the third electrode region 1221 of the second semiconductor layer 122 of the second transistor structure 120.

[0204] S800: Forming a second bit line structure 152. The second bit line structure 152 is coupled to the fourth electrode region 1222 of the second semiconductor layer 122 of the second transistor structure 120.

[0205] For example, such as Figure 17 As shown in (d), after forming the second transistor structure 120, a second bit line structure 152 is formed on the side of the second transistor structure away from the semiconductor substrate 110. The second bit line structure 152 and the second contact structure 162 can be different conductive structures formed in one step using the same layer material and synchronous process. The second bit line structure 152 is coupled to the fourth electrode region 1222 of the second semiconductor layer 122. The second contact structure 162 is coupled to the second conductive layer 121 of the second transistor structure 120.

[0206] For example, such as Figure 18 As shown in (g), after forming the fourth dielectric layer 124 of the second transistor structure 120, a conductive layer is formed on the side of the fourth dielectric layer 124 away from the second word line structure 172. After a groove extending perpendicular to the semiconductor substrate 110 is subsequently formed in the conductive layer, a pattern for the second bit line structure 152 is obtained. The second bit line structure 152 and the fourth dielectric layer 124 together constitute the inner wall of the groove. Thus, the fourth electrode region 1222 of the second semiconductor layer 122 formed on the inner wall of the groove is coupled to the second bit line structure 152.

[0207] In some examples, the materials used for the first bit line structure 151, the second bit line structure 152, the first word line structure 171, and the second word line structure 172 include conductive materials, such as one or more of the following metallic elements or metallic compounds: copper, aluminum, tungsten, tantalum, titanium, nickel, platinum, tungsten nitride, tantalum nitride, or titanium nitride.

[0208] The materials used for the first line structure 151, the second line structure 152, the first character line structure 171, and the second character line structure 172 can be the same or different, depending on actual needs.

[0209] The order of the fabrication steps S500, S600, S700 and S800 can be formed during the fabrication of each functional layer of the first transistor structure 130 and the second transistor structure 120. The example provided in this application does not limit the order of the fabrication steps S500, S600, S700 and S800, nor does it limit the order of the fabrication steps S500, S600, S700 and S800 with the fabrication steps of each functional layer of the first transistor structure 130 and the second transistor structure 120.

[0210] On the other hand, such as Figure 21 As shown, this application provides a semiconductor device 200. For example, the semiconductor device 200 may include, but is not limited to, one or more of the following types of memory: NAND Flash Memory, Vertical NAND Flash Memory, NOR Flash Memory, Dynamic Random Access Memory (DRAM), Ferroelectric Random Access Memory (FRAM), Magnetic Random Access Memory (MRAM), Phase Change Random Access Memory (PCRAM), Resistive Random Access Memory (RRAM), and Nano Random Access Memory (NRAM). For instance, this application uses DRAM semiconductor memory as an example and provides a reverse exemplary description.

[0211] In some examples, such as Figure 21 As shown, the semiconductor device 200 includes at least one semiconductor structure 100 as provided in any of the examples above and a peripheral circuit structure 210 coupled to the at least one semiconductor structure 100. It should be noted that this application does not limit the specific layer structure of the peripheral circuit structure 210, nor does it limit the relative positional relationship between the peripheral circuit structure 210 and the semiconductor structure 100. The example only illustrates the coupling relationship between the two, and the specific configuration can be set according to actual needs.

[0212] For example, a semiconductor structure 100 may include multiple arrays such as Figure 1 The 2T1C memory cell structure shown is a DRAM memory cell array (see...). Figure 22Furthermore, the peripheral circuit structure 210 may include various types of circuit structures formed using metal-oxide-semiconductor (MOS) transistors, configured to transmit electrical signals to the memory cell array.

[0213] For example, such as Figure 11 and Figure 14 As shown, the semiconductor structure 100, under the functional roles of the first word line structure 171, the first bit line structure 151, the second word line structure 172, and the second bit line structure 152, can store charge for data reading and writing by the semiconductor device 1000; moreover, based on the relative positional relationship of the first transistor structure 130, the second transistor structure 120, and the capacitor structure 140, and the characteristics of the semiconductor layer material, the reliability of data reading and writing can be improved. Combined with... Figure 22 The DRAM memory cell array shown includes multiple memory cells arranged in an array. Multiple memory cells in the same row are coupled to a first word line (WWL) (e.g., first word line structure 171) and a second word line (RWL) (e.g., second word line structure 172). Multiple memory cells in the same column are coupled to a first bit line (WBL) (e.g., first bit line structure 151) and a second bit line (RBL) (e.g., second bit line structure 152). Each memory cell includes, as shown... Figure 1 The diagram shows the coupled transistors T1 and T2, and capacitor C. The control electrode (e.g., gate) of transistor T1 is coupled to the first word line WWL, the first electrode (e.g., source) of transistor T1 is coupled to the first bit line WBL, and the second electrode (e.g., drain) of transistor T1 is coupled to the memory node SN. The control electrode (e.g., gate) of transistor T2 is coupled to the memory node SN, the first electrode (e.g., source) of transistor T2 is coupled to the second bit line RBL, and the second electrode (e.g., drain) of transistor T2 is coupled to the second word line RWL. One plate of capacitor C is coupled to the memory node SN, and the other plate can be coupled to a DC power supply voltage (e.g., ground). The memory cell is configured to store 1 or 0 by utilizing the amount of charge stored in capacitor C and to maintain a stable charge. Individual memory cells in the DRAM memory cell array can be accessed independently by specifying row and column addresses, and read, write, or refresh operations can be performed on the data stored within them.

[0214] And, such as Figure 22 As shown, the peripheral circuit structure 210 may include various circuit structures such as a row decoder, a sense amplifier, a column decoder, and a data input / output buffer. The row decoder is coupled to the first word line WWL and the second word line RWL. The column decoder is coupled to the first bit line WBL and the second bit line RBL.

[0215] In some embodiments, such as Figure 23 As shown in the illustration, an embodiment of this application illustrates a memory system 300. The memory system 300 includes a memory controller 310 and one or more semiconductor devices 200, as well as other integrated circuit structures for signal transmission. The memory controller 310 is configured to control the semiconductor devices 200.

[0216] For example, the memory controller 310 and one or more semiconductor devices 200 can be integrated and packaged in the same memory device. This facilitates the application of the memory system 300 in different types of end electronic products.

[0217] In some embodiments, such as Figure 24 As shown in the illustration, an electronic device 400 is presented in this application embodiment. For example, the electronic device 400 may include, but is not limited to, a mobile phone, desktop computer, laptop computer, tablet computer, vehicle computer, game console, printer, positioning device, wearable electronic device, smart sensor, virtual reality (VR) device, augmented reality (AR) device, or any other suitable electronic device having a semiconductor device 1000 therein.

[0218] In some examples, such as Figure 24 As shown, electronic device 400 may include host 410 and memory system 300. Host 410 may be a processor of electronic device (e.g., a central processing unit (CPU)) or a system on chip (SoC) (e.g., an application processor (AP)). Host 410 may be configured to send data to memory system 300 or receive data from memory system 300.

[0219] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure.

Claims

1. A semiconductor structure, characterized in that, include: Semiconductor substrate; A second transistor structure is disposed on one side of the semiconductor substrate; A first transistor structure is disposed on the side of the second transistor structure away from the semiconductor substrate; A capacitor structure is disposed between the first transistor structure and the second transistor structure; one electrode layer of the capacitor structure is coupled to both the first transistor structure and the second transistor structure.

2. The semiconductor structure according to claim 1, characterized in that, The capacitor structure includes: The first electrode layer extends along the stacking direction of the first transistor structure and the second transistor structure; The second electrode layer extends along the stacking direction of the first transistor structure and the second transistor structure; The first electrode layer and the second electrode layer are spaced apart along a direction perpendicular to the stacking of the first transistor structure and the second transistor structure; the first electrode layer is coupled to the first transistor structure and the second transistor structure respectively.

3. The semiconductor structure according to claim 1, characterized in that, The semiconductor structure further includes a first line structure located on the side of the first transistor structure away from the capacitor structure; The first transistor structure includes: The first semiconductor layer is coupled to the first electrode layer of the capacitor structure through a first contact structure; A first transition structure is disposed on the side of the first semiconductor layer away from the capacitor structure; the first transition structure extends along the direction of the first transistor structure away from the capacitor structure and is coupled to the first semiconductor layer and the first bit line structure. The first adapter structure and the first contact structure are respectively coupled to the opposite sides of the first semiconductor layer along the stacking direction perpendicular to the first transistor structure and the second transistor structure.

4. The semiconductor structure according to claim 3, characterized in that, The semiconductor structure further includes a first word line structure; The first transistor structure further includes: A first conductive layer is disposed on the side of the first semiconductor layer away from the capacitor structure, and is spaced apart from the first adapter structure along a stacking direction perpendicular to the first transistor structure and the second transistor structure; the first conductive layer is coupled to the first word line structure.

5. The semiconductor structure according to claim 3, characterized in that, The first semiconductor layer comprises indium gallium zinc oxide material.

6. The semiconductor structure according to claim 4, characterized in that, The first transistor structure further includes: A first dielectric layer is disposed on the side of the first semiconductor layer away from the capacitor structure; The first conductive layer is disposed on the side of the first dielectric layer away from the first semiconductor layer; A second dielectric layer is disposed on the side of the first conductive layer away from the first dielectric layer; The first semiconductor layer includes a first electrode region and a second electrode region spaced apart. The first electrode region is coupled to the first electrode plate layer through the first contact structure, and the second electrode region is coupled to the first bit line structure through the first transition structure.

7. The semiconductor structure according to claim 1, characterized in that, The second transistor structure includes a second conductive layer; the second conductive layer is coupled to the first electrode layer of the capacitor structure through a second contact structure. The second contact structure extends along the stacking direction of the first transistor structure and the second transistor structure.

8. The semiconductor structure according to claim 7, characterized in that, The second transistor structure further includes a second semiconductor layer disposed on the side of the second conductive layer away from the capacitor structure.

9. The semiconductor structure according to claim 1, characterized in that, The semiconductor structure further includes a second word line structure and a second bit line structure; The second transistor structure includes: The second semiconductor layer includes a third electrode region and a fourth electrode region disposed at intervals. A third dielectric layer is disposed on one side of the second semiconductor layer; A second conductive layer is disposed on the side of the third dielectric layer away from the second semiconductor layer; the second conductive layer is coupled to the first electrode layer through a second contact structure; A fourth dielectric layer is disposed on the side of the second conductive layer away from the third dielectric layer; The third electrode region is coupled to the second word line structure; the fourth electrode region is coupled to the second bit line structure.

10. The semiconductor structure according to claim 1, characterized in that, The semiconductor structure further includes a first word line structure and a first bit line structure; The first transistor structure includes: Second dielectric layer; A first columnar conductive structure is disposed in the second dielectric layer; the first columnar conductive structure extends along the stacking direction of the first transistor structure and the second transistor structure, one end of which is coupled to the capacitor structure and the other end of which is coupled to the first word line structure; The first columnar conductive structure includes: A columnar first conductive layer is coupled to the first word line structure; A first dielectric layer surrounding the columnar first conductive layer; A first semiconductor layer surrounds the first dielectric layer; the first semiconductor layer includes a first electrode region and a second electrode region spaced apart along the stacking direction of the first transistor structure and the second transistor structure; the second electrode region is coupled to the first plate layer of the capacitor structure through a first contact structure; the first electrode region is coupled to the first bit line structure.

11. The semiconductor structure according to claim 1, characterized in that, The semiconductor structure further includes a second word line structure and a second bit line structure; The second transistor structure includes: Fourth dielectric layer; A second columnar conductive structure is disposed in the fourth dielectric layer; the second columnar conductive structure extends along the stacking direction of the second transistor structure and the first transistor structure, one end of which is coupled to the capacitor structure and the other end of which is coupled to the second word line structure; The second columnar conductive structure includes: The columnar second conductive layer is coupled to the first electrode layer at one end through a second contact structure. A third dielectric layer surrounding the columnar second conductive layer; A second semiconductor layer surrounds the third dielectric layer; the second semiconductor layer includes a third electrode region and a fourth electrode region spaced apart along the stacking direction of the second transistor structure and the first transistor structure; the third electrode region is coupled to the second word line structure; the fourth electrode region is coupled to the second bit line structure.

12. The semiconductor structure according to claim 1, characterized in that, The capacitor structure includes: Fifth dielectric layer; A columnar capacitor disposed in the fifth dielectric layer, the columnar capacitor comprising: Columnar media layer; A first electrode layer surrounding the columnar dielectric layer; A sixth dielectric layer surrounding the first electrode layer; The second electrode layer surrounding the sixth dielectric layer.

13. The semiconductor structure according to claim 1, characterized in that, The material of the second semiconductor layer is the same as that of the first semiconductor layer.

14. The semiconductor structure according to claim 1, characterized in that, The layer structure of the first transistor structure is the same as that of the second transistor structure.

15. The semiconductor structure according to claim 1, characterized in that, The first transistor structure includes a planar transistor structure or a vertical transistor structure; The second transistor structure includes a planar transistor structure or a vertical transistor structure.

16. A method for fabricating a semiconductor structure, characterized in that, include: Provide a semiconductor substrate; A second transistor structure is formed on one side of the semiconductor substrate; A capacitor structure is formed on the side of the second transistor structure away from the semiconductor substrate; A first transistor structure is formed on the side of the capacitor structure away from the second transistor structure; In this capacitor structure, one electrode layer is coupled to both the first transistor structure and the second transistor structure.

17. The preparation method according to claim 16, characterized in that, The formation of the capacitor structure located on the side of the second transistor structure away from the semiconductor substrate includes: A first electrode layer and a second electrode layer are respectively formed extending along the direction away from the semiconductor substrate in the second transistor structure and spaced apart.

18. The preparation method according to claim 16, characterized in that, After the second transistor structure is formed, a first semiconductor layer of the first transistor structure is formed; the first semiconductor layer comprises indium gallium zinc oxide material.

19. The preparation method according to claim 16, characterized in that, The preparation method further includes: A first word line structure is formed; the first word line structure is coupled to the first conductive layer of the first transistor structure. A first bit line structure is formed; the first bit line structure is coupled to the first polar region of the first semiconductor layer of the first transistor structure. A second word line structure is formed; the second word line structure is coupled to the third electrode region of the second semiconductor layer of the second transistor structure; A second bit line structure is formed, and the second bit line structure is coupled to the fourth electrode region of the second semiconductor layer of the second transistor structure.

20. A semiconductor device, characterized in that, It includes at least one semiconductor structure as described in any one of claims 1 to 15, and a peripheral circuit structure coupled to the at least one semiconductor structure.

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