Reconfigurable cordinate rotation digital computer (cordic) computation method without scaling based on lookup table and micro-rotation angle set

Abstract

The application relates to the technical field of digital signal processing, in particular to a non-scaling reconfigurable CORDIC calculation method based on a lookup table and a micro-rotation angle set, which comprises the following steps: input angle and a mode selection signal are acquired; based on the mode selection signal, a first-stage rotation operation is performed on the input angle through the lookup table, the input angle is mapped to a small-angle region, and a first-rotation-vector value and a first residual angle after the first-stage rotation operation are output; a multi-stage iterative micro-rotation operation is performed on the first residual angle by using the micro-rotation angle set, and a final-rotation-vector value is output; wherein the circular rotation and the hyperbolic rotation share the address of the lookup table, the micro-rotation angle set and the rotation operation hardware resources, and the mode switching is performed through the mode selection signal, so that the high reconfigurability of the hardware resources is realized. The method can solve the technical problem that the existing CORDIC architecture is difficult to balance among the convergence range, the hardware resources, the calculation accuracy and the reconfigurability.

Description

Technical Field

[0001] The embodiments of this application relate to the field of digital signal processing technology, and in particular to a scaling-free reconfigurable CORDIC calculation method based on lookup tables and micro-rotation angle sets. Background Technology

[0002] With the development of modern science and technology, various industrial scenarios have placed higher demands on the response speed and accuracy of test and measurement equipment and electronic systems. Digital signal processing algorithms, as a crucial component of these devices and systems, are particularly important in improving their real-time performance while ensuring computational accuracy. For example, in the field of radar signal generation, Direct Digital Synthesis (DDS) is commonly used to generate broadband radar signals with large time-bandwidth characteristics to obtain good range and velocity resolution. This method is based on the principle that the frequency of a frequency-modulated signal changes linearly with time, while its phase changes quadratically. However, traditional DDS methods use lookup tables to store the corresponding information of phase and amplitude to achieve phase-amplitude conversion. This approach consumes a large amount of ROM storage resources, thus affecting the overall system performance, and limits the real-time changes of waveform types. To implement some of the more complex mathematical models in radar mathematical signals on the circuit hardware, in addition to basic addition and multiplication operations, it is inevitable to involve operations on transcendental functions such as trigonometric functions, logarithmic functions, and hyperbolic functions.

[0003] Coordinate Rotation Digital Computer (CORDIC) algorithms, as a numerical computation method based on the principle of iterative rotation approximation, have become a commonly used solution due to their core advantage of replacing complex multi-bit multiplication operations with simple hardware operations of shifting and addition, eliminating the need for large multipliers and look-up tables (LUTs). Furthermore, real-time and efficient algorithm implementations are required in real-time phase calculation of digital interferograms, error separation and compensation calculations in high-precision grating measurement systems, and modern communication systems.

[0004] However, despite significant progress in existing CORDIC algorithms, several drawbacks remain, including limited convergence range, high hardware redundancy and resource overhead, incomplete angle set design, and difficulty in balancing computational accuracy and hardware cost. These limitations restrict the widespread adoption of CORDIC algorithms in high-speed, high-precision applications. Therefore, achieving a balance between wide convergence range, absolute scaling-free operation, high reconfigurability, high accuracy, and low resource overhead while employing the CORDIC algorithm is a pressing technical challenge that needs to be addressed. Summary of the Invention

[0005] In view of this, embodiments of this application propose a scale-free, reconfigurable CORDIC computation method based on lookup tables and micro-rotation angle sets, which can solve the technical problem of the difficulty in balancing convergence range, hardware resources, computational accuracy and reconfigurability in existing CORDIC architectures.

[0006] To achieve the above objectives, embodiments of this application propose a scale-free, reconfigurable CORDIC calculation method based on lookup tables and micro-rotation angle sets, the method comprising: Acquire the input angle and mode selection signal; where the convergence range of the input angle is... The mode selection signal is used to select either circular rotation mode or hyperbolic rotation mode; Based on the mode selection signal, the input angle is rotated to a small angle region by a lookup table, and the first rotation vector value and the first remaining angle after the first rotation operation are output. Using a set of micro-rotation angles, multi-level iterative micro-rotation operations are performed on the first remaining angle to output the final rotation vector value. The set of micro-rotation angles is generated based on regular signed number encoding, and the effective word length of all rotation angles meets the effective word length requirement. The magnitude of the rotation vector is 1 to achieve no scaling. Among them, circular rotation and hyperbolic rotation share the address of the lookup table, the set of micro-rotation angles, and the hardware resources for rotation operation, and switch modes through a mode selection signal to achieve high reconfigurability of hardware resources.

[0007] To achieve the above objectives, embodiments of this application also propose a scale-free, reconfigurable CORDIC computing system based on lookup tables and micro-rotation angle sets, the system comprising: The acquisition module is used to acquire the input angle and mode selection signal; wherein, the convergence range of the input angle is... The mode selection signal is used to select either circular rotation mode or hyperbolic rotation mode; The first-level rotation operation module is used to perform a first-level rotation operation on the input angle based on the mode selection signal and through a lookup table, to map the input angle to a small angle region, and to output the first rotation vector value and the first remaining angle after the first-level rotation operation. The multi-level iterative micro-rotation operation module is used to perform multi-level iterative micro-rotation operations on the first remaining angle using a micro-rotation angle set, and output the final rotation vector value. The micro-rotation angle set is generated based on regular signed number encoding, and the effective word length of all rotation angles meets the effective word length requirement. The magnitude of the rotation vector is 1 to achieve no scaling. Among them, circular rotation and hyperbolic rotation share the address of the lookup table, the set of micro-rotation angles, and the hardware resources for rotation operation, and switch modes through a mode selection signal to achieve high reconfigurability of hardware resources.

[0008] To achieve the above objectives, embodiments of this application also propose an electronic device, including: a processor and a memory, wherein the memory stores instructions executable by the processor, and the processor is configured to execute the instructions such that the electronic device can implement an XXX method as described above.

[0009] To achieve the above objectives, embodiments of this application also propose a computer-readable storage medium storing a computer program that, when executed by a processor, enables a scaling-free reconfigurable CORDIC calculation method based on a lookup table and a set of micro-rotation angles as described above.

[0010] This application proposes a scaling-free reconfigurable CORDIC calculation method based on a lookup table and a micro-rotation angle set. First, the input angle and mode selection signal are acquired. Then, based on the mode selection signal, a first-level rotation operation is performed on the input angle using a lookup table, mapping the input angle to a small-angle region, and outputting the first rotation vector value and the first remaining angle after the first-level rotation operation. Next, using the micro-rotation angle set, multi-level iterative micro-rotation operations are performed on the first remaining angle, outputting the final rotation vector value. Since the convergence range of the input angle is... The mode selection signal is used to select either circular rotation mode or hyperbolic rotation mode, ensuring that the algorithm can handle input angles from -90° to 90°. The first-level rotation operation on the input angle is performed using a lookup table, quickly reducing large angles to a range manageable by micro-rotations, thus reducing the total number of iterations. The micro-rotation angle set ensures that the modulus of each rotation step is always 1, eliminating the scaling factor and significantly reducing hardware complexity and resource overhead. Furthermore, since circular and hyperbolic rotations share the lookup table address, micro-rotation angle set, and hardware resources, high reconfigurability is achieved through mode selection signal switching. Based on this, this solution addresses the technical challenge of balancing convergence range, hardware resources, computational accuracy, and reconfigurability in existing CORDIC architectures, achieving a wide convergence range, absolute scaling-free operation, high reconfigurability, and low resource overhead while maintaining high accuracy.

[0011] The method provided in the embodiments of this application specifically offers the following key points: First, a novel angle set generation technique: Embodiments of this application propose an angle set traversal algorithm based on regular signed number encoding. By limiting the cosine value to combinations of two powers of 2, it traverses and generates circular rotation angle sets and hyperbolic rotation angle sets that satisfy a 16-bit effective word length. This angle set unifies the parameter rules for both rotation modes, significantly reduces the number of non-zero terms, and lowers the hardware resource consumption for shift and addition / subtraction operations.

[0012] Second, the highly reconfigurable shared architecture: the circular rotation mode and the hyperbolic rotation mode share the same set of rotation vectors, iterative calculation units, and control logic, switching rotation modes only through a switch signal. This eliminates the need for multiple independent coefficient generation modules, registers, or multiplexers, and mode switching requires no additional iterations, reducing reconfiguration latency and hardware redundancy.

[0013] Third, the unique five-level rotation architecture: the first level of large-angle rotation is achieved by using a LUT lookup table for coarse angle adjustment, and then small-angle rotation vectors are used for fine adjustment, which reduces the number of iterations and shortens the critical path. Attached Figure Description

[0014] To more clearly illustrate the technical solutions in the embodiments or related technologies of this application, the accompanying drawings used in the description of the embodiments or related technologies of this application will be briefly introduced below. Obviously, the following drawings are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. The drawings described herein are only used to explain this application and are not intended to limit this application.

[0015] Figure 1 This is a schematic diagram of CORDIC circular coordinate rotation provided in one embodiment of this application; Figure 2 This is a flowchart of a scaling-free reconfigurable CORDIC calculation method based on a lookup table and a set of micro-rotation angles provided in one embodiment of this application; Figure 3 This is a structural block diagram of a five-stage pipeline computing provided in one embodiment of this application; Figure 4 This is a calculation structure diagram for calculating the absolute value of an input angle provided in one embodiment of this application; Figure 5 This is a calculation structure diagram of a lookup table input and output provided in one embodiment of this application; Figure 6 This is a computational structure diagram of a second-level rotation operation provided in one embodiment of this application; Figure 7This is a computational structure diagram of a third-level rotation operation provided in one embodiment of this application; Figure 8 This is a computational structure diagram of a fourth-level rotation operation provided in one embodiment of this application; Figure 9 This is a computational structure diagram of a fifth-level rotation operation provided in one embodiment of this application; Figure 10 This is a schematic diagram of the structure of a scale-free reconfigurable CORDIC computing system based on a lookup table and a set of micro-rotation angles, provided in another embodiment of this application; Figure 11 This is a schematic diagram of the structure of an electronic device provided in another embodiment of this application. Detailed Implementation

[0016] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the various embodiments of this application will be described in detail below with reference to the accompanying drawings. Those skilled in the art will understand that many technical details have been presented in the embodiments of this application to facilitate better understanding. However, the technical solutions claimed in this application can be implemented even without these technical details and various variations and modifications based on the following embodiments. The division of the following embodiments is for ease of description and should not constitute any limitation on the specific implementation of this application. The following embodiments can be combined with and referenced by each other without contradiction.

[0017] With the development of modern science and technology, various industrial scenarios have placed higher demands on the response speed and accuracy of test and measurement equipment and electronic systems. As an important component of these devices and systems, digital signal processing algorithms are particularly important in improving their real-time performance while ensuring computational accuracy.

[0018] For example, in the field of radar signal generation, to generate broadband radar signals with large time-bandwidth characteristics to obtain good range and velocity resolution, Direct Digital Synthesis (DDS) is usually used. This method is based on the principle that the frequency of the frequency-modulated signal changes linearly with time, while the phase changes quadratically. However, traditional DDS methods use lookup tables to store the corresponding phase and amplitude information to achieve phase-amplitude conversion. This consumes a large amount of ROM storage resources, thus affecting the overall system performance, and limiting the real-time changes of waveform types. To implement some of the more complex mathematical models in radar signals on the circuit hardware, in addition to basic addition and multiplication operations, it is inevitable to involve operations on transcendental functions such as trigonometric functions, logarithmic functions, and hyperbolic functions.

[0019] Coordinate Rotation Digital Computer (CORDIC) algorithms, as a numerical computation method based on the principle of iterative rotation approximation, have become a commonly used solution due to their core advantage of replacing complex multi-bit multiplication operations with simple hardware operations of shifting and addition, eliminating the need for large multipliers and look-up tables (LUTs). Furthermore, real-time and efficient algorithm implementations are required in real-time phase calculation of digital interferograms, error separation and compensation calculations in high-precision grating measurement systems, and modern communication systems.

[0020] Traditional circular CORDIC algorithms have two operating modes: rotation mode and vector mode. A generalized CORDIC algorithm was later proposed, applicable to three types of trajectories: circles, hyperbolas, and straight lines. For decades, researchers have worked to address the major challenges facing CORDIC algorithms, including reducing the number of iterations, achieving high accuracy, and reducing hardware complexity.

[0021] The traditional CORDIC algorithm is as follows: Taking circular rotation as an example, in a coordinate system, a vector originates from an angle. Rotate to angle ,like Figure 1 As shown, the rotation angle is denoted as... .

[0022] The coordinate relationship between the starting point N and the ending point M of the rotation can be obtained from the following formula: ; in, Indicates circular rotation. This represents hyperbolic rotation. The CORDIC algorithm calculates the rotation angle. It can be decomposed into linear combinations from different angles, as shown in the following formula: ; in, This indicates the number of CORDIC rotation iterations. It is the rotation direction factor and The key to traditional CORDIC lies in the angle of each rotation. Values Therefore, it is also called the radix-2 CORDIC algorithm. The next iteration can be obtained from the following formula: ; ; ; in, Indicates circular rotation. Indicates hyperbolic rotation. The scaling factor corresponding to the current iteration. From arrive The calculation is called The path, similarly from arrive The calculation is called Path, and from arrive The calculation is called the residual angle. Path. The calculation can be found from the above formula. and It only requires shifting and addition / subtraction operations, eliminating the need for resource-intensive multipliers.

[0023] The scaling factor-free CORDIC algorithm is as follows: The scaling-free CORDIC algorithm uses a Taylor series approximation of sine and cosine functions to eliminate the variable scaling factor, hence the name scaling-free operation. Unlike the traditional radix-2 CORDIC algorithm, when... When the time is right, the corresponding Taylor series is shown in the following formula: ; ; The basic scale-free CORDIC uses only the first term of the Taylor series. The iterative formula for the scale-free CORDIC obtained by combining equations (1) and (6) is shown in the following formula. Indicates circular rotation. Indicates hyperbolic rotation, where , and the formula above The meanings are the same, representing the direction of vector rotation, but the difference is that only the existence form does not rotate. ) or rotate counterclockwise ( Two situations ; The rotation angle can be expressed as The above formula only applies to the binary fixed-point value of bits. The iteration (by precision) (The bit requirement and the second term of the Taylor expansion are used to derive this relationship), which limits the convergence range of the scaling-free CORDIC. Current number of rotations. satisfy ,exist Given the required bit precision, the second-order terms in the Taylor series approximation can be ignored. The maximum rotation angle achievable by the first-order approximation is shown in the following formula: .

[0024] Quantization error and effective word length The calculation is as follows: In the above formula use express, use This indicates that during hyperbolic rotation... When rotating in a circle, m = -1: ; For any , and The values ​​are all limited to the range Ideally, inside and It has infinite precision; however, in digital systems... and The value must be represented using a fixed-point binary number, as shown in the following formula: ; ; in , For quantized binary bits, however, it is represented using fixed-point numbers. and The following quantization error will occur. ; ; in and These are the quantization errors caused by cosine and sine quantization, and the total error from vector rotation. Depend on Given the required measurement error Effect of rotation vector on effective word length It is an index that measures the precision of a rotation vector based on the number of bits, and its calculation is as follows: ; Effective word length is used as a measure of precision. To achieve accurate quantization, for a given word length... For signed bits, it is necessary to ensure that... .

[0025] The closest prior art to this application is a reconfigurable CORDIC architecture based on a scaling-free mechanism. Its core is used for vector rotation of circular and hyperbolic trajectories, achieving this through an innovative angle set design, a 5-stage pipeline architecture, and Taylor series approximation. The wide convergence range eliminates the need for scaling factor compensation, and circular and hyperbolic rotations share core hardware resources, significantly reducing reconstruction overhead. The first four stages perform micro-rotations based on a novel set of angles. Each stage selects the corresponding rotation vector through a comparator and encoder, rapidly shrinking the residual angle. After the fourth stage, the residual angle is only [a fraction of the original value]. The order of magnitude. The last two stages use a first-order Taylor series approximation, taking advantage of the extremely small residual angle, ignoring higher-order small terms, requiring only shift and addition operations, with no additional hardware overhead.

[0026] In selecting the new angle set, the sine of the angle ( ) and cosine ( The value is represented using only powers of 2 (maximum 3 terms), and is encoded using Canonical Signed Numbers (CSD) to ensure that the rotation vector magnitude is 1, achieving absolute no scaling and requiring no subsequent compensation. (Circle) ) and hyperbolic ( The set of rotation angles adopts a similar power term structure, which only requires switching signs through a multiplexer, minimizing reconstruction overhead.

[0027] A 5-stage pipeline iterative architecture is adopted. The first three stages perform micro-rotations based on a new set of angles for different input residual angles. Each stage selects the corresponding rotation vector through a comparator and encoder to quickly shrink the residual angle. After the third stage, the residual angle is only [a certain value]. The order of magnitude. The last two stages: use a first-order Taylor series approximation, taking advantage of the extremely small residual angle, ignoring higher-order small terms, requiring only shift and addition operations, with no additional hardware overhead. Angles are filtered by effective word length (WLE), with WLE ≥ 16 for all angles, ensuring 16-bit precision requirements, and errors concentrated after 14 bits, not affecting core precision.

[0028] However, despite the significant progress made in existing CORDIC algorithms, the following core drawbacks still exist: 1. Limited convergence range: The convergence range of the traditional CORDIC algorithm differs between circular and hyperbolic rotations; for example, the convergence range of circular rotation is [-99°, 99°], while that of hyperbolic rotation is [-64°, 64°]. This necessitates the use of additional mapping logic such as angle folding and quadrant transformation in reconfigurable architectures to extend the range, introducing hardware complexity and phase truncation error.

[0029] 2. High hardware redundancy and resource overhead: The first two stages of rotation consume a lot of resources and have a low resource reuse rate, requiring a lot of on-chip slice resources; the scaling factor compensation circuit increases hardware redundancy; the multiple independent coefficient generation modules and registers in the reconfigurable architecture lead to increased resource overhead.

[0030] 3. In the existing angle set traversal algorithm, only two loops are used, and the rotation angle is not considered. The selection of the angle set is not comprehensive enough, which limits the optimization of accuracy and efficiency.

[0031] 4. Difficulty in balancing computational accuracy and hardware overhead: Existing solutions often sacrifice accuracy or increase area consumption when reducing the number of iterations. For example, while parallel architectures improve speed, they increase critical path latency and the number of registers.

[0032] These drawbacks limit the widespread adoption of the CORDIC algorithm in high-speed, high-precision applications. Therefore, how to balance wide convergence range, absolute scaling-free operation, high reconfigurability, high precision, and low resource overhead while employing the CORDIC algorithm is a pressing technical challenge that needs to be addressed.

[0033] In view of this, embodiments of this application propose a scale-free, reconfigurable CORDIC computation method based on lookup tables and micro-rotation angle sets, which can solve the technical problem of the difficulty in balancing convergence range, hardware resources, computational accuracy and reconfigurability in existing CORDIC architectures.

[0034] One embodiment of this application proposes a scaling-free reconfigurable CORDIC calculation method based on lookup tables and micro-rotation angle sets, applied to electronic devices, where the electronic device can be a terminal or a server. This embodiment and subsequent embodiments will use a server as an example for illustration. The implementation details of the scaling-free reconfigurable CORDIC calculation method based on lookup tables and micro-rotation angle sets proposed in this embodiment are described below. The following implementation details are provided for ease of understanding and are not essential for implementing this solution.

[0035] For example, the scaling-free reconfigurable CORDIC calculation method based on lookup tables and micro-rotation angle sets provided by the embodiments of this application can be applied to various fields such as high-speed signal processing, communication, radar, and image processing.

[0036] The method provided in the embodiments of this application specifically offers the following key points: First, a novel angle set generation technique: Embodiments of this application propose an angle set traversal algorithm based on regular signed number encoding. By limiting the cosine value to combinations of two powers of 2, it traverses and generates circular rotation angle sets and hyperbolic rotation angle sets that satisfy a 16-bit effective word length. This angle set unifies the parameter rules for both rotation modes, significantly reduces the number of non-zero terms, and lowers the hardware resource consumption for shift and addition / subtraction operations.

[0037] Second, the highly reconfigurable shared architecture: the circular rotation mode and the hyperbolic rotation mode share the same set of rotation vectors, iterative calculation units, and control logic, switching rotation modes only through a switch signal. This eliminates the need for multiple independent coefficient generation modules, registers, or multiplexers, and mode switching requires no additional iterations, reducing reconfiguration latency and hardware redundancy.

[0038] Third, the unique five-level rotation architecture: the first level of large-angle rotation is achieved by using a LUT lookup table for coarse angle adjustment, and then small-angle rotation vectors are used for fine adjustment, which reduces the number of iterations and shortens the critical path.

[0039] The specific implementation of the scaling-free reconfigurable CORDIC calculation method based on lookup tables and micro-rotation angle sets provided in the embodiments of this application is as follows: The specific process of the scaling-free reconfigurable CORDIC calculation method based on lookup tables and micro-rotation angle sets proposed in this embodiment can be described as follows: Figure 2 As shown, it includes: Step 101: Obtain the input angle and mode selection signals.

[0040] The convergence range of the input angle is: The mode selection signal is used to select either circular rotation mode or hyperbolic rotation mode.

[0041] For example, input angle It can be in 16-bit fixed-point form; the data format is 1 sign bit, 1 integer bit, and 14 decimal bits. Its convergence range can be... This ranges from -90° to 90°, ensuring that subsequent rotation operations do not require additional angle folding or quadrant mapping hardware; the input angle... The data is input to the module corresponding to the first-level rotation operation via the data bus.

[0042] Understandably, the main problem with traditional radix-2 CORDIC design lies in the different convergence ranges under circular and hyperbolic rotations. The convergence range under circular rotation is... The convergence range of hyperbolic rotation is To overcome this problem, the traditional radix-2 CORDIC algorithm repeats certain iterations during hyperbolic rotations, leading to higher costs for reconfigurable architectures. The CORDIC algorithm proposed in this application has advantages over both circular and hyperbolic rotations. The convergence range is defined, and the reconfigurable architecture in the design achieves resource sharing and reduces reconfiguration overhead by using the same rotation parameters for circular and hyperbolic rotations and adding multiplexers to the data path.

[0043] For example, the mode selection signal (i.e., the switch signal) is a binary control signal used to select the rotation mode of the CORDIC algorithm. When the mode selection signal is low (or logic 0), the rotation mode is circular rotation mode; when the mode selection signal is high (or logic 1), the rotation mode is hyperbolic rotation mode. This mode selection signal is generated by the control logic module and passed to each level of the rotation unit to realize mode switching.

[0044] Input angle The mode selection signal is buffered in a register to ensure timing synchronization. See the overall input interface reference. Figure 3 A diagram of a 16-bit word-length five-stage pipeline computing architecture; For angles where sine / cosine / hyperbolic sine / hyperbolic cosine values ​​need to be calculated, switch is the mode selection signal used to select whether the rotation mode is circular or hyperbolic. clk is the control clock. The reg register is used to buffer the output vector of each stage. The data format is a 16-bit signed number, with 1 sign bit, 1 integer bit, and 14 fractional bits. Figure 3 Stage-1 corresponds to the first-level rotation of the proposed algorithm, and so on. The overall algorithm calculates and outputs angles. The sine / cosine / hyperbolic sine / hyperbolic cosine values.

[0045] Another major problem with traditional radix-2 CORDIC designs is that the scaling factors for circular and hyperbolic rotations differ, and rescaling the rotation vector may require additional complex hardware. In the algorithm proposed in this application, regardless of the chosen rotation trajectory, the rotation vector undergoes five levels of rotation with unit amplitude angles, achieving absolutely scale-free rotation. Therefore, the CORDIC algorithm proposed in this application does not require scaling factor compensation, saving hardware resources.

[0046] In the proposed CORDIC algorithm, The rotation angles are achieved through a cascade of five rotation levels. Except for the first level, each rotation level has its own unit-amplitude rotation angle and rotation vector, and each level specifies its input and output ranges. A lookup table design is also incorporated, sacrificing some storage resources for a simpler hardware structure and higher system efficiency. The lookup table effectively converts the input angles into values ​​in a single memory access. Fold to range This effectively achieves a large-angle rotation, compensating for the small angle issue in scaling-free iteration. (The angle is then...) Divide into several equal parts, with intervals of 1 / 2. The resulting set of angles is ,and The lookup table stores the set of angles corresponding to... Values ​​of the group of sine and cosine functions and hyperbolic sine and cosine functions.

[0047] Input range for each level Defined as the range of angles within which the algorithm can converge, and the output range. It is the set of angle residuals for that level. In order for the algorithm to converge, the input range of each level must be greater than the output range of the previous level. The rotation angle should be chosen to minimize the input angle residuals of that level and be easy to obtain directly by taking bits in the hardware, and the use of subtractors should be avoided as much as possible.

[0048] For a detailed description of the five levels of rotation operations, please refer to steps 102 to 103 below.

[0049] Step 102: Based on the mode selection signal, perform a first-level rotation operation on the input angle through a lookup table, map the input angle to a small angle region, and output the first rotation vector value and the first remaining angle after the first-level rotation operation.

[0050] Understandably, by using a lookup table (LUT), the input angle is mapped to a small angle region, thereby reducing the complexity of subsequent micro-rotations.

[0051] In one possible embodiment, the lookup table is stored in read-only memory, with the stored predetermined angles in steps. The rotation vectors are evenly spaced; the preset angles include 13 angles, and the rotation vector values ​​are stored in 16-bit fixed-point quantization. Each rotation vector value includes 1 sign bit, 1 integer bit, and 14 decimal bits. The preset angles include: radian.

[0052] The lookup table stores rotation vector values ​​corresponding to multiple preset angles; the rotation vector values ​​include sine and cosine values ​​for circular rotation mode, and hyperbolic sine and hyperbolic cosine values ​​for hyperbolic rotation mode.

[0053] For example, the first-level rotation uses a lookup table to range the input within... Input angle mapping to The output range of radians is in Inner A lookup table is constructed for the step size, which stores... The sine, cosine, hyperbolic sine, and hyperbolic cosine function values ​​corresponding to 13 angles, including radians, are quantized and stored using 16-bit fixed-point numbers.

[0054] Since the first stage of using a lookup table is equivalent to a large-angle rotation, the hyperbolic rotation will increase the data length by 1 bit under a large-angle rotation. In order to eliminate the impact on the subsequent hardware structure design, the lookup table output values ​​of hyperbolic sine and hyperbolic cosine are only shifted one bit to the right in the first stage, which does not affect the convergence of the overall algorithm.

[0055] In one possible embodiment, step 102 above includes: calculating the absolute value of the input angle and mapping the absolute value of the input angle to a preset angle range to obtain a mapped angle; obtaining the rotation vector value corresponding to the mapped angle from a lookup table based on the mapped angle; controlling the multiplexer based on the mode selection signal to select and output the first rotation vector value corresponding to the rotation mode, and obtaining and outputting the first remaining angle by truncating the low bits of the absolute value of the angle.

[0056] The rotation vector value corresponding to the mapping angle is associated with the mode selected by the mode selection signal.

[0057] First, calculate the input angle. absolute value To expand the convergence range of the input angle from Mapped to , and thus sign bit and Perform an XOR operation, then AND with Add them together to get the absolute value. The structure is as follows: Figure 4 As shown, its advantage is that it does not require a complex subtractor and can be completed using only basic logic gates.

[0058] The input and output relationships of the lookup table are as follows: Figure 5 As shown, the lookup table is implemented in ROM, and the absolute value of the input angle is used. bit Mapped to ROM input address The remaining angle after the first stage of rotation. equal The remaining angle can be directly from The bits are obtained without the need for a conventional subtractor. The output of the lookup table is connected to a data selector, and the rotation mode (circular or hyperbolic) is selected via a switch signal, thereby controlling the output of the first stage. and Is it the sine value, the cosine value, or the hyperbolic sine value, the hyperbolic cosine value?

[0059] For example, the output function value is selected using a multiplexer based on the mode selection signal switch.

[0060] If the switch signal selects circular rotation mode, it outputs sine and cosine values; if it selects hyperbolic rotation mode, it outputs hyperbolic sine and hyperbolic cosine values. The first-stage rotation outputs the first rotation vector value. and the first remaining angle Among them, the first remaining angle Taken directly from The bits [11:0] do not require subtraction operations, thus avoiding hardware redundancy.

[0061] Among them, circular rotation and hyperbolic rotation share the address of the lookup table, the set of micro-rotation angles, and the hardware resources for rotation operation, and switch modes through a mode selection signal to achieve high reconfigurability of hardware resources.

[0062] For example, the first-stage rotating module includes a ROM, a multiplexer, and control logic, and the overall structure integrated into the pipeline can be referenced. Figure 2 As shown.

[0063] In one possible embodiment, based on the mode selection signal, a first-level rotation operation is performed on the input angle through a lookup table to map the input angle to a small angle region, and the first rotation vector value and the first remaining angle after the first-level rotation operation are output. This includes: if the mode selection signal selects the hyperbolic rotation mode, the rotation vector value output by the lookup table is shifted one bit to the right to obtain the first rotation vector value, so as to eliminate the influence of the increased data length under large angles by hyperbolic rotation.

[0064] For example, in hyperbolic rotation mode, since the hyperbolic function will increase the data length by one bit when rotated at a large angle (for example, the hyperbolic cosine value may exceed the 16-bit representation range), in order to avoid affecting subsequent hardware design, the hyperbolic sine and hyperbolic cosine values ​​output by the lookup table are shifted one bit to the right. The specific operation is as follows: In terms of hardware, a shifter (implemented by combinational logic) is added after the ROM output to shift the hyperbolic function value by 2 (i.e., arithmetic right shift by one bit), thereby normalizing the data range to a 16-bit fixed-point number.

[0065] For example, if the hyperbolic sine wave output from the ROM is 16-bit data, after right shifting, the most significant bit (sign bit) remains unchanged, while the fractional part is truncated, ensuring that the output value still meets the 16-bit precision requirement. This processing does not affect the convergence of the algorithm because the right shift operation is equivalent to scaling adjustment and is only applied in the first-level rotation operation; subsequent rotation levels will continue to calculate based on the normalized value.

[0066] Step 103: Using the micro-rotation angle set, perform multi-level iterative micro-rotation operations on the first remaining angle, and output the final rotation vector value.

[0067] The micro-rotation angle set is generated based on regular signed number encoding, and the effective word length of all rotation angles meets the effective word length requirement. The magnitude of the rotation vector is 1 to achieve no scaling.

[0068] For example, each micro-rotation operation determines the corresponding rotation vector value based on the remaining angle output by the previous micro-rotation operation; In one possible embodiment, the micro-rotation angle set is generated based on regular signed number encoding. The specific implementation process includes: traversing all candidate rotation angles based on combinations of powers of 2, and calculating the sine and cosine values ​​corresponding to each candidate angle; optimizing the representation of the sine and cosine values ​​based on regular signed number encoding rules to limit the number of non-zero terms in their binary representation; calculating the effective word length of each candidate angle, and filtering angles with an effective word length greater than or equal to a predetermined threshold; and storing the filtered angles as a set of circular rotation angles and a set of hyperbolic rotation angles to form the micro-rotation angle set.

[0069] For example, in a digital system, the multiplication of two complex numbers can be implemented using three real multipliers and four real adders. The hardware implementation of complex multipliers consumes significant hardware resources. Canonical Signed Digit (CSD) encoding is a sparse and efficient numerical representation widely used in digital signal processing and hardware design to reduce the hardware overhead and latency of multiplication operations. CSD encoding represents values ​​with the fewest non-zero terms, thus effectively reducing resource consumption. A core feature of CSD encoding is its ability to avoid consecutive non-zero bits, thereby effectively reducing shift operations and addition / subtraction operations in computation.

[0070] Will be used to represent and By limiting the number of required powers of 2 to a certain range, the use of hardware resources can be reduced. This is achieved within the proposed new perspective set. The following restrictions have been imposed, as shown in the formula below: ; in, , , .

[0071] For example, an array of vectors consisting of powers of 2 is used as input, and the array elements are vectors. This array covers common binary weight values ​​from 0 to 1. It defines the basic components of the possible sine values, ensuring that candidate angles can be achieved through simple shift operations.

[0072] We can use three nested loops (corresponding to lines 3-18 in Algorithm 1 below) to iterate over all possible combinations: The first loop iterates through the vector. Each element index (From 1 to length).

[0073] The second loop iterates through the index. (Also from 1 to length), allowing and The same or different, to generate different linear combinations.

[0074] The coefficients of the third loop are traversed. , used to represent positive and negative combinations of sine values, for example = .

[0075] The pseudocode for angle set traversal algorithm 1 is given below:

[0076] Algorithm 1 takes a vector array of powers of 2 as input and generates a list of angles for circular and hyperbolic rotations with a valid word length greater than 16. Algorithm 1 represents the sine value by iterating through all possible combinations of powers of 2, and the corresponding cosine value can be derived using simple trigonometric functions of circular and hyperbolic trajectories. Algorithm 1 iterates through all possible angles; if the valid word length of an angle is less than 16, it skips that angle and does not add it to the angle set. The output of Algorithm 1 is two angle sets: the circular rotation angle set and the... Hyperbolic rotation angle set The effective word length of each angle in the angle set is greater than 16. The two output angle sets will be used for subsequent vector rotations.

[0077] Algorithm 1 can be used to iterate through a series of angle sets that meet the requirements. Table 1 lists some angles whose radian values ​​are close to powers of 2.

[0078] Table 1 Angle CSD encoding results and corresponding approximate angle 16-bit word length representation

[0079] Table 1 shows the CSD encoding results of the sine and cosine function values ​​of each angle in the original angle column of the CSD method. However, there are still many non-zero terms. According to the CSD encoding specifications and the requirements of the effective word length, some adjusted approximate angles can be selected to replace the original angles. The CSD encoding results of these adjusted approximate angles are simpler combinations of powers of 2 terms, which can reduce the resource consumption of shift and addition operations.

[0080] In one possible embodiment, the multi-level iterative micro-rotation operation includes a second-level rotation operation, a third-level rotation operation, a fourth-level rotation operation, and a fifth-level rotation operation executed sequentially; step 103 above includes: In the second-level rotation operation, the corresponding rotation vector value is selected from the set of micro-rotation angles based on the range of the first residual angle, and the carry-store adder is used for calculation; in the third-level rotation operation, multiple pairs of conjugate rotation vectors are used to cover the symmetric angle interval; in the fourth-level and fifth-level rotation operations, the small angle residue is handled based on the first-order approximation of the Taylor series, and the rotation operation is achieved through shift and addition operations.

[0081] In one possible embodiment, in the second-level rotation operation, a corresponding rotation vector value is selected from the set of micro-rotation angles based on the range of the first remaining angle, and calculation is performed using a carry-store adder, including: when the first remaining angle is within... When the angle is in radians, the rotation vector value P1 is selected from the set of micro-rotation angles; when the first remaining angle is in When dealing with radians, select rotation vector value P2 from the micro-rotation angle set.

[0082] Here, P1 and P2 represent two different combinations of powers of 2; the second-level rotation operation is implemented by a multiplexer and a carry-saving adder.

[0083] After the first stage of rotation is completed, the first remaining angle lie in That is, the output range of the previous level (i.e., the first level rotation operation). lie in The input range of this level must include the output range of the previous level in order to ensure that all residual angles of the previous level are processed and that the algorithm converges.

[0084] For example, the first remaining angle The convergence range is The second-level rotation operation uses two rotation vectors (P1 and P2), according to... The value of the vector is selected if 0.125 > If the value is ≥0.0859, select P2 (rotation angle 0.1253 radians) for rotation; if 0.0859 > If the value is ≥0, select P1 (rotation angle 0.0469 radians) for rotation. Select the standard by comparison. The bits [15:9] are used to implement this, avoiding the subtractor.

[0085] The second-level rotation outputs the second rotation vector value. ) and second remaining angle The output residual angle range is reduced to radian.

[0086] Table 2 summarizes the rotation vectors for the second stage of the proposed CORDIC algorithm, which utilizes two rotation vectors. and Come to Rotate at different input angles.

[0087] Table 2 Rotation vectors for the second-order rotation

[0088] The computational structure for the second-level rotation operation is as follows: Figure 6 As shown, with For example, output The output structure is basically the same; only the input needs to be changed. and exchange.

[0089] The second-stage rotation calculation structure consists of control logic, four 2-to-1 multiplexers, and a 5-to-2 carry-save adder (CSA). The control logic is a simple combinational logic that calculates the residual angle from the previous stage input. A total of 7 bits are compared with the angle selection criteria given in the last column of Table 2. Combined with the rotation mode selection signal `switch`, selection signals s0~s4 of the multiplexer are generated based on the input angle. These signals control the data value input to the 5-to-2 CSA. The multiplexer selects different rotation vectors based on different input angles. To reduce path delay, a 5-to-2 CSA is used. A 16-bit wide 5-to-2 CSA consists of three 16-bit full adders and a 16-bit ripple carry adder (CPA). During the calculation process, the 5-to-2 CSA may experience carry overflow, but the final output coordinates are truncated to 16-bit fixed-point numbers to limit carry during the calculation.

[0090] It is understood that in the CORDIC algorithm architecture proposed in the embodiments of this application, circular rotation and hyperbolic rotation share a set of rotation vectors. The advantage of doing so is that the calculation structure is the same when implementing angle rotation in hardware, which simplifies the control logic, reduces the overhead of hardware resources, reduces redundant circuits, improves the reconfigurability of the architecture, and can adapt to the needs of various scenarios.

[0091] In one possible embodiment, in the third-level rotation operation, multiple pairs of conjugate rotation vectors are used to cover the symmetrical angle range, including: obtaining the symmetrical angle region; selecting rotation vectors based on the range of the second remaining angle obtained after the second-level rotation operation to ensure that the rotation range covers the symmetrical region; the third-level rotation operation is implemented by a multiplexer and a carry-save adder, and the control logic generates a selection signal based on the bit comparison of the second angle.

[0092] Among them, the symmetrical angle interval is [ ]radian.

[0093] For example, after the second-level rotation operation is completed, the remaining angle lie in The convergence range of the rotation vector at this level must include this interval in radians. To facilitate subsequent representation using conjugate symmetric rotation vectors, the convergence range of the rotation vector at this level is chosen to include [...]. The range of the remaining angles output is within the symmetrical interval of radians. In terms of radians, this level of rotation selects 6 pairs of conjugate rotation vectors to rotate different input residual angles. Table 3 summarizes the rotation vectors of the third level of the proposed CORDIC algorithm.

[0094] Table 3 Rotation vectors for the third-order rotation

[0095] The computational structure for the third-level rotation operation is as follows: Figure 7 As shown, with For example, output The output structure is basically the same; only the input needs to be changed. and exchange.

[0096] Similar to the computational structure of the second-level rotation operation, the third-level rotation operation also consists of control logic, two 3-to-1 multiplexers, two 4-to-1 multiplexers, and a 5-to-2 carry-save adder (CSA). The combinational logic of the third-level rotation operates by... A total of 5 bits are compared with the angle selection criteria given in the last column of Table 3 to generate 4 sets of 2-bit control lines s0~s4 for the four multiplexers.

[0097] The third-level rotation outputs the third rotation vector value. , ) and the third remaining angle Third Residual Angle The convergence range is narrowed to the interval .

[0098] In one possible embodiment, the small-angle residues in the fourth-level and fifth-level rotation operations are handled based on a first-order approximation of the Taylor series, and the rotation operations are implemented through shift and addition operations. See the following embodiment for details: Understandably, the computational structures of the fourth and fifth level rotation operations in this algorithm are similar, mainly utilizing the Taylor expansion of trigonometric functions when the rotation angle is very small. An approximation is made, as shown in the following formula: ; ; Implementing higher-order Taylor series expansions in hardware requires complex hardware, so only a first-order approximation of the Taylor series is used. The first-order approximation has limitations on the maximum value of the rotation angle, and since the input angle for the fourth-order rotation operation is very small, it is only applicable within the interval... Within radians, the error introduced by the first-order Taylor series approximation does not affect the accuracy of the output coordinates. For any input angle... When satisfied When, the second-order terms of its Taylor expansion can be ignored. ,because It represents the minimum precision achievable by a 16-bit fixed-point number with 1 sign bit, 1 integer part, and 14 fractional bits, and the maximum value of the input angle for a fourth-order rotation. ,item The value is less than Therefore, it can be represented using only a first-order Taylor expansion without affecting the accuracy of the output.

[0099] If Then the absolute error produced by this approximation is = ,Will The resulting absolute error is Similarly, it can be deduced that the same applies to hyperbolic rotation. and With an approximate Taylor expansion, this calculation is for the case of maximum input. As the input angle decreases, the accuracy of the first-order Taylor approximation will improve.

[0100] For example, the rotation vector of the fourth-level rotation operation of the algorithm proposed in the embodiments of this application is represented by the following equation (15).

[0101] in, and They represent circular rotation and hyperbolic rotation, respectively. It's a selection function that chooses the rotation vector based on the residual angle input from the previous stage. It can be represented as , The subtractor is avoided by truncation judgment on the residual angle of the previous stage output.

[0102] Because of the maximum input angle in the fourth stage Very small, with The rotation matrix for the fourth-order rotation is as follows:

[0103] when When determined, rotations at this level can be implemented using simple binary shift operations. When it is an integer power of 2, for example , ,when When the term is not an integer power of 2, the CSD notation is used to generate two terms of power 2, which are then represented by their sum and difference. ,For example hour, .

[0104] The rotation vector value for the fourth-level rotation operation is expressed by the following formula: ; in, It is determined by extracting specific bits of the third remaining angle obtained after the third-level rotation operation; These are mode parameters; when the rotation mode is circular rotation mode, And when the rotation mode is hyperbolic rotation mode, ; It represents the imaginary part of the rotation vector value.

[0105] It should be noted that, It's a selection function that chooses the rotation vector based on the residual angle input from the previous stage. It can be represented as , The subtractor is avoided by truncation judgment on the residual angle of the previous stage output.

[0106] Due to the maximum input angle of the fourth-level rotation operation Very small, with The rotation matrix for the fourth-level rotation operation is as follows: ; when When determined, rotations at this level can be implemented using simple binary shift operations. When it is an integer power of 2, for example , ,when When the term is not an integer power of 2, the CSD notation is used to generate two terms of power 2, which are then represented by their sum and difference. ,For example hour,

[0107] like Figure 8 As shown, Figure 8 A computational structure for a fourth-level rotation operation proposed in an embodiment of this application, in order to For example, output The output structure is basically the same; only the input needs to be changed. and exchange.

[0108] After the fourth level of rotation operation, the fourth rotation vector value is output. and the fourth remaining angle The convergence range is narrowed to an interval radian.

[0109] The input angle for the fifth-level rotation has only positive values, within the interval Within the arc, the fifth-order rotation only rotates in one direction, rotating through all remaining angles.

[0110] The rotation vector value for the fifth-level rotation operation is expressed by the following formula: ; in, It is determined by extracting specific bits of the fourth remaining angle obtained after the fourth-level rotation operation, and The value range is from 0 to 15.

[0111] It should be noted that, unlike the fourth-level rotation operation, here... Selection function Also represented by CSD, that is, using the sum and difference of two terms raised to the power of 2, any term less than 2... All terms can be ignored because after shifting right by more than 14 bits, they can be considered as 0 in the fixed-point representation of 14 decimal places.

[0112] like Figure 9 As shown, Figure 9 A computational structure for a fifth-level rotational operation proposed in an embodiment of this application, to For example, output The output structure is basically the same; only the input needs to be changed. and exchange.

[0113] After the fifth rotation operation, output the fifth rotation vector value. That is, the final rotation vector value required.

[0114] It is understood that the algorithm proposed in the embodiments of this application has a larger convergence range, reducing the additional hardware overhead of methods such as angle folding. The convergence range of existing hyperbolic rotation methods is only... This requires additional mapping logic such as angle folding and quadrant transformation to extend the range, which introduces additional hardware complexity and phase truncation error. The embodiments of this application use a lookup table (LUT) design for the first-level rotation operation to represent the input angle... Direct mapping to The interval, combined with the subsequent four-level cascaded rotations, ensures that the convergence range of both circular and hyperbolic rotations is covered. This approach eliminates the need for additional hardware expansion, reduces the number of iterations, and maintains computational accuracy by selecting effective word lengths. It simplifies design, avoids mapping errors, and adapts to a wider range of practical applications. The embodiments of this application achieve unified angle set design, simpler hardware implementation, lower hardware resource consumption, shorter data path latency, and higher reconfigurability, reducing design complexity and manufacturing costs, and facilitating large-scale integration and application.

[0115] Optionally, the architecture provided in the embodiments of this application can also merge several levels of rotation or split a certain level of rotation into multiple levels of rotation. Parallel rotation architecture can also be used to replace the serial structure, achieving a similar effect by trading area for speed. Alternatively, the first level of rotation can use a large-angle rotation vector instead of a LUT lookup table.

[0116] Alternatively, in the hardware module, the carry-store adder can be implemented using a carry-lookahead adder or a tree adder, balancing area and speed to adapt to different application scenarios. The lookup table can be implemented using a dynamic computation unit in conjunction with a small-capacity cache.

[0117] This application proposes a scaling-free reconfigurable CORDIC calculation method based on a lookup table and a micro-rotation angle set. First, the input angle and mode selection signal are acquired. Then, based on the mode selection signal, a first-level rotation operation is performed on the input angle using a lookup table, mapping the input angle to a small-angle region, and outputting the first rotation vector value and the first remaining angle after the first-level rotation operation. Next, using the micro-rotation angle set, multi-level iterative micro-rotation operations are performed on the first remaining angle, outputting the final rotation vector value. Since the convergence range of the input angle is... The mode selection signal is used to select either circular rotation mode or hyperbolic rotation mode, ensuring that the algorithm can handle input angles from -90° to 90°. The first-level rotation operation on the input angle is performed using a lookup table, quickly reducing large angles to a range manageable by micro-rotations, thus reducing the total number of iterations. The micro-rotation angle set ensures that the modulus of each rotation step is always 1, eliminating the scaling factor and significantly reducing hardware complexity and resource overhead. Furthermore, since circular and hyperbolic rotations share the lookup table address, micro-rotation angle set, and hardware resources, high reconfigurability is achieved through mode selection signal switching. Based on this, this solution addresses the technical challenge of balancing convergence range, hardware resources, computational accuracy, and reconfigurability in existing CORDIC architectures, achieving a wide convergence range, absolute scaling-free operation, high reconfigurability, and low resource overhead while maintaining high accuracy.

[0118] In summary, the scaling-free reconfigurable CORDIC optimized structure based on LUT and micro-rotation angle set proposed in the embodiments of this application has the core advantages of balancing a wide convergence range, absolute scaling-free operation, high reconfigurability, 16-bit high precision, and low resource overhead. It perfectly matches the development needs of modern electronic devices for "high integration, high throughput, and low power consumption" and can be widely applied to multiple core fields such as digital signal processing, communication, radar, image processing, and navigation.

[0119] For example, in the FPGA hardware implementation of radar sea clutter simulators, nonlinear transformations (logarithmic, trigonometric, square root, etc.) are a core technical bottleneck. Traditional CORDIC architectures suffer from problems such as numerous iteration levels, high resource consumption, and large latency. This invention can directly replace the CORDIC computation module in existing sea clutter simulation systems, achieving multi-dimensional optimization and adapting to the generation of multi-distributed clutter: its circular rotation mode can efficiently complete trigonometric function calculations, and its hyperbolic rotation mode is suitable for logarithmic and exponential operations. It can meet the core computational requirements of the zero-memory nonlinear transformation method without additional hardware modules, improving real-time performance and hardware efficiency. Through a unified angle set design and resource-sharing architecture, it reduces LUT resource consumption, eliminates the need for high-end FPGA or DSP+FPGA combination architectures, reduces hardware deployment costs, and is more suitable for mass industrial applications.

[0120] For example, in the FPGA hardware implementation of radar intermediate frequency signal generators, traditional DDS often adopts a "phase accumulator + ROM lookup table" architecture, which has problems such as wasted storage resources, large phase truncation noise, and single modulation mode.

[0121] The embodiments of this application can replace the phase-to-amplitude conversion stage in the traditional architecture. Through five-level iterative calculation of the new angle set, sine and cosine values ​​are generated in real time, solving the problem of limited on-chip memory in low-to-mid-range FPGA chips. Convergence range coverage... No quadrant mapping is required, reducing the logic delay of angle transformation; Secondly, the embodiments of this application can flexibly adapt to the generation of complex modulation signals. Radar intermediate frequency signals often need to achieve amplitude modulation (AM), frequency modulation (FM), phase modulation (PM), and composite modulation (such as linear frequency modulation (LFM) and phase-coded signals). Traditional DDS requires an additional modulator module, leading to increased hardware complexity. This invention achieves one-stop adaptation through reconfigurable characteristics: Circular rotation mode adapts to conventional modulation: utilizing the trigonometric function operations of the circular rotation mode, it directly supports LFM signals without the need for an additional multiplier module. Hyperbolic rotation mode adapts to special modulation: for complex radar waveforms (such as hyperbolic frequency modulation signals and exponential modulation signals), the hyperbolic rotation mode quickly realizes hyperbolic sine / cosine and logarithmic / exponential operations without additional hardware expansion, adapting to the waveform switching requirements of multi-mode radars (such as the search / tracking mode switching of phased array radars). At the same time, it can realize real-time mode switching, supporting real-time switching of radar intermediate frequency signals between conventional modulation and special modulation without reconfiguring hardware parameters, improving the operational flexibility of the radar system.

[0122] Finally, the embodiments of this application can optimize the resources for multi-channel radar signal generation. Phased array radars often require multiple channels to generate intermediate frequency signals in parallel. The multi-channel expansion of the traditional DDS architecture leads to a multiple increase in ROM and DSP resources, resulting in high hardware costs. The embodiments of this application, through angle set multiplexing design, enable multi-channel signal generation to share the same set of angle set storage and iterative calculation units. Only a phase accumulator and data buffer need to be added to complete the multi-channel signal generation.

[0123] The steps described above are for clarity only. In implementation, they can be combined into one step, or some steps can be broken down into multiple steps, as long as they involve the same logical relationship, they are all within the scope of protection of this application. Adding insignificant modifications or introducing insignificant designs to the algorithm or process, without changing the core design of the algorithm and process, are also within the scope of protection of this application.

[0124] Another embodiment of this application proposes a scale-free reconfigurable CORDIC computing system based on lookup tables and micro-rotation angle sets. The details of this scale-free reconfigurable CORDIC computing system based on lookup tables and micro-rotation angle sets are described below. The following implementation details are provided for ease of understanding and are not essential for implementing this example. Figure 10 This is a schematic diagram of the structure of a scale-free, reconfigurable CORDIC computing system based on a lookup table and a set of micro-rotation angles proposed in this embodiment, including: The acquisition module 210 is used to acquire the input angle and mode selection signal; wherein, the convergence range of the input angle is... The mode selection signal is used to select either circular rotation mode or hyperbolic rotation mode; The first-level rotation operation module 220 is used to perform a first-level rotation operation on the input angle based on the mode selection signal and through a lookup table, to map the input angle to a small angle region, and to output the first rotation vector value and the first remaining angle after the first-level rotation operation. The multi-level iterative micro-rotation operation module 230 is used to perform multi-level iterative micro-rotation operations on the first remaining angle using a micro-rotation angle set, and output the final rotation vector value; wherein, the micro-rotation angle set is generated based on regular signed number encoding, and the effective word length of all rotation angles in it meets the effective word length requirement, and the magnitude of the rotation vector is 1 to achieve no scaling; Among them, circular rotation and hyperbolic rotation share the address of the lookup table, the set of micro-rotation angles, and the hardware resources for rotation operation, and switch modes through a mode selection signal to achieve high reconfigurability of hardware resources.

[0125] It is not difficult to see that this embodiment is a system embodiment corresponding to the above method embodiments, and this embodiment can be implemented in conjunction with the above method embodiments. The relevant technical details and technical effects mentioned in the above method embodiments are still valid in this embodiment, and will not be repeated here to reduce repetition. Accordingly, the relevant technical details mentioned in this embodiment can also be applied to the above method embodiments.

[0126] It is worth mentioning that all modules and units involved in this embodiment are logical modules. In practical applications, a logical unit can be a physical unit, a part of a physical unit, or a combination of multiple physical units. Furthermore, to highlight the innovative aspects of this application, this embodiment does not introduce units that are not closely related to solving the technical problems proposed in this application; however, this does not mean that other units are absent in this embodiment.

[0127] Another embodiment of this application provides an electronic device, such as Figure 11 As shown, it includes a processor 31 and a memory 32. The memory 32 stores instructions that the processor 31 can execute. When the processor 31 is configured to execute the instructions, the electronic device can implement a scaling-free reconfigurable CORDIC calculation method based on a lookup table and a micro-rotation angle set as described in the above method embodiment.

[0128] The memory and processor are connected via a bus, which includes any number of interconnecting buses and bridges, connecting various circuits of one or more processors and the memory. The bus can also connect various other circuits such as peripheral devices, voltage regulators, and power management circuits, which are well known in the art and will not be described further herein. The bus interface provides an interface between the bus and the transceiver. The transceiver can be a single component or multiple components, such as multiple receivers and transmitters, providing a unit for communicating with various other devices over a transmission medium. Data processed by the processor is transmitted over the wireless medium via an antenna, which further receives data and transmits it to the processor.

[0129] The processor manages the bus and general processing, and also provides various functions, including timing, peripheral interfaces, voltage regulation, power management, and other control functions. Memory is used to store data used by the processor during operation.

[0130] Another embodiment of this application proposes a computer-readable storage medium storing a computer program that, when executed by a processor, enables a scaling-free reconfigurable CORDIC calculation method based on a lookup table and a set of micro-rotation angles as described in the above method embodiments.

[0131] That is, those skilled in the art will understand that all or part of the steps in the above method embodiments can be implemented by a program instructing related hardware. The program is stored in a storage medium and includes several instructions to cause a device (such as a microcontroller, chip, etc.) or processor to execute all or part of the steps of the method described in the method embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory, random access memory, magnetic disks, or optical disks.

[0132] Those skilled in the art will understand that the above embodiments are specific implementations of this application, and in practical applications, various changes can be made in form and detail without departing from the spirit and scope of this application. For those skilled in the art, several improvements and modifications can be made without departing from the principles of this application, and these improvements and modifications are also considered to be within the scope of protection of this application.

Claims

1. A scaling-free, reconfigurable CORDIC calculation method based on lookup tables and micro-rotation angle sets, characterized in that, The method includes: Acquire the input angle and mode selection signal; where the convergence range of the input angle is... The mode selection signal is used to select either circular rotation mode or hyperbolic rotation mode; Based on the mode selection signal, the input angle is rotated to a small angle region by a lookup table, and the first rotation vector value and the first remaining angle after the first rotation operation are output. Using a set of micro-rotation angles, multi-level iterative micro-rotation operations are performed on the first remaining angle to output the final rotation vector value. The set of micro-rotation angles is generated based on regular signed number encoding, and the effective word length of all rotation angles meets the effective word length requirement. The magnitude of the rotation vector is 1 to achieve no scaling. Among them, circular rotation and hyperbolic rotation share the address of the lookup table, the set of micro-rotation angles, and the hardware resources for rotation operation, and switch modes through a mode selection signal to achieve high reconfigurability of hardware resources.

2. The method according to claim 1, characterized in that, The micro-rotation angle set is generated based on regular signed number encoding, and its specific implementation process includes: Iterate through all candidate rotation angles based on combinations of powers of 2, and calculate the sine and cosine values ​​for each candidate angle. Based on the regular signed number encoding rules, the representation of sine and cosine values ​​is optimized to limit the number of non-zero terms in their binary representation; Calculate the effective word length for each candidate angle and filter angles whose effective word length is greater than or equal to a predetermined threshold; The filtered angles are stored as a set of circular rotation angles and a set of hyperbolic rotation angles, respectively, to form a set of micro-rotation angles.

3. The method according to claim 1, characterized in that, The lookup table stores rotation vector values ​​corresponding to multiple preset angles; the rotation vector values ​​include sine and cosine values ​​for circular rotation mode, and hyperbolic sine and hyperbolic cosine values ​​for hyperbolic rotation mode. The process based on the mode selection signal, performing a first-level rotation operation on the input angle using a lookup table to map the input angle to a small angle region, and outputting the first rotation vector value and the first remaining angle after the first-level rotation operation, includes: Calculate the absolute value of the input angle and map the absolute value of the input angle to a preset angle range to obtain the mapped angle; Based on the mapping angle, the rotation vector value corresponding to the mapping angle is obtained from the lookup table; wherein, the rotation vector value corresponding to the mapping angle is associated with the mode selected by the mode selection signal; Based on the mode selection signal, the multiplexer is controlled to select and output the first rotation vector value corresponding to the rotation mode. At the same time, the first remaining angle is obtained and output by truncating the low bits of the absolute value of the angle.

4. The method according to claim 3, characterized in that, The process based on the mode selection signal, performing a first-level rotation operation on the input angle using a lookup table to map the input angle to a small angle region, and outputting the first rotation vector value and the first remaining angle after the first-level rotation operation, includes: If the mode selection signal selects the hyperbolic rotation mode, the rotation vector value output by the lookup table is shifted one bit to the right to obtain the first rotation vector value, so as to eliminate the effect of increased data length under large angles of hyperbolic rotation.

5. The method according to claim 3, characterized in that, The lookup table is stored in read-only memory, and the predetermined angles stored are in steps. The rotation vectors are evenly spaced; the preset angles include 13 angles, and the rotation vector values ​​are stored in 16-bit fixed-point quantization. Each rotation vector value includes 1 sign bit, 1 integer bit, and 14 decimal bits. The preset angles include: radian.

6. The method according to claim 1, characterized in that, The multi-level iterative micro-rotation operation includes the second-level rotation operation, the third-level rotation operation, the fourth-level rotation operation, and the fifth-level rotation operation executed sequentially; The process of using a set of micro-rotation angles to perform multi-level iterative micro-rotation operations on the first remaining angle, and outputting the final rotation vector value, includes: In the second-level rotation operation, the corresponding rotation vector value is selected from the micro-rotation angle set based on the range of the first remaining angle, and the carry-save adder is used for calculation. In the third-level rotation operation, multiple pairs of conjugate rotation vectors are used to cover the symmetric angle range; In the fourth and fifth level rotation operations, small-angle residues are handled based on the first-order approximation of Taylor series, and rotation operations are implemented through shift and addition operations.

7. The method according to claim 6, characterized in that, In the second-level rotation operation, the corresponding rotation vector value is selected from the micro-rotation angle set based on the range of the first remaining angle, and the calculation is performed using a carry-back adder, including: When the first remaining angle is When the rotation is in radians, select the rotation vector value P1 from the micro-rotation angle set; When the first remaining angle is When the rotation is in radians, select the rotation vector value P2 from the micro-rotation angle set; Where P1 and P2 represent two different combinations of terms based on powers of 2; The second-level rotation operation is implemented using a multiplexer and a carry-save adder.

8. The method according to claim 6, characterized in that, In the third-level rotation operation, multiple pairs of conjugate rotation vectors are used to cover the symmetric angle range, including: Obtain the symmetrical angle region; where the symmetrical angle interval is [ ]radian; Select the rotation vector based on the range of the second remaining angle obtained after the second-level rotation operation to ensure that the rotation range covers the symmetrical region; The third-level rotation operation is implemented through a multiplexer and a carry-save adder. The control logic generates a selection signal based on the bit comparison of the second angle.

9. The method according to claim 8, characterized in that, In the fourth and fifth level rotation operations, small-angle residues are handled based on the first-order approximation of Taylor series, and the rotation operations are implemented through shift and addition operations, including: The rotation vector value for the fourth-level rotation operation is expressed by the following formula: ； in, It is determined by extracting specific bits of the third remaining angle obtained after the third-level rotation operation; These are mode parameters; when the rotation mode is circular rotation mode, And when the rotation mode is hyperbolic rotation mode, ; Represents the imaginary part of the rotation vector value; The rotation vector value for the fifth-level rotation operation is expressed by the following formula: ； in, It is determined by extracting specific bits of the fourth remaining angle obtained after the fourth-level rotation operation, and The value range is from 0 to 15.

10. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it can implement a scaling-free reconfigurable CORDIC calculation method based on a lookup table and a micro-rotation angle set as described in any one of claims 1 to 9.

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