Flash memory grain grading method based on re-reading ratio, controller and storage medium
By performing erase, write, read, and reread ratio processing on flash memory chips at different temperatures, multiple candidate grades of flash memory chips are determined, solving the problem of insufficient refinement of grading results in existing technologies, and achieving more accurate product grading and quality assurance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- ARTMEM TECHNOLOGY CO LTD
- Filing Date
- 2026-01-30
- Publication Date
- 2026-05-29
AI Technical Summary
Existing flash memory chip grading methods are too simplistic, resulting in insufficiently detailed grading results and making it difficult to guarantee the quality of products leaving the factory.
A flash memory chip grading method based on reread ratio is adopted. Each data block in the flash memory chip is erased, read, and graded at different test temperatures to determine the first and second class of blocks. The target grade is determined based on multiple candidate grades for each data block, and finally, a more refined product grading is performed.
It improves the accuracy of flash memory chip grading, ensures product quality, and provides more detailed product grading results to meet the needs of different customers.
Smart Images
Figure CN122116992A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of flash memory chip grading technology, and in particular to a flash memory chip grading method, controller, and storage medium based on reread ratio. Background Technology
[0002] Flash memory products undergo rigorous screening before leaving the factory to ensure quality. Otherwise, defective products reaching end users would cause significant problems. Current technology involves placing flash memory products in high / low temperature environments and performing a series of erase and write operations to obtain the results. These results are then used to determine the quality of the flash memory chips, thus completing product grading. While this method can perform preliminary product grading, the limited screening criteria result in only two levels of results: pass or fail. This simplistic approach leads to insufficiently detailed grading of flash memory chips, making it difficult to guarantee product quality after shipment. Summary of the Invention
[0003] This application aims to address at least one of the technical problems existing in the prior art. To this end, this application proposes a flash memory chip grading method, controller, and storage medium based on reread ratio, which can classify and grade each data block in the flash memory chip at different test temperatures, and perform more refined product grading of the flash memory chip based on the classification and grading results of each data block, thereby improving the accuracy of flash memory chip grading and ensuring product quality.
[0004] In a first aspect, embodiments of this application provide a flash memory chip grading method based on reread ratio, including:
[0005] At different test temperatures, the data blocks currently under test in the flash memory chip are subjected to erase / write processing, read processing, and block classification processing based on the reread ratio to determine the first type of blocks and the second type of blocks, as well as multiple candidate levels for each first type of block; wherein, the first type of blocks are non-bad blocks and the second type of blocks are bad blocks; the flash memory chip includes multiple data blocks, and each data block includes multiple data pages; For each of the first type of blocks, the candidate level with the largest number of levels is determined as the target level from the plurality of candidate levels; In the case where the flash memory chip does not include the second type of block, the flash memory is graded according to the type of the target grade of all the first type of block to determine the product grade of the flash memory chip.
[0006] In a second aspect, embodiments of this application provide a controller, including at least one processor and a memory for communicatively connecting to the at least one processor; the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to enable the at least one processor to perform a flash memory chip grading method based on reread ratio as described in any of the embodiments of the first aspect.
[0007] Thirdly, embodiments of this application provide a computer-readable storage medium storing computer-executable instructions for causing a computer to perform a flash memory chip grading method based on reread ratio as described in any of the embodiments of the first aspect.
[0008] This application's embodiments include: In the process of grading flash memory chips, firstly, under different test temperatures, the data blocks currently under test in the flash memory chips undergo erase / write processing, read processing, and block grading processing based on reread ratios to determine first-class blocks, second-class blocks, and multiple candidate grades for each first-class block; wherein, first-class blocks are non-bad blocks, and second-class blocks are bad blocks; the flash memory chip includes multiple data blocks, and each data block includes multiple data pages; next, for each first-class block, the candidate grade with the highest number of grades is determined as the target grade from the multiple candidate grades; each data block is classified into first-class blocks and second-class blocks under different test temperatures, thereby determining the target grade for each first-class block, providing a reliable reference basis for subsequently determining the product grade of the flash memory chip; finally, in the case where the flash memory chip does not include second-class blocks, flash memory grading processing is performed according to the type of the target grade of all first-class blocks to determine the product grade of the flash memory chip; thus, based on the classification and grading results of each data block, the flash memory chip is further refined into a product grade, improving the accuracy of flash memory chip grading and ensuring product quality. In other words, the embodiments of this application can classify and grade each data block in the flash memory chip at different test temperatures, and perform more detailed product grading of the flash memory chip based on the classification and grading results of each data block, thereby improving the accuracy of flash memory chip grading and ensuring product quality. Attached Figure Description
[0009] Figure 1 This is a schematic diagram of a system architecture for performing a flash memory chip grading method based on reread ratio, provided in one embodiment of this application; Figure 2 This is a flowchart illustrating a flash memory chip grading method based on reread ratio provided in one embodiment of this application; Figure 3 This is a schematic diagram illustrating the mapping relationship between candidate page number ranges and corresponding level numbers provided in one embodiment of this application; Figure 4This is a schematic diagram illustrating the determination of the product grade of flash memory chips according to an embodiment of this application; Figure 5 This is a schematic diagram of the hardware structure of a controller provided in one embodiment of this application. Detailed Implementation
[0010] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments.
[0011] It should be noted that although a logical order is shown in the flowcharts in this application, in some cases, the steps shown or described may be performed in a different order than that shown in the flowcharts. In the description of this application, "several" means one or more, and "more" means two or more. The terms "first" and "second" are used only to distinguish technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of technical features indicated, or implicitly indicating the order in which the technical features are indicated.
[0012] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application.
[0013] This application provides a flash memory chip grading method, controller, and computer-readable storage medium based on reread ratio, relating to the field of flash memory chip grading technology; it can perform more refined product grading of flash memory chips based on the classification and grading results of each data block, improving the accuracy of flash memory chip grading and ensuring product quality.
[0014] The embodiments of this application will be further described below with reference to the accompanying drawings.
[0015] like Figure 1 As shown, the system architecture for executing the flash memory chip grading method based on reread ratio includes: a controller and a flash memory chip under test electrically connected to the controller. The flash memory chip includes multiple data blocks, and each data block includes multiple data pages. It is understood that the controller is used to execute the flash memory chip grading method based on reread ratio provided in this application embodiment. It can classify and grade each data block in the flash memory chip at different test temperatures, and perform more refined product grading of the flash memory chip based on the classification and grading results of each data block, thereby improving the accuracy of flash memory chip grading and ensuring product quality.
[0016] Those skilled in the art will understand that the system structure shown in the figures does not constitute a limitation on the embodiments of this application, and may include more or fewer components than shown, or combine certain components, or have different component arrangements.
[0017] The system embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.
[0018] It will be understood by those skilled in the art that the system architecture and application scenarios described in the embodiments of this application are for the purpose of more clearly illustrating the technical solutions of the embodiments of this application, and do not constitute a limitation on the technical solutions provided in the embodiments of this application. It is known by those skilled in the art that with the evolution of system architecture and the emergence of new application scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.
[0019] Based on the above system architecture, various embodiments of the flash memory chip grading method based on reread ratio of this application are proposed below.
[0020] Firstly, such as Figure 2 As shown, this flash memory chip grading method based on reread ratio can be applied to, for example... Figure 1 In the system framework shown, the flash memory chip grading method based on reread ratio may include, but is not limited to, steps S100 to S300.
[0021] Step S100: Under different test temperatures, the data block to be tested in the flash memory chip is subjected to erase / write processing, read processing, and block classification processing based on the reread ratio to determine the first type of block and the second type of block, as well as multiple candidate levels for each first type of block; wherein, the first type of block is a non-bad block and the second type of block is a bad block; the flash memory chip includes multiple data blocks, and each data block includes multiple data pages.
[0022] Specifically, in this step, the different test temperatures include: preset high-temperature test temperature and low-temperature test temperature. It is understood that the high-temperature test temperature and low-temperature test temperature can be determined based on actual test conditions and requirements; therefore, this application does not impose specific restrictions on the values of the high-temperature test temperature and low-temperature test temperature.
[0023] In this application, multiple candidate levels include: a first candidate level, a second candidate level, a third candidate level, and a fourth candidate level. Specifically, the first candidate level is determined under a high-temperature write-high-temperature read test scenario; the second candidate level is determined under a high-temperature write-low-temperature read test scenario; the third candidate level is determined under a low-temperature write-low-temperature read test scenario; and the fourth candidate level is determined under a low-temperature write-high-temperature read test scenario. Each of the first, second, third, and fourth candidate levels has a specific number of levels, and the number of levels for each candidate level is determined by the specific test conditions.
[0024] According to some embodiments of this application, step S100 is further described, wherein, at different test temperatures, the data block to be tested in the flash memory chip is subjected to erase / write processing, read processing, and block classification processing based on reread ratio to determine the first class of blocks and the second class of blocks, as well as multiple candidate levels for each first class of block, including but not limited to steps S110 to S140.
[0025] Step S110: At a high temperature test temperature, perform high-temperature erase and write operations on all data blocks currently under test in the flash memory chip. Based on the high-temperature erase and write results of each data block, determine the first type of block and the second type of block from the data blocks.
[0026] According to some embodiments of this application, step S110 includes, but is not limited to, steps S111 to S113.
[0027] Step S111: Perform high-temperature erase / write operations on all data blocks currently under test in the flash memory chip to obtain the high-temperature erase / write results for each data block.
[0028] Understandably, after completing the high-temperature erase and write operation on all data blocks, the result of the high-temperature erase and write operation for each data block is either successful or unsuccessful.
[0029] Step S112: The data blocks whose high-temperature erase / write result is successful are identified as the first type of block.
[0030] If the data block is successfully erased or written in this step, it means that the data block is not a bad block and is classified as a first-class block.
[0031] Step S113: The data blocks whose high-temperature erase / write result is erase / write failure are identified as the second type of blocks.
[0032] If erasing or writing a data block fails in this step, it indicates that the data block is a bad block and is classified as a second-class block.
[0033] In some embodiments, if the high-temperature erase / write result of each data block is successful, then there are currently no second-class blocks in the flash memory chip, and all data blocks are first-class blocks; the first-class blocks will be further processed to determine multiple candidate classifications of the first-class blocks.
[0034] Therefore, the number of second-class blocks obtained after steps S111 to S113 may be 0 or not. This application does not impose specific restrictions on the number of first-class blocks and second-class blocks obtained after preliminary classification.
[0035] Based on the high-temperature erasure and write results, the data blocks are initially classified into Class I blocks and Class II blocks through steps S111 and S113. Class II blocks will not be further tested and classified. Class I blocks will continue to undergo subsequent reading processing and block classification processing based on reread ratio to further determine multiple candidate levels for Class I blocks, thereby laying the foundation for determining the target level in the future.
[0036] Step S120: Under high temperature and low temperature test temperatures, the first type of block is read and classified according to the reread ratio, respectively, to determine the first candidate level and the second candidate level of the first type of block.
[0037] Specifically, step S120 includes, but is not limited to, steps S121 to S122.
[0038] Step S121: Under the high-temperature test temperature, the first type of blocks are read and processed, and the first candidate level of the first type of blocks is determined based on the reread ratio. It can be understood that completing step S121 realizes the test scenario of high-temperature write and high-temperature read.
[0039] Step S122: Switch to the low-temperature test temperature, perform read processing on the first type of blocks, and perform block classification processing based on the reread ratio to determine the second candidate level of the first type of blocks. It can be understood that after completing the high-temperature write and high-temperature read test in step S121, the test is switched to the low-temperature test temperature to continue. At this time, read-only operations are performed first to realize the high-temperature write and low-temperature read test scenario.
[0040] Step S130: At the low temperature test temperature, perform low temperature erase and write operation on the first type of block to be tested. Based on the low temperature erase and write results of each first type of block, determine the updated first type of block and the newly added second type of block from the first type of block.
[0041] According to some embodiments of this application, step S130 includes, but is not limited to, steps S131 to S133.
[0042] Step S131: Perform low-temperature erase / write operations on the first type of block to be tested to obtain the low-temperature erase / write results for each first type of block.
[0043] Understandably, after performing low-temperature erase / write operations on all Class I blocks currently under test, the result of the low-temperature erase / write operation for each Class I block is either successful or unsuccessful.
[0044] Step S132: The first type of block whose low-temperature erase / write result is successful is determined as the updated first type of block.
[0045] In this step, if the erase / write operation of the first type of block to be tested is successful, it means that the data block is not a bad block and is classified as the updated first type of block.
[0046] Step S133: The first type of block whose low-temperature erase / write result is erase / write failure is identified as the newly added second type of block.
[0047] In this step, if the erase / write operation on the first type of block to be tested fails, it indicates that the first type of block is a bad block and is classified as a newly added second type of block. It is understandable that some data blocks, although successfully erased / written at high-temperature test temperatures, may fail to erase / write at low-temperature test temperatures due to poor low-temperature performance; further screening of data blocks improves the fineness of the screening and grading process.
[0048] This application, through steps S131 to S133, utilizes the low-temperature erase / write results obtained from the low-temperature erase / write operation to further filter out newly added second-class blocks; and further filters and classifies the currently tested first-class blocks. Furthermore, the newly added second-class blocks are no longer subjected to further testing, while the updated first-class blocks continue to undergo subsequent read processing and block classification based on reread ratios to further determine multiple candidate levels for the first-class blocks, thus laying the foundation for subsequently determining the target level.
[0049] Step S140: Under low temperature and high temperature test temperatures, the updated first type of blocks are read and classified according to the reread ratio, respectively, to determine the third and fourth candidate levels of the updated first type of blocks.
[0050] Step S140 includes, but is not limited to, steps S141 to S142.
[0051] Step S141: Under the low-temperature test temperature, the updated first-class blocks are read and processed, and block classification based on the reread ratio is performed to determine the third candidate level of the updated first-class blocks. It can be understood that completing step S141 achieves the test scenario for low-temperature write and low-temperature read.
[0052] Step S142: Switch to the high-temperature test temperature, perform read processing on the updated first-class blocks and block classification processing based on the reread ratio, and determine the fourth candidate level of the updated first-class blocks. It can be understood that after completing the low-temperature write and low-temperature read test in step S141, the test is switched to the high-temperature test temperature to continue the test, realizing the low-temperature write and high-temperature read test scenario.
[0053] Specifically, the reading processing and the block classification processing based on the reread ratio for determining candidate levels in steps S121, S122, S141, and S142 are the same, only the test temperature and test objects differ. The specific explanations of the reading processing and block classification processing based on the reread ratio in steps S121, S122, S141, and S142 are as follows.
[0054] According to some embodiments of this application, taking step S121 as an example, the first type of block is read and block classification is performed based on the reread ratio, including but not limited to steps S1211 to S1214.
[0055] Step S1211: Use the default read parameters to read the data pages of the first type of block and obtain the read results.
[0056] It is understood that the default read parameters are pre-configured, and this application does not impose specific restrictions on the content of the default read parameters. It is also understood that reading data from a data page stored in the first type of block will yield a result; the result for a single data page may be correct or incorrect; for a data page that was read incorrectly, the reread parameters in the preset reread table (which includes multiple sets of reread parameters) need to be called to reread the data page. If any set of reread parameters allows the data page to be read correctly, then the data page is considered normal.
[0057] It's important to note that during data reading, each page is first read using the default read parameters. If the read is successful, there's no need to use the reread table parameters to read the data again. If the read fails, the reread parameters from the preset reread table will be used again. If a chip has X blocks, and each block has Y pages, the number of reread pages in each non-bad block (based on the number of pages read using the preset reread table) can be counted. By comparing this count with different thresholds, the level of the first-class block can be determined.
[0058] Step S1212: Determine the target page to be reread based on the reading results and count the number of pages to be reread.
[0059] In this step, specifically, the data pages that were read incorrectly are identified as target pages to be reread, and the number of target pages to be reread is determined as the number of pages to be reread, laying a reference foundation for the subsequent determination of candidate levels.
[0060] Step S1213: After the rereading process of the target page is successful, the target page number interval where the reread page is located is determined from multiple preset candidate page number intervals; wherein, each candidate page number interval corresponds to a level number; wherein, the level number is a value from 1 to n, where n is a positive integer greater than 1; the larger the level number, the more pages are reread.
[0061] Step S1214: Determine the level number corresponding to the target page number range as the candidate level.
[0062] Specifically, if a data block contains Y data pages, then the Y data pages are divided into n levels. For example... Figure 3 As shown, if the candidate page number range is 0, the corresponding level number is 1; if the candidate page number range is 1 to the first page number threshold C, the corresponding level number is 2; if the candidate page number range is the first page number threshold C to the second page number threshold D, the corresponding level number is 3; and so on, if the candidate page number range is the third page number threshold G to the fourth page number threshold Y, the corresponding level number is n.
[0063] It is understandable that the page number thresholds and the n level tiers used when dividing multiple candidate page number intervals can be determined based on actual grading requirements and testing results. This application does not impose specific restrictions on the values of the page number thresholds and the n level tiers used when dividing multiple candidate page number intervals.
[0064] Here are some examples to illustrate steps S1213 and S1214: If the number of reread pages is 0, the corresponding candidate level is determined to be 1. After determining the candidate level, the first type of block is marked as A1. If the number of reread pages falls within the target page number range of 1 to the first page number threshold C, the corresponding candidate level is determined to be 2, and the first type of block is marked as A2. If the number of reread pages falls within the target page number range of G to Y, the corresponding candidate level is determined to be n, and the first type of block is marked as An. Marking these levels facilitates recording and subsequent filtering.
[0065] According to some embodiments of this application, after step S1212, that is, after determining the target page to be reread based on the reading result and counting the number of reread pages, the method may include, but is not limited to, steps S1215 and S1216.
[0066] Step S1215: Use a set of rereading parameters from the preset rereading table to reread the target page to be reread, and if the rereading process fails, select the next set of rereading parameters to reread the data page to be reread.
[0067] Step S1216: If all rereading processes fail after traversing all rereading parameters in the preset rereading table, determine that the data block is a second type of block.
[0068] The reread detection and grading mechanism is formed through steps S1215 and S1216. If the reading still cannot be completed correctly after using all the reread parameters in the preset reread table, it means that the data block is a bad block. Bad blocks are further filtered out to improve the fineness of the filtering and grading.
[0069] In one embodiment, specifically, in step S121, under the high temperature test temperature, read processing and block classification processing based on reread ratio are performed on each first type of block. After steps S1211 to S1214, the first candidate level of the first type of block under the high temperature write and high temperature read test scenario can be obtained, and the first candidate level is used to mark the first type of block; and through steps S1215 and S1216, it is possible to filter again to obtain the second type of block.
[0070] Specifically, in step S122, at the low temperature test temperature, read processing and block classification processing based on reread ratio are performed on each first type of block. After steps S1211 to S1214, the second candidate level of the first type of block under the test scenario of high temperature write and low temperature read can be obtained, and the first type of block is marked using the second candidate level; and it is possible to filter again to obtain the second type of block.
[0071] Specifically, in step S141, at the low temperature test temperature, read processing and block classification processing based on reread ratio are performed on each updated first-class block. After steps S1211 to S1214, the third candidate level of the updated first-class block under the low temperature write and low temperature read test scenario can be obtained, and the first-class block is marked using the third candidate level; and it is possible to filter again to obtain the second-class block.
[0072] Specifically, in step S142, under the high temperature test temperature, steps S1211 to S1214 are executed for each updated first-class block, so that the fourth candidate level of the updated first-class block under the test scenario of low temperature write and high temperature read can be obtained; and the first-class block is marked with the fourth candidate level; and it is possible to filter again to obtain the second-class block.
[0073] After completing the above processing, namely the read processing of all test phases and the block classification processing based on the reread ratio, the first type of blocks (i.e. all data blocks except bad blocks) are marked with multiple candidate levels: first candidate level, second candidate level, third candidate level and fourth candidate level.
[0074] Step S200: For each first-class block, determine the candidate level with the largest number of levels from multiple candidate levels as the target level.
[0075] Understandably, a higher level number indicates more pages reread within the first-class block, resulting in poorer performance for that block. Conversely, a lower level number indicates fewer pages reread within the first-class block, leading to better performance.
[0076] For example: If a first-class block includes a first candidate level of A1, a second candidate level of A1, a third candidate level of A4, and a fourth candidate level of A1, then the third candidate level (A4) with the largest number of levels is selected as the target level.
[0077] For another example: If a first-class block includes a first candidate level of A1, a second candidate level of A1, a third candidate level of A4, and a fourth candidate level of An, then the fourth candidate level (An) with the largest number of levels is selected as the target level.
[0078] It is understandable that after classifying and grading all data blocks, the flash memory chips will be classified and graded based on the classification and grading results of the data blocks.
[0079] According to some embodiments of this application, when the flash memory chip includes a second type of block, the flash memory chip is identified as a defective or substandard product.
[0080] Step S300: If the flash memory chips do not include second-class blocks, perform flash memory grading processing according to the type of the target grade of all first-class blocks to determine the product grade of the flash memory chips.
[0081] According to some embodiments of this application, step S300 includes, but is not limited to, steps S310 to S320.
[0082] Step S310: According to the preset flash memory grading mapping rules, when the target grade of all first-class blocks in the flash memory chip is 1, the flash memory chip is determined to be a first-class product.
[0083] In this step, if all data blocks within the flash memory chip are Class 1 blocks, and the target grade of each Class 1 block is 1 (i.e., the number of reread pages for each Class 1 block is 0), then the flash memory chip is determined to be a Class 1 product; Class 1 products are used to indicate that the flash memory chip has the best quality.
[0084] Step S320: Within the flash memory chip, there exists a first-class block with a target level other than 1. The product level of the flash memory chip is determined according to the preset flash memory grading mapping rule. The flash memory grading mapping rule is used to indicate the mapping relationship between the target level type and the product level of the first-class block in the flash memory chip.
[0085] In this step, the preset flash memory grading mapping rules are as follows: If a flash memory chip contains any Class II blocks that have failed to be erased or rewritten, the flash memory chip is directly identified as a defective or substandard product. If there are no Class II blocks that have failed to be erased or rewritten, and all Class I blocks are marked as A1, then the flash memory chip is classified and marked as a Class 1 product (L1). If there are no Class II blocks that have failed to be erased or rewritten, but there are Class I blocks marked as A1 and A2, then the flash memory chip is classified and marked as a Class 2 product (L2). If there are no Class II blocks that have failed to be erased or rewritten, but there are Class I blocks marked as A1, A2, and A3, then the flash memory chip is classified and marked as a Class 3 product (L3). This process continues, ultimately allowing for product grading into several levels, enabling shipment based on different demand levels.
[0086] The principle behind the preset flash memory hierarchical mapping rule settings is: see Figure 4 If any Class 2 blocks fail to write or erase, the flash memory chip is classified as defective or substandard. Otherwise, if any Class 1 blocks within the flash memory chip exhibit a lower target grade, the chip is classified according to the highest target grade number. For example, if X-1 Class 1 blocks are marked A1, but one Class 1 block is marked An, then the flash memory chip is classified as Ln. This is understandable. Figure 4 This application only shows a partial classification of flash memory chips; other classifications will not be described in detail here.
[0087] This application, through steps S100 to S300, in the process of grading flash memory chips, firstly, at different test temperatures, performs erase / write processing, read processing, and block grading processing based on reread ratio on the data blocks currently under test in the flash memory chips to determine first-class blocks and second-class blocks, as well as multiple candidate grades for each first-class block; wherein, first-class blocks are non-bad blocks, and second-class blocks are bad blocks; the flash memory chip includes multiple data blocks, and each data block includes multiple data pages; next, for each first-class block, the candidate grade with the largest number of grades is determined as the target grade from the multiple candidate grades; each data block is classified into first-class blocks and second-class blocks at different test temperatures, thereby determining the target grade of each first-class block, providing a reliable reference basis for subsequently determining the product grade of the flash memory chip; finally, in the case where the flash memory chip does not include second-class blocks, flash memory grading processing is performed according to the type of the target grade of all first-class blocks to determine the product grade of the flash memory chip; thus, based on the classification and grading results of each data block, the flash memory chip is further refined into a product grade, improving the accuracy of flash memory chip grading and ensuring product quality. In other words, the embodiments of this application can classify and grade each data block in the flash memory chip at different test temperatures, and perform more detailed product grading of the flash memory chip based on the classification and grading results of each data block, thereby improving the accuracy of flash memory chip grading and ensuring product quality.
[0088] This application primarily analyzes the reread ratio during read operations under high and low temperature environments, and also considers the feedback from erase and write operations to ultimately achieve a grading effect. An example is provided to illustrate the complete process steps of the flash memory chip grading method in this application.
[0089] Step S0: Set the test temperature environment to high temperature test temperature T1, and perform high temperature erase and write operations on all data blocks of the flash memory chip under the T1 environment.
[0090] Step S1: Determine whether the erase / write was successful; if not, proceed to step S2; if yes, proceed to step S3.
[0091] Step S2: Identify data blocks that failed to be erased or rewritten at high temperature as bad blocks.
[0092] Step S3: Identify the data blocks that were successfully erased and written at high temperature as the first type of block, and perform a read operation on the first type of block; complete the high temperature write and high temperature read operation to obtain the read result.
[0093] Step S4: Determine whether a reread is needed based on the reading result; if not, proceed to step S5; if yes, proceed to step SS6.
[0094] Step S5: Mark the data block as A1.
[0095] Step S6: Count the number of pages to be reread and the target page to be reread.
[0096] Step S7: Perform rereading processing on the target page using the rereading parameters in the rereading table.
[0097] Step S8: Determine whether the rereading process was successful; if not, proceed to step S9; if yes, proceed to step S10.
[0098] Step S9: If all reread parameters have been used and the reread process still fails, then it is determined to be a bad block.
[0099] Step S10: Determine the candidate level of the first type of block based on the page number range where the reread page number is located.
[0100] Step S11: Set the test temperature environment to the low-temperature test temperature T2, and perform a read operation on the first type of block; complete the high-temperature write and low-temperature read operation to obtain the read result; then jump to steps S4 to S10 to obtain the candidate level, and continue to execute step S12. The candidate level is one of A1 to An.
[0101] Step S12: Perform low-temperature erase / write operation on the first type of block at the low-temperature test temperature T2.
[0102] Step S13: Determine whether the erase / write was successful; if not, proceed to step S14; if yes, proceed to step S15.
[0103] Step S14: Identify data blocks that failed to be erased or rewritten at low temperature as bad blocks.
[0104] Step S15: Identify the data blocks that were successfully erased and written at low temperature as the first type of block, and perform a read operation on the first type of block; complete the low temperature write and low temperature read operation to obtain the read result; then jump to execute steps S4 to S10, obtain the candidate level, and continue to execute step S16. The candidate level is one of A1 to An.
[0105] Step S16: Set the test temperature environment back to the high-temperature test temperature T1. Perform a read-only operation in the high-temperature environment to complete the low-temperature write and high-temperature read operation and obtain the read result. Then, jump to steps S4 to S10 to obtain the candidate level and continue to step S17. The candidate level is one of A1 to An. At this point, the classification of all temperature stage blocks is completed.
[0106] Step S17: For the first type of block, select the candidate level with the largest number of levels from multiple candidate levels as the target level.
[0107] Step S18: Perform flash memory grading based on the target grade of all first-class blocks to determine the product grade of the flash memory chips.
[0108] In summary, this application delves into read operations, meticulously classifying the read operation status within each data block to ultimately classify the data blocks. Through the classification of all data blocks, the classification of an entire flash memory chip is completed. This application provides a more detailed classification result, going beyond simply categorizing operations as success or failure. It further categorizes chips with successful read / write operations into several levels, providing reliable screening and classification results. The final selected flash memory chips can meet diverse customer needs, allowing users to choose the appropriate level based on their usage scenarios and cost considerations.
[0109] like Figure 5 As shown, the present invention also provides a controller, comprising: The processor 501 can be implemented using a general-purpose central processing unit, microprocessor, application-specific integrated circuit, or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of this application. The memory 502 can be implemented as a read-only memory, static storage device, dynamic storage device, or random access memory. The memory 502 can store the operating system and other applications. When the technical solutions provided in the embodiments of this specification are implemented through software or firmware, the relevant program code is stored in the memory 502 and is called and executed by the processor 501 to execute the flash memory chip grading method based on reread ratio of the embodiments of this application. The input / output interface 503 is used to implement information input and output; The communication interface 504 is used to enable communication and interaction between this device and other devices. Communication can be achieved through wired means (such as USB, network cable, etc.) or wireless means (such as mobile network, WIFI, Bluetooth, etc.). Bus 505 transmits information between various components of the device (e.g., processor 501, memory 502, input / output interface 503, and communication interface 504); The processor 501, memory 502, input / output interface 503, and communication interface 504 are connected to each other within the device via bus 505.
[0110] This application embodiment also provides a storage medium, which is a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, it implements the above-described flash memory chip grading method based on reread ratio.
[0111] Memory, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs and non-transitory computer-executable programs. Furthermore, memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, memory may optionally include memory remotely located relative to the processor, and these remote memories can be connected to the processor via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof. The device embodiments described above are merely illustrative, and the units described as separate components may or may not be physically separate, and may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.
[0112] It will be understood by those skilled in the art that all or some of the steps and systems in the methods disclosed above can be implemented as software, firmware, hardware, and suitable combinations thereof. Some or all of the physical components can be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit. Such software can be distributed on a computer-readable medium, which can include computer storage media (or non-transitory media) and communication media (or transient media). As is known to those skilled in the art, the term computer storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disc (DVD) or other optical disc storage, magnetic cartridges, magnetic tape, disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and is accessible to a computer. Furthermore, as is known to those skilled in the art, communication media typically include computer-readable instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.
[0113] The above provides a detailed description of the preferred embodiments of this application. However, this application is not limited to the above-described embodiments. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of this application. All such equivalent modifications or substitutions are included within the scope defined by this application.
Claims
1. A method for classifying flash memory chips based on reread ratio, characterized in that, include: At different test temperatures, the data blocks currently under test in the flash memory chip are subjected to erase / write processing, read processing, and block classification processing based on the reread ratio to determine the first type of blocks and the second type of blocks, as well as multiple candidate levels for each first type of block; wherein, the first type of blocks are non-bad blocks and the second type of blocks are bad blocks; the flash memory chip includes multiple data blocks, and each data block includes multiple data pages; For each of the first type of blocks, the candidate level with the largest number of levels is determined as the target level from the plurality of candidate levels; In the case where the flash memory chip does not include the second type of block, the flash memory is graded according to the type of the target grade of all the first type of block to determine the product grade of the flash memory chip.
2. The flash memory chip grading method based on reread ratio according to claim 1, characterized in that, The different test temperatures include: preset high temperature test temperature and low temperature test temperature; the multiple candidate levels include: first candidate level, second candidate level, third candidate level and fourth candidate level; The process involves performing erase / write operations, read operations, and block classification based on reread ratios on the data block currently under test in the flash memory chip at different test temperatures to determine first-class blocks, second-class blocks, and multiple candidate levels for each first-class block, including: At the high-temperature test temperature, a high-temperature erase and write operation is performed on all the data blocks currently under test in the flash memory chip. Based on the high-temperature erase and write results of each data block, the first type of block and the second type of block are determined from the data blocks. Under the high temperature test temperature and the low temperature test temperature respectively, the first type of block is subjected to reading processing and block classification processing based on reread ratio, and the first candidate level and the second candidate level of the first type of block are determined respectively. At the low temperature test temperature, a low temperature erase and write operation is performed on the first type of block to be tested. Based on the low temperature erase and write results of each first type of block, the updated first type of block and the newly added second type of block are determined from the first type of block. At the low-temperature test temperature and the high-temperature test temperature, the updated first-class blocks are read and classified based on the reread ratio, respectively, to determine the third and fourth candidate levels of the updated first-class blocks.
3. The flash memory chip grading method based on reread ratio according to claim 2, characterized in that, The reading process for the first type of blocks and the block classification process based on the reread ratio include: The data pages of the first type of block are read using the default read parameters to obtain the read results; Based on the reading results, determine the target page to be reread and count the number of pages to be reread; After the rereading process on the target page is successful, the target page number interval where the reread page is located is determined from a plurality of preset candidate page number intervals; wherein, each candidate page number interval corresponds to a level number; wherein, the level number is a value from 1 to n, where n is a positive integer greater than 1; the larger the level number, the more reread pages there are; The level number corresponding to the target page number range is determined as the candidate level.
4. The flash memory chip grading method based on reread ratio according to claim 2, characterized in that, The step of performing high-temperature erase / write operations on all data blocks currently under test in the flash memory chip, and determining the first type of block and the second type of block from the data blocks based on the obtained high-temperature erase / write results of each data block, includes: A high-temperature erase / write operation is performed on all the data blocks currently under test in the flash memory chip to obtain the high-temperature erase / write result for each data block; The data block whose high-temperature erasure and write result is successful is identified as the first type of block; The data block whose high-temperature erase / write result is erase / write failure is identified as the second type of block.
5. The flash memory chip grading method based on reread ratio according to claim 2, characterized in that, The step of performing a low-temperature erase / write operation on the first type of block currently under test, and determining the updated first type of block and the newly added second type of block from the first type of block based on the low-temperature erase / write results of each first type of block, includes: Perform low-temperature erase and write operations on the first type of block to be tested to obtain the low-temperature erase and write results for each first type of block; The first type of block whose low-temperature erase / write result is successful is determined as the updated first type of block; The first type of block whose low-temperature erase / write result is erase / write failure is identified as a newly added second type of block.
6. The flash memory chip grading method based on reread ratio according to claim 3, characterized in that, After determining the target page to be reread based on the reading result and counting the number of reread pages, the method further includes: The target page to be reread is reread using a set of reread parameters from a preset reread table, and if the reread process fails, the next set of reread parameters is selected to reread the data page to be reread. If all rereading processes fail after traversing all the rereading parameters in the preset rereading table, the data block is determined to be a second type of block.
7. The flash memory chip grading method based on reread ratio according to claim 3, characterized in that, The step of performing flash memory grading processing based on the type of the target grade of all the first type of blocks to determine the product grade of the flash memory chip includes: According to the preset flash memory grading mapping rules, when the target grade of all the first type blocks in the flash memory chip is 1, the flash memory chip is determined to be a first-grade product. Within the flash memory chip, there exists a first type of block with a target level not equal to 1. The product level of the flash memory chip is determined according to a preset flash memory grading mapping rule. The flash memory grading mapping rule is used to indicate the mapping relationship between the type of the target level of the first type of block in the flash memory chip and the product level.
8. The flash memory chip grading method based on reread ratio according to claim 1 or 6, characterized in that, In the case where the flash memory chip includes a second type of block, the flash memory chip is identified as a defective or substandard product.
9. A controller, characterized in that, It includes at least one processor and a memory for communicatively connecting to the at least one processor; the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to enable the at least one processor to perform the flash memory chip grading method based on reread ratio as described in any one of claims 1 to 8.
10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions for causing a computer to perform the flash memory chip grading method based on reread ratio as described in any one of claims 1 to 8.