Electrical resistance film structure and method of making same

Abstract

The present application provides a kind of thin film resistance structure and preparation method of electric resistance, thin film resistance structure includes substrate, alloy interface layer, resistance layer, conductor layer, protective layer and plating layer.The preparation method of the present application uses sputtering to form metal material in strip structure on the substrate with specially designed photomask method.This method can improve the resistance of electric resistance, heat dissipation capacity and bonding force.

Description

Technical Field

[0001] This invention relates to a method for preparing an electrically resistant thin-film resistor structure, and more particularly to a method for manufacturing a thin-film resistor element with electrical resistance and heat dissipation properties. Background Technology

[0002] A surge refers to a sudden high voltage or high current phenomenon in a circuit. When a resistor encounters a surge, a large current will flow through it, resulting in an instantaneous increase in power, which will cause the resistor to heat up, affecting its stability or even damaging the resistor chip.

[0003] The effects of heat on resistors include performance degradation, physical damage, and reduced reliability. Sustained or frequent high temperatures can cause the resistor material to degrade, potentially leading to resistance drift and affecting circuit stability and accuracy. In extreme cases, excessively high temperatures can cause resistors to burn out or crack, or even cause circuit failure. Furthermore, frequent heating and cooling cycles accelerate the aging process of resistors, thereby reducing their long-term reliability. Summary of the Invention

[0004] Electrical withstand capability (also known as surge resistance) refers to the maximum voltage that a resistor can withstand without breakdown or damage. In order to improve the surge withstand capability of thin film resistors, this invention develops novel technical solutions for protective coatings, film materials, structures, circuit protection, and manufacturing methods to overcome the shortcomings and disadvantages of existing technologies.

[0005] This invention provides a method for preparing an electrically resistant thin-film resistor structure, comprising:

[0006] Set a substrate;

[0007] An alloy interface layer and a resistive layer are sequentially formed on a first surface of the substrate. The alloy interface layer has a plurality of first continuous strip structures, and the resistive layer has a plurality of second continuous strip structures. The plurality of first continuous strip structures are aligned with the plurality of second continuous strip structures.

[0008] An upper conductor layer is formed at both ends of the resistive layer and the alloy interface layer, and a lower conductor layer is formed at both ends of a second surface of the substrate, and then sintered.

[0009] A protective layer is formed on the resistive layer and the upper conductor layer;

[0010] Fold the substrate along a first direction;

[0011] A conductor is formed at each of the two ends of the resistive layer, forming a conductor composite structure;

[0012] Folding is performed along a second direction of the substrate; and

[0013] An electroplated layer is formed at both ends of the protective layer and the conductor composite structure.

[0014] Preferably, the alloy interface layer and the resistive layer are sputtered using the same photomask.

[0015] Preferably, the method for preparing the electrically resistant thin-film resistor structure further includes forming the electrically resistant thin-film resistor structure on both the first surface and a second surface of the substrate.

[0016] Preferably, the upper conductor layer and the lower conductor layer are thick-film conductors, and the thickness of the upper conductor layer and the lower conductor layer is 3 to 60 μm.

[0017] Preferably, the resistive layer is a thin-film alloy, and the thickness of the resistive layer is 20-10. 5 nm.

[0018] Furthermore, the present invention provides an electrically resistant thin-film resistor structure comprising:

[0019] One substrate;

[0020] An alloy interface layer is disposed on a first surface of the substrate; wherein the alloy interface layer has a plurality of first continuous strip structures;

[0021] A resistive layer partially covers the alloy interface layer; wherein the resistive layer has a plurality of second continuous strip structures, and the plurality of first continuous strip structures are aligned with the plurality of second continuous strip structures;

[0022] A conductor composite structure is disposed at both ends of the substrate and connected to the resistive layer and the alloy interface layer to form two electrodes;

[0023] A protective layer is disposed on the resistive layer, exposing the two electrodes; and

[0024] An electroplated layer is disposed on the side of the substrate, covering both sides of the substrate.

[0025] Preferably, the interval between the plurality of first continuous strip structures is greater than the thickness of the plurality of strip structures.

[0026] Preferably, the conductor composite structure comprises: an upper conductor layer, a lower conductor layer, and a side conductor layer, wherein the upper conductor layer, the lower conductor layer, the resistive layer, and the alloy interface layer abut against the same surface of the side conductor layer.

[0027] Preferably, the upper conductor layer and the lower conductor layer are thick-film conductors, and the thickness of the upper conductor layer and the lower conductor layer is 3 to 60 μm.

[0028] Preferably, the resistive layer is a thin-film alloy, and the thickness of the resistive layer is 20-10.5 nm. Attached Figure Description

[0029] Figure 1 , Figure 2 , Figure 3 This is a cross-sectional schematic diagram of the preparation steps of the first embodiment of the present invention.

[0030] Figure 4 This is a cross-sectional schematic diagram of the first embodiment of the present invention.

[0031] Figure 5 This is a cross-sectional schematic diagram of the second embodiment of the present invention.

[0032] Figure 6 This is a cross-sectional schematic diagram of the third embodiment of the present invention.

[0033] Figure 7 , Figure 8 , Figure 9 , Figure 10 , Figure 11 , Figure 12 , Figure 13 This is a top view schematic diagram of each step of the manufacturing method of the first embodiment of the present invention.

[0034] Figure 14 This is an enlarged cross-sectional schematic diagram of the alloy interface layer of the present invention.

[0035] Figure 15 This is a flowchart of the manufacturing method of the first embodiment of the present invention.

[0036] Symbol Explanation

[0037] 1-3: Electrically Resistant Thin Film Resistor Structure

[0038] 10:Substrate

[0039] 20: Alloy interface layer

[0040] 21: First continuous strip structure

[0041] 30: Resistive layer

[0042] 31: Second continuous strip structure

[0043] 40: Conductor composite structure

[0044] 41: Upper conductor layer

[0045] 42: Lower conductor layer

[0046] 43: Side conductor layer

[0047] 50: Protective layer

[0048] 60: Electroplating layer

[0049] 70: Repairing cutting line

[0050] DR1: First Direction

[0051] DR2: Second Direction

[0052] S01-S10: Steps

[0053] X-X', Y-Y': Resistance cutting lines Detailed Implementation

[0054] The following embodiments, in conjunction with the accompanying drawings, are used to illustrate the spirit of the present invention, enabling those skilled in the art to clearly understand the technology of the present invention. However, they are not intended to limit the scope of the present invention, and the scope of the patent right of the present invention should be defined by the claims. It is particularly emphasized that the drawings are for illustrative purposes only and do not represent the actual size or quantity of the components. Some details may not be fully drawn in order to achieve the simplicity of the drawings.

[0055] For the sake of brevity, the resistor shown in the illustration is used as an example, but it should be understood that it is used as an example and not to limit the invention. The high-temperature resistant resistor element of the present invention can be implemented in any shape.

[0056] Please refer to the following: Figure 1 , Figure 2 , Figure 3 , Figure 4 and Figure 7 , Figure 8 , Figure 9 , Figure 10 , Figure 11 , Figure 12 , Figure 13 , Figure 14 , Figure 15 , Figure 1 , Figure 2 , Figure 3 This is a cross-sectional schematic diagram of the preparation steps of the first embodiment of the present invention. Figure 4 This is a cross-sectional schematic diagram of the first embodiment of the present invention. Figure 7 , Figure 8 , Figure 9 , Figure 10 , Figure 11 , Figure 12 , Figure 13 This is a top view schematic diagram of the preparation steps of the first embodiment of the present invention. Figure 14 This is a schematic cross-sectional view of the strip structure of the present invention. Figure 15 This is a flowchart of the manufacturing method of the first embodiment of the present invention.

[0057] The electrically resistant thin-film resistor structure 1 of the present invention includes a substrate 10, an alloy interface layer 20, a resistor layer 30, a conductor composite structure 40, an upper conductor layer 41, a lower conductor layer 42, a side conductor layer 43, and a protective layer 50.

[0058] The method for manufacturing the electrically resistant thin-film resistor structure 1 of the present invention is as follows:

[0059] Step S01: Set up substrate 10. The material of substrate 10 can be aluminum oxide or aluminum nitride, etc.

[0060] Step S02, as follows Figure 7 As shown, a sputtered alloy interface layer 20 is deposited on the substrate 10. Figure 1 and Figure 7 As shown, an alloy interface layer 20 is formed on the substrate 10 by sputtering. The alloy interface layer 20 has a plurality of first continuous strip structures 21, which are parallel to each other and span the short side of at least one dielectric thin film resistor 1. Figure 7 , Figure 8 , Figure 9 , Figure 10 , Figure 11 , Figure 12 , Figure 13 Four electrically resistant thin-film resistors are used as an example, but the invention is not limited thereto. The spacing between each of the first continuous strip structures is greater than the thickness of the first continuous strip structure 21. The cross-section of the short side of the first continuous strip structure can be circular, semi-circular, quadrilateral, polygonal, etc., but is not limited thereto.

[0061] The alloy interface layer 20 can be made of titanium, copper, aluminum, nickel, gold, carbon, silicon, or their alloys, and the thickness of the alloy interface layer 20 can be 1 to 10 mm. 4 nm. For example, Figure 14 As shown, the alloy interface layer 20 may have multiple first continuous strip structures 21, increasing the contact surface area between the alloy interface layer 20 and the resistive layer 30, forming an interlaced interface.

[0062] Step S03, as follows Figure 8 As shown, the sputtered resistor layer 30 is on the alloy interface layer 20. The resistor layer 30 has a plurality of second continuous strip structures 31, which are parallel to each other and span the short side of at least one dielectric thin film resistor 1. The spacing between each second continuous strip structure 31 is greater than the thickness of the second continuous strip structure 31. The cross-section of the short side of the second continuous strip structure 31 can be circular, semi-circular, quadrilateral, polygonal, etc., but is not limited thereto.

[0063] The resistive layer 30 can be made of titanium, copper, aluminum, nickel, gold, carbon, silicon, or their alloys. The resistive layer 30 is a thin-film alloy, and its thickness is 20–10 mm.5 nm.

[0064] Step S04, as follows Figure 2 and Figure 9 As shown, conductor layers 41 are printed on both ends of the resistor layer 30, and lower conductor layers 42 are printed on both ends of the second surface of the substrate 10, and then sintered. The upper conductor layer 41 is positioned relative to or aligned with the lower conductor layer 42. The upper conductor layer 41 and the lower conductor layer 42 are connected in pairs along the first direction DR1 and are not connected along the second direction DR2, that is, the upper conductor layer 41 or the lower conductor layer 42 has a gap between the resistor cutting lines X-X'.

[0065] The upper conductor layer 41 and the lower conductor layer 42 are thick-film conductors, with a thickness of 3–60 μm. The thickness ratio of the resistive layer to the upper and lower conductor layers is 2–10. 5 3×10 3 ~6×10 4 It can increase heat dissipation capacity, electrical resistance and strengthen the bonding between different parts.

[0066] For step S05, please refer to [link / reference]. Figure 10 According to the required resistance value, the resistive layer is laser-repaired to form a repair cutting line 70 to achieve the target resistance value.

[0067] Step S06, please refer to Figure 3 and Figure 11 A protective layer 50 is printed on the resistive layer 30 and the upper conductor layer 41, covering the entire resistive layer 30 and partially covering the upper conductor layer 41. This protective layer 50 effectively prevents moisture or sulfur gas from penetrating and provides a large area for heat dissipation, reducing thermal effects and maintaining good performance. The material of the protective layer 50 can be phenolic, epoxy, or acrylic resin.

[0068] For step S07, please refer to... Figure 12 Folding is performed along the first direction DR1 of the substrate 10, where the first direction DR1 is the short side direction of the substrate 10 (i.e., the Y-Y' resistor cutting line direction), and the second direction DR2, which is orthogonal to the first direction DR1, is the long side direction of the substrate 10 (i.e., the X-X' resistor cutting line direction). The substrate 10 is folded into a length of a single resistor dimension along the first direction DR1.

[0069] Step S08, please refer to Figure 3 and Figure 11A C-shaped conductor composite structure 40 is formed by side-coating or sputtering side conductor layers 43 at both ends of the alloy interface layer 20, resistive layer 30, upper conductor layer 41, and lower conductor layer 42, such that the upper conductor layer 41 and lower conductor layer 42 abut against the same surface of the side conductor layer 43. The conductor composite structure 40 is made of printed conductor ink, wherein the ink may be composed of nickel, copper, lanthanum, silver, palladium, or a combination thereof.

[0070] For step S09, please refer to... Figure 4 and Figure 12 The substrate 10 is folded along the second direction DR2 to further reduce its size and achieve the width of a single resistor.

[0071] In step S10, an electroplated layer 60 is formed at both ends of the protective layer 50 and the conductor composite structure 40. The electroplated layer 60 covers the conductor composite structure 40 and part of the resistive layer 30. The electroplated layer 60 is a composite structure with three layers from the inside out, and its material from the inside out is copper, nickel, and tin. The electroplated layer 60 provides a large area for heat dissipation, reduces the thermal effect, and maintains good performance.

[0072] Please refer to steps S03 and S09, where the conductor composite structure 40 can be fabricated in stages to simplify the process. If the protective layer 50 is printed first, and then the resistive folding side conductor layer 43 is printed, the protective layer 50 can be printed over a large area, shortening the process time and steps.

[0073] Please see Figure 14 The alloy interface layer 20 and the resistive layer 30 are formed on the substrate 10 using sputtering technology with the same metal photomask having multiple strip patterns, creating a continuous strip structure. The alloy interface layer 20 has particles 21, ranging in size from 0.1 to 100 nanometers, that enhance the bonding strength of the resistive layer 30. This improves the stability of the resistor when subjected to large voltages or currents instantaneously. Without affecting other performance characteristics, this enhances heat dissipation, electrical resistance, and strengthens the bonding between different parts.

[0074] Please see Figure 5 This is the electrically resistant thin-film resistor structure 2 of the second embodiment of the present invention. Compared to Figure 4 The difference is that the upper conductor layer 41 is directly disposed on the first surface of the substrate 10, while the alloy interface layer 20 and the resistive layer 30 are disposed on the second surface of the substrate 10, the lower conductor layer 42 is disposed on the resistive layer 30, and the protective layer 50 is disposed on the first surface of the substrate 10 and the resistive layer 30.

[0075] Please see Figure 6 This is the electrically resistant thin-film resistor structure 3 of the third embodiment of the present invention. Compared to Figure 4The difference is that the first and second surfaces of the substrate 10 are provided with an alloy interface layer 20 and a resistive layer 30, and the upper conductor layer 41 and the lower conductor layer 42 are respectively disposed on the resistive layer 30, and the protective layer 50 is disposed on the resistive layer 30, the upper conductor layer 41 and the lower conductor layer 42.

[0076] The upper and lower conductor layers of this invention are thick-film conductors, while the resistive layer is a thin-film alloy, providing a large-area heat dissipation function, reducing thermal effects, and maintaining good performance. The alloy interface layer contains particles that strengthen the bonding force with the resistive layer, thus improving the stability of the resistor when subjected to large voltages or currents instantaneously. Without affecting other performance characteristics, it enhances heat dissipation capacity, electrical withstand capability, and strengthens the bonding between different parts. Furthermore, the alloy interface layer and resistive layer of this invention form a first continuous strip structure and a second continuous strip structure, respectively, spanning multiple units of electrical withstand thin-film resistors, saving multiple processes and improving mass production quantity, product consistency, and yield.

Claims

1. A method for preparing an electrically resistant thin-film resistor structure, characterized in that, It includes: Set a substrate; An alloy interface layer and a resistive layer are sequentially formed on a first surface of the substrate. The alloy interface layer has a plurality of first continuous strip structures, and the resistive layer has a plurality of second continuous strip structures. The plurality of first continuous strip structures are aligned with the plurality of second continuous strip structures. An upper conductor layer is formed at both ends of the resistive layer and the alloy interface layer, and a lower conductor layer is formed at both ends of a second surface of the substrate, and then sintered. A protective layer is formed on the resistive layer and the upper conductor layer; Fold the substrate along a first direction; A conductor is formed at each of the two ends of the resistive layer, forming a conductor composite structure; Folding is performed along a second direction of the substrate; and An electroplated layer is formed at both ends of the protective layer and the conductor composite structure.

2. The method for preparing the electrically resistant thin-film resistor structure as described in claim 1, characterized in that, The alloy interface layer and the resistive layer were sputtered using the same photomask.

3. The method for preparing the electrically resistant thin-film resistor structure as described in claim 1, characterized in that, It further includes the formation of the electrical-resistant thin-film resistor structure on both the first and second surfaces of the substrate.

4. The method for preparing the electrically resistant thin-film resistor structure as described in claim 1, characterized in that, The upper conductor layer and the lower conductor layer are thick-film conductors, and the thickness of the upper conductor layer and the lower conductor layer is 3 to 60 μm.

5. The method for preparing the electrically resistant thin-film resistor structure as described in claim 1, characterized in that, The resistive layer is a thin-film alloy with a thickness of 20–10 mm. 5 nm.

6. A dielectric thin-film resistor structure, characterized in that, It includes: substrate; An alloy interface layer is disposed on a first surface of the substrate; wherein the alloy interface layer has a plurality of first continuous strip structures; A resistive layer partially covers the alloy interface layer; wherein the resistive layer has a plurality of second continuous strip structures, and the plurality of first continuous strip structures are aligned with the plurality of second continuous strip structures; A conductor composite structure is disposed at both ends of the substrate and connected to the resistive layer and the alloy interface layer to form two electrodes; A protective layer is disposed on the resistive layer, exposing the two electrodes; and An electroplated layer is disposed on the side of the substrate, covering both sides of the substrate.

7. The electrically resistant thin-film resistor structure as described in claim 6, characterized in that, The spacing between the plurality of first continuous strip structures is greater than the thickness of the plurality of strip structures.

8. The electrically insulating thin-film resistor structure as described in claim 6, characterized in that, The conductor composite structure includes an upper conductor layer, a lower conductor layer, and a side conductor layer, wherein the upper conductor layer, the lower conductor layer, the resistive layer, and the alloy interface layer abut against the same surface of the side conductor layer.

9. The electrically resistant thin-film resistor structure as described in claim 8, characterized in that, The upper conductor layer and the lower conductor layer are thick-film conductors, and the thickness of the upper conductor layer and the lower conductor layer is 3 to 60 μm.

10. The electrically resistant thin-film resistor structure as described in claim 8, characterized in that, The resistive layer is a thin-film alloy with a thickness of 20–10 mm. 5 nm.

Images