A converter fault ride-through control method, system, device and medium

Abstract

The application discloses a kind of transformer fault ride-through control method, system, equipment and medium, belong to the technical field of fault ride-through control, method includes: obtaining grid-connected voltage constructs observation model and solves stable phase;Multi-dimensional constraint model is constructed, locks amplitude when overcurrent and anchors phase, simultaneously triggers integral freezing mechanism.System includes state observation module, phase solving module, constraint model configuration module, instruction generation module, collaborative control module.The application constructs virtual magnetic flux observation model, uses integral filtering characteristic to filter out noise and analyzes high robustness synchronous phase;Combined with multi-dimensional constraint control model, lock current amplitude under current limiting condition and force anchor phase, simultaneously trigger integral freezing mechanism to block error accumulation.Thereby effectively solve the problem of transient synchronization instability, inhibit the control signal dithering, and eliminate the oscillation phenomenon in fault recovery period.

Description

Technical Field

[0001] This invention relates to the field of fault ride-through control technology, specifically to a converter fault ride-through control method, system, device, and medium. Background Technology

[0002] With the rapid evolution of new energy grid-connection technologies, grid-connected converters, with their ability to simulate the external characteristics of synchronous generators, have become key equipment supporting the stability of grid voltage and frequency. However, limited by the thermal capacity and overcurrent capability of power electronic devices, these devices must quickly switch from voltage source mode with voltage regulation to current source mode with current limiting protection when faced with fault impacts such as grid short circuits or voltage drops, in order to ensure hardware safety.

[0003] Existing fault ride-through control technologies primarily rely on hard limiting or virtual impedance strategies to achieve current limitation, but these technologies exhibit multiple technical bottlenecks under grid-based control architectures. First, traditional current saturation algorithms often only mechanically truncate the current amplitude, failing to effectively consider the synchronous coordination of the current phase angle. This leads to a high risk of loss of control over the phase relationship between the converter output current and the grid voltage during transient mode switching, resulting in transient synchronous instability. Second, existing solutions often directly collect voltage or current data during faults for phase calculations. However, grid faults are often accompanied by severe waveform distortion and high-frequency noise, significantly degrading the quality of directly sampled signals and causing severe jitter in the control signal. More seriously, during current limiting protection, the integral regulation stage in the voltage control loop is prone to integral saturation due to long-term error accumulation, leading to severe divergence in system state variables. This makes it difficult for the system to converge to the equilibrium point along a stable trajectory during the recovery phase after fault clearance. Instead, it is highly susceptible to continuous limit cycle oscillations or even voltage collapse, failing to meet the stringent reliability requirements of modern power systems. Summary of the Invention

[0004] In view of the above-mentioned problems, the present invention provides a converter fault ride-through control method, system, device and medium.

[0005] Therefore, the technical problem solved by the present invention is: the transient synchronization instability caused by phase loss during current limiting of existing grid-connected converters during grid faults, and the system oscillation problem caused by the accumulation of integral errors after fault clearance.

[0006] To address the aforementioned technical problems, this invention provides the following technical solution: a converter fault ride-through control method, comprising: acquiring voltage state data at both ends of the converter's grid-connected link and constructing a state observation model; mapping the voltage state data to an electromagnetic integral vector characterizing the electromagnetic properties of the power grid using the state observation model; calculating the vector deviation between the corresponding electromagnetic integral vectors at both ends of the grid-connected link, thereby reconstructing a current observation vector, and resolving a stable synchronization phase based on the current observation vector; constructing a multi-dimensional constraint control model by combining a preset current threshold and the voltage control loop regulation characteristics; locking the current amplitude boundary and forcibly anchoring the current phase to the stable synchronization phase using the multi-dimensional constraint control model when the original current command amplitude exceeds the preset threshold, thereby generating a target drive command; triggering an integral freezing mechanism through the multi-dimensional constraint control model to block the error accumulation of the voltage control loop, and controlling the converter operation according to the target drive command.

[0007] As a preferred embodiment of the converter fault ride-through control method of the present invention, the step of mapping the voltage state data into an electromagnetic integral vector characterizing the electromagnetic characteristics of the power grid through the state observation model includes: constructing the state observation model with low-pass filtering characteristics and configuring attenuation parameters; inputting the voltage state data into the state observation model and starting the integral transformation process; using the attenuation parameters to constrain the integral transformation process, suppressing the DC bias component and outputting the electromagnetic integral vector.

[0008] The beneficial effects of this preferred technical solution are as follows: By constructing a low-pass filtered state observation model with an attenuation parameter, the DC bias and initial value drift problems that are prone to occur in ideal integral operations in engineering applications are effectively avoided. This solution utilizes the inherent low-pass filtering physical characteristics of integral transform logic, and can still filter out interference components and output a smooth and drift-free electromagnetic integral vector even when the acquired grid-connected voltage data contains high-frequency noise or waveform distortion. This ensures the signal-to-noise ratio of the observed data, lays a high-quality data foundation for subsequent accurate analysis of stable synchronous phase, and improves the system's adaptability under harsh power grid conditions.

[0009] As a preferred embodiment of the converter fault ride-through control method of the present invention, the step of calculating the vector deviation between the electromagnetic integral vectors corresponding to the two ends of the grid-connected link, thereby reconstructing the current observation vector, and resolving the stable synchronization phase based on the current observation vector includes: retrieving the filter impedance parameters of the converter and quantifying the spatial vector relative deviation between the electromagnetic integral vectors corresponding to the two ends of the grid-connected link; constructing a flux-current mapping model based on the filter impedance parameters and mapping the spatial vector relative deviation to the current observation vector; performing phase decoupling analysis on the current observation vector, extracting the geometric pointing angle of the current observation vector, and determining the geometric pointing angle as the stable synchronization phase.

[0010] The beneficial effects of this preferred technical solution are as follows: Based on the mapping model constructed from the filter impedance parameters and the magnetic flux difference, and utilizing the inertial characteristic of the electromagnetic integral vector, which is physically resistant to abrupt changes, a highly robust current observation vector is reconstructed. The stable synchronization phase obtained from this solution, compared to the signal acquired by direct phase-locked loop (PLL), maintains the continuity and smoothness of the angle even during transient faults such as deep voltage drops and phase jumps in the grid. This solution provides a precise synchronization reference for the converter, significantly enhancing the transient synchronization stability of the system during mode switching and preventing overcurrent disconnection due to phase loss of control.

[0011] As a preferred embodiment of the converter fault ride-through control method of the present invention, the step of constructing a multi-dimensional constraint control model by combining a preset current threshold and the voltage control loop regulation characteristics includes: obtaining the upper limit of the current carrying capacity allowed by the converter hardware and defining it as the preset current threshold; analyzing the voltage control loop regulation characteristics and extracting the control paths of the proportional regulation channel and the integral regulation channel in the voltage control loop; establishing a state determination logic based on the preset current threshold and associating the state determination logic with the proportional regulation channel and the integral regulation channel to form the multi-dimensional constraint control model that can dynamically switch control strategies according to the current amplitude state.

[0012] As a preferred embodiment of the converter fault ride-through control method of the present invention, the step of locking the current amplitude boundary and forcibly anchoring the current phase to the stable synchronous phase to generate the target drive command by means of the multi-dimensional constraint control model when the original current command amplitude exceeds a preset threshold includes: calculating the composite amplitude of the original current command in real time and monitoring the numerical relationship between the composite amplitude and the preset current threshold; if the composite amplitude is detected to exceed the preset current threshold, directly truncating the preset current threshold as the target current amplitude and discarding the phase information inherent in the original current command; introducing the stable synchronous phase as the target current phase, and performing vector synthesis of the target current amplitude and the target current phase to generate the target drive command.

[0013] In a preferred embodiment of the converter fault ride-through control method of the present invention, the step of performing vector synthesis of the target current amplitude and the target current phase to generate the target drive command includes: establishing vector projection logic based on the converter synchronous rotating coordinate system; using the target current amplitude as the magnitude and the stable synchronous phase as the phase angle, mapping the target current amplitude to the orthogonal axis of the converter synchronous rotating coordinate system using the vector projection logic; decomposing the current component commands corresponding to each orthogonal axis and combining them to form the target drive command.

[0014] As a preferred embodiment of the converter fault ride-through control method of the present invention, the step of triggering the integral freezing mechanism through the multidimensional constraint control model to block the error accumulation of the voltage control loop includes: establishing a state interaction feedback channel between the voltage control loop and the multidimensional constraint control model; monitoring the numerical relationship between the original current command amplitude and the preset current threshold in real time, generating a start / stop logic flag for controlling the integral action authority; feeding back the start / stop logic flag to the integral adjustment unit in the voltage control loop, and when an overcurrent condition is detected, using the start / stop logic flag to cut off the integral input path and maintain a constant integral output value to avoid system divergence.

[0015] The beneficial effects of this preferred technical solution are as follows: By establishing a state interaction feedback channel between the voltage control loop and the multidimensional constraint control model, intelligent control over the action authority of the integral regulation unit is achieved. When a saturation condition with current exceeding the limit is detected, this mechanism can quickly cut off the integral input path, fundamentally blocking the ineffective accumulation of voltage loop errors and preventing the controller from falling into deep saturation. This design ensures that when the fault is cleared and the system exits the current-limiting mode, the state variables can be maintained within a reasonable range, prompting the system to quickly converge to the equilibrium point along a stable trajectory, completely eliminating the post-fault limit loop oscillation phenomenon common in traditional control strategies.

[0016] To address the aforementioned technical problems, the present invention also provides the following technical solution: a converter fault ride-through control system, comprising a state observation module for acquiring voltage state data at both ends of the converter grid-connected link and constructing a state observation model; a phase calculation module for mapping the voltage state data into an electromagnetic integral vector characterizing the electromagnetic characteristics of the power grid through the state observation model; calculating the vector deviation between the corresponding electromagnetic integral vectors at both ends of the grid-connected link, thereby reconstructing the current observation vector, and resolving the stable synchronization phase based on the current observation vector; a constraint model configuration module for constructing a multi-dimensional constraint control model by combining a preset current threshold and the voltage control loop regulation characteristics; an instruction generation module for locking the current amplitude boundary and forcibly anchoring the current phase to the stable synchronization phase when the original current instruction amplitude exceeds the preset threshold through the multi-dimensional constraint control model, thereby generating a target drive instruction; and a collaborative control module for triggering an integral freezing mechanism through the multi-dimensional constraint control model to block the error accumulation of the voltage control loop and controlling the converter operation according to the target drive instruction.

[0017] The present invention provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps of the converter fault ride-through control method.

[0018] The present invention provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the converter fault ride-through control method described above.

[0019] The beneficial effects of this invention are as follows: a stable synchronous phase is calculated by utilizing the continuity of the magnetic flux state variable, which maintains the relative position of the current vector and the grid magnetic flux during the current limiting period, preventing transient instability; the low-pass filtering characteristics of the integral link are utilized to obtain a smooth phase reference even when the grid voltage is distorted, avoiding control signal jitter; the error accumulation of the voltage loop is blocked by the integral freezing mechanism, ensuring that the system converges quickly along the stable trajectory after the fault is cleared, and completely eliminating the limit loop oscillation phenomenon. Attached Figure Description

[0020] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a flowchart of a converter fault ride-through control method provided in one embodiment of the present invention.

[0022] Figure 2 This is a block diagram of a converter fault ride-through control system provided in one embodiment of the present invention.

[0023] Figure 3 The simulation comparison waveform diagram of the current phase angle under the three-phase voltage 100% drop condition is provided for one embodiment of the present invention. Detailed Implementation

[0024] To enable those skilled in the art to better understand the present invention, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without inventive effort should fall within the protection scope of the present invention.

[0025] Example 1, referring to Figure 1 As one embodiment of the present invention, a converter fault ride-through control method is provided, comprising: S1: Obtain voltage state data at both ends of the converter grid-connected link and construct a state observation model; through the state observation model, map the voltage state data into an electromagnetic integral vector characterizing the electromagnetic properties of the power grid; S2: Calculate the vector deviation between the electromagnetic integral vectors corresponding to the two ends of the grid-connected link, thereby reconstructing the current observation vector, and analyzing the stable synchronization phase based on the current observation vector; S3: Construct a multi-dimensional constraint control model by combining the preset current threshold and the voltage control loop regulation characteristics; S4: Using the multi-dimensional constraint control model, when the original current command amplitude exceeds the preset threshold, the current amplitude boundary is locked, and the current phase is forcibly anchored to the stable synchronous phase to determine the target current amplitude and the target current phase. S5: Establish vector projection logic based on the converter synchronous rotating coordinate system, and use the target current amplitude and the stable synchronous phase to perform vector synthesis to generate target driving instructions; S6: Trigger the integral freezing mechanism through the multidimensional constraint control model to block the error accumulation of the voltage control loop, and control the converter to run according to the target drive command.

[0026] It should be noted that existing grid-connected converters typically employ hard limiting or virtual impedance strategies to restrict overcurrent when dealing with grid faults. However, this traditional current saturation handling method often only focuses on the mechanical truncation of the current amplitude, neglecting the fine-grained control of the current phase angle. When disturbances such as voltage dips or phase jumps occur in the grid, the phase calculated directly from the sampled data is highly susceptible to transient distortion and high-frequency noise, leading to severe jitter in the control signal. More critically, this coarse phase handling causes the phase relationship between the output current and the grid voltage to become uncontrolled at the moment the converter switches from voltage source mode to current limiting mode, thus triggering transient synchronous instability. Furthermore, due to the lack of effective constraints on the integral state of the voltage control loop, the accumulation of errors during the fault period leads to divergence of the system state variables, making it difficult for the system to quickly converge to the equilibrium point after the fault is cleared. Instead, it falls into continuous limit loop oscillations or even voltage collapse.

[0027] Therefore, to address the aforementioned problems, this invention constructs a fault ride-through control system based on virtual flux observation and multidimensional constraints through steps S1 to S5. First, a state observation model is used to map noisy voltage data into a smooth electromagnetic integral vector, effectively filtering out high-frequency noise and harmonic interference from the power grid using the inherent low-pass filtering characteristics of the integral stage. Based on this, the current observation vector is reconstructed by calculating the deviation of the flux vectors at both ends of the grid-connected link, thereby resolving a highly robust stable synchronization phase and providing a precise synchronization reference for the system. Then, using a multidimensional constraint control model, when overcurrent is detected, not only is the current amplitude boundary locked, but the current phase is also forcibly anchored to the stable synchronization phase, ensuring that the converter and the grid flux maintain a stable relative position during current limiting, preventing transient instability. Simultaneously, an integral freezing mechanism blocks the error accumulation of the voltage control loop, eliminating the risk of integral saturation, thus ensuring that the converter can maintain stable operation during faults and smoothly recover along a stable trajectory after fault clearance, completely solving the problems of synchronization instability and recovery oscillation in traditional solutions.

[0028] Example 2, refer to Figure 1 and Figure 3 This is one embodiment of the present invention. Based on the previous embodiment, a converter fault ride-through control method is provided.

[0029] In this embodiment of the application, voltage state data at both ends of the converter grid-connected link is obtained in step S1, and a state observation model with low-pass filtering characteristics is constructed. Then, the voltage state data is mapped into an electromagnetic integral vector characterizing the electromagnetic characteristics of the power grid, including the following steps A1-A3: A1: Real-time acquisition of raw voltage signals at both ends of the grid-connected link, and coordinate system transformation processing to obtain decoupled voltage status data.

[0030] High-precision voltage transformers were used to collect the converter output voltage and grid voltage in a three-phase stationary coordinate system at the converter output port and the point of common coupling. Subsequently, a synchronous rotating coordinate system was constructed based on the grid fundamental frequency. The three-phase stationary voltage signals were projected into this rotating coordinate system using the Park transform matrix, and the direct-axis and quadrature-axis components of the converter-side voltage and the grid-side voltage were calculated. These decoupled component data eliminated time-varying characteristics and constituted the voltage state data required for subsequent integration calculations.

[0031] A2: Construct a state observation model based on the principle of first-order low-pass filtering, and configure attenuation parameters according to the system sampling frequency and dynamic response requirements.

[0032] Given that pure integration in network converters is highly susceptible to output divergence due to sensor zero drift or improper initial settings during actual operation, a low-pass filter is used to approximate the ideal integrator. In this model, the virtual magnetic flux is defined as the time integral of the voltage, and a cutoff frequency is introduced. As a key attenuation parameter, its physical significance lies in providing damping for the integration stage, effectively attenuating the non-periodic DC component while ensuring lossless transmission of the fundamental frequency signal. This solves the DC bias problem of traditional integration algorithms at the mathematical model level.

[0033] A3: Input the decoupled voltage state data into the state observation model, start the integral transformation process, use the attenuation parameter to dynamically suppress the DC bias component and output a stable electromagnetic integral vector.

[0034] Based on the transfer function structure of the state observation model The direct-axis and quadrature-axis voltage components obtained in step A1 are used as input excitations for the converter-side and grid-side voltages, respectively. During the integral transformation process, the model continuously attenuates the amplitude of the DC bias component in the input signal using configured attenuation parameters and filters out high-frequency noise interference using low-pass characteristics. The direct-axis and quadrature-axis components of the virtual magnetic flux on the converter side and the grid-side virtual magnetic flux are calculated respectively. Finally, this set of orthogonal components containing electromagnetic state information at both ends of the grid-connected link is combined to output an electromagnetic integral vector characterizing the electromagnetic properties of the grid.

[0035] In an optional implementation, the acquisition of voltage state data at both ends of the converter grid-connected link in step S1 and the construction of the state observation model can also be achieved by using a high-bandwidth voltage sensing network and hardware preprocessing circuit working together. A high-precision Hall voltage sensor or a resistor divider network is used to collect analog voltage signals in real time at the inverter output port and common connection point, respectively. A pre-amplified anti-aliasing analog filter is used to filter out high-frequency glitches and noise from the switching frequency. Then, a high-speed analog-to-digital converter is used to discretize the analog signal and construct a digital observation model that includes a DC bias compensation stage. A dynamic damping coefficient is preset in the mathematical model to offset the cumulative effect of sensor temperature drift or zero-point offset on the accuracy of voltage state data.

[0036] In another optional implementation, the voltage state data at both ends of the converter grid-connected link acquired in step S1, and the state observation model constructed, can also enhance the model's dynamic tracking capability by introducing a grid frequency adaptive correction mechanism. This mechanism monitors the voltage and frequency fluctuations at the grid connection point in real time, dynamically injects the real-time collected grid angular frequency into the transfer function of the state observation model, replacing the fixed fundamental frequency parameter. This constructs a frequency-adaptive rotating coordinate system projection logic, ensuring that even when the grid frequency shifts or experiences transient fluctuations, the state observation model can still accurately map the non-sinusoidal voltage data in the three-phase stationary coordinate system to decoupled state quantities in the synchronous rotating coordinate system, eliminating observation errors caused by frequency mismatch. Specifically, in step S2, the vector deviation between the electromagnetic integral vectors corresponding to the two ends of the grid-connected link is calculated, thereby reconstructing the current observation vector, and the stable synchronization phase is analyzed based on the current observation vector, including the following steps B1-B3: B1: Retrieve the filter impedance parameters of the converter and use them as a reference to quantify the spatial vector relative deviation between the electromagnetic integral vectors corresponding to the two ends of the grid-connected link.

[0037] Among them, the preset filter inductance value is read from the controller storage unit. As a key impedance parameter, the electromagnetic integral vectors on the converter side and the grid side, output in step S1, are then used to calculate their numerical differences on the direct and quadrature axes in a synchronously rotating coordinate system. This spatial vector relative deviation physically characterizes the transient voltage drop of the magnetic flux state quantity across the filter inductor, reflecting the difference in electromagnetic potential energy along the power transmission path.

[0038] B2: Construct a flux-current mapping model based on the filter impedance parameters, and map the calculated spatial vector relative deviation into a current observation vector containing orthogonal axis components.

[0039] Based on the differential equation relationship between the voltage and current across the inductor, and neglecting the secondary influence of the line resistance, a linear mapping equation is constructed. The magnetic flux deviation vector obtained in step B1 is substituted into the mapping model as an input variable. A division operation is used to transform the physical quantity in the magnetic flux dimension into a physical quantity in the current dimension, thereby calculating the direct-axis current component of the current filter inductor. With cross-axis current component Since the input magnetic flux has been low-pass filtered, the reconstructed current observation vector naturally inherits the smoothness characteristics, avoiding the high-frequency noise amplification problem caused by directly differentiating or sampling the current.

[0040] In this embodiment of the application, step B2 involves constructing and mapping a flux-current mapping model. Considering the magnetic saturation phenomenon under high current conditions, piecewise linear interpolation or spline interpolation techniques are used for nonlinear feature fitting, including the following steps B211-B213: B211: The magnetization curve of the filter inductor material is determined in advance, and a multidimensional discrete characteristic matrix is ​​constructed with the flux mode length as the index and the inductance saturation coefficient as the output. This matrix covers the operating points from the linear region to the deep saturation region.

[0041] B212: Real-time calculation of the synthetic modulus of the relative deviation of the space vector, retrieval of the neighboring grid data surrounding the modulus in the multidimensional discrete characteristic matrix, and fitting of the equivalent dynamic inductance value under the current operating point using the cubic spline interpolation algorithm.

[0042] B213: By replacing the nominal inductance value with the equivalent dynamic inductance value obtained by fitting, an adaptive gain mapping function is constructed, and the relative deviation of the space vector is divided to obtain the current observation vector that accurately reflects the magnetic saturation characteristics.

[0043] In an optional implementation, in step B2, for constructing and mapping the flux-current mapping model, to improve robustness to environmental temperature and aging factors, recursive least squares method is used for online parameter identification, including the following steps B221-B223: B221: Construct a recursive least squares observer based on the forgetting factor, using the change in the electromagnetic integral vector at historical moments as the input regression vector and the measured change in current as the observation output.

[0044] B222: In each control cycle, the estimated value of the filter impedance parameter is dynamically updated based on the observation error. The weight of old data is reduced by the forgetting factor, thereby capturing the time-varying drift characteristics of the inductor parameter caused by temperature rise or aging in real time.

[0045] B223: The latest identified and updated filter impedance parameters are injected into the flux-current mapping model in real time to construct a transformation matrix of time-varying coefficients, which maps the relative deviation of the spatial vector at the current moment into a current observation vector with parameter adaptive capability.

[0046] In another alternative implementation, in step B2, regarding the construction and mapping of the magnetic flux-current mapping model, to address the computational delay caused by complex electromagnetic coupling, a pre-stored lookup table combined with fast indexing technology is used, including the following steps B231-B233: B231: The flux-current response relationship of the offline analog converter across the full power range is generated, producing a mapping data table containing direct-axis flux deviation, quadrature-axis flux deviation and corresponding current vectors, and the data table is stored in the read-only memory unit of the controller.

[0047] B232: Normalizes and discretizes the relative deviation of the spatial vector acquired in real time to generate the corresponding high-order address index code and low-order intra-chip offset.

[0048] B233: By using direct memory access technology to quickly read the reference current value in the mapped data table and combining it with low-bit offset for linear fine-tuning, the current observation vector is directly output. This method avoids complex floating-point division operations and significantly reduces the computational load on the controller.

[0049] B3: Perform phase decoupling analysis on the reconstructed current observation vector, extract its geometric pointing angle and determine it as a stable synchronous phase.

[0050] Among them, the phase analysis algorithm is constructed using inverse trigonometric function logic: The algorithm uses the cross-axis and direct-axis components of the current observation vector as input parameters. It geometrically extracts the composite orientation angle of the current vector in the rotating coordinate system and outputs it as a stable synchronization phase. Even when the grid voltage experiences a deep drop or waveform distortion causing a phase jump in the original voltage, the geometric pointing angle remains continuous and smooth thanks to the inertial characteristics of the flux state variable, providing a highly robust synchronization reference signal for subsequent fault ride-through control.

[0051] Specifically, in step S3, a multi-dimensional constrained control model is constructed by combining the preset current threshold and the voltage control loop regulation characteristics, including the following steps C1-C3: C1: Consult the technical specifications of the power devices in the converter to obtain the upper limit of the current allowed by the hardware, and define it as the preset current threshold for determining the overcurrent state.

[0052] Taking into account the thermal capacity limitations and safe operating range of power electronic switching devices, a value slightly lower than the physical damage limit is set as the maximum allowable current. This threshold serves as the absolute boundary for subsequent logical judgments. Once the current command amplitude detected in real time attempts to exceed this boundary, the system determines that it has entered a fault current limiting condition.

[0053] C2: Analyze the regulation characteristics of the voltage control loop and independently extract the signal transmission paths of the proportional regulation channel and integral regulation channel inside the voltage PI controller.

[0054] In this approach, the traditional PI control algorithm is decoupled into two parallel signal streams. The proportional control channel responds to transient changes in voltage deviation, providing rapid dynamic support; the integral control channel eliminates steady-state errors but has the characteristic of remembering historical deviations. In this step, the input port of the integrator is explicitly marked as a controllable node, reserving a control interface for the subsequent introduction of an anti-integral saturation mechanism, thus establishing the topological basis of "continuous operation of the proportional channel and controllable switching of the integral channel."

[0055] C3: Establish a state determination logic based on a preset current threshold, and associate this logic with the proportional control channel and the integral control channel respectively to form a multi-dimensional constraint control model that can dynamically switch control strategies according to the current amplitude state.

[0056] Specifically, a real-time comparator logic is constructed to continuously compare the synthesized amplitude of the original current command with the value set in step C1. For comparison, when the amplitude does not exceed the limit, the model outputs a "normal mode" status bit, maintaining the original conduction of each channel; when the amplitude exceeds the limit, the model outputs a "saturation mode" status bit. This status bit is designed as the core scheduling signal of the multi-dimensional constraint control model. On the one hand, it is used to trigger the limiting and reconstruction of the current command; on the other hand, it directly acts on the integral input port marked in step C2, realizing the strategy upgrade from a single numerical limit to multi-dimensional system state control.

[0057] In an optional implementation, step S3 calculates the vector deviation between the electromagnetic integral vectors corresponding to the two ends of the grid-connected link, thereby reconstructing the current observation vector, and resolving the stable synchronous phase based on the current observation vector. This can also be achieved through an integrated sequence component decoupling strategy. A second-order generalized integrator or a delay signal cancellation operator is used to extract the positive sequence component of the electromagnetic integral vector in the stationary coordinate system, eliminating negative sequence magnetic flux fluctuations caused by grid asymmetry faults. Then, the positive sequence current observation vector is reconstructed based only on the pure positive sequence magnetic flux deviation, and its phase is analyzed. This ensures that the generated stable synchronous phase can still accurately lock the fundamental phase of the grid positive sequence voltage under unbalanced conditions such as single-phase grounding or two-phase short circuit.

[0058] In another optional implementation, step S3 calculates the vector deviation between the electromagnetic integral vectors corresponding to the two ends of the grid-connected link, thereby reconstructing the current observation vector, and analyzing the stable synchronization phase based on the current observation vector. This can also be achieved by constructing a frequency-locked loop structure based on virtual magnetic flux. Instead of direct algebraic arctangent calculation, the angular deviation between the current observation vector and the currently estimated phase unit vector is calculated in real time using vector cross product operation. This deviation is sent as an error signal to the frequency regulator for closed-loop correction, outputting the converged grid angular frequency and integrating it to obtain the stable synchronization phase. This utilizes the inertial element of the closed-loop system to further smooth phase jump interference and improve the noise immunity of the synchronization signal.

[0059] Specifically, in step S4, the multi-dimensional constraint control model locks the current amplitude boundary when the original current command amplitude exceeds a preset threshold, and forcibly anchors the current phase to the stable synchronous phase to generate the target drive command, including the following steps D1-D3: D1: Calculates the composite amplitude of the original current command in real time and continuously monitors the numerical relationship between the composite amplitude and the preset current threshold, using this as the criterion for activating the fault ride-through mode.

[0060] The system acquires the direct-axis and quadrature-axis current reference values ​​output from the voltage control loop in real time, and calculates their combined amplitude using the vector operation rules of square root of the sum of squares. Simultaneously, this step compares the calculated combined amplitude with the preset current threshold defined in the previous step. When the combined amplitude is detected to be less than the preset threshold, the system maintains normal voltage source control mode; when the combined amplitude attempts to exceed the preset threshold, the subsequent current-limiting reconfiguration logic is immediately triggered.

[0061] D2: If the synthesized amplitude is detected to exceed the preset current threshold, a hard amplitude limiting operation is performed, directly extracting the preset current threshold as the target current amplitude, and decisively discarding the phase information carried by the original current command.

[0062] Once an overcurrent condition is confirmed, the multidimensional constraint control model immediately intervenes, forcibly locking the magnitude of the target current at the upper limit of the current carrying capacity allowed by the hardware, ensuring that the power electronic devices operate within the safe operating range. More importantly, considering that the phase angle in the original current command is extremely susceptible to severe fluctuations or deviations due to voltage drops or the dynamic response of the phase-locked loop during grid faults, this step actively cuts off the transmission path of the original phase signal while locking the amplitude, preventing unstable phase angles from causing the system to lose synchronization.

[0063] D3: Introduce the stable synchronous phase obtained from the previous steps as the target current phase, perform vector synthesis between the locked target current amplitude and the stable synchronous phase, and generate the final target drive command.

[0064] The stable synchronous phase obtained from virtual flux observation in step S2 is used as the sole reliable phase reference in the current construction stage. The system vector-combines the maximum safe amplitude determined in step D2 with this stable synchronous phase to reconstruct a new current vector that satisfies both hardware overcurrent protection requirements and maintains rigid synchronization with the grid flux in spatial pointing. This vector is then converted into specific drive pulses, directing the converter to maintain stable synchronization with the grid while outputting the maximum support current, effectively avoiding the transient oscillation risk caused by phase runaway in traditional amplitude limiting strategies.

[0065] Specifically, in step D3, the stable synchronization phase is introduced as the target current phase, and the target current amplitude and the target current phase are vector-synthesized to generate the target drive command, including the following steps: The preset current threshold in the memory is read synchronously as the target amplitude magnitude, and the stable synchronous phase output by the state observation model is sampled in real time as the target phase angle to complete the preparation of the polar coordinate parameters required for vector synthesis.

[0066] The vector synthesis operation logic is constructed to convert the magnitude and phase angle parameters in the polar coordinate system into orthogonal components in the rectangular coordinate system. This process establishes the expression form of the current vector in the converter control domain through mathematical projection operation.

[0067] The direct-axis and quadrature-axis components after output conversion are combined and encapsulated into a target drive command, which is then injected into the current inner loop controller with the highest priority, overriding the original voltage loop output signal.

[0068] In this embodiment of the application, step D3 involves constructing and transforming the vector synthesis operation logic in the generated target driving instruction. Considering the floating-point operation capability of the controller, a standard projection transformation technique based on trigonometric function matrices is adopted, including the following steps D321-D323: D321: Calls the microprocessor's mathematical operation library to calculate the sine and cosine values ​​of the stable synchronization phase and constructs a rotation transformation matrix containing the unit circle rotation factor.

[0069] D322: Multiply the target current amplitude by the cosine and sine values ​​respectively to calculate the projection component of the amplitude on the direct axis of the synchronous rotating coordinate system. Projection components on the intersection axis .

[0070] D323: Performs numerical saturation verification on the calculated projection components to prevent sign flipping caused by data overflow and ensure that the output drive instructions strictly correspond to the current limit of the physical hardware.

[0071] In an optional implementation, in step D3, the vector synthesis operation logic in the generated target driving instruction is converted. To adapt to the fixed-point operation environment of hardware circuits such as FPGAs, a coordinate rotation digital computer algorithm, namely the CORDIC algorithm, is adopted, including the following steps D331-D333: D331: Initialize the iteration vector, assign the target current amplitude to the horizontal coordinate register, assign the zero value to the vertical coordinate register, and assign the stable synchronization phase to the angle remaining register.

[0072] D332: Performs multi-level shift and addition / subtraction iteration operations. In each iteration, the rotation direction is determined by the sign of the angle remaining register. The vector is rotated to the target phase angle step by step by replacing multiplication operations with shift operations.

[0073] D333: After a preset number of iterations and convergences, directly read the final values ​​of the horizontal and vertical coordinate registers as the synthesized direct-axis current command and quadrature-axis current command.

[0074] In another optional implementation, in step D3, the vector synthesis operation logic in the generated target driving instruction is transformed. To improve the real-time response speed of the digital signal processor, a lookup table combined with linear interpolation technology is used, including the following steps D341-D343: D341: A high-precision sine and cosine function lookup table is pre-programmed into the controller's read-only memory, discretizing the phase period from 0 to 360 degrees into several address index nodes.

[0075] D342: Maps the real-time input stable synchronization phase to a lookup table address index, reads the function values ​​of two adjacent nodes, and uses a linear interpolation formula to calculate the unit projection coefficient corresponding to the current precise phase.

[0076] D343: By using a hardware multiplier to multiply the target current amplitude by the calculated unit projection coefficient, the target driving instruction is directly synthesized. This method avoids complex real-time trigonometric function calculations and significantly reduces the CPU instruction cycle consumption.

[0077] Specifically, in step S5, the target current amplitude and the target current phase are vector-synthesized to generate the target driving command, including the following steps E1-E3: E1: Establish vector projection logic based on the synchronous rotating coordinate system of the transformer, and establish the mathematical transformation relationship from polar coordinate system description to rectangular coordinate system description.

[0078] Since the underlying control of a grid-type converter typically operates based on a synchronous rotating coordinate system, and the current-limiting commands generated in the preceding steps are expressed in polar coordinates of amplitude and phase, a projection algorithm is needed to accurately map the "module-phase angle" pair to the "direct axis-quadrature axis" plane. This logic utilizes the principles of trigonometric geometry to define the projection rules of the current vector on the orthogonal axis, providing algorithmic support for the subsequent command delivery.

[0079] E2: Call the locked target current amplitude as the vector magnitude, call the resolved stable synchronous phase as the vector phase angle, and use vector projection logic to map it onto the orthogonal axis of the converter synchronous rotating coordinate system.

[0080] Based on the projection formula, the target current amplitude is... With stable synchronous phase Multiplying the cosine values, the direct-axis projection component is calculated; simultaneously, the target current amplitude is... With stable synchronous phase Multiplying the sine values, we obtain the cross-axis projection components. This process is mathematically completed. The calculation ensures that the synthesized current vector, while strictly limiting its amplitude, has a spatial orientation that completely conforms to the stable phase obtained from virtual magnetic flux observation.

[0081] E3: Decompose and extract the current component commands corresponding to each orthogonal axis, and combine them to form the final target drive command to replace the original output of the voltage control loop.

[0082] The direct-axis projection component calculated in step E2 is established as the final direct-axis current command, and the quadrature-axis projection component is established as the final quadrature-axis current command. These two components together constitute the target drive command, which is then sent to the inner current loop controller. This command directly overrides the original reference value calculated by the voltage loop PI controller, which may contain erroneous phase information, thereby forcing the converter to execute the predetermined safety current limiting strategy.

[0083] Specifically, in step S6, the integral freezing mechanism is triggered through the multidimensional constraint control model to block the error accumulation of the voltage control loop, including the following steps F1-F3: F1: Establish a bidirectional state interaction feedback channel between the voltage control loop and the multidimensional constraint control model to open up the control signal feedback path from the decision-making layer to the regulation layer.

[0084] The traditional voltage control loop's unidirectional output command topology is altered by reserving an external control port specifically at the integrator stage of the PI controller. This port is no longer solely driven by the voltage error signal but is configured to receive state feedback commands from the downstream multidimensional constraint control model, thereby constructing a closed-loop anti-saturation logic architecture.

[0085] F2: Real-time monitoring of the numerical relationship between the original current command amplitude and the preset current threshold, and dynamic generation of start / stop logic identifiers for controlling integral action permissions based on the monitoring results.

[0086] The comparator logic continuously determines whether the system is currently in an overcurrent saturation state. When the amplitude of the original current command is less than a preset current threshold, a high-level logic flag representing permission for integration is generated; when the amplitude of the original current command exceeds the preset current threshold, the state is immediately toggled, generating a low-level logic flag representing permission for integration. This flag, as a binary control signal, intuitively represents the system's permission for integration accumulation.

[0087] F3: Feeds back the start / stop logic flag to the integral regulation unit in the voltage control loop, and uses the flag to cut off the integral input path when an overcurrent condition is detected, so as to maintain the integral output value constant and avoid system divergence.

[0088] The generated start / stop logic flags are directly applied to the integrator's input gating module or multiplier node. Under normal operating conditions, the integrator receives the complete error signal and continuously accumulates it. Once current-limiting mode is entered, a low-level flag forces the integrator's input to zero or disconnects the error signal's input loop. At this time, the integrator stops updating its internal state, and its output value is locked at the value of the previous moment before saturation. This prevents the voltage deviation from continuously accumulating during current limiting, ensuring that the system can quickly recover to steady state based on a reasonable initial value when exiting fault mode, and completely eliminating the oscillation risk caused by integral divergence.

[0089] To verify the effectiveness of the fault ride-through control method proposed in this invention, an electromagnetic transient simulation model was built to simulate the converter in... Constantly encountering a 100% deep voltage drop fault in the three-phase power grid, and in The complete process of clearing faults at any time. (Refer to...) Figure 2 This figure shows a simulation comparison waveform of the current phase angle under a 100% voltage drop condition according to an embodiment of the present invention. The black waveform represents the current phase angle response curve using a traditional phase-locked loop and hard-limiting control strategy, while the red waveform represents the current phase angle response curve using the virtual flux observation and multi-dimensional constraint control strategy proposed in this invention. It can be intuitively observed that... to During steady-state operation, the red waveform is smoother than the black waveform, proving that the low-pass filter state observation model constructed in step A of this invention effectively filters out detection noise. At the moment the fault occurred, the black waveform exhibited violent jitter, indicating that the traditional method had lost precise phase locking, while the red waveform maintained a smooth transition, proving that the strategy of phase reconstruction and forced anchoring based on magnetic flux in steps B and D of this invention successfully maintained transient synchronization stability. Most notably, in... After the fault was cleared, the black waveform entered a continuous and violent divergent oscillation state, indicating that the system had lost stability, while the red waveform quickly and smoothly converged to a new steady state without any oscillation. This fully demonstrates that the integral freezing mechanism introduced in step F of the present invention effectively blocked the error accumulation of the voltage loop integral term during the fault, avoided system instability caused by integral saturation, and achieved a soft landing and rapid recovery of the converter under extreme fault conditions.

[0090] Example 3, referring to Figure 3 The above is a schematic scheme of a converter fault ride-through control method. It should be noted that the technical solution of this converter fault ride-through control system and the technical solution of the converter fault ride-through control method described above belong to the same concept. Details not described in detail in this embodiment of the converter fault ride-through control system can be found in the description of the technical solution of the converter fault ride-through control method described above.

[0091] This embodiment also provides a converter fault ride-through control system, including: The state observation module is used to acquire voltage state data at both ends of the converter grid-connected link and to build a state observation model. The phase calculation module is used to map the voltage state data into an electromagnetic integral vector characterizing the electromagnetic characteristics of the power grid through the state observation model; calculate the vector deviation between the electromagnetic integral vectors corresponding to the two ends of the grid-connected link, thereby reconstructing the current observation vector, and analyzing the stable synchronous phase based on the current observation vector. The constraint model configuration module is used to construct a multi-dimensional constraint control model by combining the preset current threshold and the voltage control loop regulation characteristics. The instruction generation module is used to lock the current amplitude boundary and forcibly anchor the current phase to the stable synchronous phase when the original current instruction amplitude exceeds the preset threshold through the multi-dimensional constraint control model, so as to generate the target driving instruction. The collaborative control module is used to trigger the integral freezing mechanism through the multidimensional constraint control model to block the error accumulation of the voltage control loop, and control the converter to operate according to the target drive command.

[0092] This embodiment also provides an electronic device applicable to a converter fault ride-through control method, comprising: a memory and a processor; the memory is used to store computer-executable instructions, and the processor is used to execute the computer-executable instructions to implement a converter fault ride-through control method as proposed in the above embodiment.

[0093] This embodiment also provides a storage medium storing a computer program that, when executed by a processor, implements a converter fault ride-through control method as proposed in the above embodiments.

[0094] The storage medium proposed in this embodiment and the converter fault ride-through control method proposed in the above embodiments belong to the same inventive concept. Technical details not described in detail in this embodiment can be found in the above embodiments, and this embodiment has the same beneficial effects as the above embodiments.

[0095] Based on the above description of the implementation methods, those skilled in the art can clearly understand that the present invention can be implemented using software and necessary general-purpose hardware, and of course, it can also be implemented using hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as a computer floppy disk, read-only memory (ROM), random access memory (RAM), flash memory, hard disk, or optical disk, etc., including several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods of the various embodiments of the present invention.

[0096] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention can be modified or equivalently replaced without departing from the spirit and scope of the technical solutions of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A converter fault ride-through control method, characterized in that, include: Obtain voltage state data at both ends of the grid-connected link of the converter and construct a state observation model; The voltage state data is mapped to an electromagnetic integral vector characterizing the electromagnetic properties of the power grid using the state observation model. Calculate the vector deviation between the electromagnetic integral vectors corresponding to the two ends of the grid-connected link, thereby reconstructing the current observation vector, and analyze the stable synchronization phase based on the current observation vector; A multi-dimensional constrained control model is constructed by combining the preset current threshold and the voltage control loop regulation characteristics; Using the multidimensional constraint control model, when the original current command amplitude exceeds the preset threshold, the current amplitude boundary is locked, and the current phase is forcibly anchored to the stable synchronous phase to generate the target drive command. The multidimensional constraint control model triggers an integral freeze mechanism to block the accumulation of errors in the voltage control loop, and controls the converter to operate according to the target drive command.

2. The converter fault ride-through control method as described in claim 1, characterized in that: The process of mapping the voltage state data into an electromagnetic integral vector characterizing the electromagnetic properties of the power grid through the state observation model includes: Construct the state observation model with low-pass filtering characteristics and configure the attenuation parameters; Input the voltage state data into the state observation model and start the integral transformation process; The attenuation parameter is used to constrain the integral transformation process, suppress the DC bias component, and output the electromagnetic integral vector.

3. The converter fault ride-through control method as described in claim 1, characterized in that: The calculation of the vector deviation between the electromagnetic integral vectors corresponding to the two ends of the grid-connected link, thereby reconstructing the current observation vector, and analyzing the stable synchronization phase based on the current observation vector includes: The filter impedance parameters of the converter are retrieved, and the spatial vector relative deviation between the electromagnetic integral vectors corresponding to the two ends of the grid-connected link is quantified. Based on the filter impedance parameters, a flux-current mapping model is constructed to map the relative deviation of the spatial vector into a current observation vector; A phase decoupling analysis is performed on the current observation vector to extract the geometric pointing angle of the current observation vector, and the geometric pointing angle is determined as the stable synchronization phase.

4. The converter fault ride-through control method as described in claim 1, characterized in that: The construction of the multi-dimensional constrained control model by combining the preset current threshold and the voltage control loop regulation characteristics includes: Obtain the upper limit of current carrying capacity allowed by the converter hardware and define it as the preset current threshold. Analyze the regulation characteristics of the voltage control loop and extract the control paths of the proportional regulation channel and integral regulation channel in the voltage control loop; A state determination logic based on the preset current threshold is established, and the state determination logic is associated with the proportional adjustment channel and the integral adjustment channel to form the multidimensional constraint control model that can dynamically switch the control strategy according to the current amplitude state.

5. The converter fault ride-through control method as described in claim 1, characterized in that: The step of using the multi-dimensional constraint control model to lock the current amplitude boundary and forcibly anchor the current phase to the stable synchronous phase when the original current command amplitude exceeds a preset threshold, in order to generate the target drive command, includes: The synthesized amplitude of the original current command is calculated in real time, and the numerical relationship between the synthesized amplitude and the preset current threshold is monitored. If the synthesized amplitude is detected to exceed the preset current threshold, the preset current threshold is directly taken as the target current amplitude, and the phase information of the original current command is discarded. The stable synchronous phase is introduced as the target current phase, and the target current amplitude and the target current phase are vector synthesized to generate the target drive command.

6. The converter fault ride-through control method as described in claim 5, characterized in that: The step of performing vector synthesis of the target current amplitude and the target current phase to generate the target driving command includes: Establish vector projection logic based on a synchronously rotating coordinate system of a transformer; The target current amplitude is used as the magnitude, and the stable synchronous phase is used as the phase angle. The vector projection logic is used to map the phase angle to the orthogonal axis of the converter synchronous rotating coordinate system. The current component commands corresponding to each orthogonal axis are decomposed and combined to form the target driving command.

7. The converter fault ride-through control method as described in claim 1, characterized in that: The step of triggering the integral freezing mechanism through the multidimensional constraint control model to block the error accumulation of the voltage control loop includes: A state interaction feedback channel is established between the voltage control loop and the multidimensional constraint control model; The numerical relationship between the original current command amplitude and the preset current threshold is monitored in real time to generate start / stop logic identifiers for controlling the integral action permission; The start / stop logic flag is fed back to the integral regulation unit in the voltage control loop. When an overcurrent condition is detected, the start / stop logic flag is used to cut off the integral input path and maintain the integral output value constant to avoid system divergence.

8. A converter fault ride-through control system, employing a converter fault ride-through control method as described in any one of claims 1 to 7, characterized in that, include: The state observation module is used to acquire voltage state data at both ends of the converter grid-connected link and to build a state observation model. The phase calculation module is used to map the voltage state data into an electromagnetic integral vector characterizing the electromagnetic characteristics of the power grid through the state observation model; calculate the vector deviation between the electromagnetic integral vectors corresponding to the two ends of the grid-connected link, thereby reconstructing the current observation vector, and analyzing the stable synchronous phase based on the current observation vector. The constraint model configuration module is used to construct a multi-dimensional constraint control model by combining the preset current threshold and the voltage control loop regulation characteristics. The instruction generation module is used to lock the current amplitude boundary and forcibly anchor the current phase to the stable synchronous phase when the original current instruction amplitude exceeds the preset threshold through the multi-dimensional constraint control model, so as to generate the target driving instruction. The collaborative control module is used to trigger the integral freezing mechanism through the multidimensional constraint control model to block the error accumulation of the voltage control loop, and control the converter to operate according to the target drive command.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the converter fault ride-through control method according to any one of claims 1 to 7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the converter fault ride-through control method according to any one of claims 1 to 7.

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