Light emitting diode with improved current crowding and method of making the same

Abstract

The present disclosure provides a light-emitting diode with improved current crowding and a preparation method thereof, and belongs to the technical field of optoelectronic manufacturing. The light-emitting diode comprises an epitaxial layer and a finger electrode, the finger electrode is located on the surface of the epitaxial layer, at least part of the area of the orthogonal projection of the finger electrode on the surface of the epitaxial layer is a curved structure, and the radius of curvature of the curved structure is greater than or equal to 30 μm. The present disclosure can improve the problem of uneven current density distribution, prevent the occurrence of current crowding effect, and improve the reliability of the light-emitting diode.

Description

Technical Field

[0001] This disclosure relates to the field of optoelectronic manufacturing technology, and in particular to a light-emitting diode with improved current congestion and a method for its fabrication. Background Technology

[0002] Light-emitting diodes (LEDs) are highly influential new products in the optoelectronics industry. Due to their high luminous efficiency, high power, and excellent heat dissipation, LED chips are widely used in lighting and display fields.

[0003] The flip-chip light-emitting diode in related technologies includes an epitaxial layer and finger electrodes located on the epitaxial layer. When the light-emitting diode is operating, the current extends laterally through the finger electrodes to the active region of the epitaxial layer.

[0004] Light-emitting diodes (LEDs) typically employ linear or branched finger electrodes. However, this finger electrode shape has certain drawbacks. After current is injected from the electrode fingers, it preferentially flows to the area closest to the fingers, resulting in uneven current density distribution and a current congestion effect. Current congestion leads to increased local chip temperature, decreased luminous efficiency, and increased local Joule heating. Over long-term operation, this accelerates chip aging and affects the reliability and lifespan of the device. Summary of the Invention

[0005] This disclosure provides a light-emitting diode (LED) with improved current crowding and its fabrication method, which can improve the problem of uneven current density distribution, prevent current crowding effects, and improve the reliability of the LED. The technical solution is as follows: On one hand, this disclosure provides a light-emitting diode, which includes an epitaxial layer and a finger electrode. The finger electrode is located on the surface of the epitaxial layer, and at least a portion of the orthographic projection of the finger electrode onto the surface of the epitaxial layer is a curved structure, wherein the radius of curvature of the curved structure is greater than or equal to 30 μm.

[0006] In one implementation of the present disclosure, the shape of the curved structure includes at least one of the following: arc shape, spiral shape, involute shape, and sine curve shape.

[0007] In another implementation of the present disclosure, at least a portion of the curved structure protrudes toward the peripheral edge of the epitaxial layer.

[0008] In another implementation of the embodiments of this disclosure, the width of the finger electrode is 4 μm to 10 μm.

[0009] In another implementation of the present disclosure, the finger electrode includes at least one of an Ag layer, an Al layer, and an aluminum alloy layer.

[0010] In another implementation of the present disclosure, the epitaxial layer includes a first semiconductor layer, a multiple quantum well layer, and a second semiconductor layer stacked sequentially, the surface of the second semiconductor layer having a groove exposing the first semiconductor layer; the finger electrode includes a first electrode strip and a second electrode strip, the first electrode strip being located within the groove and connected to the first semiconductor layer, and the second electrode strip being located on the surface of the second semiconductor layer; at least one of the first electrode strip and the second electrode strip has the bending structure.

[0011] In another implementation of this disclosure, the light-emitting diode further includes a passivation layer, a first solder joint, and a second solder joint. The passivation layer is located within the groove, on the first electrode strip, on the surface of the second semiconductor layer, and on the second electrode strip. The surface of the passivation layer has vias that expose the first electrode strip and the second electrode strip, respectively. The first solder joint and the second solder joint are arranged at intervals on the surface of the passivation layer. The first solder joint is connected to the first electrode strip through the vias, and the second solder joint is connected to the second electrode strip through the vias.

[0012] In another implementation of the present disclosure, the orthographic projection of the curved structure on the surface of the epitaxial layer is located outside the orthographic projection of the first solder joint on the surface of the epitaxial layer, and outside the orthographic projection of the second solder joint on the surface of the epitaxial layer.

[0013] On the other hand, this disclosure provides a method for fabricating a light-emitting diode, the method comprising: fabricating an epitaxial layer on a substrate; forming a finger electrode on the surface of the epitaxial layer, wherein at least a portion of the orthographic projection of the finger electrode on the surface of the epitaxial layer is a curved structure, and the radius of curvature of the curved structure is greater than or equal to 30 μm.

[0014] In another implementation of the present disclosure, forming a finger electrode on the surface of the epitaxial layer includes: forming a mask layer on the epitaxial layer, the mask layer having an opening exposing the epitaxial layer, at least a portion of the orthographic projection of the opening on the surface of the epitaxial layer being a curved structure, the shape of the curved structure including at least one of an arc shape, a spiral shape, an involute shape, and a sine curve shape; and depositing a metallic material within the opening to form the finger electrode.

[0015] The beneficial effects of the technical solutions provided in this disclosure include at least the following: The light-emitting diode provided in this disclosure fundamentally changes the physical path of current propagation by designing the orthogonal projection of the finger electrode as at least partially curved, and controlling the radius of curvature of the curved structure to be ≥30μm. Theoretically, the curved structure extends the lateral propagation distance of current from the electrode solder joint to the chip edge, breaking the limitation of the short, direct path of a linear electrode, and forcing the current to actively diffuse to a more distant active region, rather than concentrating near the electrode. This structural design achieves uniform current density distribution and effectively eliminates localized current hotspots.

[0016] Furthermore, high temperatures exacerbate nonradiative recombination under high current densities, leading to a sharp drop in efficiency. Simultaneously, increased temperature also increases the material's refractive index, intensifies light absorption within the package, and reduces internal quantum efficiency and light extraction efficiency. According to Joule's theorem, excessively high local current density is the primary cause of heat concentration. Bending electrodes, by dispersing the current, bring the overall current density of the chip closer to equilibrium, avoiding heat accumulation caused by localized surges in current density, thereby lowering the operating temperature. The low-temperature environment created by the bending structure suppresses nonradiative recombination and carrier nonradiative losses, improving internal quantum efficiency; it also reduces total internal reflection losses and material light absorption, optimizing light extraction efficiency and improving light emission efficiency.

[0017] Meanwhile, the curved finger electrodes eliminate localized hot spots, reducing the internal temperature gradient of the chip and resulting in a more balanced distribution of mechanical stress. This avoids damage sources such as thermal migration, lattice degradation, and stress concentration. This structure reduces the degradation rate of materials and interfaces, thereby significantly extending the long-term operational life of the chip.

[0018] Moreover, the light-emitting diode provided in this disclosure only requires changing the straight electrode to a curved pattern, without altering the core structure such as the epitaxial layer and the active region. The curved electrode can be achieved through the flip-chip manufacturing process, requiring only modification of the electrode pattern on the mask, without adding complex processes such as epitaxial growth, multiple photolithography steps, or special deposition. This improvement retains the maturity of the original process while achieving a performance breakthrough through simple pattern optimization. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a top view of a light-emitting diode provided in an embodiment of this disclosure; Figure 2 It is along Figure 1 A cross-sectional view of the light-emitting diode taken from section AA; Figure 3 This is a schematic diagram of the structure of a finger electrode provided in an embodiment of this disclosure; Figure 4 This is a schematic diagram of the structure of a finger electrode provided in an embodiment of this disclosure; Figure 5 This is a schematic diagram of the structure of a finger electrode provided in an embodiment of this disclosure; Figure 6 This is a flowchart of a method for fabricating a light-emitting diode according to an embodiment of this disclosure.

[0021] The markings in the diagram are explained as follows: 10. Epitaxial layer; 11. First semiconductor layer; 12. Multiple quantum well layer; 13. Second semiconductor layer; 14. Groove; 20. Finger electrode; 200. Bending structure; 21. First electrode strip; 22. Second electrode strip; 30. Passivation layer; 41. Current blocking layer; 42. Current spreading layer; 51. First solder joint; 52. Second solder joint; 60. Substrate. Detailed Implementation

[0022] To make the objectives, technical solutions, and advantages of this disclosure clearer, the embodiments of this disclosure will be described in further detail below with reference to the accompanying drawings.

[0023] Unless otherwise defined, the technical or scientific terms used herein shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” “third,” and similar terms used in this patent application specification and claims do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an” or “a” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “comprising” or “including” and similar terms mean that the elements or objects preceding “comprising” or “including” encompass the elements or objects listed following “comprising” or “including” and their equivalents, and do not exclude other elements or objects. The terms “connected” or “linked” and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms “upper,” “lower,” “left,” “right,” “top,” and “bottom,” etc., are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described objects changes.

[0024] Figure 1 This is a top view of a light-emitting diode provided in an embodiment of this disclosure. Figure 2This is a schematic diagram of the structure of a light-emitting diode provided in an embodiment of this disclosure. Figure 2 It is along Figure 1 A cross-sectional view of the light-emitting diode taken from section AA.

[0025] like Figure 1 , 2 As shown, the light-emitting diode includes an epitaxial layer 10 and a finger electrode 20, with the finger electrode 20 located on the surface of the epitaxial layer 10.

[0026] like Figure 1 As shown, at least a portion of the orthographic projection of the finger electrode 20 onto the surface of the epitaxial layer 10 is a curved structure 200.

[0027] Among them, the radius of curvature of the curved structure 200 is greater than or equal to 30μm.

[0028] The light-emitting diode provided in this disclosure fundamentally changes the physical path of current propagation by designing the orthogonal projection of the finger electrode 20 as at least partially curved structure 200 and controlling the radius of curvature of the curved structure 200 to be ≥30μm. Theoretically, the curved structure 200 extends the lateral propagation distance of current from the electrode solder joint to the chip edge, breaking the limitation of the short path of a linear electrode and forcing the current to actively diffuse to a more distant active region, rather than concentrating near the electrode. This structural design achieves uniform current density distribution and effectively eliminates local current hotspots.

[0029] Furthermore, high temperatures exacerbate nonradiative recombination under high current densities, leading to a sharp drop in efficiency. Simultaneously, increased temperature also increases the material's refractive index, intensifies light absorption within the package, and reduces internal quantum efficiency and light extraction efficiency. According to Joule's theorem, excessively high local current density is the primary cause of heat concentration. The bent electrode, by dispersing the current, helps to equalize the overall current density of the chip, avoiding heat accumulation caused by localized surges in current density, thereby lowering the operating temperature. The low-temperature environment provided by the bent structure 200 suppresses nonradiative recombination and carrier nonradiative losses, improving internal quantum efficiency; it also reduces total internal reflection losses and material light absorption, optimizing light extraction efficiency and improving light emission efficiency.

[0030] Meanwhile, the curved finger electrodes 20 reduce the internal temperature gradient of the chip and achieve a more balanced distribution of mechanical stress by eliminating local hot spots, thereby avoiding damage sources such as thermal migration, lattice degradation, and stress concentration. This structure reduces the degradation rate of materials and interfaces, thus significantly extending the long-term operating life of the chip.

[0031] Moreover, the light-emitting diode provided in this disclosure only requires changing the straight electrode to a curved pattern, without changing the core structure such as the epitaxial layer 10 and the active region; the curved electrode can be achieved through the flip-chip manufacturing process, requiring only modification of the electrode pattern on the mask, without adding complex processes such as epitaxial growth, multiple photolithography, or special deposition. This improvement retains the maturity of the original process while achieving a performance breakthrough through simple pattern optimization.

[0032] Optionally, the shape of the curved structure 200 includes at least one of the following: arc shape, spiral shape, involute shape, and sine curve shape.

[0033] For example, such as Figure 1 As shown, the curved structure 200 has an arc shape.

[0034] The arc-shaped bend extends with a constant radius of curvature ≥30μm, and the geometric symmetry ensures a smooth and uniform current propagation path. The constant curvature avoids electric field distortion and guides the current to diffuse in multiple directions along the arc surface, making it particularly suitable for small-sized chips. It allows the current to penetrate evenly from the near end to the far end of the electrode, eliminating the disadvantage of near-end concentration of straight electrodes and optimizing the current density distribution.

[0035] For example, such as Figure 3 As shown, the curved structure 200 has a spiral shape.

[0036] The spiral shape combines radial and circumferential extension characteristics, allowing current to expand along the spiral trajectory in successive turns, significantly increasing the coverage area. Its winding structure forces current to diffuse in multiple dimensions over a large area of ​​active region, avoiding the limitations of unidirectional expansion. It is especially suitable for high-power chips, allowing sufficient current injection into edge areas and improving overall luminous uniformity.

[0037] For example, such as Figure 4 As shown, the shape of the curved structure 200 is an involute.

[0038] The radius of curvature of the involute gradually increases as it unfolds. The initial section's gentle curvature guides the current to start smoothly, while the subsequent large curvature allows the current to extend to a more distant region. This structural characteristic is suitable for long, strip-shaped active regions, avoiding current surges at the initial end while ensuring sufficient current coverage at the far end, thus optimizing the uniformity of long-distance extension.

[0039] For example, such as Figure 5 As shown, the shape of the curved structure 200 is a sine curve.

[0040] The sinusoidal curve, with its periodic peaks and troughs, forces the current to diffuse alternately in the lateral and longitudinal directions. The wavy path breaks the uniformity of straight-line expansion, making it particularly suitable for wide active regions. By periodically turning to balance the current at the center and edges, it reduces the distribution defects of dense current in the middle and sparse current at both sides, and enhances the uniformity of lateral current.

[0041] Optionally, such as Figure 1 As shown, at least a portion of the curved structure 200 protrudes toward the peripheral edge of the epitaxial layer 10.

[0042] The design of the curved structure 200 convex to the periphery of the epitaxial layer 10 effectively solves the problem of insufficient current supply at the edge of the straight electrode by guiding the active current diffusion towards the chip edge through the curved structure 200. In related technologies, the current of the straight electrode tends to concentrate in the middle and near the edge, while the current is sparse at the edge due to the long extension path, resulting in an uneven distribution with a bright center and dark edges. The curved structure 200 convex to the edge shortens the current extension distance in the edge region, allowing the current to penetrate to the edge during injection and balancing the current density between the center and the edge. This near-edge guidance optimizes the current coverage of the entire active region, reduces dark areas at the edges and congestion at the center, and simultaneously reduces local heat accumulation, further improving luminescence uniformity and device reliability, especially suitable for the edge luminescence enhancement requirements of large-size chips.

[0043] Optionally, the surface of the finger electrode 20 can be provided with an array of multiple through holes, each with a diameter of 50 nm to 500 nm and a depth of 1 μm to 2 μm. This forms a periodic dielectric distribution structure with alternating metal and air on the electrode surface. This periodic structure achieves high light reflection through the photonic bandgap effect, thereby improving the light emission effect of the finger electrode 20.

[0044] Optionally, the thickness of the finger electrode 20 decreases from the end where the solder joint is located to the other end. A thicker electrode is used at the solder joint location to reduce contact resistance and Joule heating, while a thinner electrode is used away from the solder joint to limit local current overload and avoid heat concentration.

[0045] Optionally, such as Figure 1 As shown, the width of the finger electrode 20 is 4 μm to 10 μm.

[0046] The width of the finger electrode 20 refers to the width of its orthographic projection onto the surface of the epitaxial layer 10. Furthermore, the width direction of the finger electrode 20 is perpendicular to its extension direction, meaning the width direction is perpendicular to its length.

[0047] In the above implementation, by setting the width of the finger electrode 20 to 4μm to 10μm, it avoids that if it is too narrow, it will increase the resistance and cause Joule heat concentration, and avoids that if it is too wide, it will limit the lateral diffusion range of the current and aggravate congestion. The above-mentioned interval width is adapted to the curved structure 200, which ensures that the current penetrates evenly along the arc path and avoids that the local current density is too high. With the optimization of the curvature radius, heat accumulation is further suppressed.

[0048] Optionally, the finger electrode 20 includes at least one of an Ag layer, an Al layer, and an aluminum alloy layer.

[0049] For example, the finger electrode 20 includes an Ag layer.

[0050] The Ag layer possesses extremely high visible light reflectivity, efficiently reflecting light emitted downwards from the active region and improving light extraction efficiency. Simultaneously, its excellent conductivity reduces electrode resistance and Joule heating. As a highly reflective metal, its optical and electrical properties are synergistically optimized, making it suitable for applications requiring high light extraction efficiency.

[0051] For example, the finger electrode 20 includes an Al layer.

[0052] The Al layer has moderate reflectivity, lower cost than Ag, and a mature manufacturing process; it adheres well to the epitaxial layer 10 and is not easily peeled off. Its surface natural oxide film is transparent, does not affect reflection, and also has a certain degree of corrosion resistance. As a high-reflectivity electrode, it balances cost-effectiveness and stability.

[0053] For example, the finger electrode 20 includes an aluminum alloy layer, wherein the aluminum alloy layer may be an AlCu alloy.

[0054] While maintaining the high reflectivity of Al, AlCu alloys enhance strength and resistance to electromigration through Cu solid solution strengthening, reducing the risk of electrode failure under long-term high current. The resistivity is slightly higher than that of pure Al but still relatively low, balancing reflectivity, conductivity, and reliability.

[0055] For example, the finger electrode 20 includes an Ag layer, an Al layer and an AlCu layer stacked sequentially.

[0056] Optionally, such as Figure 1 , 2 As shown, the epitaxial layer 10 includes a first semiconductor layer 11, a multiple quantum well layer 12, and a second semiconductor layer 13 stacked sequentially. The surface of the second semiconductor layer 13 has a groove 14 that exposes the first semiconductor layer 11.

[0057] like Figure 1 , 2 As shown, the finger electrode 20 includes a first electrode strip 21 and a second electrode strip 22. The first electrode strip 21 is located in the groove 14 and is connected to the first semiconductor layer 11. The second electrode strip 22 is located on the surface of the second semiconductor layer 13.

[0058] At least one of the first electrode strip 21 and the second electrode strip 22 has a curved structure 200.

[0059] For example, such as Figure 1 As shown, the second electrode strip 22 has a curved structure 200.

[0060] In the above implementation, the groove 14 exposes the first semiconductor layer 11, allowing the first electrode strip 21 to directly contact the underlying semiconductor, shortening the longitudinal current path, reducing contact resistance, and improving current injection efficiency; the second electrode strip 22 is located on the surface of the second semiconductor layer 13 and cooperates with the curved structure 200 to extend the lateral current expansion path, forcing the current to diffuse uniformly from the near end of the electrode to the chip edge and the groove 14 area, eliminating the problem of near-end concentration of the straight electrode.

[0061] Optionally, such as Figure 1 , 2 As shown, the light-emitting diode also includes a passivation layer 30, a first solder joint 51 and a second solder joint 52. The passivation layer 30 is located in the groove 14, on the first electrode strip 21, on the surface of the second semiconductor layer 13 and on the second electrode strip 22. The surface of the passivation layer 30 has through holes that expose the first electrode strip 21 and the second electrode strip 22 respectively.

[0062] like Figure 1 , 2 As shown, the first solder joint 51 and the second solder joint 52 are arranged at intervals on the surface of the passivation layer 30. The first solder joint 51 is connected to the first electrode strip 21 through a via, and the second solder joint 52 is connected to the second electrode strip 22 through a via.

[0063] For example, such as Figure 1 As shown, the orthographic projection of the bent structure 200 on the surface of the epitaxial layer 10 is outside the orthographic projection of the first solder joint 51 on the surface of the epitaxial layer 10, and the orthographic projection of the bent structure 200 on the surface of the epitaxial layer 10 is outside the orthographic projection of the second solder joint 52 on the surface of the epitaxial layer 10.

[0064] In the above implementation, the curved structure 200 of the electrode strip is arranged in the gap between the first solder joint 51 and the second solder joint 52. The solder joints serve as current injection terminals, and their spaced arrangement avoids concentrated heat generation. The gap region provides dedicated expansion space for the curved electrode strip. After current is injected from the solder joints on both sides through the electrode strip, it diffuses along the curved path within the gap to the entire chip area. By extending the lateral expansion distance, the curved structure 200 breaks the current concentration limitation of the straight electrode, forcing the current to penetrate further into the active area, balancing the current density at the center and edges, and eliminating local hot spots. At the same time, the gap position keeps the curved electrode strip away from the mechanical stress of the solder joints, and with the cover of the passivation layer 30, it isolates moisture impurities, reducing electrode oxidation and mechanical damage. The design with a curvature radius ≥30μm avoids electric field distortion, ultimately achieving uniform current distribution, reduced heat accumulation, and improved device reliability.

[0065] Optionally, such as Figure 2 As shown, the light-emitting diode also includes a substrate 60, and an epitaxial layer 10 is located on the surface of the substrate 60.

[0066] For example, the substrate is a sapphire substrate. Sapphire substrates have high light transmittance, meaning they are transparent. Furthermore, sapphire material is relatively hard and chemically stable, giving the light-emitting diode (LED) good luminous efficacy and stability.

[0067] In this embodiment of the present disclosure, one of the first semiconductor layer 11 and the second semiconductor layer 13 is a p-type layer, and the other of the first semiconductor layer 11 and the second semiconductor layer 13 is an n-type layer.

[0068] For example, the first semiconductor layer 11 is an n-type layer and the second semiconductor layer 13 is a p-type layer.

[0069] In this embodiment of the disclosure, the first semiconductor layer 11 is Al. x Ga 1-x N is a material layer, where X is greater than or equal to 0 and less than or equal to 1.

[0070] For example, when X is 0, the first semiconductor layer 11 is a GaN layer. For instance, the first semiconductor layer 11 is a silicon-doped n-type GaN layer. The thickness of the n-type GaN layer can be from 0.5 μm to 3 μm.

[0071] Optionally, the multi-quantum-well layer 12 includes alternating InGaN quantum well layers and GaN quantum barrier layers. Specifically, the multi-quantum-well layer 12 may include 3 to 8 alternating stacked InGaN quantum well layers and GaN quantum barrier layers.

[0072] As an example, in an embodiment of this disclosure, the multi-quantum-well layer 12 includes five alternating stacked InGaN quantum-well layers and GaN quantum-barrier layers.

[0073] Optionally, the thickness of the multiple quantum well layer 12 can be from 150 nm to 200 nm.

[0074] Optionally, the second semiconductor layer 13 is a magnesium-doped p-type GaN layer. The thickness of the p-type GaN layer can be from 0.5 μm to 3 μm.

[0075] Optionally, such as Figure 2 As shown, the light-emitting diode also includes a current blocking layer 41 and a current spreading layer 42.

[0076] like Figure 2 As shown, the current blocking layer 41 is located on the surface of the second semiconductor layer 13, and the current spreading layer 42 is located on the surface of the second semiconductor layer 13 and covers the current blocking layer 41.

[0077] The first electrode strip 21 is located in the groove 14 and connected to the first semiconductor layer 11, while the second electrode strip 22 is located on the surface of the current spreading layer 42.

[0078] For example, the first semiconductor layer 11 is an n-type layer, the second semiconductor layer 13 is a p-type layer, the first electrode strip 21 is an n-type electrode, and the second electrode strip 22 is a p-type electrode.

[0079] Optionally, both the first solder joint 51 and the second solder joint 52 may include at least one of the following: Ti layer, Al layer, Pt layer, Ni layer and Au layer.

[0080] The aforementioned metallic materials have excellent heat dissipation properties. Therefore, solder joints prepared using these materials also have excellent heat dissipation properties, which can improve the heat dissipation effect of light-emitting diodes.

[0081] Optionally, both the first solder joint 51 and the second solder joint 52 include a first Ti layer, an Al layer, a second Ti layer, a Pt layer, a Ni layer and an Au layer stacked sequentially.

[0082] For example, the thickness of the first Ti layer is 20 to 100 angstroms. For instance, the thickness of the first Ti layer is 50 angstroms.

[0083] For example, the thickness of the Al layer is between 10,000 and 20,000 angstroms. For instance, the thickness of the Al layer is 15,000 angstroms.

[0084] For example, the thickness of the second Ti layer is 500 angstroms to 1500 angstroms. For instance, the thickness of the second Ti layer is 1000 angstroms.

[0085] For example, the thickness of the Pt layer is between 500 angstroms and 1500 angstroms. For instance, the thickness of the Pt layer is 1000 angstroms.

[0086] For example, the thickness of the Ni layer is between 60,000 and 80,000 angstroms. For instance, the thickness of the Ni layer is 70,000 angstroms.

[0087] For example, the thickness of the Au layer is between 1500 angstroms and 2500 angstroms. For instance, the thickness of the Au layer is 2000 angstroms.

[0088] Optionally, the passivation layer 30 includes at least one of an aluminum oxide layer, a silicon oxide layer, a titanium oxide layer, and a silicon oxynitride layer.

[0089] For example, the passivation layer 30 includes an aluminum oxide layer.

[0090] Alumina has extremely high dielectric strength, effectively withstanding the high voltages during LED operation, reducing the risk of passivation layer breakdown, and preventing short circuits between electrodes and solder joints. Furthermore, alumina is chemically stable, resistant to acid and alkali corrosion, and does not readily undergo hydrolysis or oxidation in the humid and hot environment of chip packaging, maintaining its insulating properties over a long period.

[0091] As an example, the thickness of the alumina layer can be from 100 nm to 500 nm.

[0092] For example, the passivation layer 30 includes a silicon oxide layer.

[0093] Silicon oxide has a good match with the thermal expansion coefficient of epitaxial layer 10, resulting in low stress after deposition, which can reduce the risk of cracking or peeling of passivation layer 30 due to thermal stress. Although the dielectric strength of silicon oxide is slightly lower than that of aluminum oxide, the insulation requirements of LEDs can still be met by increasing the thickness, for example, controlling the thickness of silicon oxide to be more than 1 μm.

[0094] As an example, the thickness of the silicon oxide layer can be from 0.5 μm to 2 μm.

[0095] For example, the passivation layer 30 includes a titanium oxide layer.

[0096] Titanium oxide has a high dielectric constant and can act as a field plate in the passivation layer 30. By dispersing the electric field concentration effect at the electrode edge through the high dielectric constant material, the probability of insulation breakdown caused by local high electric field is reduced.

[0097] As an example, the thickness of the titanium oxide layer can be from 50 nm to 200 nm.

[0098] Optionally, the current blocking layer 41 may include at least one of an aluminum oxide layer, a silicon oxide layer, a titanium oxide layer, and a silicon oxynitride layer.

[0099] Optionally, the current spreading layer 42 may include an ITO layer or an IZO layer.

[0100] Figure 6 This is a flowchart illustrating a method for fabricating a light-emitting diode according to an embodiment of this disclosure. Figure 6 As shown, the preparation method includes: S11: Prepare an epitaxial layer on the substrate.

[0101] The epitaxial layer may include a first semiconductor layer, a multiple quantum well layer, and a second semiconductor layer sequentially stacked on the substrate.

[0102] S12: A finger electrode is formed on the surface of the epitaxial layer.

[0103] In this case, at least a portion of the orthographic projection of the finger electrode onto the surface of the epitaxial layer is a curved structure, and the radius of curvature of the curved structure is greater than or equal to 30 μm.

[0104] The light-emitting diode (LED) fabricated by the method disclosed in this embodiment fundamentally alters the physical path of current propagation by designing the orthogonal projection of the finger electrode as at least partially curved, and controlling the radius of curvature of the curved structure to be ≥30μm. Theoretically, the curved structure extends the lateral propagation distance of current from the electrode solder joint to the chip edge, breaking the limitation of the short, direct path of a linear electrode and forcing the current to actively diffuse towards a more distant active region, rather than concentrating near the electrode. This structural design achieves uniform current density distribution and effectively eliminates localized current hotspots.

[0105] Furthermore, high temperatures exacerbate nonradiative recombination under high current densities, leading to a sharp drop in efficiency. Simultaneously, increased temperature also increases the material's refractive index, intensifies light absorption within the package, and reduces internal quantum efficiency and light extraction efficiency. According to Joule's theorem, excessively high local current density is the primary cause of heat concentration. Bending electrodes, by dispersing the current, bring the overall current density of the chip closer to equilibrium, avoiding heat accumulation caused by localized surges in current density, thereby lowering the operating temperature. The low-temperature environment created by the bending structure suppresses nonradiative recombination and carrier nonradiative losses, improving internal quantum efficiency; it also reduces total internal reflection losses and material light absorption, optimizing light extraction efficiency and improving light emission efficiency.

[0106] Meanwhile, the curved finger electrodes eliminate localized hot spots, reducing the internal temperature gradient of the chip and resulting in a more balanced distribution of mechanical stress. This avoids damage sources such as thermal migration, lattice degradation, and stress concentration. This structure reduces the degradation rate of materials and interfaces, thereby significantly extending the long-term operational life of the chip.

[0107] Moreover, the light-emitting diode provided in this disclosure only requires changing the straight electrode to a curved pattern, without altering the core structure such as the epitaxial layer and the active region. The curved electrode can be achieved through the flip-chip manufacturing process, requiring only modification of the electrode pattern on the mask, without adding complex processes such as epitaxial growth, multiple photolithography steps, or special deposition. This improvement retains the maturity of the original process while achieving a performance breakthrough through simple pattern optimization.

[0108] The process of preparing the epitaxial layer in step S11 may include the following steps: First, a substrate is provided.

[0109] The substrate can be a sapphire substrate, a silicon substrate, or a silicon carbide substrate. The substrate can be a flat substrate or a patterned substrate.

[0110] As an example, in this embodiment of the disclosure, the substrate is a sapphire substrate. Sapphire substrates are a commonly used substrate, with mature technology and low cost. Specifically, it can be a patterned sapphire substrate or a flat sapphire substrate.

[0111] The sapphire substrate can be pretreated by placing it in an MOCVD (Metal-organic Chemical Vapor Deposition) reaction chamber and baking it for 12 to 18 minutes. As an example, in this embodiment of the present disclosure, the sapphire substrate is baked for 15 minutes.

[0112] Specifically, the baking temperature can be from 1000℃ to 1200℃, and the pressure inside the MOCVD reaction chamber during baking can be from 100mbar to 200mbar.

[0113] Growing an epitaxial layer on a substrate can include: sequentially forming a first semiconductor layer, a multiple quantum well layer, and a second semiconductor layer on a sapphire substrate using MOCVD technology.

[0114] The first semiconductor layer is an n-type layer, and the second semiconductor layer is a p-type layer.

[0115] Optionally, the first semiconductor layer is a silicon-doped n-type GaN layer. The thickness of the n-type GaN layer can be from 0.5 μm to 3 μm.

[0116] The growth temperature of the n-type GaN layer can be from 1000℃ to 1100℃, and the growth pressure of the n-type GaN layer can be from 100 torr to 300 torr.

[0117] Optionally, the multi-quantum-well layer includes alternating InGaN quantum well layers and GaN quantum barrier layers. Specifically, the multi-quantum-well layer may include 3 to 8 alternating stacked InGaN quantum well layers and GaN quantum barrier layers.

[0118] When growing multiple quantum well layers, the MOCVD reaction chamber pressure is controlled at 200 torr. When growing InGaN quantum well layers, the reaction chamber temperature is 760℃ to 780℃. When growing GaN quantum barrier layers, the reaction chamber temperature is 860℃ to 890℃.

[0119] As an example, in an embodiment of this disclosure, the multi-quantum-well layer includes five alternating stacked InGaN quantum-well layers and GaN quantum-barrier layers.

[0120] Optionally, the thickness of the multi-quantum well layer can be from 150 nm to 200 nm.

[0121] Optionally, the second semiconductor layer is a magnesium-doped p-type GaN layer. The thickness of the p-type GaN layer can be from 0.5 μm to 3 μm.

[0122] When growing p-type GaN layers, the growth pressure of p-type GaN layers can be from 200 Torr to 600 Torr, and the growth temperature of p-type GaN layers can be from 800℃ to 1000℃.

[0123] Then, the second semiconductor layer is etched to form a groove that exposes the first semiconductor layer.

[0124] Next, a current blocking layer is formed on the surface of the second semiconductor layer.

[0125] Specifically, this may include: using processes such as plasma-enhanced chemical vapor deposition or electron beam evaporation, using silicon dioxide or silicon nitride as the material, to uniformly deposit a current blocking layer on the surface of the completed epitaxial layer.

[0126] Then, a current spreading layer covering the current blocking layer is formed on the surface of the second semiconductor layer.

[0127] In the example selection, the current spreading layer can be an ITO layer or an IZO layer.

[0128] Step S12 may include the following steps: The first step is to form a mask layer on the epitaxial layer, the mask layer having an opening that exposes the epitaxial layer.

[0129] Wherein, at least a portion of the area of ​​the orthographic projection of the opening on the surface of the epitaxial layer is a curved structure, and the shape of the curved structure includes at least one of the following: arc shape, spiral shape, involute shape, and sine curve shape.

[0130] Specifically, this may include: using photolithography to prepare a mask layer (such as a photoresist layer) on the surface of the epitaxial layer, and defining the opening that exposes the epitaxial layer by combining electron beam lithography or ultraviolet lithography with a custom mask.

[0131] The radius of curvature of the curved area in the orthographic projection of the opening is strictly controlled to be ≥30μm. The shape can be selected as an arc, wave, or involute as needed to ensure that the opening edge is smooth and free of jagged edges, providing a precise template for subsequent electrode patterns.

[0132] The second step is to deposit metallic material inside the opening to form a finger electrode.

[0133] Specifically, this can involve depositing a highly reflective metallic material (such as Ag, Al, or AlCu alloy) within the opening of a mask layer using magnetron sputtering or electron beam evaporation. During deposition, the geometric constraints of the mask openings are utilized to precisely fill the curved region with the metal layer, replicating the curved shape of the opening. After completion, an excess mask layer is removed using a stripping process, exposing the finger electrode with the target curved structure.

[0134] Optionally, the width of the finger electrode is 4 μm to 10 μm.

[0135] The width of the finger electrode refers to the width of its orthographic projection onto the surface of the epitaxial layer. Furthermore, the width direction of the finger electrode is perpendicular to its extension direction, meaning it is perpendicular to its length.

[0136] The following steps are included after step S12: The first step is to form a passivation layer in the groove, on the first electrode strip, on the surface of the second semiconductor layer, and on the second electrode strip.

[0137] Optionally, the passivation layer includes at least one of an aluminum oxide layer, a silicon oxide layer, a titanium oxide layer, and a silicon oxynitride layer.

[0138] For example, the passivation layer is a DBR layer, which includes multiple silicon oxide layers and multiple titanium oxide layers. The thickness of the DBR layer is 3 μm to 4 μm.

[0139] The second step is to etch the passivation layer to form vias on the surface of the passivation layer that expose the first and second electrode strips.

[0140] The third step is to form a first pad and a second pad on the passivation layer, so that the first pad is connected to the first semiconductor layer through a via, and the second pad is connected to the second semiconductor layer through a via.

[0141] Optionally, both the first pad and the second pad include a first Ti layer, an Al layer, a second Ti layer, a Pt layer, a Ni layer, and an Au layer stacked sequentially.

[0142] For example, the thickness of the first Ti layer is 20 to 100 angstroms. For instance, the thickness of the first Ti layer is 50 angstroms.

[0143] For example, the thickness of the Al layer is between 10,000 and 20,000 angstroms. For instance, the thickness of the Al layer is 15,000 angstroms.

[0144] For example, the thickness of the second Ti layer is 500 angstroms to 1500 angstroms. For instance, the thickness of the second Ti layer is 1000 angstroms.

[0145] For example, the thickness of the Pt layer is between 500 angstroms and 1500 angstroms. For instance, the thickness of the Pt layer is 1000 angstroms.

[0146] For example, the thickness of the Ni layer is 6,000 to 8,000 angstroms. For instance, the thickness of the Ni layer is 7,000 angstroms.

[0147] For example, the thickness of the Au layer is between 1500 angstroms and 2500 angstroms. For instance, the thickness of the Au layer is 2000 angstroms.

[0148] The above description is merely an optional embodiment of this disclosure and is not intended to limit this disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the protection scope of this disclosure.

Claims

1. A light-emitting diode, characterized in that, The light-emitting diode includes an epitaxial layer (10) and a finger electrode (20). The finger electrode (20) is located on the surface of the epitaxial layer (10). At least a portion of the orthographic projection of the finger electrode (20) onto the surface of the epitaxial layer (10) is a curved structure (200), and the radius of curvature of the curved structure (200) is greater than or equal to 30 μm.

2. The light-emitting diode according to claim 1, characterized in that, The shape of the curved structure (200) includes at least one of the following: arc shape, spiral shape, involute shape, and sine curve shape.

3. The light-emitting diode according to claim 1, characterized in that, At least a portion of the curved structure (200) protrudes toward the peripheral edge of the epitaxial layer (10).

4. The light-emitting diode according to any one of claims 1 to 3, characterized in that, The width of the finger electrode (20) is 4 μm to 10 μm.

5. The light-emitting diode according to any one of claims 1 to 3, characterized in that, The finger electrode (20) includes at least one of an Ag layer, an Al layer, and an aluminum alloy layer.

6. The light-emitting diode according to any one of claims 1 to 3, characterized in that, The epitaxial layer (10) includes a first semiconductor layer (11), a multi-quantum well layer (12), and a second semiconductor layer (13) stacked sequentially, and the surface of the second semiconductor layer (13) has a groove (14) exposing the first semiconductor layer (11). The finger electrode (20) includes a first electrode strip (21) and a second electrode strip (22). The first electrode strip (21) is located in the groove (14) and connected to the first semiconductor layer (11). The second electrode strip (22) is located on the surface of the second semiconductor layer (13). At least one of the first electrode strip (21) and the second electrode strip (22) has the bending structure (200).

7. The light-emitting diode according to claim 6, characterized in that, The light-emitting diode further includes a passivation layer (30), a first solder joint (51), and a second solder joint (52). The passivation layer (30) is located in the groove (14), on the first electrode strip (21), on the surface of the second semiconductor layer (13), and on the second electrode strip (22). The surface of the passivation layer (30) has vias that expose the first electrode strip (21) and the second electrode strip (22), respectively. The first solder joint (51) and the second solder joint (52) are arranged at intervals on the surface of the passivation layer (30). The first solder joint (51) is connected to the first electrode strip (21) through a via, and the second solder joint (52) is connected to the second electrode strip (22) through a via.

8. The light-emitting diode according to claim 7, characterized in that, The orthographic projection of the curved structure (200) on the surface of the epitaxial layer (10) is outside the orthographic projection of the first solder joint (51) on the surface of the epitaxial layer (10), and outside the orthographic projection of the second solder joint (52) on the surface of the epitaxial layer (10).

9. A method for fabricating a light-emitting diode, characterized in that, The preparation method includes: An epitaxial layer is fabricated on a substrate; A finger electrode is formed on the surface of the epitaxial layer, and at least a portion of the orthographic projection of the finger electrode on the surface of the epitaxial layer is a curved structure, wherein the radius of curvature of the curved structure is greater than or equal to 30 μm.

10. The preparation method according to claim 9, characterized in that, Forming a finger electrode on the surface of the epitaxial layer includes: A mask layer is formed on the epitaxial layer, the mask layer having an opening that exposes the epitaxial layer, and at least a portion of the orthographic projection of the opening onto the surface of the epitaxial layer is a curved structure, the shape of the curved structure including at least one of arc shape, spiral shape, involute shape and sine curve shape; Metallic material is deposited within the opening to form the finger electrode.

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