Micro-led device for alleviating current crowding effect and preparation method thereof

By forming grooves in the p-GaN layer of the Micro-LED device and filling them with highly reflective metallic conductive material, the current distribution area is expanded, the current congestion problem is solved, the current uniformity and heat diffusion capability of the device are improved, and the stability and reliability of the device are significantly enhanced, making it particularly suitable for high-performance displays in display devices.

CN119767891BActive Publication Date: 2026-05-29XIAMEN UNIV

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
XIAMEN UNIV
Filing Date
2024-12-31
Publication Date
2026-05-29

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Abstract

The application discloses a Micro-LED device for relieving current crowding effect and a preparation method thereof, and the epitaxial structure of the Micro-LED device comprises, in sequence from the back to the front, a substrate, a buffer layer, an n-GaN layer, a multi-quantum well layer and a p-GaN layer, and a light emitting mesa is formed by etching the front to the n-GaN layer; a current spreading layer is arranged on the p-GaN layer, a p-electrode is arranged on the current spreading layer, and an n-electrode is arranged on the n-GaN layer; wherein the front of the p-GaN layer is provided with a plurality of grooves below the current spreading layer, and the grooves are filled with a high-reflectivity metal conductive material, so that the uniform distribution of current in the whole device is obviously improved, the current spreading capacity of the device is improved, and the stability and reliability of the device can be obviously improved.
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Description

Technical Field

[0001] This invention belongs to the technical field of Micro-LED displays, specifically relating to a Micro-LED device and its fabrication method for mitigating current crowding effects. Background Technology

[0002] Currently, the display device field is showing a trend of diversification, with near-eye displays and projection devices becoming research hotspots and possessing broad commercial prospects. Superior display devices require high brightness, high resolution, and high contrast to meet consumers' ever-increasing demands for quality. Although OLED and LCD are currently the two most widely used display devices, their limitations hinder the development of devices towards higher performance. In contrast, Micro-LED, as a miniaturized inorganic light-emitting diode, boasts advantages such as high brightness, long lifespan, high contrast, and fast response, and is considered the most promising display device. Compared to the organic structure of OLED, the inorganic GaN material of Micro-LED reduces packaging requirements, and its self-emissive properties facilitate smaller size and device thickness. Its nanosecond-level response time surpasses that of OLED and LCD, and its contrast ratio can reach 1,000,000:1, far exceeding that of LCD and OLED. Therefore, Micro-LED has enormous potential in near-eye displays and projection devices, making it the most competitive light-emitting device in the field of new display technologies.

[0003] During the fabrication of Micro-LEDs, the electrodes of upright and flip-chip Micro-LEDs are often located on the same side, resulting in a shorter current diffusion path. Especially at the electrode mesa, the current density increases significantly, which can easily lead to local current congestion, thereby increasing the risk of device overheating and affecting device performance and stability. Summary of the Invention

[0004] This invention addresses the shortcomings of existing technologies by providing a Micro-LED device and its fabrication method that alleviates current crowding effects.

[0005] To achieve the above objectives, the technical solution of the present invention is as follows:

[0006] A Micro-LED device for mitigating current crowding effects comprises, from back to front, a substrate, a buffer layer, an n-GaN layer, a multiple quantum well layer, and a p-GaN layer, with a light-emitting mesa formed by etching the n-GaN layer from the front side. A current spreading layer is provided on the p-GaN layer, a p-electrode is provided on the current spreading layer, and an n-electrode is provided on the n-GaN layer. The front side of the p-GaN layer has several grooves below the current spreading layer, and the grooves are filled with a metallic conductive material with a visible light reflectance >80%.

[0007] Optionally, the bottom angle of the groove is 100° to 135°.

[0008] Optionally, the depth of the groove is 20% to 50% of the thickness of the p-GaN layer.

[0009] Optionally, a plurality of the grooves are evenly spaced below the current spreading layer, with a total area accounting for 5% to 15% of the area covered by the current spreading layer.

[0010] Optionally, the size of the groove (the diameter of the circumcircle of the projection onto the substrate surface) is 5–8 μm, and the interval is 10–15 μm.

[0011] Optionally, the area of ​​the p electrode is smaller than the area of ​​the current spreading layer, wherein a plurality of the grooves are provided around the periphery of the p electrode.

[0012] Optionally, the p-GaN layer forms an annular step along the edge of the light-emitting mesa, which is lower than the center, and the annular step is filled with the metallic conductive material.

[0013] Optionally, the conductive metallic material is aluminum, silver, or an alloy comprising the metal.

[0014] Optionally, the front side of the Micro-LED device is bonded to the driver chip, and the back side serves as the light-emitting surface.

[0015] A method for fabricating a Micro-LED device that alleviates the current crowding effect, comprising:

[0016] Step 1: Provide or form an epitaxial structure;

[0017] Step 2: Etch the p-GaN layer to form several grooves;

[0018] Step 3: Form a light-emitting mesa by etching the mesa down to the n-GaN layer;

[0019] Step 4: Fill the groove with conductive metal material;

[0020] Step 5: Deposit a current spreading layer on the p-GaN layer;

[0021] Step 6: Form p electrodes and n electrodes on the current spreading layer and n-GaN layer respectively using a metal vapor deposition process.

[0022] Optionally, in step 2, a ring groove is formed by synchronous etching on the outer edge of the groove; in step 3, the etched position of the mesa is located within the ring groove.

[0023] The beneficial effects of this invention are as follows:

[0024] By creating a reflective region in the p-GaN layer, the contact area of ​​the p-electrode is effectively increased, and the effective area for current diffusion is expanded. This alleviates the current congestion that may occur at the mesa etching point in the central reflective region, thereby significantly improving the uniform distribution of current throughout the device and enhancing its current diffusion capability. Simultaneously, the embedding of a highly thermally conductive metal enhances the overall thermal diffusion capability of the device, effectively reducing its heat generation. This significantly improves the device's stability and reliability, making it particularly suitable for high-performance electronic applications such as commercial display devices.

[0025] Other features and advantages of the invention will be set forth in the following description, and will be apparent in part from the description, or may be learned by practicing the invention. Attached Figure Description

[0026] Figure 1 This is a schematic diagram of the structure of a Micro-LED device for mitigating current crowding effects, as shown in the embodiment.

[0027] Figure 2 This is a schematic diagram of the epitaxial structure in the preparation method of the embodiment;

[0028] Figure 3 This is a schematic diagram of the etching of the inner reflective region in the preparation method of the embodiment;

[0029] Figure 4 This is a schematic diagram of the etching of the light-emitting mesa in the preparation method of the embodiment;

[0030] Figure 5 for Figure 4 A top view of a single light-emitting platform;

[0031] Figure 6 This is a schematic diagram of the inner reflective region filling in the preparation method of the embodiment;

[0032] Figure 7 This is a schematic diagram of the current-spreading layer deposition process in the preparation method of the embodiment;

[0033] Figure 8 This is a schematic diagram of electrode metal vapor deposition in the preparation method of the embodiment;

[0034] Figure 9 for Figure 8 A top view of the central luminous platform, showing the positional relationship of each layer;

[0035] Figure 10 This is a schematic diagram of the bonding between the Micro-LED device and the driver chip in the fabrication method of the embodiment;

[0036] Figure 11A simulation diagram of the quantum well current density of a Micro-LED device to alleviate current crowding effect (unit: A / cm²) as shown in the example. 2 );

[0037] Figure 12 A simulation diagram of the quantum well current density of a Micro-LED device (unit: A / cm²) for comparison. 2 ). Detailed Implementation

[0038] The present invention will be further explained below with reference to the accompanying drawings and specific embodiments. The accompanying drawings are merely illustrative to facilitate understanding of the invention, and their specific proportions can be adjusted according to design requirements. The vertical relationships of relative elements and the definitions of front / back in the graphics described herein should be understood by those skilled in the art to refer to the relative positions of the components; therefore, they can all be flipped to present the same component, and all of this should fall within the scope disclosed in this specification.

[0039] The Micro-LED device for mitigating current crowding effect in the embodiments, referenced Figure 1 The epitaxial structure, from back to front, includes a substrate 1, a u-GaN buffer layer 2, an n-GaN layer 3, a multiple quantum well layer 4, and a p-GaN layer 5, with a light-emitting mesa a formed by etching the n-GaN layer 3 from the front side. A current spreading layer 6 is provided on the p-GaN layer 5, a p-electrode 7 is provided on the current spreading layer 6, and an n-electrode 8 is provided on the n-GaN layer. The front side of the p-GaN layer 5 has several grooves 51 below the current spreading layer 6, filled with a conductive metal material 9 to form an inner reflective region. An annular step 52 is formed along the edge of the p-GaN layer 5 at a height lower than the center, and the annular step 52 is also filled with a conductive metal material 9. The conductive metal material is, for example, aluminum, silver, or their alloys, a highly reflective and conductive metal with a visible light reflectance >80%. An insulating layer 10 covers the device surface, with an opening 101 exposing the p-electrode 7 and an opening 102 exposing the n-electrode 8. The p-electrode 7 and n-electrode 8 are led out on the same side of the front side, and the back side is the light-emitting surface.

[0040] The following details the fabrication method of the Micro-LED device that alleviates the current crowding effect.

[0041] 1. Epitaxial wafer cleaning. Immerse the epitaxial wafer in a piranha solution (H2SO4:H2O2:H2O = 5:1:1) at 60℃ for 15-20 minutes, rinse with deionized water, then immerse in acetone solution and sonicate in a 100% power ultrasonic bath for 10-15 minutes. Rinse with deionized water and then purge with nitrogen for 2-3 minutes. The epitaxial structure of the wafer, from back to front, includes substrate 1, u-GaN buffer layer 2, n-GaN layer 3, multiple quantum well layer 4, and p-GaN layer 5, as follows. Figure 2 As shown in the figure. The thickness of the p-GaN layer 5 is approximately 300 nm.

[0042] 2. Etching of the inner reflective region. Using a plasma etching machine, grooves 51 and annular grooves 52' are etched on the front side of the p-GaN layer 5. The longitudinal section of grooves 51 and annular grooves 52' is an inverted trapezoid with a base angle α of 120°. Several grooves 51 are spaced apart in the center of a predetermined chip area, and the annular grooves 52' surround the periphery of the area where the grooves 51 are located. For example, the grooves 51 are circular grooves with a top diameter of 6.67 μm and a spacing of 13.3 μm. Specifically, the etching area is defined by patterned photoresist, and a 100 nm deep p-GaN layer is etched using an inductively coupled plasma etching machine, simultaneously forming the grooves 51 and annular grooves 52'. Subsequently, the unetched photoresist is removed by immersion in an acetone solution heated to 80°C. Figure 3 As shown in the figure, two chip areas are displayed.

[0043] 3. Etching of the light-emitting mesa. The etching area is defined using patterned photoresist. A plasma etching machine is used to etch from the front down, with the etching location at the center of the annular groove 52', reaching a depth to a portion of the n-GaN layer 3, forming the light-emitting mesa a. Subsequently, it is immersed in an acetone solution heated to 80°C to remove any remaining photoresist. The etching of the light-emitting mesa is as follows: Figure 4 As shown in the figure, two chip regions are displayed. A top view of the light-emitting mesa a of a single chip region is shown below. Figure 5 As shown, the annular groove 52'

[0044] After etching downwards from the center, an annular step 52 is formed in each light-emitting chip region, where the edge height of the p-GaN layer 5 is lower than that of the center.

[0045] 4. Inner layer reflective region filling. A conductive metal material 9 is deposited in the grooves 51 and annular steps 52 on the epitaxial wafer surface using semiconductor processes such as photolithography, electron beam thin film deposition, plasma removal of residual resist, and metal lift-off. For example, the conductive metal material 9 is Al, deposited using an electron beam thin film deposition system with a thickness of 100 nm, and its surface is flush with the p-GaN layer 5. Metallic Al has excellent conductivity and a visible light reflectivity >90%. A schematic diagram of the inner layer reflective region filling is shown below. Figure 6 As shown, for ease of explanation, Figure 6 The accompanying diagrams show a single chip area.

[0046] 5. Current spreading layer deposition. A current spreading layer 6 is deposited on the surface of the p-GaN layer 5 of the epitaxial wafer using semiconductor processes such as photolithography, physical vapor deposition (PVD), plasma resist removal, and lift-off. In this embodiment, a 120 nm indium tin oxide (ITO) layer is prepared as the current spreading layer 6 by physical vapor deposition (PVD) at a deposition rate of 2.5 A / s for 500 s. The current spreading layer deposition is as follows: Figure 7 As shown, it covers the area where the groove 51 is located, but does not cover the annular step 52.

[0047] In the coverage area of ​​the current spreading layer 6, the reflective area formed by the groove 51 occupies 8.73% of the area. Besides improving current spreading and heat dissipation capabilities, the aforementioned reflective area also reduces ITO light absorption through reflection, thereby improving light extraction efficiency. The metallic conductive material of the annular step 52 alleviates current congestion around the central groove filling area, further improving the uniformity of current distribution.

[0048] 6. Electrode Metal Evaporation. Metal electrode materials are deposited on the epitaxial wafer surface using semiconductor processes such as electron beam thin film deposition, plasma residue removal, and metal lift-off. The electron beam thin film deposition system is used to deposit titanium, aluminum, titanium, and gold, with thicknesses of 20 nm, 50 nm, 20 nm, and 100 nm, respectively, as electrodes. Subsequently, the epitaxial wafer with deposited metal is immersed in an acetone solution at 80°C for 30 minutes to complete metal lift-off and form the electrodes. Electrode fabrication is as follows... Figure 8 As shown, a p-electrode 7 is formed on the current spreading layer 6, and an n-electrode 8 is formed on the etched surface of the n-GaN layer 3. The p-electrode 7 is located in the central region of the current spreading layer 6 and partially covers the groove 51, while the remaining groove 51 surrounds the p-electrode 7, as shown in the diagram. Figure 9 As shown. Conventionally, n-electrode 8 is a ring electrode.

[0049] 7. Insulating Layer Preparation. The main material of the insulating layer is silicon dioxide. A 200 nm insulating layer 10 was deposited for 550 s using a plasma-enhanced chemical vapor deposition system at a deposition rate of 3.82 A / s. The insulating layer 10 was then etched using an inductively coupled plasma etching (ICP-C) machine to form openings 101 and 102, exposing the p-electrode 7 and n-electrode 8, respectively, to facilitate subsequent deposition of bonding metals. The resulting structure is shown below. Figure 1 As shown.

[0050] 8. Bonding Metal Deposition and Driver Chip Bonding. A bonding metal material, indium with a thickness of 20 nm, is deposited on the front side of the epitaxial wafer using semiconductor processes such as electron beam thin film deposition, plasma residue removal, and metal lift-off. The vacuum pressure of the electron beam thin film deposition system is 5 Pa, and the deposition rates are 1 A / s, 2 A / s, 1 A / s, and 5 A / s for depositing titanium, aluminum, titanium, and gold mixed thin films. Subsequently, the epitaxial wafer with deposited bonding metal is immersed in an acetone solution at 80°C for 30 minutes to complete metal lift-off, forming a bonding metal layer 11. The bonding metal layer 11 contacts the p-electrode 7 and n-electrode 8 through openings 101 and 102, and is bonded to the CMOS driver chip 12. Figure 10 As shown, back-side light emission is achieved.

[0051] The difference between the comparative Micro-LED device and the above embodiment is that the inner reflective region is not provided, that is, the front side of the p-GaN layer 5 on its light-emitting platform is not etched and filled with metal conductive material, otherwise it is the same as the embodiment.

[0052] refer to Figure 11 and Figure 12 Simulation diagrams of quantum well current density of the Micro-LED device with reduced current crowding effect in the above embodiments and the conventional Micro-LED device in comparison (unit: A / cm²). 2 As can be seen, the ratio of the maximum to minimum current density in the embodiment is much smaller than that in the comparative example. By increasing the inner reflective region and filling it with high reflectivity material, the current congestion at the mesa etching point in the central reflective region is alleviated, thereby significantly improving the uniform distribution of current throughout the device.

[0053] The above embodiments are only used to further illustrate a Micro-LED device and its preparation method for alleviating current crowding effect according to the present invention. However, the present invention is not limited to the embodiments. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present invention shall fall within the protection scope of the present invention.

Claims

1. A Micro-LED device for mitigating current crowding effects, characterized in that: The epitaxial structure, from back to front, sequentially includes a substrate, a buffer layer, an n-GaN layer, a multiple quantum well layer, and a p-GaN layer, with a light-emitting mesa formed by etching the front side down to the n-GaN layer. A current spreading layer is provided on the p-GaN layer, a p-electrode is provided on the current spreading layer, and an n-electrode is provided on the n-GaN layer. The front side of the p-GaN layer has several grooves below the current spreading layer, filled with a conductive metal material having a visible light reflectivity >80%. These grooves are evenly spaced below the current spreading layer, with a total area occupying 5% to 15% of the area covered by the current spreading layer. The area of ​​the p-electrode is smaller than the area of ​​the current spreading layer, and several grooves are provided around the periphery of the p-electrode. The p-GaN layer forms an annular step along the edge of the light-emitting mesa, lower than the center, and this annular step is filled with the conductive metal material. The current spreading layer covers the grooves but not the annular step.

2. The Micro-LED device for mitigating current congestion effect according to claim 1, characterized in that: The bottom angle of the groove is 100°~135°.

3. The Micro-LED device for mitigating current congestion effect according to claim 1, characterized in that: The depth of the groove is 20% to 50% of the thickness of the p-GaN layer.

4. The Micro-LED device for mitigating current congestion effect according to claim 1, characterized in that: The conductive metallic material is aluminum, silver, or an alloy containing the metal.

5. The Micro-LED device for mitigating current congestion effect according to claim 1, characterized in that: The front side of the Micro-LED device is bonded to the driver chip, while the back side serves as the light-emitting surface.

6. A method for fabricating a Micro-LED device for mitigating current congestion effects as described in any one of claims 1 to 5, characterized in that, include: Step 1: Provide or form an epitaxial structure; Step 2: Etch the p-GaN layer to form several grooves; Step 3: Form a light-emitting mesa by etching the mesa down to the n-GaN layer; Step 4: Fill the groove with conductive metal material; Step 5: Deposit a current spreading layer on the p-GaN layer; Step 6: Form p electrodes and n electrodes on the current spreading layer and n-GaN layer respectively using a metal vapor deposition process.

7. The method for fabricating a Micro-LED device to alleviate current congestion effect according to claim 6, characterized in that: In step 2, a ring groove is formed by synchronous etching on the outer edge of the groove; in step 3, the etched position of the mesa is located inside the ring groove.