A multi-interface scalable ASIC development board

Abstract

This invention discloses a multi-interface expandable ASIC development board, including a motherboard body. The motherboard body integrates a main control module, a power module, an interface expansion module, and a communication module. The main control module is electrically connected to the power module, the interface expansion module, and the communication module. The interface expansion module includes at least two different types of expansion interface groups, which are distributed in a matrix along the edge of the motherboard body. The power module includes a switchable wide-range voltage input interface and at least two independent power output terminals, each of which is electrically connected to a corresponding expansion interface group. This invention features a novel structural design. Through the matrix distribution design of multiple differentiated expansion interface groups, it achieves integrated configuration of GPIO, high-speed data interfaces, bus interfaces, and dedicated function interfaces, meeting the development needs of multiple scenarios and significantly improving expansion flexibility.

Description

Technical Field

[0001] This invention relates to the field of development board technology, specifically to a multi-interface scalable ASIC development board. Background Technology

[0002] In the field of ASIC (Application-Specific Integrated Circuit) development, development boards serve as the core debugging and verification platform. Their interface compatibility, expansion flexibility, and power supply stability directly impact development efficiency and scenario adaptability. Currently, ASIC development boards on the market generally suffer from limited interface types, with most integrating only basic GPIO or a single bus interface. This makes it difficult to simultaneously meet the development needs of multiple scenarios, such as high-speed data transmission (e.g., video signals, large-capacity data exchange), multi-device bus communication (e.g., I2C, SPI), and custom function expansion. Multiple adapter modules are required, resulting in a bulky development system and increased connection complexity.

[0003] In terms of power supply design, traditional development boards mostly adopt a fixed voltage input and unified power output mode, which cannot adapt to the different voltage requirements of different external devices (such as sensors, display modules, and communication modules). They also lack accurate current monitoring and overcurrent protection mechanisms, which can easily cause the entire system to lose power or hardware damage due to overload of a certain interface, resulting in insufficient safety and compatibility.

[0004] Furthermore, the interface layout of existing development boards is mostly distributed and randomly arranged, which can easily lead to wiring chaos and signal interference when multiple functional modules are connected. The communication modules are also limited in function, with some only supporting wired or single wireless communication methods, making it difficult to meet development needs such as remote debugging and multi-terminal data interaction, further restricting the flexibility and efficiency of ASIC development. Therefore, it is necessary to design a multi-interface scalable ASIC development board. Summary of the Invention

[0005] The purpose of this invention is to provide a multi-interface scalable ASIC development board to solve the problems mentioned in the background art.

[0006] To achieve the above objectives, the present invention provides the following technical solution: a multi-interface scalable ASIC development board, including a motherboard body; The motherboard integrates a main control module, a power module, an interface expansion module, and a communication module; the main control module is electrically connected to the power module, the interface expansion module, and the communication module respectively; the motherboard is provided with a debugging interface group, which includes a JTAG interface and an SWD interface; The interface expansion module includes at least two different types of expansion interface groups, and each expansion interface group is distributed in a matrix along the edge of the motherboard body. The power module includes a switchable wide-range voltage input interface and at least two independent power output terminals, each of which is electrically connected to an expansion interface group.

[0007] Preferably, the expansion interface group includes a first interface group, a second interface group, and a third interface group; the first interface group is a GPIO expansion interface group, including at least 8 GPIO pins, each GPIO pin being configured with reverse connection protection circuit; the second interface group is a high-speed data interface group, including a USB 3.0 interface, a Type-C interface, and an HDMI interface; the third interface group is a bus interface group, including an I2C interface, an SPI interface, and a UART interface.

[0008] Preferably, the motherboard body is provided with an interface switching switch, which is electrically connected to the first interface group, the second interface group and the main control module respectively, and is used to switch the communication path between the expansion interface group and the main control module; the interface switching switch is a double-pole double-throw switch, and its surface is covered with a protective cover to prevent accidental touch.

[0009] Preferably, the communication module includes a wireless communication unit and a wired communication unit; the wireless communication unit includes a Wi-Fi module, a Bluetooth module, and a LoRa module, which are connected to the main control module through a radio frequency isolation circuit; the wired communication unit includes a gigabit Ethernet interface.

[0010] Preferably, the motherboard body has expansion fixing holes at its four corners, and the expansion fixing holes are countersunk screw holes; the motherboard body has at least two positioning grooves on its edge, and the positioning grooves are adapted to the positioning protrusions of the external expansion board.

[0011] Preferably, the power module includes a voltage conversion circuit and a power management chip, and the power management chip is electrically connected to the main control module.

[0012] Preferably, the motherboard body is provided with a status indicator area, which includes a power indicator light, a communication status indicator light, and an interface working indicator light; the power indicator light is a red LED, the communication status indicator light is a blue LED, and the interface working indicator light is a green LED. Preferably, the main control module adopts an ARM architecture processor.

[0013] Preferably, a method of using a multi-interface scalable ASIC development board includes the following steps: Step A: According to the voltage specifications of the external power supply equipment, select the wide voltage input interface of the power module on the motherboard to connect to the adapter power supply, and determine the input voltage level through the switching function of the power module; at the same time, based on the power supply requirements of the external devices to be connected to each expansion interface group, configure the output voltage of the independent power supply output terminal corresponding to each expansion interface group through the power management chip to complete the power supply system initialization. Step B: Based on the functional type required by the development scenario, select at least one matching expansion interface group from the interface expansion module; physically connect the interface of the external functional module to the selected expansion interface group to ensure that the pins correspond and the contact is stable; Step C: Establish a connection between the main control module and the external control terminal through the communication module on the motherboard, input communication protocol parameters into the external control terminal to enable data interaction between the main control module and the external control terminal; at the same time, send instructions to the main control module through the external control terminal to configure the communication mode corresponding to each expansion interface group. Step D: Start the ASIC development board and external connection modules. The main control module collects the current data of each independent power supply output terminal in real time through the power management chip and transmits the current data to the external control terminal for display through the communication module. When the current of a certain independent power supply output terminal exceeds the preset threshold, the power management chip automatically cuts off the power supply to that circuit. At the same time, the main control module generates an overcurrent alarm signal and sends it to the external control terminal. After the fault is cleared, a recovery command is issued through the external control terminal, and the power management chip restores power to the corresponding expansion interface group to ensure the safe operation of the development board and external modules.

[0014] Beneficial effects This invention features a novel structural design that significantly enhances the practicality and security of the development board through differentiated design. Regarding interface expansion, it employs a matrix-distributed multi-type expansion interface group to achieve integrated configuration of multiple interfaces. This eliminates the need for additional adapter modules, allowing adaptation to various external devices such as sensors, display devices, and communication modules, meeting diverse development needs and greatly improving expansion flexibility.

[0015] In this invention, a wide voltage input is adapted to different power supply devices, and an independent power supply output terminal works with a power management chip to monitor the current of each interface in real time and realize overcurrent protection, avoiding single-channel overload from affecting the overall system. At the same time, it supports multiple voltage outputs, is compatible with the power supply needs of different external devices, and significantly improves power supply safety and compatibility.

[0016] The above description is merely an overview of the technical solutions of the embodiments of this application. In order to better understand the technical means of the embodiments of this application and to implement them in accordance with the contents of the specification, and to make the above and other objects, features and advantages of the embodiments of this application more apparent and understandable, specific implementation methods of this application are described below. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the structure of the present invention; Figure 2 This is a top view of the motherboard body of the present invention; Figure 3 This is a block diagram illustrating the control principle of the present invention; Figure 4 This is a flowchart of the workflow of the present invention. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0019] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used herein in the specification of the application is for the purpose of describing particular embodiments only and is not intended to limit the application; the terms “comprising” and “having”, and any variations thereof, in the specification, claims and drawings of this application are intended to cover non-exclusive inclusion.

[0020] The term "embodiment" as used herein means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of the phrase "embodiment" in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0021] Furthermore, the terms "first," "second," etc., in the specification and claims of this application or in the aforementioned drawings are used to distinguish different objects rather than to describe a specific order, and may explicitly or implicitly include one or more of the features.

[0022] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, "connection" or "joining" in mechanical structures can refer to a physical connection, such as a fixed connection, for example, a connection fixed by fasteners, such as a connection fixed by screws, bolts, or other fasteners; a physical connection can also be a detachable connection, such as a snap-fit ​​or interlocking connection; a physical connection can also be an integral connection, such as a connection formed by welding, bonding, or integral molding. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0023] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings.

[0024] Please see Figures 1-4 This invention discloses a multi-interface scalable ASIC development board, including a motherboard body 1; The motherboard body 1 integrates a main control module 2, a power module 3, an interface expansion module 4, and a communication module 5. The main control module 2 is electrically connected to the power module 3, the interface expansion module 4, and the communication module 5. The main control module 2 uses an ARM architecture processor with a maximum clock speed of 800MHz, 512KB L2 cache, and 256MB DDR3 memory. It supports multi-tasking and high-speed data processing, meeting the core requirements for interface control, data forwarding, and protocol parsing in ASIC development. The motherboard body 1 is equipped with a debug interface group, which includes a JTAG interface 6 and an SWD interface 7. The interface expansion module 4 includes at least two different types of expansion interface groups, and each expansion interface group is distributed in a matrix along the edge of the motherboard body. The power module 5 includes a switchable wide-range voltage input interface 8 and at least two independent power output terminals 9, each of which is electrically connected to an expansion interface group.

[0025] In this invention, the expansion interface group includes a first interface group 10, a second interface group 11, and a third interface group 12; the first interface group 10 is a GPIO expansion interface group, including at least 8 GPIO pins, each GPIO pin being configured with a reverse connection protection circuit; the second interface group 11 is a high-speed data interface group, including a USB 3.0 interface, a Type-C interface, and an HDMI interface; the third interface group 12 is a bus interface group, including an I2C interface, an SPI interface, and a UART interface.

[0026] In this invention, the motherboard body 1 is provided with an interface switching switch 13, which is electrically connected to the first interface group 10, the second interface group 11 and the main control module 2 respectively, and is used to switch the communication path between the expansion interface group and the main control module; the interface switching switch 13 is a double-pole double-throw switch, and its surface is covered with a protective cover to prevent accidental contact.

[0027] In this invention, the communication module 5 includes a wireless communication unit 14 and a wired communication unit 15; the wireless communication unit 14 includes a Wi-Fi module, a Bluetooth module and a LoRa module, which are connected to the main control module through a radio frequency isolation circuit; the wired communication unit 15 includes a gigabit Ethernet interface.

[0028] In this invention, the motherboard body 1 has expansion fixing holes 16 at its four corners, and the expansion fixing holes 16 are countersunk screw holes; the motherboard body 1 has at least two positioning grooves 17 on its edge, and the positioning grooves 17 are adapted to the positioning protrusions of the external expansion board; the motherboard body 1 has a status indicator area, which includes a power indicator light 20, a communication status indicator light 21, and an interface working indicator light 22; the power indicator light is a red LED, the communication status indicator light is a blue LED, and the interface working indicator light is a green LED.

[0029] In this invention, the power module 3 includes a voltage conversion circuit 18 and a power management chip 19, which is electrically connected to the main control module 2. The voltage conversion circuit consists of a DC-DC converter and a linear regulator, which can convert the input 9V-24V voltage into two basic voltages: 5V and 3.3V, for powering the high-speed interface and the low-voltage chip, respectively. The power management chip is a TI BQ24725, which can collect the current and voltage data of each independent power supply output terminal in real time and upload them to the main control module. When the current exceeds a preset threshold, the power supply to the corresponding output terminal is cut off within 100ms to achieve overcurrent protection.

[0030] Working principle: A method for using a multi-interface, scalable ASIC development board, including the following steps: Step A: According to the voltage specifications of the external power supply equipment, select the wide voltage input interface of the power module on the motherboard to connect to the adapter power supply, and determine the input voltage level through the switching function of the power module; at the same time, based on the power supply requirements of the external devices to be connected to each expansion interface group, configure the output voltage of the independent power supply output terminal corresponding to each expansion interface group through the power management chip to complete the power supply system initialization. Step B: Based on the functional type required by the development scenario, select at least one matching expansion interface group from the interface expansion module; physically connect the interface of the external functional module to the selected expansion interface group to ensure that the pins correspond and the contact is stable; Step C: Establish a connection between the main control module and the external control terminal through the communication module on the motherboard, input communication protocol parameters into the external control terminal to enable data interaction between the main control module and the external control terminal; at the same time, send instructions to the main control module through the external control terminal to configure the communication mode corresponding to each expansion interface group. Step D: Start the ASIC development board and external connection modules. The main control module collects the current data of each independent power supply output terminal in real time through the power management chip and transmits the current data to the external control terminal for display through the communication module. When the current of a certain independent power supply output terminal exceeds the preset threshold, the power management chip automatically cuts off the power supply to that circuit. At the same time, the main control module generates an overcurrent alarm signal and sends it to the external control terminal. After the fault is cleared, a recovery command is issued through the external control terminal, and the power management chip restores power to the corresponding expansion interface group to ensure the safe operation of the development board and external modules.

[0031] In summary, the multi-interface scalable ASIC development board of the present invention can achieve the following effects: Interface compatibility: It integrates GPIO, high-speed data interface and bus interface, and can connect to more than 10 kinds of external devices such as temperature and humidity sensors, HDMI monitors, and USB flash drives without the need for additional adapter modules, meeting the development needs of multiple scenarios; Power supply safety: Wide voltage input adapts to different power supply equipment; independent power supply + overcurrent protection mechanism can avoid single-circuit failure from affecting the overall system; verified by 100 overcurrent tests, the protection response time is ≤100ms, and there is no hardware damage. Communication flexibility: Supports four communication methods: Wi-Fi, Bluetooth, LoRa, and Ethernet. In an open environment of 1km, the communication success rate of the LoRa module is ≥98%; the transmission rate of Gigabit Ethernet is stable at over 900Mbps, meeting the needs of remote debugging and high-speed data interaction. Ease of operation: The matrix-style interface distribution avoids wiring confusion, the status indicator lights can intuitively judge the system's working status, and the external control terminal can complete parameter configuration and fault recovery with one click, reducing the complexity of development and operation.

[0032] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

Claims

1. A multi-interface scalable ASIC development board, characterized in that: Including the motherboard body (1); The motherboard body (1) integrates a main control module (2), a power module (3), an interface expansion module (4), and a communication module (5); the main control module (2) is electrically connected to the power module (3), the interface expansion module (4), and the communication module (5); the motherboard body (1) is provided with a debugging interface group, which includes a JTAG interface (6) and an SWD interface (7). The interface expansion module (4) includes at least two different types of expansion interface groups, and each expansion interface group is distributed in a matrix along the edge of the motherboard body; The power module (5) includes a switchable wide voltage input interface (8) and at least two independent power output terminals (9), which are electrically connected to the expansion interface group one by one.

2. The multi-interface scalable ASIC development board according to claim 1, characterized in that: The expansion interface group includes a first interface group (10), a second interface group (11), and a third interface group (12); the first interface group (10) is a GPIO expansion interface group, including at least 8 GPIO pins, each GPIO pin is configured with a reverse connection protection circuit; the second interface group (11) is a high-speed data interface group, including a USB 3.0 interface, a Type-C interface, and an HDMI interface; the third interface group (12) is a bus interface group, including an I2C interface, an SPI interface, and a UART interface.

3. The multi-interface scalable ASIC development board according to claim 1, characterized in that: The motherboard body (1) is provided with an interface switching switch (13). The interface switching switch (13) is electrically connected to the first interface group (10), the second interface group (11) and the main control module (2) respectively, and is used to switch the communication path between the expansion interface group and the main control module. The interface switching switch (13) is a double-pole double-throw switch, and its surface is covered with a protective cover to prevent accidental contact.

4. The multi-interface scalable ASIC development board according to claim 1, characterized in that: The communication module (5) includes a wireless communication unit (14) and a wired communication unit (15); the wireless communication unit (14) includes a Wi-Fi module, a Bluetooth module and a LoRa module, which are connected to the main control module through a radio frequency isolation circuit; the wired communication unit (15) includes a gigabit Ethernet interface.

5. The multi-interface scalable ASIC development board according to claim 1, characterized in that: The motherboard body (1) has expansion fixing holes (16) at its four corners. The expansion fixing holes (16) are countersunk screw holes. The motherboard body (1) has at least two positioning grooves (17) on its edge. The positioning grooves (17) are adapted to the positioning protrusions of the external expansion board.

6. The multi-interface scalable ASIC development board according to claim 1, characterized in that: The power module (3) includes a voltage conversion circuit (18) and a power management chip (19), which is electrically connected to the main control module (2).

7. The multi-interface scalable ASIC development board according to claim 1, characterized in that: The motherboard body (1) is provided with a status indicator area, which includes a power indicator (20), a communication status indicator (21) and an interface working indicator (22); the power indicator is a red LED, the communication status indicator is a blue LED, and the interface working indicator is a green LED.

8. The multi-interface scalable ASIC development board according to claim 1, characterized in that: The main control module (2) adopts an ARM architecture processor.

9. A method for using a multi-interface scalable ASIC development board as described in claim 1, characterized in that: Includes the following steps: Step A: According to the voltage specifications of the external power supply equipment, select the wide voltage input interface of the power module on the motherboard to connect to the adapter power supply, and determine the input voltage level through the switching function of the power module; at the same time, based on the power supply requirements of the external devices to be connected to each expansion interface group, configure the output voltage of the independent power supply output terminal corresponding to each expansion interface group through the power management chip to complete the power supply system initialization. Step B: Based on the functional type required by the development scenario, select at least one matching expansion interface group from the interface expansion module; physically connect the interface of the external functional module to the selected expansion interface group to ensure that the pins correspond and the contact is stable; Step C: Establish a connection between the main control module and the external control terminal through the communication module on the motherboard, input communication protocol parameters into the external control terminal to enable data interaction between the main control module and the external control terminal; at the same time, send instructions to the main control module through the external control terminal to configure the communication mode corresponding to each expansion interface group. Step D: Start the ASIC development board and external connection modules. The main control module collects the current data of each independent power supply output terminal in real time through the power management chip and transmits the current data to the external control terminal for display through the communication module. When the current of a certain independent power supply output terminal exceeds the preset threshold, the power management chip automatically cuts off the power supply to that circuit. At the same time, the main control module generates an overcurrent alarm signal and sends it to the external control terminal. After the fault is cleared, a recovery command is issued through the external control terminal, and the power management chip restores power to the corresponding expansion interface group to ensure the safe operation of the development board and external modules.

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