Single-resistance current sampling method, device, equipment and medium

Abstract

This application discloses a single-resistor current sampling method, apparatus, device, and medium. The method includes: acquiring a three-phase PWM waveform within the current carrier cycle; if the first sampling time or the second sampling time of the three-phase PWM waveform is less than a preset sampling time, shifting the high-level segment of the left waveform (located to the left of the center line of the current carrier cycle) to the left to obtain a first sub-three-phase PWM waveform, and shifting the high-level segment of the right waveform to the right to obtain a second sub-three-phase PWM waveform. The first and second sub-three-phase PWM waveforms are symmetrical. The first sampling time is the continuous time during which only one phase of the three-phase PWM signal is at a high level, and the second sampling time is the continuous time during which only one phase of the three-phase PWM signal is at a low level; and performing single-resistor current sampling on the motor based on the first and / or second sub-three-phase PWM waveforms. The solution provided by this application can avoid the generation of current harmonics and ensure the normal operation of the motor.

Description

Technical Field

[0001] This application belongs to the field of motor control technology, and in particular relates to a single-resistor current sampling method, device, equipment and medium. Background Technology

[0002] In the field of motor control, especially in high-performance AC motor vector control systems, accurate and real-time current sampling is crucial. Current sampling data is used in feedback control systems to precisely adjust the motor's voltage and frequency, thereby achieving precise control of the motor's speed, torque, and position. Among various current sampling methods, single-resistor current sampling has significant advantages in certain applications due to its low hardware cost and simple wiring.

[0003] The single-resistor current sampling method samples the motor phase current by setting a resistor at the DC bus. Since the sum of the three-phase currents of the motor is zero (ignoring leakage current), only one phase current needs to be sampled, and the other two phase currents are reconstructed through an algorithm. However, this method suffers from inaccurate current sampling in the non-observation region (the transition region between sectors and the low-speed region). The conventional method is to perform phase shifting operation on PWM (Pulse Width Modulation) in the non-observation region of single-resistor sampling.

[0004] However, phase shift can induce harmonics, which can interfere with the normal operation of the motor, causing noise and unnecessary vibration. This not only reduces the motor's operating efficiency but may also negatively impact its lifespan. Summary of the Invention

[0005] This application provides an implementation scheme that differs from related technologies, in order to solve the technical problem in related technologies where phase shift during single-resistor current sampling generates harmonics, thereby interfering with the normal operation of the motor.

[0006] In a first aspect, this application provides a single-resistor current sampling method, including:

[0007] Obtain the three-phase pulse width modulation (PWM) waveform within the current carrier cycle;

[0008] If the first sampling time or the second sampling time of the three-phase PWM waveform is less than the preset sampling time, the high-level segment of the left waveform located to the left of the center line of the current carrier cycle in the three-phase PWM waveform is shifted to the left to obtain the first sub-three-phase PWM waveform, and the high-level segment of the right waveform located to the right of the center line of the current carrier cycle in the three-phase PWM waveform is shifted to the right to obtain the second sub-three-phase PWM waveform. The first sub-three-phase PWM waveform and the second sub-three-phase PWM waveform are symmetrical about the center line of the current carrier cycle. The first sampling time is the continuous time during which only one phase of the three-phase PWM signal is at a high level, and the second sampling time is the continuous time during which only one phase of the three-phase PWM signal is at a low level.

[0009] The motor is sampled using a single resistor based on the first sub-three-phase PWM waveform and / or the second sub-three-phase PWM waveform.

[0010] Secondly, this application provides a single-resistor current sampling device, comprising:

[0011] The acquisition unit is used to acquire the three-phase pulse width modulation (PWM) waveform within the current carrier cycle;

[0012] A segmentation unit is used to, if the first sampling time or the second sampling time of the three-phase PWM waveform is less than a preset sampling time, shift the high-level segment of the left waveform located to the left of the center line of the current carrier cycle in the three-phase PWM waveform to the left to obtain a first sub-three-phase PWM waveform, and shift the high-level segment of the right waveform located to the right of the center line of the current carrier cycle in the three-phase PWM waveform to the right to obtain a second sub-three-phase PWM waveform. The first sub-three-phase PWM waveform and the second sub-three-phase PWM waveform are symmetrical about the center line of the current carrier cycle. The first sampling time is the continuous time during which only one phase of the three-phase PWM signal is at a high level, and the second sampling time is the continuous time during which only one phase of the three-phase PWM signal is at a low level.

[0013] The sampling unit is used to sample the motor current using a single resistor based on the first sub-three-phase PWM waveform and / or the second sub-three-phase PWM waveform.

[0014] Thirdly, this application provides an electronic device, comprising:

[0015] Processor; and

[0016] Memory for storing the executable instructions of the processor;

[0017] The processor is configured to execute the first aspect, or any method in any possible implementation of the first aspect, by executing the executable instructions.

[0018] Fourthly, embodiments of this application provide a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the first aspect, or any method in any possible implementation of the first aspect.

[0019] This application provides a method for obtaining a three-phase PWM waveform within the current carrier cycle. If the first or second sampling time of the three-phase PWM waveform is less than a preset sampling time, the high-level segment of the left waveform located to the left of the center line of the current carrier cycle is shifted to the left to obtain a first sub-three-phase PWM waveform. The high-level segment of the right waveform located to the right of the center line of the current carrier cycle is shifted to the right to obtain a second sub-three-phase PWM waveform. The first and second sub-three-phase PWM waveforms are symmetrical about the center line of the current carrier cycle. The first sampling time is the time when the three-phase PWM signal... Furthermore, there is only one continuous period when one phase is at a high level, and the second sampling time is the continuous period when only one phase of the three-phase PWM signal is at a low level. Based on the first sub-three-phase PWM waveform and / or the second sub-three-phase PWM waveform, the motor current is sampled using a single-resistance current sampling scheme. The three-phase PWM waveform within one carrier cycle is divided into two sub-waveforms symmetrical about the center line of the carrier cycle. The motor current is sampled based on the two sub-waveforms. According to the volt-second equivalence principle, the effective voltage before and after the division remains unchanged, and the current waveform can be smoothly transitioned in time, reducing harmonic components. This achieves the technical effect of avoiding current harmonics and ensuring the normal operation of the motor. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments or related technologies of this application, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. In the drawings:

[0021] Figure 1 This is a voltage space vector diagram for detecting DC bus current using a single resistor, provided in an embodiment of this application.

[0022] Figure 2 A schematic flowchart illustrating the single-resistor current sampling method provided in this application embodiment;

[0023] Figure 3 A schematic diagram illustrating the division of the three-phase PWM waveform within the current carrier cycle into a first sub-three-phase PWM waveform and a second sub-three-phase PWM waveform, provided for embodiments of this application;

[0024] Figure 4 A phase-shifting schematic diagram of a three-phase PWM waveform provided in an embodiment of this application;

[0025] Figure 5 A schematic diagram illustrating a scenario where the motor is sampled directly from a three-phase PWM waveform using a single resistor, as provided in this application embodiment.

[0026] Figure 6 Another flowchart illustrating the single-resistor current sampling method provided in this application embodiment;

[0027] Figure 7 This is a schematic diagram of the structure of the single-resistor current sampling device provided in the embodiments of this application;

[0028] Figure 8 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0029] The embodiments of this application are described in detail below, with examples of these embodiments illustrated in the accompanying drawings. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain this application, and should not be construed as limiting this application.

[0030] The terms "first" and "second," etc., used in the specification, claims, and drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the solution can be implemented in a different order than that illustrated or described in this application. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0031] First, some terms used in the embodiments of this application will be explained below to facilitate understanding by those skilled in the art.

[0032] PWM signal: A PWM signal is a special type of signal widely used in various aspects of electronics. PWM is a method of controlling or simulating signals by changing the width (duty cycle) of a pulse signal. In a PWM signal, each pulse consists of a high level and a low level, and the ratio of the pulse width (i.e., the duration of the high level) to the entire cycle is called the duty cycle. By adjusting the duty cycle, PWM signals can achieve approximate or precise control of analog signals. In motor control, PWM signals are used to control the motor's voltage and frequency, thereby achieving precise control of the motor's speed, torque, and position.

[0033] Phase shift: refers to shifting the trigger time of the PWM signal forward or backward by a certain distance in time.

[0034] Low modulation ratio: The modulation ratio typically refers to the ratio between the modulating signal and the carrier signal in PWM or similar techniques. A low modulation ratio means that the amplitude of the modulating signal is relatively small relative to the amplitude of the carrier signal.

[0035] An ADC (Analogue to Digital Converter) is an electronic device that converts analog signals into digital signals. In motor control systems, ADCs are commonly used to sample current. An ADC requires a specific time window to complete the sampling process, which is usually related to the period of the PWM signal. However, at low modulation ratios, the amplitude of the effective vector may be too small, potentially hindering direct sampling by the ADC. Specifically, if the duty cycle of the PWM signal is too small, the ADC may not be able to find a suitable time window for sampling within the PWM signal's period, or the sampling result may be affected by the edge effects of the PWM signal, leading to inaccurate sampling.

[0036] The single-resistor current sampling method suffers from inaccurate current sampling in non-observation regions (transition regions during sector transitions and low-voltage modulation regions). Please refer to... Figure 1 , Figure 1 The voltage space vector diagram for detecting DC bus current with a single resistor provided in the embodiments of this application is as follows: Figure 1 As shown, Figure 1 The gray area represents the transition zone between the low-voltage modulation region and the sector transition zone. The DC bus current cannot be accurately detected in this transition zone. A conventional method involves phase-shifting the PWM waveform in the non-observation region of single-resistor sampling to create a sampling window for ADC sampling. This ensures the minimum non-zero fundamental vector operating time, thereby achieving accurate detection of the DC bus current.

[0037] However, because the shifting phase distorts the originally symmetrical waveform, it introduces large current harmonics, which in turn causes vibration and noise, interfering with the normal operation of the motor.

[0038] To address this technical problem, this application provides a single-resistor current sampling method, apparatus, device, and medium, which solves the technical problem in related technologies where phase shift during single-resistor current sampling generates harmonics, thereby interfering with the normal operation of the motor.

[0039] The technical solution of this application and how it solves the above-mentioned technical problems will be described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of this application will be described below with reference to the accompanying drawings.

[0040] Figure 2 A flowchart illustrating a single-resistor current sampling method provided for an exemplary embodiment of this application is shown. The method includes at least the following steps:

[0041] S11. Obtain the three-phase PWM waveform within the current carrier cycle;

[0042] In some embodiments, the motor controller can generate a three-phase PWM waveform for driving the motor based on a preset motor control algorithm and parameters through an internal timer module or a dedicated PWM generation module.

[0043] The three-phase PWM waveform consists of three independent PWM waveforms, each corresponding to one phase of the motor (usually the U phase, V phase, and W phase).

[0044] S12. If the first sampling time or the second sampling time of the three-phase PWM waveform is less than the preset sampling time, the high-level segment of the left waveform located to the left of the center line of the current carrier cycle in the three-phase PWM waveform is shifted to the left to obtain the first sub-three-phase PWM waveform. The high-level segment of the right waveform located to the right of the center line of the current carrier cycle in the three-phase PWM waveform is shifted to the right to obtain the second sub-three-phase PWM waveform. The first sub-three-phase PWM waveform and the second sub-three-phase PWM waveform are symmetrical about the center line of the current carrier cycle. The first sampling time is the continuous time during which only one phase of the three-phase PWM signal is at a high level, and the second sampling time is the continuous time during which only one phase of the three-phase PWM signal is at a low level.

[0045] Three-phase PWM waveforms are periodic waveforms with a period equal to the carrier cycle. When using single-resistor current sampling to control the motor, it is necessary to detect the current in each PWM cycle to obtain the current information of each phase of the motor during operation, thereby monitoring the motor's operating status in real time and performing precise control of the motor as needed.

[0046] Specifically, for the three-phase PWM waveform within the current carrier cycle, it is first determined whether the three-phase PWM waveform meets the preset sampling requirements. If the three-phase PWM waveform does not meet the preset sampling requirements, the high-level segment of the left waveform located to the left of the center line of the current carrier cycle is shifted to the left to obtain the first sub-three-phase PWM waveform. The high-level segment of the right waveform located to the right of the center line of the current carrier cycle is shifted to the right to obtain the second sub-three-phase PWM waveform. The first sub-three-phase PWM waveform and the second sub-three-phase PWM waveform are made symmetrical about the center line of the current carrier cycle.

[0047] In some embodiments, the preset sampling requirement can be that the first sampling time and the second sampling time of the three-phase PWM waveform are both greater than or equal to the preset sampling time. The first sampling time is the continuous time during which only one phase of the three-phase PWM waveform is at a high level, and the second sampling time is the continuous time during which only one phase of the three-phase PWM signal is at a low level. Therefore, if the first sampling time or the second sampling time of the three-phase PWM waveform is less than the preset sampling time, the high-level segment of the left waveform located to the left of the center line of the current carrier cycle in the three-phase PWM waveform is shifted to the left to obtain the first sub-three-phase PWM waveform, and the high-level segment of the right waveform located to the right of the center line of the current carrier cycle in the three-phase PWM waveform is shifted to the right to obtain the second sub-three-phase PWM waveform. The obtained first sub-three-phase PWM waveform and the second sub-three-phase PWM waveform are symmetrical about the center line of the current carrier cycle.

[0048] In some embodiments, the preset sampling time can be the minimum sampling time Tmin, which can be expressed as the following calculation formula:

[0049] Tmin = Dead time + MOSFET switching oscillation time + Analog-to-digital conversion time;

[0050] Dead time refers to the time set to prevent short circuits in switching devices (such as IGBTs or MOSFETs) during switching, during which both switching devices are in the off state; MOSFET switching oscillation time is the time required for a switching device to switch from one state to another; analog-to-digital conversion time refers to the total time required for the microprocessor sampling module to convert analog quantities into digital quantities from sampling.

[0051] Please see Figure 3 , Figure 3 This is a schematic diagram illustrating how the three-phase PWM waveform within the current carrier cycle is divided into a first sub-three-phase PWM waveform and a second sub-three-phase PWM waveform, as provided in this embodiment of the application. T1 is the continuous time during which only one phase of the three-phase PWM waveform is at a high level, i.e., the first sampling time. T2 is the continuous time during which only one phase of the three-phase PWM signal is at a low level, i.e., the second sampling time. When it is determined that at least one of T1 and T2 is less than a preset sampling time, the high-level segment of the left waveform located to the left of the center line of the current carrier cycle in the three-phase PWM waveform is shifted to the left to obtain the first sub-three-phase PWM waveform. The high-level segment of the right waveform located to the right of the center line of the current carrier cycle in the three-phase PWM waveform is shifted to the right to obtain the second sub-three-phase PWM waveform. The obtained first sub-three-phase PWM waveform and the second sub-three-phase PWM waveform are symmetrical about the center line of the current carrier cycle.

[0052] S13. Perform single-resistor current sampling on the motor based on the first sub-three-phase PWM waveform and / or the second sub-three-phase PWM waveform.

[0053] Specifically, the motor can be sampled using a single resistor based on the first and / or second sub-three-phase PWM waveforms obtained after dividing the three-phase PWM waveform. According to the volt-second equivalent principle, the effective voltage remains unchanged. Furthermore, the first and second sub-three-phase PWM waveforms are symmetrical about the center line of the current carrier cycle, so no harmonic currents are generated, and therefore no noise is generated, which can achieve stable control of the motor.

[0054] In some embodiments, S13, performing single-resistance current sampling on the motor based on the first sub-three-phase PWM waveform and / or the second sub-three-phase PWM waveform, may include the following S131-S132:

[0055] S131. Perform a first preset phase shifting process on the first sub-three-phase PWM waveform to obtain the phase-shifted first sub-three-phase PWM waveform. Perform a second preset phase shifting process on the second sub-three-phase PWM waveform to obtain the phase-shifted second sub-three-phase PWM waveform. The phase-shifted first sub-three-phase PWM waveform and the phase-shifted second sub-three-phase PWM waveform are symmetrical about the center line axis of the current carrier cycle.

[0056] S132. The motor is sampled by single resistance current based on the first sub-three-phase PWM waveform after phase shifting and / or the second sub-three-phase PWM waveform after phase shifting.

[0057] To optimize the sampling process and ensure accurate and effective sampling of the motor's three-phase current within the current carrier cycle, while avoiding sampling conflicts and errors, phase-shifting processing is required for the first and / or second sub-three-phase PWM waveforms within the current carrier cycle. This ensures that the effective duration of the non-zero vectors in both waveforms is sufficiently long to meet the minimum sampling time requirement. This guarantees the capture of the effective current value during sampling, thereby improving the accuracy and reliability of the sampling.

[0058] Furthermore, in this embodiment, the first sub-three-phase PWM waveform and the second sub-three-phase PWM waveform after phase shifting are symmetrical about the center line of the current carrier cycle. According to the volt-second equivalence principle, the average voltage in the current carrier cycle before and after phase shifting remains unchanged, and no current harmonics are generated.

[0059] In some embodiments, in S131, the first sub-three-phase PWM waveform is subjected to a first preset phase shifting process, which includes: shifting the smallest phase in the first sub-three-phase PWM waveform to the right and shifting the largest phase in the first sub-three-phase PWM waveform to the left.

[0060] In some embodiments, in S131, the second sub-three-phase PWM waveform is subjected to a second preset phase shifting process, which includes: shifting the minimum phase in the second sub-three-phase PWM waveform to the left and shifting the maximum phase in the second sub-three-phase PWM waveform to the right, wherein the three phases are arranged in descending order of the pulse width of the PWM waveform as the maximum phase, the middle phase and the minimum phase.

[0061] When performing phase shifting processing on the first and second sub-three-phase PWM waveforms, the intermediate phase remains unchanged.

[0062] Please see Figure 4 , Figure 4 This is a phase-shifting diagram of a three-phase PWM waveform provided in an embodiment of this application.

[0063] The waveform corresponding to the dashed line is the phase-shifted waveform. By shifting the phase of the first sub-three-phase PWM waveform and the second sub-three-phase PWM waveform, the effective vector action time of the first sub-three-phase PWM waveform can be increased to be greater than the preset sampling time, so that the motor current can be measured using the single-resistor current sampling method.

[0064] In some embodiments, S132, sampling the motor current using a single resistor based on the first sub-three-phase PWM waveform after phase shifting, may include the following S1321-S1322:

[0065] S1321. Determine the sampling trigger point corresponding to the current carrier cycle based on the rising time of the number of high-level states of the first sub-three-phase PWM waveform after phase shifting, where the number of high-level states is the number of phases that are simultaneously in a high-level state among the three phases.

[0066] Specifically, when the number of high-level states increases from a lower value (such as 0, 1, or 2) to a higher value (such as 1, 2, or 3), this rise moment is identified and recorded. This moment is the rise moment of the high-level state count, which marks the increase of high-level states in the first sub-three-phase PWM waveform. The sampling trigger point corresponding to the current cycle is determined based on the rise moment of the high-level state count of the first sub-three-phase PWM waveform after phase shifting.

[0067] S1322. Perform single-resistance current sampling on the motor at the sampling trigger point.

[0068] Specifically, at the sampling trigger point, the motor current is sampled by a single-resistor current sampling circuit. Furthermore, according to Kirchhoff's law (the sum of the three-phase currents is 0), the three-phase current can be reconstructed from the current values ​​obtained from the two samplings.

[0069] In some embodiments, determining the sampling trigger point corresponding to the current carrier period based on the rise time of the high-level state number of the first sub-three-phase PWM waveform after phase shifting includes:

[0070] The rising edge of the largest phase and the rising edge of the middle phase in the first sub-three-phase PWM waveform after phase shifting are used as the sampling trigger points corresponding to the current carrier cycle.

[0071] For details, please continue reading. Figure 4 The time corresponding to the carrier count value t1 is the rising edge of the largest phase in the first sub-three-phase PWM waveform after phase shifting, and the time corresponding to the carrier count value t2 is the rising edge of the middle phase in the first sub-three-phase PWM waveform. The time corresponding to the carrier count value t1 is taken as the first sampling trigger point in the current carrier cycle, and the time corresponding to the carrier count value t2 is taken as the second sampling trigger point in the current carrier cycle.

[0072] In some embodiments, S132, sampling the motor current based on the second sub-three-phase PWM waveform after phase shifting, may include the following S1323-S1324:

[0073] S1323. Determine the sampling trigger point corresponding to the current carrier period based on the time when the number of high-level states of the second sub-three-phase PWM waveform after phase shifting decreases.

[0074] Specifically, when the number of high-level states decreases from a higher value (such as 1, 2 or 3) to a lower value (such as 0, 1 or 2), this drop moment is identified and recorded. This moment is the drop moment of the number of high-level states, which marks the reduction of high-level states in the second sub-three-phase PWM waveform. The sampling trigger point corresponding to the current carrier cycle is determined based on the drop moment of the number of high-level states in the second sub-three-phase PWM waveform after phase shifting.

[0075] S1324. Perform single-resistance current sampling on the motor at the sampling trigger point.

[0076] In some embodiments, in S1323, determining the sampling trigger point corresponding to the current carrier period based on the time when the number of high-level states of the second sub-three-phase PWM waveform after phase shifting is decreasing includes:

[0077] The falling edge of the smallest phase and the falling edge of the middle phase in the second sub-three-phase PWM waveform after phase shifting are used as the sampling trigger points corresponding to the current carrier cycle.

[0078] For details, please continue reading. Figure 4 The time corresponding to the carrier count value t3 is the falling edge of the smallest phase in the second sub-three-phase PWM waveform after phase shifting, and the time corresponding to the carrier count value t4 is the falling edge of the middle phase in the second sub-three-phase PWM waveform after phase shifting. The time corresponding to the carrier count value t3 is taken as the first sampling trigger point in the current carrier cycle, and the time corresponding to the carrier count value t4 is taken as the second sampling trigger point in the current cycle.

[0079] In some embodiments, in S132, the single-resistor current sampling of the motor based on the phase-shifted first sub-three-phase PWM waveform and the phase-shifted second sub-three-phase PWM waveform may include the following S1325-S1326:

[0080] S1325. Determine the sampling trigger point corresponding to the current carrier cycle based on the rising time of the high-level state number of the first sub-three-phase PWM waveform after phase shifting and the falling time of the high-level state of the second sub-three-phase PWM waveform after phase shifting, wherein the high-level state number is the number of phases that are simultaneously in a high-level state among the three phases.

[0081] Specifically, when the number of high-level states of the first sub-three-phase PWM waveform after phase shifting increases from a lower value (e.g., 0, 1, or 2) to a higher value (e.g., 1, 2, or 3), this rising moment is identified and recorded. This moment is the rising moment of the number of high-level states of the first sub-three-phase PWM waveform after phase shifting, marking the increase of high-level states in the first sub-three-phase PWM waveform after phase shifting. When the number of high-level states of the second sub-three-phase PWM waveform after phase shifting decreases from a higher value (e.g., 1, 2, or 3) to a lower value (e.g., 0, 1, or 2), this falling moment is identified and recorded. This moment is the falling moment of the number of high-level states of the second sub-three-phase PWM waveform after phase shifting, marking the decrease of high-level states in the second sub-three-phase PWM waveform after phase shifting. The sampling trigger point corresponding to the current carrier cycle is determined based on the rising moment of the number of high-level states of the first sub-three-phase PWM waveform after phase shifting and the falling moment of the number of high-level states of the second sub-three-phase PWM waveform after phase shifting.

[0082] In some embodiments, in S1325, determining the sampling trigger point corresponding to the current carrier period based on the rising time of the high-level state number of the first sub-three-phase PWM waveform after phase shifting and the falling time of the high-level state of the second sub-three-phase PWM waveform after phase shifting includes:

[0083] The rising edge of the largest phase and the rising edge of the middle phase in the first sub-three-phase PWM waveform after phase shifting, and the falling edge of the smallest phase and the falling edge of the middle phase in the second sub-three-phase PWM waveform after phase shifting, are used as the sampling trigger points corresponding to the current carrier period.

[0084] For details, please continue reading. Figure 4 The four times corresponding to the carrier count values ​​t1, t2, t3, and t4 can be used as the four sampling trigger points within the current carrier cycle.

[0085] S1326. Perform single-resistance current sampling on the motor at the sampling trigger point.

[0086] Specifically, the first current sample value of the motor can be obtained by taking the time corresponding to the carrier count value t1 and the carrier count value t2 as two sampling trigger points, and the second current sample value of the motor can be obtained by taking the time corresponding to the carrier count value t3 and the carrier count value t4 as two other sampling trigger points. The target current sample value of the motor in the current carrier cycle can be determined based on the first current sample value and the second current sample value. For example, the average value of the first current sample value and the second current sample value can be taken as the target current sample value of the motor in the current carrier cycle.

[0087] In this embodiment, current sampling is performed once in each of the two half-cycles of the current carrier cycle, and the target current sampling value corresponding to the current carrier cycle is determined based on the results of the two samplings, which can improve the sampling accuracy.

[0088] In some embodiments, if both the first sampling time and the second sampling time are not less than a preset sampling time, the method further includes:

[0089] The motor current is sampled directly from the three-phase PWM waveform using a single resistor.

[0090] For details, please refer to Figure 5 , Figure 5 This is a schematic diagram illustrating a scenario where a single-resistance current is sampled from a motor directly based on a three-phase PWM waveform, as provided in this application embodiment. If both the first sampling time T3 and the second sampling time T4 are not less than a preset sampling time, meaning the acquired three-phase PWM waveform meets the sampling requirements, then the motor can be sampled directly at the rising edge of the largest phase (the time corresponding to carrier count t5) and the rising edge of the middle phase (the time corresponding to carrier count t6), or at the falling edge of the smallest phase (the time corresponding to carrier count t7) and the falling edge of the middle phase (the time corresponding to carrier count t8).

[0091] Please see Figure 6 To enable those skilled in the art to better understand the present invention, Figure 6 This is another schematic flowchart of a single-resistor current sampling method provided in an embodiment of this application. The single-resistor current sampling method may include the following steps:

[0092] S61. Determine whether the effective vector action time of the three-phase PWM waveform meets the sampling requirements. If yes, execute S62; otherwise, execute S63.

[0093] S62. Directly sample the motor current using a single resistor based on the three-phase PWM waveform;

[0094] S63. Using the center line of the current carrier cycle as the axis of symmetry, shift the high-level segments of the left and right waveforms of the three-phase PWM waveforms to the left and right by the same distance, respectively, to obtain the first sub-three-phase PWM waveform located on the left side of the axis of symmetry and the second sub-three-phase PWM waveform located on the right side of the axis of symmetry.

[0095] S64. Shift the smallest phase in the first sub-three-phase PWM waveform to the right, shift the largest phase in the first sub-three-phase PWM waveform to the left, shift the smallest phase in the second sub-three-phase PWM waveform to the left, and shift the largest phase in the second sub-three-phase PWM waveform to the right.

[0096] S65. Collect the motor current at the rising edge of the largest phase and the rising edge of the middle phase in the first sub-three-phase PWM waveform after phase shifting, and at the falling edge of the smallest phase and the falling edge of the middle phase in the second sub-three-phase PWM waveform after phase shifting.

[0097] This application provides a method for obtaining a three-phase pulse width modulation (PWM) waveform within the current carrier cycle. If the first or second sampling time of the three-phase PWM waveform is less than a preset sampling time, the high-level segment of the left waveform (located to the left of the center line of the current carrier cycle) is shifted to the left to obtain a first sub-three-phase PWM waveform. The high-level segment of the right waveform (located to the right of the center line of the current carrier cycle) is shifted to the right to obtain a second sub-three-phase PWM waveform. The first and second sub-three-phase PWM waveforms are symmetrical about the center line of the current carrier cycle. The first sampling time is the time when only one of the three phase PWM waveforms is within the current carrier cycle. The sampling time consists of a continuous period during which one phase is high and a continuous period during which only one of the three-phase PWM signals is low. A scheme for single-resistance current sampling of the motor is implemented based on the first and / or second sub-three-phase PWM waveforms. This divides the three-phase PWM waveform within a carrier cycle into two symmetrical sub-waveforms symmetrical about the center line of the carrier cycle. Motor current sampling is then performed based on these two sub-waveforms. According to the volt-second equivalence principle, the effective voltage remains unchanged before and after the division, ensuring a smooth transition of the current waveform in time and reducing harmonic components. This achieves the technical effect of avoiding current harmonics and ensuring normal motor operation.

[0098] Figure 7 A schematic diagram of the structure of a single-resistor current sampling device provided for an exemplary embodiment of this application;

[0099] The device includes:

[0100] Acquisition unit 71 is used to acquire the three-phase pulse width modulation (PWM) waveform within the current carrier cycle;

[0101] The partitioning unit 72 is used to shift the high-level segment of the left waveform located to the left of the center line of the current carrier cycle in the three-phase PWM waveform to the left to obtain the first sub-three-phase PWM waveform if the first sampling time or the second sampling time of the three-phase PWM waveform is less than the preset sampling time. The high-level segment of the right waveform located to the right of the center line of the current carrier cycle in the three-phase PWM waveform is shifted to the right to obtain the second sub-three-phase PWM waveform. The first sub-three-phase PWM waveform and the second sub-three-phase PWM waveform are symmetrical about the center line of the current carrier cycle. The first sampling time is the continuous time during which only one phase of the three-phase PWM signal is at a high level, and the second sampling time is the continuous time during which only one phase of the three-phase PWM signal is at a low level.

[0102] The sampling unit 73 is used to sample the motor current using a single resistor based on the first sub-three-phase PWM waveform and / or the second sub-three-phase PWM waveform.

[0103] In some embodiments, when the sampling unit 73 is used to sample the motor's single-resistance current based on the first sub-three-phase PWM waveform and / or the second sub-three-phase PWM waveform, it is specifically used for:

[0104] The first sub-three-phase PWM waveform is subjected to a first preset phase shifting process to obtain the phase-shifted first sub-three-phase PWM waveform;

[0105] The second sub-three-phase PWM waveform is subjected to a second preset phase shifting process to obtain the phase-shifted second sub-three-phase PWM waveform. The phase-shifted first sub-three-phase PWM waveform and the phase-shifted second sub-three-phase PWM waveform are symmetrical about the center line axis of the current carrier cycle.

[0106] The motor is sampled using a single resistor based on the first sub-three-phase PWM waveform after phase shifting and / or the second sub-three-phase PWM waveform after phase shifting.

[0107] In some embodiments, when the sampling unit 73 performs a first preset phase shifting process on the first sub-three-phase PWM waveform, it is specifically used to: shift the smallest phase in the first sub-three-phase PWM waveform to the right and shift the largest phase in the first sub-three-phase PWM waveform to the left.

[0108] When sampling unit 73 performs a second preset phase shift processing on the second sub-three-phase PWM waveform, it is specifically used for:

[0109] The minimum phase in the second sub-three-phase PWM waveform is shifted to the left, and the maximum phase in the second sub-three-phase PWM waveform is shifted to the right. The three phases are arranged in descending order of the pulse width of the PWM waveform as the maximum phase, the middle phase, and the minimum phase.

[0110] In some embodiments, when the sampling unit 73 is used to sample the single-resistance current of the motor based on the first sub-three-phase PWM waveform after phase shifting, it is specifically used for:

[0111] The sampling trigger point corresponding to the current carrier cycle is determined based on the rise time of the high-level state number of the first sub-three-phase PWM waveform after phase shifting. The high-level state number is the number of phases that are simultaneously in a high-level state.

[0112] The motor current is sampled at the sampling trigger point using a single resistor.

[0113] In some embodiments, when the sampling unit 73 is used to determine the sampling trigger point corresponding to the current carrier period based on the rising time of the high-level state number of the first sub-three-phase PWM waveform after phase shifting, it is specifically used for:

[0114] The rising edge of the largest phase and the rising edge of the middle phase in the first sub-three-phase PWM waveform after phase shifting are used as the sampling trigger points corresponding to the current carrier cycle.

[0115] In some embodiments, when the sampling unit 73 is used to sample the motor's single-resistance current based on the phase-shifted first sub-three-phase PWM waveform and the phase-shifted second sub-three-phase PWM waveform, it is specifically used for:

[0116] The sampling trigger point corresponding to the current carrier cycle is determined based on the rising time of the high-level state number of the first sub-three-phase PWM waveform after phase shifting and the falling time of the high-level state of the second sub-three-phase PWM waveform after phase shifting. The high-level state number is the number of phases that are simultaneously in a high-level state.

[0117] The motor current is sampled at the sampling trigger point using a single resistor.

[0118] In some embodiments, when the sampling unit 73 determines the sampling trigger point corresponding to the current carrier period based on the rising time of the high-level state number of the first sub-three-phase PWM waveform after phase shifting and the falling time of the high-level state of the second sub-three-phase PWM waveform after phase shifting, it is specifically used for:

[0119] The rising edge of the largest phase and the rising edge of the middle phase in the first sub-three-phase PWM waveform after phase shifting, and the falling edge of the smallest phase and the falling edge of the middle phase in the second sub-three-phase PWM waveform after phase shifting, are used as the sampling trigger points corresponding to the current carrier period.

[0120] In some embodiments, if both the first sampling time and the second sampling time are not less than a preset sampling time, the apparatus is further configured to:

[0121] The motor current is sampled directly from the three-phase PWM waveform using a single resistor.

[0122] It should be understood that the device embodiments and method embodiments can correspond to each other, and similar descriptions can be referred to the method embodiments. To avoid repetition, they will not be repeated here. Specifically, the device can execute the above method embodiments, and the foregoing and other operations and / or functions of each module in the device correspond to the corresponding processes in the various methods in the above method embodiments, which will not be repeated here for the sake of brevity.

[0123] The apparatus of this application embodiment has been described above from the perspective of functional modules in conjunction with the accompanying drawings. It should be understood that this functional module can be implemented in hardware, in software instructions, or in a combination of hardware and software modules. Specifically, the steps of the method embodiments in this application can be completed by integrated logic circuits in the processor's hardware and / or by software instructions. The steps of the method disclosed in this application embodiment can be directly embodied as being executed by a hardware decoding processor, or by a combination of hardware and software modules in the decoding processor. Optionally, the software module can reside in a mature storage medium in the art, such as random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, etc. This storage medium is located in memory, and the processor reads information from the memory and, in conjunction with its hardware, completes the steps in the above method embodiments.

[0124] Figure 8 This is a schematic block diagram of an electronic device provided in an embodiment of this application. The electronic device may include:

[0125] The system includes a memory 801 and a processor 802. The memory 801 stores computer programs and transfers the program code to the processor 802. In other words, the processor 802 can retrieve and run the computer programs from the memory 801 to implement the methods described in the embodiments of this application.

[0126] For example, the processor 802 can be used to execute the above-described method embodiments according to instructions in the computer program.

[0127] In some embodiments of this application, the processor 802 may include, but is not limited to:

[0128] General-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc.

[0129] In some embodiments of this application, the memory 801 includes, but is not limited to:

[0130] Volatile memory and / or non-volatile memory. Non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. Volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as Static RAM (SRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDR SDRAM), Enhanced Synchronous DRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), and Direct Rambus RAM (DR RAM).

[0131] In some embodiments of this application, the computer program may be divided into one or more modules, which are stored in the memory 801 and executed by the processor 802 to perform the method provided in this application. The one or more modules may be a series of computer program instruction segments capable of performing a specific function, which describe the execution process of the computer program in the electronic device.

[0132] like Figure 8 As shown, the electronic device may also include:

[0133] Transceiver 803, which may be connected to processor 802 or memory 801.

[0134] The processor 802 can control the transceiver 803 to communicate with other devices; specifically, it can send information or data to other devices or receive information or data sent by other devices. The transceiver 803 may include a transmitter and a receiver. The transceiver 803 may further include antennas, and the number of antennas may be one or more.

[0135] It should be understood that the various components in the electronic device are connected through a bus system, which includes a data bus, a power bus, a control bus, and a status signal bus.

[0136] This application also provides a computer storage medium storing a computer program thereon, which, when executed by a computer, enables the computer to perform the methods of the above-described method embodiments. Alternatively, embodiments of this application also provide a computer program product containing instructions that, when executed by a computer, cause the computer to perform the methods of the above-described method embodiments.

[0137] When implemented using software, it can be implemented entirely or partially as a computer program product. This computer program product includes one or more computer instructions. When these computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., digital video disc (DVD)), or a semiconductor medium (e.g., solid-state disk (SSD)).

[0138] Those skilled in the art will recognize that the modules and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0139] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of modules is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple modules or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or modules may be electrical, mechanical, or other forms.

[0140] The modules described as separate components may or may not be physically separate. The components shown as modules may or may not be physical modules; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. For example, the functional modules in the various embodiments of this application may be integrated into one processing module, or each module may exist physically separately, or two or more modules may be integrated into one module.

[0141] In this application embodiment, the terms "module" or "unit" refer to a computer program or part of a computer program that has a predetermined function and works with other related parts to achieve a predetermined goal, and can be implemented wholly or partially using software, hardware (such as processing circuitry or memory), or a combination thereof. Similarly, a processor (or multiple processors or memory) can be used to implement one or more modules or units. Furthermore, each module or unit can be part of an overall module or unit that includes the functionality of that module or unit.

[0142] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A single-resistor current sampling method, characterized in that, include: Obtain the three-phase pulse width modulation (PWM) waveform within the current carrier cycle; If the first sampling time or the second sampling time of the three-phase PWM waveform is less than the preset sampling time, the high-level segment of the left waveform located to the left of the center line of the current carrier cycle in the three-phase PWM waveform is shifted to the left to obtain the first sub-three-phase PWM waveform, and the high-level segment of the right waveform located to the right of the center line of the current carrier cycle in the three-phase PWM waveform is shifted to the right to obtain the second sub-three-phase PWM waveform. The first sub-three-phase PWM waveform and the second sub-three-phase PWM waveform are symmetrical about the center line of the current carrier cycle. The first sampling time is the continuous time during which only one phase of the three-phase PWM signal is at a high level, and the second sampling time is the continuous time during which only one phase of the three-phase PWM signal is at a low level. The motor is sampled using a single resistor based on the first sub-three-phase PWM waveform and / or the second sub-three-phase PWM waveform.

2. The method according to claim 1, characterized in that, Based on the first sub-three-phase PWM waveform and / or the second sub-three-phase PWM waveform, the motor is sampled using a single resistor current, including: The first sub-three-phase PWM waveform is subjected to a first preset phase shifting process to obtain the phase-shifted first sub-three-phase PWM waveform; The second sub-three-phase PWM waveform is subjected to a second preset phase shifting process to obtain the phase-shifted second sub-three-phase PWM waveform. The phase-shifted first sub-three-phase PWM waveform and the phase-shifted second sub-three-phase PWM waveform are symmetrical about the center line axis of the current carrier period. The motor is sampled using a single resistor current based on the first sub-three-phase PWM waveform after phase shifting and / or the second sub-three-phase PWM waveform after phase shifting.

3. The method according to claim 2, characterized in that, Performing a first preset phase shifting process on the first sub-three-phase PWM waveform includes: shifting the smallest phase in the first sub-three-phase PWM waveform to the right and shifting the largest phase in the first sub-three-phase PWM waveform to the left. The second sub-three-phase PWM waveform is subjected to a second preset phase shift processing, including: The minimum phase in the second sub-three-phase PWM waveform is shifted to the left, and the maximum phase in the second sub-three-phase PWM waveform is shifted to the right. The three phases are arranged in descending order of the pulse width of the PWM waveform as the maximum phase, the middle phase, and the minimum phase.

4. The method according to claim 3, characterized in that, The step of sampling the motor's single-resistance current based on the first sub-three-phase PWM waveform after phase shifting includes: The sampling trigger point corresponding to the current carrier cycle is determined based on the rise time of the high-level state number of the first sub-three-phase PWM waveform after phase shifting, wherein the high-level state number is the number of phases that are simultaneously in a high-level state among the three phases. The motor is sampled using a single resistance current at the sampling trigger point.

5. The method according to claim 4, characterized in that, The sampling trigger point corresponding to the current carrier period is determined based on the rise time of the high-level state number of the first sub-three-phase PWM waveform after phase shifting, including: The rising edge of the largest phase and the rising edge of the middle phase in the first sub-three-phase PWM waveform after phase shifting are used as the sampling trigger points corresponding to the current carrier period.

6. The method according to claim 3, characterized in that, Based on the phase-shifted first sub-three-phase PWM waveform and the phase-shifted second sub-three-phase PWM waveform, the motor is sampled using a single resistance current, including: The sampling trigger point corresponding to the current carrier cycle is determined based on the rising time of the high-level state count of the first sub-three-phase PWM waveform after phase shifting and the falling time of the high-level state of the second sub-three-phase PWM waveform after phase shifting, wherein the high-level state count is the number of phases that are simultaneously in a high-level state among the three phases. The motor is sampled using a single resistance current at the sampling trigger point.

7. The method according to claim 6, characterized in that, The sampling trigger point corresponding to the current carrier period is determined based on the rising time of the high-level state number of the first sub-three-phase PWM waveform after phase shifting and the falling time of the high-level state of the second sub-three-phase PWM waveform after phase shifting, including: The rising edge time of the largest phase and the rising edge time of the middle phase in the first sub-three-phase PWM waveform after phase shifting, and the falling edge time of the smallest phase and the falling edge time of the middle phase in the second sub-three-phase PWM waveform after phase shifting, are used as the sampling trigger points corresponding to the current carrier period.

8. The method according to claim 1, characterized in that, If both the first sampling time and the second sampling time are not less than the preset sampling time, the method further includes: The motor is sampled using a single resistor based on the three-phase PWM waveform.

9. A single-resistor current sampling device, characterized in that, include: The acquisition unit is used to acquire the three-phase pulse width modulation (PWM) waveform within the current carrier cycle; A segmentation unit is used to, if the first sampling time or the second sampling time of the three-phase PWM waveform is less than a preset sampling time, shift the high-level segment of the left waveform located to the left of the center line of the current carrier cycle in the three-phase PWM waveform to the left to obtain a first sub-three-phase PWM waveform, and shift the high-level segment of the right waveform located to the right of the center line of the current carrier cycle in the three-phase PWM waveform to the right to obtain a second sub-three-phase PWM waveform. The first sub-three-phase PWM waveform and the second sub-three-phase PWM waveform are symmetrical about the center line of the current carrier cycle. The first sampling time is the continuous time during which only one phase of the three-phase PWM signal is at a high level, and the second sampling time is the continuous time during which only one phase of the three-phase PWM signal is at a low level. The sampling unit is used to sample the motor current using a single resistor based on the first sub-three-phase PWM waveform and / or the second sub-three-phase PWM waveform.

10. An electronic device, characterized in that, include: processor; as well as Memory for storing the executable instructions of the processor; The processor is configured to execute the method of any one of claims 1-8 by executing the executable instructions.

11. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the method described in any one of claims 1-8.

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