Method and system for power limited very low frequency communication

Abstract

Embodiments described herein relate to a VLF data communication system and method that allows a VLF transmitter or receiver to operate underground and be powered by a co-located power source for a long period of time. Data to be transmitted is encapsulated in a single data packet for transmission, minimizing the on time of the transmitter and receiver. One or more receivers process the data packet to synchronize with the transmitter symbol timing clock and then demodulate the encapsulated data. Timing information can also be used by the receiver to control external devices. The method used can be implemented on a low power microcontroller unit (MCU) to further reduce power consumption.

Description

Technical Field

[0001] This invention relates to the field of very low frequency (VLF) communication systems. Background Technology

[0002] There is a need to control and monitor underground installations, where wireless communication links are used to transmit data to or from the surface to control or monitor the buried installations. In some applications, the underground installations may operate in locations where the power source is a non-replaceable energy storage device. These operations include, for example, monitoring sealed nuclear waste repositories and controlling underground pipelines and mining equipment. In these applications, once installed, the communication links may need to remain operational for a defined period, such as up to 10 years.

[0003] The following U.S. patents may be referenced in connection with this:

[0004] ●5504785, April 1996, Becker et al.

[0005] ●15 / 827,297, Roper et al.

[0006] ●10,277,335 B2, Roper et al.

[0007] ●11,118912 B2, Roper et al.

[0008] ●US2023 / 0058901, February 2023, Balls et al.

[0009] ●US2023 / 007043, March 2023, D. Ryan (Ryan, D)

[0010] Other relevant references may include:

[0011] ● Mueller et al., “Timing Recovery in Digital Synchronous Receivers,” IEEE Transactions on Communications, Vol. 24, No. 5, May 1976

[0012] ●F. Gardner, “ABPSK / QPSK Timing-Error Detector for Sampled Receivers”, IEEE Transactions on Communications, Vol. 4, No. 5, May 1986

[0013] ● F. Harris, “Multirate Digital Filters used for Timing Recovery in Digital Receivers,” Conference Record of the Thirty-Fourth Asilomar Conference on Signals, Systems and Computers (Catalogue No. 00CH37154), October 2000, DOI: 10.1109 / ACSSC.2000.910953

[0014] ● Song, X et al., “Fully Digital Asynchronous Symbol Timing Recovery in Digital Receiver,” Proceedings of the 3rd International Conference on Computational Electromagnetism and Its Applications, ICCEA 2004. rd International Conference on Computational Electromagnetics and its Applications), November 2004, DOI: 10.1109 / ICCEA.2004.1459356.

[0015] ● Yang et al., “Extension to Gardner Timing Error Detector for QPSK Signals”, 2010 International Conference on Wireless Communications and Signal Processing, October 2010, DOI: 10.1109 / WCSP.2010.5633556.

[0016] All of the above patents and references are incorporated herein by reference. Summary of the Invention

[0017] In order to penetrate any substantial covering of rock, concrete, or other conductive materials, wireless communication links must operate at very low frequency (VLF), typically in the frequency range of 3 to 9 kHz, where data transmission occurs via magnetic induction.

[0018] In the applications described above, data transmission may not be extremely frequent, and therefore, it is possible to reduce the power consumption of underground wireless devices by placing the VLF transmitter or receiver in a low-power standby state between messages. The amount of data transmitted can also be small, for example, the output from sensor outputs or control messages may be limited to 2 bytes. However, the energy required to transmit a message depends not only on the amount of data but also on the required overhead, and especially on the time it takes for the receiver to synchronize with the transmitted signal, making demodulation possible with minimal error probability. Synchronization of the receiver and transmitter clocks also allows control signals from different receivers to be output at known times. Generally speaking, synchronization in high-frequency wireless systems is achieved by estimating the timing error in the receiver clock and using said error to adjust the sampling clock frequency or phase through a feedback loop. The low-pass feedback process can take 20 to 80 symbols to converge. This is typically more symbols than the number of symbols required to transmit data in the types of applications described above, and therefore the synchronization process has a major impact on the amount of energy required for operation over a period of many years. Therefore, there is a need for VLF data communication systems and methods that minimize the energy required to send or receive messages at locations where the power source is a non-replaceable energy storage device, and especially enable the receiver to synchronize with the transmitter in a much shorter time than required by the feedback loop.

[0019] The energy E that needs to be stored in the power supply of a VLF transmitter or receiver for long-term monitoring or control of underground devices is approximately as follows:

[0020] Equation 1

[0021] Where P on For an active embedded transmitter or receiver, Ton is the power consumption, and N is the time the device is active. m This represents the total number of messages to be transmitted during the system's lifetime. When not transmitting messages, these devices can be placed in standby mode, where power consumption can be reduced by, for example, 5 to 7 orders of magnitude. Since Nm is determined by operational requirements, the energy requirement E is determined by power consumption and T. on Determined. Therefore, T needs to be made... on It should be as small as possible, ideally no longer than the time required to transmit bytes containing sensor data or control messages.

[0022] The dipole moment (DM) that determines the magnitude of the magnetic field generated by the loop antenna is derived as follows:

[0023] Equation 2

[0024] Where N is the number of turns in the loop, A is its area, and Ia is the root-mean-square (rms) antenna current. In practice, the loop area A can be limited by the location of the transmitter antenna; in core storage, for example, in some cases, the loop diameter may not exceed 1m. In small spaces, loops with N>1 can be deployed, but N cannot be arbitrarily large; for a given transmitter voltage, the current in the loop and therefore the dipole moment generated by the transmitter are also related to... Proportional functional loop reactance.

[0025] For a given VLF communication link, the dipole moment is determined by the minimum field strength B required at the receiver. rx and attenuation through the Earth A tte As determined by Equation 3.

[0026] Equation 3

[0027] Assuming the transmitter is implemented using a power-efficient switching topology (e.g., Class D), then the primary source of power loss Pl is attributed to the current I flowing through the antenna resistance. a And it is given as follows:

[0028] Equation 4

[0029] Where R is the resistance of a single loop of the antenna. Combining equations [3] and [4], it can be seen that the transmitter current is related to the minimum field strength B of the receiver. rx Proportional.

[0030] Equation 5

[0031] For a given application, A tte The depth of the embedded device defines the potential, and there are limitations on the values ​​of N and A. To minimize the energy storage requirements of the embedded transmitter, the receiver sensitivity B can be optimized. rx The smaller the value, the better. For this reason, coherent demodulation methods that synchronize the receiver with the transmitter to reduce the probability of a given data error are generally preferred.

[0032] Line loop antennas can also be used at the receiver to convert a modulated magnetic field into an electromotive force (EMF) according to Faraday's law. The antenna output is proportional to the number of turns in the coil. The receiver coil can use a ferrite core to increase the flux through the coil, and because each turn contributes to the EMF, N can be made larger. Therefore, the receiver antenna can be designed with sufficient conversion gain so that, in the absence of a signal from the transmitter, the EMF generated from the background ambient noise exceeds the internally generated receiver noise.

[0033] For embedded receivers, power consumption is determined by the complexity of signal processing required to demodulate the transmitted signal. Therefore, the signal processing algorithm should be implementable in a very low power microcontroller unit (MCU). According to equation [1], the power requirement is proportional to the on-time of the embedded receiver. However, since detection is required before demodulation and then synchronization with the transmitter is needed, the on-time can be significantly longer than the message duration.

[0034] Optimal demodulation of transmitted symbols requires the receiver to be synchronized with the transmitted data and to minimize the probability of data errors. For VLF data links where messages are discrete and extremely short, high-order modulation methods that might require the receiver to synchronize with the frequency and phase of the transmitted carrier are not necessary. Instead, simple modulation methods such as phase-shift keying (PSK) or frequency-shift keying (FSK) can be used, where the receiver is synchronized with the transmitted symbols. Gardner similarly teaches a timing error detector (TED) and synchronization method for these digital receivers, where the TED provides an error signal to a phase-locked loop (PLL) used to control a voltage-controlled oscillator (VCO), serving as the receiver symbol clock. For stability, the loop time constant must be much smaller than the symbol duration, and synchronization is then achieved when the PLL converges after transmitting a long preamble containing 20 or more symbols. For communication systems that operate continuously or transmit long discrete messages, this overhead is not very significant. For VLF data links where messages are discrete and extremely short, the overhead might require a much larger battery or similar energy storage device.

[0035] Enhancements to this approach include the use of a numerically controlled oscillator (NCO) that can be incorporated into a digital processor, and sampling the signal before filtering, in which case the sampling clock phase can be adjusted instead of the VCO. Other known synchronization methods have been developed for extremely high data rates, where parallel processing may be required, and provide the ability to use polyphase filtering of the sampling clock instead of the VCO to track and adapt to variable symbol rates. Generally, these methods are suitable for complex wireless transmissions at higher frequencies, where synchronization is required to optimize performance in the presence of inter-symbol interference (ISI) and Gaussian noise, and where long training sequences need to be transmitted before the demodulator SNR is optimized.

[0036] Therefore, a VLF communication system and method are needed that minimizes the energy requirements of the embedded transmitter by minimizing the impact of external noise on the receiver and achieving rapid synchronization, thereby minimizing the on-time and thus power consumption of both the transmitter and receiver. The method can be adapted for implementation on low-power processors, such as microcontroller units (MCUs), to further minimize power consumption. Attached Figure Description

[0037] The embodiments will now be described by way of example only with reference to the accompanying drawings, in which:

[0038] Figure 1 The block diagram illustrates an example of an energy-saving VLF data system according to an embodiment of the present disclosure.

[0039] Figure 2 The flowchart illustrates an example of a method for processing signals input from a receiver in order to perform symbol synchronization and demodulation.

[0040] Figure 3 The spectrum diagram shows the broadband and power line harmonic noise output from the VLF receiver antenna.

[0041] Figure 4 The block diagram illustrates an example of a VLF transmitter according to an embodiment of the present disclosure.

[0042] Figure 5 The block diagram illustrates an example of a VLF receiver according to an embodiment of the present disclosure.

[0043] Figure 6 The method for transmitting and receiving data according to the energy-saving VLF data system is illustrated in flowchart form.

[0044] Figure 7A The diagram illustrates an example of the time response of the Georgetzel filter output according to an energy-efficient VLF data system.

[0045] Figure 7B The diagram shows the frequency response of the Gosser filter configured according to the energy-saving VLF data system.

[0046] Figure 8 The flowchart illustrates a method for obtaining the optimal timing for demodulating the FSK signal based on the energy-saving VLF data system.

[0047] Figure 9A The construction of a data packet according to an embodiment of the present disclosure is illustrated in the exemplary diagram.

[0048] Figure 9B The exemplary diagram illustrates a protective space inserted between consecutive data packets according to an embodiment of the present disclosure.

[0049] Figure 10 The block diagram illustrates an example of an energy-efficient VLF data system for transmitting sensor data from nuclear waste storage locations to the Earth's surface.

[0050] Figure 11 The block diagram illustrates an example of an energy-efficient VLF data system for transmitting control messages from the surface to a sealed underground location.

[0051] Figure 12An example of timing error generated by two separate receivers according to an embodiment of this disclosure is shown in an oscilloscope diagram.

[0052] It should be noted that the same features are identified by the same reference numerals throughout the accompanying drawings. Detailed Implementation

[0053] The embodiments described herein provide energy-efficient VLF data systems for use in applications where the transmitter or receiver is sealed underground with a shared power supply. Such environments include nuclear waste storage facilities, mines, and buried pipelines.

[0054] Figure 1 An example of an energy-efficient VLF data system 100 is shown in the block diagram. The energy-efficient VLF data system 100 includes a VLF transmitter 101, a VLF magnetic field receiver 102, and a processor 103. The VLF transmitter 101 is configured to create data packets from an external input and modulate a VLF magnetic field with the contents of the packets, such that the magnetic field propagates through the Earth toward the receiver. In some embodiments, the magnetic field may propagate through half-space, or the transmitter may also be installed underground, so that the magnetic field propagates completely through the Earth. The receiver 102 is configured to convert the incident magnetic field modulated by the data packets into a digitally sampled data sequence input to the signal processor 103. The processor 103 is configured to detect, synchronize, and demodulate the data in individual data packets.

[0055] In some embodiments, the transmitter 101 may receive data from an external sensor, and the processor 103 may output the demodulated data to a monitoring or storage device, such as a computer. In another embodiment, the transmitter 101 may receive data from an external control device (e.g., a computer), and the processor 103 may output control messages to the external device to change its state at a specific time. The VLF transmitter, receiver, and processor are described in more detail below.

[0056] Figure 2 The flowchart illustrates an example of a method 200 for processing a signal input from a receiver. Method 200 includes sampling an analog signal from a VLF receiver 102 at a rate much higher than the transmitted symbol rate and related to the data transmission rate harmonics. Next, the sampled data is repeatedly filtered at the transmitted modulation frequency by first filtering the data blocks and then repeating the filtering operation by incrementing the sample frequency 202.

[0057] The start of the transmitted data packet is detected by evaluating the filter output. Next, the timing of the received symbols is estimated. This timing estimate is then used to demodulate the remaining data packets (205) and can also be used to generate the control signal output from the receiver (206). The steps described in method 200 are described in more detail below.

[0058] In one embodiment, the transmitter 101 of the energy-efficient VLF data system 100 can be buried underground with a shared power supply, for example, to monitor sensors in nuclear waste storage facilities. According to Equation 5, the minimum magnetic field signal that can be demodulated by the processor 103 is a key factor in determining the dipole moment and therefore the power consumption of the transmitter 101. Figure 3 The spectrum 300 shows the ambient noise output from a VLF receiver connected to the receiver antenna, displaying an exemplary VLF frequency range 301 extending from 4.4 kHz to 5.4 kHz on the horizontal axis. The vertical axis 302 shows the signal amplitude in dBV. The spectrum 300 shows the presence of harmonics 303 at a 60 Hz AC distribution frequency, which are 15 to 20 dB higher than the broadband component of interharmonic noise 304 and have a generally uniform average amplitude over the displayed frequency range 301.

[0059] US 10,277,335 B2 teaches that noise levels in a receiver can be significantly reduced by using inter-harmonic, multi-carrier modulation methods, in which data is modulated onto multiple subcarriers, each located between power line harmonics. However, demodulation of multi-carrier and phase-sensitive modulation is computationally intensive and therefore generally results in higher receiver power consumption than single-carrier modulation methods. In one embodiment, in an energy-efficient VLF data system 100, a single-carrier, m-ary FSK can be used to modulate the magnetic field. In processor 103, m-ary FSK modulation can be effectively filtered out from harmonic noise by implementing narrowband filters centered at each FSK frequency using Gosser filters. FSK modulation also has the advantage that demodulation is unaffected by any amplitude distortion of the signal, meaning that the circuitry in transmitter 101 and receiver 102 does not need to have a large linear range, which reduces power consumption in these circuits. However, other modulation and filtering techniques, such as those based on higher-order modulation (e.g., QPSK), can be used, but these would require more linear receiver electronics and more complex signal processing for timing recovery and demodulation.

[0060] In one embodiment, the receiver of the energy-efficient VLF data system 100 can be sealed underground with a shared power supply, for example, to control the status of corrosion control devices in buried pipelines. By using only two FSK carriers to modulate the data, the computational load on the processor 103 can be further minimized, allowing the processor to be implemented on a low-power MCU.

[0061] Figure 4 An exemplary block diagram 400 of a VLF transmitter 401 is shown. However, Figure 4 The transmitters described are provided for illustrative purposes only, and other transmitters may be used in conjunction with embodiments of this disclosure. VLF transmitter 401 includes a power supply 402, a microcontroller unit (MCU) 403, a half-bridge 404, and a driver 405.

[0062] When operating underground in a sealed location, the power supply may be an external DC power supply 406 in the form of a low-leakage, high-capacity battery or other long-term power source. Power supply 402 converts the voltage from the external power source into a stable and regulated power supply for the MCU 403, driver 405, and half-bridge 404. When active, the MCU 403 may request data from one or more external devices 407, such as monitoring devices for temperature, pressure, humidity, and strain gauge sensors, or control devices for example, a computer. The MCU 403 formats this data into a single message for transmission and then generates a pulse width modulation (PWM) control signal 408 that synthesizes an AC output current at a desired m-ary FSK frequency, wherein the duration of each FSK symbol can be matched to the bandwidth of a filter (e.g., a Gosser filter) used in processor 102. The FSK frequency, message format, symbol duration, and other parameters are stored along with the MCU program code in a non-volatile, non-transitory memory, such as flash memory 409.

[0063] A PWM control signal 408 is fed to a driver 405, each of which controls the switching of a half-bridge 404. Each half-bridge 404 is configured to have fast output rise and fall times and to switch at high frequencies, thereby minimizing power consumption in each half-bridge.

[0064] The output from each half-bridge 404 is connected to a transmission loop antenna 410, the impedance of which is defined by the loop inductance (represented by inductor 411) and the antenna cable resistance (represented by resistor 412), which is the primary source of power consumed by transmitter 401.

[0065] When a message has been transmitted, the MCU 403 can shut down the output from power supply 402 to all other circuitry and then enter a low-power standby state, in which only one clock and one internal timer 413 remain active internally. Timer 413 can be set to the desired interval between transmissions; for a system operating autonomously over many years, this interval could be, for example, 12 hours or 24 hours. When this time is reached, timer 413 generates an interrupt, which sets the MCU 403 back to active, allowing the next message to be sent.

[0066] In one embodiment, the transmitter 401 may be sealed within a waterproof and dustproof housing suitable for housing electronic equipment in outdoor environments; for monitoring nuclear waste, the housing may also provide protection against ionizing radiation. In another embodiment, the antenna 410 may be sealed within the same housing as the electronic circuitry. Other housing options are possible.

[0067] Figure 5A VLF receiver 501 is shown in exemplary block diagram 500. The VLF receiver includes a triaxial antenna 502, a three-way switch 504 for selecting one of three orthogonal antennas, an amplifier 507 that may include one or more active gain stages, and a microcontroller unit (MCU) 512. The triaxial antenna has three differential outputs connected to the input of switch 504. For clarity, only a single connection is shown.

[0068] Surge arresters 503 in each antenna output protect switch 504 from excessive input voltage.

[0069] Switch 504 selects one of the outputs from the 3-axis antenna 502 at a time, the output being controlled by an antenna selection signal 505 output from the MCU 512.

[0070] A high-pass filter 506 precedes amplifier 507, which suppresses the 50 or 60 Hz AC power fundamental frequency and other low-frequency power line harmonics, which may be 60 dB higher than the low-frequency power line harmonics at the receiver's operating frequency (which may be between 3 kHz and 9 kHz). A low-pass anti-aliasing filter 508 follows amplifier 507, which outputs the received signal to an analog-to-digital converter (ADC) 509. Switch 504, amplifier 507, and filters 506 and 508 may be implemented as differential circuits, as shown, to attenuate common-mode noise picked up by the receiver. Filters 506 and 508 may be combined into a single bandpass filter and may be implemented as active filters in one or more of the gain stages of amplifier 507.

[0071] ADC 509 samples the analog input signal and converts it into a digital value at a rate determined by sampling clock 510. Low-pass filter 508 attenuates the output from amplifier 506 by at least 40 dB at the frequency of sampling clock 510, which must be at least twice the maximum signal frequency according to the Nyquist criterion, and may be more than ten times the highest signal frequency and related to the harmonics of the transmitted symbol rate to facilitate processing 103. Processing 103 involving synchronization and demodulation can be implemented by a programmable arithmetic core and memory located in MCU 512. MCU may also have ADC 509 in parallel. Output 513 from MCU 512 may include demodulated data, or control messages or signals derived from the data. Output 513 may be sent to an external computer or used to control one or more external devices 514.

[0072] Receiver 501 can be powered from an external source 515, such as a battery. External power is input to receiver power supply 516, which provides a low-noise output to supply the receiver's analog components. This power supply can be disconnected by a power-off control signal 517 from MCU 512 to prevent the receiver from consuming power while in standby mode.

[0073] In one embodiment, when the direction of the transmitting antenna is known and both the transmitter and receiver are in fixed positions, the triaxial antenna 502 and the switch 503 may be replaced by a single receiving antenna oriented to receive the maximum magnetic field from the transmitter.

[0074] Figure 6 A method 600 for transmitting and receiving data according to an energy-saving VLF data system is illustrated in flowchart form. Method 600 includes assembling a data packet 601 containing the data to be transmitted and a short preamble, wherein the symbol duration is the reciprocal of the AC power line frequency, which may be 50 or 60 Hz. Next, the process may include modulating a magnetic field 602 using this data packet with, for example, binary FSK modulation. After amplification and sampling 603 by receiver 501, the start of the FSK-modulated data packet is then detected 604, for example by means of a sliding Gosser filter configured for the FSK frequency and implemented in processor 103.

[0075] Next, the process involves synchronizing the processor symbol clock with the transmitter symbol clock based on the Gosser filter's response to the message preamble 605. This timing information is then used to coherently demodulate the remainder of the message 606.

[0076] After demodulating the transmitted message, a control message or signal can be output to an external device at a fixed time after the start of data packet transmission 607.

[0077] In method 600, the Gossel filter output is calculated iteratively based on a sample block of the incoming signal. The sampling rate must be greater than twice the maximum input frequency to satisfy the Nyquist criterion and simplify the calculation; this sampling rate is related to the symbol rate harmonics. In interharmonic modulation, both the filter bandwidth and the symbol transmission rate are half the interval between power line harmonics; that is, in an environment with 50Hz AC power distribution, the filter bandwidth is then 25Hz, and the FSK tones are centered between 50Hz harmonics at intervals of M × 50Hz. To obtain high discrimination between FSK tones, M is preferably greater than 5.

[0078] The receiver can be synchronized with the transmitter at a resolution no better than + / -1 samples, thus a high sampling rate is preferred. For example, sampling at 100 kHz provides a receiver timing error of at least + / -10 microseconds relative to the transmitter clock. The maximum frequency that can be used for magnetic induction is 9 kHz. For a 50 Hz environment, a sampling frequency of 100 kHz also avoids the need for an extremely sharp anti-aliasing filter and is related to symbol rate harmonics. In a 60 Hz environment, the sampling rate can be increased to 120 kHz to be related to symbol rate harmonics. Then, for a 50 Hz AC environment, the Gossel filter output is obtained using the following calculations:

[0079] Equation 6

[0080] The number of samples N in the block is given below:

[0081] Equation 7

[0082] In a 60Hz environment, the symbol rate is 30 Hz, and at a sampling rate of 120kHz, there are 40,000 samples in each block.

[0083] To calculate the frequency F fsk The filter output of a given FSK signal can be obtained using five constants without complex arithmetic. These constants can be pre-calculated as follows:

[0084] Equation 8

[0085] Equation 9

[0086] Equation 10

[0087] Equation 11

[0088] Equation 12

[0089] This can be achieved by using the current sample value V S The values ​​of three variables are calculated to perform sample block processing:

[0090] Equation 13

[0091] Where Q1 = the value of Q of the previous sample.

[0092] Q2 = The Q value of the two earlier samples.

[0093] Q1 and Q2 are set to zero at the beginning of each sample block. After the last sample in the block has been processed, the magnitude M of the filter output is calculated based on these variables.

[0094] Equation 14

[0095] These calculations use only real numbers, not complex numbers, and require a total of (N+2) real multiplications and (2N+1) real additions. At low symbol rates, this processing does not require dedicated DSP functionality and can be performed by a standard low-power microcontroller (MCU) in the time interval between samples.

[0096] Since the block size is equal to the symbol duration, the output value M depends not only on the magnitude of the input FSK signal but also on the time alignment between the start of the sampling block and the start of the received symbol.

[0097] The filter's time-domain response is Figure 7A The diagram shows a graph 700, where the output amplitude 702 of the Gossel filter is plotted on the Y-axis 701 relative to the time offset 703 between the start of the processing block and the start of the symbol. Both the block size and symbol duration are equal to T, which can be, for example, 40 milliseconds.

[0098] The time-domain output of the Gossel filter shown in graph 700 has the following properties;

[0099] a) If the time offset is > + / -T, 704, then there is no signal when processing the sampled data block, and the filter output will be small.

[0100] b) If the time offset is 0, then the signal exists in every sample of the data block processed by the filter, and the filter output will be at the maximum value of 705.

[0101] c) If the time offset is < + / -T, for example -T / 2, then the signal exists in some sample blocks processed by the filter, and the filter output will be the intermediate output value 706, which is proportional to the number of samples in which the signal exists.

[0102] The output amplitude 702 response of a Gossel filter with a block size equal to the symbol duration therefore has a triangular shape as shown in graph 700, where a peak occurs when the processing start time is precisely aligned with the start of the received symbol, which continues and is followed by noise. For binary FSK, this desired symbol pattern can be obtained at two frequencies by transmitting alternating 0-1-0-1 training sequences. If the Gossel filter processing is initiated by a receiver clock running at the nominal symbol rate while the training sequence is being processed at each filter frequency, the time offset between the receiver symbol clock and the transmitter symbol clock can be determined. The correct clock timing can then be found by adjusting the Gossel filter start time until the maximum output 705 is obtained. All subsequent symbols can then be detected by processing a single data block using the same time offset to obtain the maximum response from the filter. In one embodiment, the correct clock timing can be obtained by transmitting a series of data packets and iteratively adjusting the filter start time, or by using feedback, so that its output converges toward the maximum value. However, this would require transmitting many training symbols, resulting in high energy demands at both the transmitter and receiver.

[0103] In one embodiment, the preamble length can be reduced to, for example, four symbols by continuously processing the sampled data using a sliding Gosser DFT filter. The block size, sampling rate, and initial output calculation are the same as those for the standard Gosser filter described above. In the sliding Gosser DFT, whenever a new sample is obtained, the output is recalculated by advancing the start of the processed block by one sample. The new output only requires using the value of Vs from the new sample and updating Q1 and Q2 from the previously calculated values ​​to calculate a new value for Q (Equation 13). Then, a new value for M is calculated using the new values ​​of Q, Q1, and Q2. This additional processing requires only three real multiplications and four real additions, and can be completed within the time interval between samples. Therefore, by continuously incrementing the filter processing sample by sample, the triangular filter time-off response 702 can be obtained in real time, and the peak amplitude of the peak response and the corresponding time offset can be obtained with minimal additional processing overhead.

[0104] Figure 7BThe measured frequency response 707 of the Gossel filter configured according to method 600 for a 50Hz environment. The y-axis 708 of the graph shows the filter output amplitude in dB, and the x-axis 709 shows the frequency of the input CW signal. The filter output 710 has a maximum value 711 at the target frequency and exhibits deep zeros at frequency offsets of multiples of 25Hz. These zeros provide attenuation of all power line harmonics, for example at 3850Hz 712, and at all other interharmonic frequencies, for example at 3875Hz 713, some of which can be used for FSK modulation. When configured according to method 600, the frequency response 707 of the Gossel filter thus removes high-level harmonic noise from the receiver input, which increases receiver sensitivity and simultaneously facilitates the use of interharmonic m-ary FSK modulation.

[0105] Figure 8 A flowchart 800 illustrates a method for obtaining optimal timing for demodulating an FSK signal. To demodulate an FSK signal, a separate filter is required for each frequency. For illustrative purposes, the simplest case of a binary FSK with two filters is described. Each Gossel filter is configured to process one of the FSK signal frequencies 801 using a block length = 1 / symbol rate. The isolation symbol required for signal detection is provided by transmitting a 1-0-1-0 data pattern 802, which is added as a preamble at the beginning of the data packet. One of the Gossel filters then detects the first symbol of the preamble 803, which initiates the search for the correct symbol timing. This is obtained by sliding the Gossel filter through the next three symbols of the preamble 804 and determining the sampling time within each processing block corresponding to the maximum filter output.

[0106] Timing accuracy is limited by the sampling rate, and furthermore, by the amplitude resolution of the ADC 509 when locating the peak filter output 705. For example, at a 100kHz sampling rate, timing accuracy can be resolved to within + / -1 sample, or + / -10 microseconds. Next, the timing information is used to synchronize the receiver symbol timing clock in the processor with the received data 805. The updated symbol timing is then used to demodulate the remaining symbols in the data packet 806. While the processor symbol clock is synchronized with the transmitter, it can also be used to output a message or signal from the processor at a time directly linked to the transmitter's data packet timing 807. In a point-to-multipoint network, each receiver uses the same process to synchronize with the transmitter, and within the receiver's timing resolution, the outputs 807 from the receivers can be simultaneous.

[0107] In one embodiment, two thresholds, Tn and Ta, can be used to determine the demodulator output based on the filter outputs M1 and M2. For example, for M1 to indicate that a valid symbol has been demodulated, the following condition must be met:

[0108] Equation 15

[0109] Among them TH n The noise threshold and TH a This is the amplitude threshold. For M2, which indicates that a valid symbol has been demodulated, the same equation is applied, but M1 and M2 are reversed;

[0110] Equation 16

[0111] In many applications, the direction of the transmitted magnetic field is unknown, and the receiver determines which of the three orthogonal antennas 502 receives the best signal. In some cases, it is therefore necessary to combine antenna selection and FSK signal detection (e.g., during signal detection 803) whenever the embedded RX is powered on after a period of low-power sleep. In one embodiment, antenna selection and signal detection can be performed simultaneously by switching the receiver input multiple times per symbol between antennas. This generates interleaved sample sets, which are processed individually for each antenna by a sliding Gosser filter. The Gosser filter accumulates the output from each sample set to generate a separate peak for each antenna in the filter output 702. These peaks are then applied to multiple symbols N. a Average over, where N a It is less than the number of symbols in the transmitted data packet. For example, for a data packet containing 56 symbols, N a It can be set to 48.

[0112] The average filter output of each antenna can then be compared, and the antenna that produces the maximum average output can be selected to process all subsequent messages, such as those related to... Figure 8 As described. Because the demodulation filter generates a peak signal level estimate for each symbol, the antenna selection process is fast and can be completed after a single message is received, thereby minimizing the power consumption of both the VLF transmitter 101 and the VLF receiver 102. If the signal is present at the threshold levels required by Equations 15 and 16 on each antenna, the data packet can also be successfully demodulated simultaneously, and its contents are verified to complete FSK signal detection.

[0113] If no signal is transmitted during the signal search, the average filter output of each antenna will be zero. In this case, the antenna selection process is repeated until a signal is found and the optimal antenna is selected, or until the timeout expires and RX returns to low-power sleep mode.

[0114] Figure 9A The construction of a data packet 901 that can be used in an energy-efficient VLF data system is shown in the exemplary diagram. Figure 9AAn example includes four variable data fields for serial transmission, preceded by a preamble 902. According to method 800, the data packet begins with the preamble 902, which contains four symbols that generate an alternating pattern of 1, 0, 1, 0, detected by processor 103 and used to synchronize the receiver symbol clock with the transmitted data packet symbol timing. The next field is a transmitter ID 903, which may also be 4 bits. In sensor monitoring applications, this can be used, for example, to identify one of up to 16 sensors 407 connected to transmitter 401. In control applications, this can identify commands for a specific device 514 connected to receiver 501.

[0115] The next two data fields 904 can each contain bytes of data sent from transmitter 401. The final data field is used for error detection 905 and may contain a single parity bit, a checksum, or a cyclic redundancy checksum (CRC). If transmitter ID 903 includes 4 bits and error detection uses CRC-4, it also includes 4 bits, then the total packet length, including the preamble, is 28 bits. At a transmission rate of 30 Hz, a message can be transmitted in 0.933 seconds. If the sensor data is updated every 12 hours, then the transmitter duty cycle is only 0.002%.

[0116] Figure 9B The transmission of consecutive data packets 901 is illustrated in the second exemplary figure. For example, in a point-to-multipoint configuration, this might require sending different data packets from transmitter 401 to different receivers 501. Consecutive data packets must be sent with a guard time 906 of at least 2 symbols in length, such that the output of each Gosser filter in receiver 501 is set to a low value before the preamble arrives in the subsequent data packet.

[0117] In one embodiment, continuous data packets are transmitted at a fixed frame rate (e.g., every 3 seconds), where each data packet 901 is transmitted at the beginning of each frame. In the case of transmitting data packets of varying lengths at a fixed frame rate, the guard time 906 can vary depending on the length of each data packet. The remaining guard time after each data packet 901 can be calculated by the receiver by counting the number of demodulated symbols. A high-level noise burst occurring during the guard time can lead to erroneous detection of the start of the next data packet, thus preventing successful timing recovery and demodulation. To reduce the probability of this occurring, the noise threshold THa can be increased to a much higher value during the guard time 906. This prevents the satisfaction of the first condition of Equation 15 for symbol demodulation. The noise threshold THa must typically be restored to a normal value two symbols before the end of the frame for signal detection to allow the receiver to detect the preamble of the next data packet 901.

[0118] Figure 10An exemplary system-level diagram 1000 illustrates an energy-efficient VLF data system 101 for transmitting sensor data from a sealed underground location to the surface or another location where it can be monitored. For example, a VLF transmitter 401 may be sealed inside an underground storage chamber 1001 containing nuclear waste 1002 to report data from one or more sensors 1003. In this application, the transmitter may need to operate powered by a shared power source 1004 (e.g., a battery) for more than 10 years. A VLF magnetic field 1005, represented by an ellipse, generated by the transmitter 401 passes through the antenna of a receiver 501 located above the Earth's surface 1006. The receiver detects and demodulates the data in the modulated magnetic field 1005 and can output it to a computer 1007, where the data is observed and stored. In this configuration, the power consumption of the buried device is largely determined by power losses in the transmitter and antenna resistances, and according to Equation 1, the energy that must be stored in the power source 1004 is related to the time T required to transmit the message. on Proportional. Signal processing at processor 103 and data demodulation of a single message using a short preamble. Figure 6 The method to minimize T on And the energy that must be stored in the co-located energy source 1004.

[0119] Figure 11 As an exemplary system-level figure 1100, an energy-efficient VLF data system including a transmitter 401 and a receiver 501 is used to control one or more external devices 1101, such as a pre-corrosion device 1101 connected to a pipe 1102. In remote areas, or where the pipe 1102 passes beneath swamps, electrical equipment may be sealed inside a waterproof underground housing 1103, typically made of concrete and without an external power source. In this application, the transmitter 401 is located above ground and can be taken to the site when needed and is powered by a rechargeable battery 1104. The receiver may also be powered by an external power source 1105, but when sealed underground, it must have sufficient energy storage capacity for the facility's operational lifespan, which may be up to 10 years. The transmitter 401 may generate data packets containing control commands based on data stored internally or provided from an external source, the data packets modulating a VLF magnetic field 1106 represented by an ellipse. The modulated VLF magnetic field 1106 passes through the concrete housing 1103 and the antenna of the receiver 501. The receiver detects and demodulates the data in the modulated magnetic field 1106 and can output it to an external device 1101, which in this example may be a corrosion control device.

[0120] When active, the power consumption of the VLF receiver 501 is typically much lower than that of the transmitter 401 (typically 20W) due to the antenna current required to transmit signals over a 30m range. The VLF receiver power consumption can be, for example, 200mW due to the low computational complexity of the synchronization and demodulation method 801, which can be implemented on a low-power MCU. In continuous operation, the receiver may then require 4.8 watt-hours or ~17kJ of energy per day. This would require a very large external power supply for operation over any extended time period. Therefore, in some embodiments, the receiver 501 can operate in a sleep state, where only a single timer runs in the MCU and the power consumption can be <5µW. The VLF receiver 501 typically becomes active periodically (e.g., every 60 minutes) to check whether a message is being transmitted from the transmitter.

[0121] When control functions are required, the transmitter begins sending repeated messages, separated only by a guard time of 906, which can be 4 symbols or 0.133 seconds in a 60Hz system. The transmitter must continuously send messages for a period longer than the receiver's sleep time. The receiver's activity time must exceed the transmitter's guard time to ensure the transmitter signal is detected. This will be achieved, for example, by a receiver on-time of 0.2 seconds. In this scenario, standby power consumption is 5µW per hour, and with 0.2 seconds of activity twice per hour, the additional consumption is 22µW. The total power consumption is then 27µW or ~1E-4 kJ per hour of operation. Over a 10-year period, the energy requirement is 8.76 kJ, which can be provided by a long-life battery. Because the transmission signal can be detected at any point in the data packet, the receiver must remain on to receive the complete second data packet. Figure 9A With this packet structure, the connection time can then be approximately 2 seconds. In this type of application, usage can be limited to less than 4 times per year, so the additional energy requirement is negligible.

[0122] At low signal-to-noise ratios, additive noise can randomly increase the instantaneous magnitude of the desired FSK signal, shifting the timing of the peak of the ideal filter response 702. This generates jitter in the recovered symbol timing derived from the preamble of packet 901, from packet to packet, and between different receivers. Moderate jitter does not affect packet demodulation but can reduce the timing accuracy of control signals output from multiple different receivers. In this type of application, when a packet containing a command for output control signals is received, instead of using the symbol timing obtained from said one packet, each receiver may alternatively use the average symbol timing derived from multiple previous packets. In one embodiment, packet transmission may be repeated N times to generate an average symbol timing, wherein the control signal is output at a fixed time after the Nth packet.

[0123] In some applications, it is necessary to output a control signal from the VLF receiver at a known time. This must be done after demodulating a data packet containing the command to do so. Because the receiver is synchronized with the transmitter symbol clock, this can be arranged by outputting the message or control signal after a fixed delay from the detection of the timing offset in the preamble. The delay time can be programmed into the MCU or included in the command. Timing accuracy cannot be better than + / - 1 sample interval, which is 10 microseconds for a 100kHz sampling clock. This accuracy is further reduced during the transmission period by noise and any frequency drift in the receiver and transmitter clocks. If the transmitter and receiver clocks have an accuracy of + / - 5ppm, then the error between them can be as high as 10ppm. Over the duration of a data packet lasting approximately 1 second, the timing error in the sampling clock can then be 1 × + / - 1E-5 = + / - 10 microseconds, or one sample. If the output of the control message is delayed by 5 seconds from synchronization, then the timing error increases to + / - 60 microseconds. The same mechanism will produce small timing differences between control messages issued by different receivers in a point-to-multipoint system.

[0124] After demodulating the same message from the transmitter, timing errors can be observed and evaluated by comparing the control outputs from two different receivers. Figure 12 For curve 1200, a screen output 1201 from an oscilloscope connected to the control outputs of two different receivers, RX_A and RX_B, that receive common data packets from a VLF transmitter, where the signal-to-noise ratio (SNR) is >20 dB. In each receiver, the control output is delayed by 5 seconds after the last symbol in the message is received. Screen output 1201 displays the magnitude of the signal on the Y-axis 1202, scaled at + / - 5V, and the time on the X-axis 1203, scaled at + / - 1 millisecond. Measurements are triggered by output 1204 from RX_A. In this test example, the output delay from RX_B 1205 is 50 microseconds, which is sufficient for many control applications. Due to the high SNR, this timing error is at least partially due to the difference in clock timing between the two receivers.

[0125] Embodiments of the apparatus, systems, and methods described herein can be implemented in a combination of hardware and software. These embodiments can be implemented on a programmable computer, each computer including at least one processor, a data storage system (including volatile or non-volatile memory or other data storage elements or combinations thereof), and at least one communication interface.

[0126] Program code is applied to input data to perform the functions described herein and generate output information. The output information is applied to one or more output devices. In some embodiments, the communication interface may be a network communication interface. In embodiments where elements can be combined, the communication interface may be a software communication interface, such as a software communication interface for inter-process communication. In other embodiments, there may be combinations of communication interfaces implemented as hardware, software, and combinations thereof.

[0127] The embodiments may relate to a computing device formed of a server, service, interface, portal, platform, or other system having at least one processor configured to execute software instructions stored on a computer-readable tangible non-transitory medium. For example, a server may comprise one or more computers that operate as a web server, database server, or other type of computer server in a manner that performs the described roles, duties, or functions.

[0128] Various exemplary embodiments are described herein. While each embodiment represents a single combination of inventive elements, all possible combinations of the disclosed elements encompass the subject matter of the invention.

[0129] Therefore, if one embodiment includes elements A, B, and C, and a second embodiment includes elements B and D, then the subject matter of the invention is considered to include other remaining combinations of A, B, C, or D, even if not explicitly disclosed.

[0130] The term “connection” or “coupled to” can include direct coupling (where two elements coupled to each other are in contact with each other) and indirect coupling (where at least one additional element is located between the two elements).

[0131] The technical solutions of the embodiments can be in the form of software products. The software products can be stored in non-volatile or non-transitory storage media, such as optical disc read-only memory (CD-ROM), USB flash drives, or portable hard drives. The software products include multiple instructions that cause a computer device (personal computer, server, or network device) to perform the methods provided in the embodiments.

[0132] The embodiments described herein are implemented using physical computer hardware, including computing devices, servers, receivers, transmitters, processors, microcontrollers and microcontroller units, memory, displays, and networks. The embodiments described herein provide efficient physical machines, and in particular, configured computer hardware arrangements. The embodiments described herein are directed to electronic machines and methods implemented within those machines for processing and converting electromagnetic signals representing various types of information.

Claims

1. A low-energy very low-frequency (VLF) communication system, comprising: At least one VLF transmitter; and VLF receiver, The VLF transmitter from the at least one VLF transmitter performs the following operation: Data symbols are generated using M-ary Frequency Shift Keying (FSK) modulation, where the duration of an FSK symbol is the reciprocal of the frequency of the local AC distribution network; and The transmitted signal; and The VLF receiver described herein performs the following operations: Receive the transmitted signal; The transmitted signal is sampled, and a separate sliding Gosser filter is used to process the sampled signal block; At the same time, each FSK signal frequency is filtered; Determine the receiver symbol timing offset relative to the VLF transmitter; and Demodulate the transmitted signal. The VLF receiver performs the sampling, filtering, and determination after receiving a short preamble at the beginning of a single message from the VLF transmitter.

2. The system of claim 1, wherein the sampled signal block processed by each Gosser filter has the same duration as the transmitted symbol.

3. The system according to claim 1, wherein the sampling rate is 4000 times the FSK symbol rate.

4. The system of claim 1, wherein the receiver symbol timing offset relative to the VLF transmitter is determined by processing a preamble on one or more of the FSK frequencies, the preamble comprising alternating 0 and 1 patterns and being at least 4 symbols long.

5. The system of claim 1, wherein the sliding Gosser filter repeatedly processes the 4-symbol sequence of the preamble by sampling the sampled signal block at the receiver sampling rate and continuously shifting the time of the first sample to determine which first sample timing gives the maximum filter output.

6. The system of claim 1, wherein the first sample timing given from the maximum output of the preamble is used to demodulate the remaining data bits in the message.

7. The system of claim 1, wherein the first sample timing is further configured to determine the receiver symbol timing offset between the symbol clock of the VLF receiver and the symbol clock of the VLF transmitter, and to output a control message or signal with a time reference relative to the VLF transmitter clock.

8. The system of claim 7, wherein the timing offset is based on a plurality of previous packets in the transmitted signal.

9. The system of claim 1, wherein the synchronization and demodulation of the VLF receiver is performed during the reception of a single message from the VLF transmitter.

10. The system of claim 1, wherein one or both of the VLF receiver or the VLF transmitter enter a sleep state to reduce power consumption.

11. The system of claim 1, wherein the VLF receiver uses a 3-axis antenna to detect the transmitted signal from the VLF transmitter from any direction.

12. The system of claim 11, wherein the VLF receiver is configured to select one axis of the 3-axis antenna while detecting the transmitted signal based on the received signal level and a threshold.

13. The system of claim 1, wherein the FSK modulation uses two frequencies, the preamble comprises alternating 0, 1 patterns of four symbol lengths, and each sliding Gosser filter is independently synchronized with the transmitter symbol rate.

14. The system of claim 1, wherein adjacent transmitted signals are located between harmonics of the AC distribution network.

15. The system of claim 1, wherein the signal processing performed at the VLF transmitter and the VLF receiver is entirely implemented in firmware or software executed by a low-power microcontroller unit (MCU).

16. The system of claim 1, wherein the transmitted signal includes a guard time between consecutive symbols, and wherein the VLF receiver is further configured to increase a noise threshold for detecting the signal during the guard time.

17. A method for minimizing the energy consumption of a transmitter and receiver forming a VLF communication link, the method comprising: M-ary Frequency Shift Keying (FSK) is used to transmit messages with preambles to modulate the magnetic field, wherein the symbol duration in the message is the reciprocal of the frequency of the local AC distribution network. The FSK-modulated magnetic field is converted into an electromagnetic field (EMF) using a VLF antenna. The electromagnetic field is then sampled by the receiver and filtered using a sliding Gosser filter with the same block size as the symbol duration. The 4-symbol sequence of the preamble is repeatedly processed by sampling the sampled signal block at the receiver sampling rate. The time of the first sample is continuously shifted to determine which first sample timing gives the maximum output from the Gosser filter; as well as This first sample timing is used to determine the symbol clock offset between the receiver and the transmitter in order to demodulate the data bits in the remaining portion of the message.

18. The method of claim 17, wherein the sampling rate at the receiver is related to the FSK symbol rate harmonics in the message.

19. The method of claim 18, wherein the symbol clock offset between the receiver and the transmitter is determined by processing a preamble on one or more FSK frequencies, and includes an alternating data pattern of 0, 1, 0, 1.

20. The method of claim 18, wherein the power consumption at the receiver and the transmitter is minimized by performing synchronization and demodulation during the reception of a single message from the VLF transmitter.

21. The method of claim 17, wherein at least one of the receiver or the transmitter is capable of entering a sleep state to reduce energy consumption between message transmissions.

22. The method of claim 17, further comprising using a timing reference to control an external connection device or obtain data from an external connection device by means of messages or control signals simultaneously output among a plurality of receivers, each of the plurality of receivers having been message-synchronized with a single transmitter.

23. The method of claim 17, wherein the antenna of the receiver is a 3-axis antenna.

24. The method of claim 17, wherein the FSK modulation uses two frequencies, the preamble comprises alternating 0 and 1 patterns of four symbol lengths, and each filter is synchronized with the transmitter symbol rate.

25. The method of claim 17, wherein the frequencies of adjacent transmitted messages are between the harmonics of the local AC distribution network.

Images