Integrated passive components and their fabrication methods, electronic devices

Abstract

An integrated passive device is disclosed, comprising a first conductive plate (21) and a second electrode (42). The first conductive plate (21) is disposed on a first surface of a substrate (1), and a second conductive post (421) is disposed within a second via (12), the second conductive post (421) being connected to the first conductive plate (21). The first conductive plate (21) is directly formed on the substrate (1), and the substrate (1) has a small coefficient of thermal expansion, which can greatly reduce the warpage of the first conductive plate (21). In this integrated passive device, a dielectric layer (22) can be formed on the first conductive plate (21) first, and then the second conductive post (421) can be formed. Even if the second conductive post (421) warps during annealing, it will not affect the flatness of the first conductive plate (21), thus not affecting the uniformity of the dielectric layer (22) thickness, thereby achieving the purpose of improving capacitance uniformity. A method for manufacturing the integrated passive device is also provided, as well as an electronic device including the aforementioned integrated passive device.

Description

Integrated passive components and their fabrication methods, electronic devices Technical Field

[0001] This invention relates to the field of passive device technology, and more specifically, to an integrated passive device, its manufacturing method, and an electronic device. Background Technology

[0002] As an integrated passive device, the main function of a filter is to select a specific signal frequency and filter out noise and interference outside the passband. A filter generally includes an inductor and a capacitor; the inductor typically includes a first electrode disposed within a first via on the substrate.

[0003] The thermal expansion coefficient of the first electrode differs from that of the substrate. The first connecting electrode warps severely during subsequent high-temperature processes, which leads to poor uniformity of the dielectric layer thickness of the capacitor, thereby affecting the uniformity of the capacitor.

[0004] It should be noted that the information in the background section above is only used to enhance the understanding of the background of the present invention, and therefore may include information that does not constitute prior art known to those skilled in the art.

[0005] Summary of the Invention

[0006] The purpose of this invention is to overcome the shortcomings of the prior art and provide an integrated passive device, its manufacturing method, and an electronic device.

[0007] According to one aspect of the present invention, an integrated passive device is provided, comprising a substrate, a composite structure, and a first conductive structure. The substrate has a first surface and a second surface disposed opposite to each other. A first via and a second via are provided on the substrate, extending from the first surface to the second surface. The composite structure comprises a first conductive plate, a dielectric layer, and a second conductive plate. The first conductive plate is disposed on the first surface of the substrate, the dielectric layer is disposed on the side of the first conductive plate away from the substrate, and the second conductive plate is disposed on the side of the dielectric layer away from the substrate. The first conductive structure comprises a first electrode and a second electrode. The first electrode comprises a first conductive post, and the second electrode comprises a second conductive post. The first conductive post is disposed within the first via, one end of which is flush with or protruding from the first surface. The second conductive post is disposed within the second via and is connected to the first conductive plate. The first conductive plate has a first portion, the orthographic projection of the first portion on the substrate not overlapping the orthographic projection of the second conductive plate on the substrate, and the second conductive post is connected to the first portion.

[0008] In one embodiment of the present invention, a through hole is provided on a first portion of the first conductive plate, and the second electrode further includes a second conductive part, which passes through the through hole and is connected to one end of the second conductive post near the first surface of the substrate.

[0009] In one embodiment of the present application, the first electrode further comprises a first conductive part, the first conductive structure further comprises a third electrode, the first conductive part is arranged on the first surface of the substrate, the first conductive part is connected with one end of the first conductive column close to the first surface of the substrate, and the third electrode is arranged on the side of the second conductive plate away from the substrate and connected with the second conductive plate.

[0010] In one embodiment of the present application, the integrated passive device further comprises a first insulating layer, the first insulating layer is arranged on the first surface of the substrate, the first insulating layer fills and covers the composite structure, the first insulating layer is provided with a first opening, a second opening and a third opening, the first opening and the second opening expose the substrate, the third opening exposes the second conductive plate, the first conductive part is arranged in the first opening, the second conductive part is arranged in the second opening, and the third electrode is arranged in the third opening.

[0011] In one embodiment of the present application, the integrated passive device further comprises a second conductive structure, the second conductive structure comprises a fourth electrode and a fifth electrode, the fourth electrode comprises a fourth conductive part, the fifth electrode comprises a fifth conductive part, the fourth conductive part is arranged on the side of the first conductive part away from the substrate and connected with one end of the first conductive part away from the substrate, the fifth conductive part is arranged on the side of the third electrode away from the substrate and connected with one end of the third electrode away from the substrate.

[0012] In one embodiment of the present application, the integrated passive device further comprises a second insulating layer, a first conductive pin and a second conductive pin, the second insulating layer is arranged on the side of the fourth conductive part, the fifth conductive part and the first insulating layer away from the substrate, the first conductive pin is connected with the fourth conductive part through the second insulating layer, and the second conductive pin is connected with the fifth conductive part through the second insulating layer.

[0013] In one embodiment of the present application, the second conductive structure does not overlap with the second conductive part and the second conductive column in the orthographic projection of the second conductive structure on the substrate, and the integrated passive device further comprises a third conductive pin, the third conductive pin is connected with the second conductive part through the second insulating layer and the first insulating layer.

[0014] In one embodiment of the present application, the second conductive structure does not overlap with the second conductive column in the orthographic projection of the second conductive structure on the substrate, and the integrated passive device further comprises a third conductive pin, the third conductive pin is connected with the first part of the first conductive plate through the second insulating layer and the first insulating layer.

[0015] In one embodiment of the present application, the integrated passive device further comprises a second insulating layer and a second conductive structure, the second insulating layer is arranged on the side of the first conductive part, the second conductive part, the third electrode and the first insulating layer away from the substrate, the second conductive structure comprises a fourth electrode and a fifth electrode, the fourth electrode and the fifth electrode are arranged on the side of the second insulating layer away from the substrate, the fourth electrode is connected with the first conductive part through the second insulating layer, and the fifth electrode is connected with the third electrode through the second insulating layer.

[0016] In one embodiment of the present application, the integrated passive device further comprises a third insulating layer, a first conductive pin and a second conductive pin, the third insulating layer is arranged on the side of the fourth electrode, the fifth electrode and the second insulating layer away from the substrate, the first conductive pin is connected with the fourth electrode through the third insulating layer, and the second conductive pin is connected with the fifth electrode through the third insulating layer.

[0017] In one embodiment of the present application, the second conductive structure does not overlap the second conductive part and the second conductive column in the orthographic projection on the substrate, the integrated passive device further comprises a third conductive pin and a sixth electrode, the sixth electrode is connected with the second conductive part away from the substrate through the second insulating layer, the sixth electrode is flush with or protrudes from the side of the second insulating layer away from the substrate, and the third conductive pin is connected with the second conductive part through the third insulating layer.

[0018] In one embodiment of the present application, the first via and the second via extend through the substrate from the first surface to the second surface, the end of the first conductive column and the second conductive column away from the first conductive plate is flush with or protrudes from the second surface, and the integrated passive device further comprises a first conductive layer, the first conductive layer is arranged on the second surface of the substrate, and the first conductive layer is connected with the first conductive column and the second conductive column respectively.

[0019] In one embodiment of the present application, the integrated passive device further comprises a fourth insulating layer, the fourth insulating layer covers the side of the first conductive layer away from the substrate, and the second surface of the substrate does not overlap the first conductive layer.

[0020] According to another aspect of the present application, a manufacturing method of the integrated passive device provided by one aspect of the present application is provided, the method comprises:

[0021] providing a substrate, the substrate has oppositely arranged first and second surfaces;

[0022] forming a first conductive plate on the first surface of the substrate, forming a dielectric layer on the side of the first conductive plate away from the substrate, and forming a second conductive plate on the side of the dielectric layer away from the substrate, the first conductive plate, the dielectric layer and the second conductive plate form a composite structure;

[0023] Forming a first via and a second via on the substrate, forming a first conductive post in the first via, and forming a second conductive post in the second via, one end of the first conductive post flushes or protrudes from the first surface, and the second conductive post is disposed in the second via and connected to the first conductive plate.

[0024] In one embodiment of the present application, the first conductive plate is formed on the first surface of the substrate, a dielectric layer is formed on the side of the first conductive plate away from the substrate, and a second conductive plate is formed on the side of the dielectric layer away from the substrate, comprising: forming the first conductive plate on the first surface of the substrate, and forming a via on a first portion of the first conductive plate; forming the dielectric layer, which covers the first conductive plate, the via, and the region of the substrate not overlapping with the first conductive plate; forming the second conductive plate on the side of the dielectric layer away from the substrate, and the orthographic projection of the second conductive plate on the substrate does not overlap with the orthographic projection of the first portion on the substrate; and dry etching the dielectric layer to remove the portion of the dielectric layer in the via and the portion of the dielectric layer in the region of the substrate not overlapping with the first conductive plate.

[0025] In one embodiment of the present application, the first conductive post and the second conductive post are formed on the substrate, comprising: forming a first insulating layer covering the composite structure and the first surface of the substrate; forming a first opening, a second opening, and a third opening on the first insulating layer, the orthographic projection of the via on the substrate is located within the orthographic projection of the second opening on the substrate, the first opening and the second opening expose the substrate, and the third opening exposes the second conductive plate; forming the first via on the region of the substrate located in the first opening and forming the second via on the region of the substrate located in the second opening; forming a first electrode in the first opening and the first via, forming a second electrode in the second opening, the via, and the second via, and forming a third electrode in the third opening, the third electrode being connected to the second conductive plate, the portion of the first electrode located in the first via being the first conductive post, the portion of the second electrode located in the second via being the second conductive post, the portion of the first electrode located in the first opening being a first conductive part, and the portion of the second electrode located in the second opening being a second conductive part; and removing the portions of the first conductive part, the second conductive part, and the third electrode protruding from the side of the first insulating layer away from the substrate.

[0026] In one embodiment of the present application, the method further comprises disposing a first conductive layer connected to the first conductive post and the second conductive post, respectively, and the disposing of the first conductive layer connected to the first conductive post and the second conductive post, respectively, comprises: thinning the substrate until the first conductive post and the second conductive post are exposed; and forming the first conductive layer on the second surface of the substrate, the first conductive layer being connected to the first conductive post and the second conductive post, respectively.

[0027] According to another aspect of the present application, an electronic device is provided, comprising the integrated passive device provided by one aspect of the present application.

[0028] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application, as claimed. BRIEF DESCRIPTION OF DRAWINGS

[0029] The accompanying drawings, which are incorporated herein and form a part of the specification, illustrate embodiments consistent with the present application and, together with the description, further serve to explain the principles of the application. It is to be understood that the drawings are designed solely for purposes of illustration to be used in conjunction with the following detailed description.

[0030] FIG. 1 is a schematic circuit diagram of an integrated passive device according to an embodiment of the present application.

[0031] FIG. 2 is a plan view of an integrated passive device according to the prior art, when the output of the inductor is connected to the input of the capacitor only.

[0032] FIG. 3 is a cross-sectional view of an integrated passive device according to the prior art, when the first conductive plate is disposed on a side of the second conductive portion distal from the substrate.

[0033] FIG. 4 is a comparison of single membrane layer warpage data for an integrated passive device according to an embodiment of the present application.

[0034] FIG. 5 is a cross-sectional view of an integrated passive device according to an embodiment of the present application, when the first conductive plate is disposed on a first surface of the substrate and the second conductive post is connected to the first conductive plate.

[0035] FIG. 6 is a cross-sectional view of an integrated passive device according to an embodiment of the present application, when the first conductive plate has a first portion and the second conductive post is connected to the first portion of the first conductive plate.

[0036] FIG. 7 is a cross-sectional view of an integrated passive device according to an embodiment of the present application, when the fifth conductive portion is disposed on the substrate such that a footprint of the fifth conductive portion on the substrate overlaps a footprint of the second electrode on the substrate, and the second conductive post is connected to the first portion of the first conductive plate.

[0037] FIG. 8 is a cross-sectional view of an integrated passive device according to an embodiment of the present application, when the sixth electrode is connected to a distal end of the second conductive portion distal from the substrate through the second insulating layer.

[0038] FIG. 9 is a cross-sectional view of an integrated passive device according to an embodiment of the present application, when the third conductive pin is connected to the sixth electrode through the third insulating layer.

[0039] FIG. 10 is a cross-sectional view of an integrated passive device according to an embodiment of the present application, when the fourth conductive portion is connected to a distal side of the first conductive portion distal from the substrate, the fifth conductive portion is connected to a distal side of the third electrode distal from the substrate, and the second conductive portion is connected to the second conductive post through the via.

[0040] Figure 11 is a cross-sectional view of an integrated passive device according to embodiments of the present application, when a third conductive pin is connected to a first portion of a first conductive plate through a second insulating layer and a first insulating layer.

[0041] Figure 12 is a cross-sectional view of an integrated passive device according to embodiments of the present application, when a third conductive pin is connected to a second conductive portion through a second insulating layer and a first insulating layer.

[0042] Figure 13 is a plan view of an integrated passive device according to embodiments of the present application, when an output terminal of an inductor is connected to an input terminal of a capacitor and a reference voltage.

[0043] Figure 14 is a cross-sectional view of an integrated passive device according to embodiments of the present application, after a first conductive plate is formed on a first side of a substrate, and a via is formed on a first portion of the first conductive plate.

[0044] Figure 15 is a cross-sectional view of an integrated passive device according to embodiments of the present application, after a dielectric cap layer is formed covering the first conductive plate, the via, and a region of the substrate not overlapping the first conductive plate.

[0045] Figure 16 is a cross-sectional view of an integrated passive device according to embodiments of the present application, after a second conductive plate is formed on a side of the dielectric cap layer distal from the substrate.

[0046] Figure 17 is a cross-sectional view of an integrated passive device according to embodiments of the present application, after a dielectric layer is formed by removing portions of the dielectric cap layer within the via and within the region of the substrate not overlapping the first conductive plate.

[0047] Figure 18 is a cross-sectional view of an integrated passive device according to embodiments of the present application, after a first opening, a second opening, and a third opening are formed in a first insulating layer.

[0048] Figure 19 is a cross-sectional view of an integrated passive device according to embodiments of the present application, after a first electrode is formed within the first opening and the first via, a second electrode is formed within the second opening, the via, and the second via, and a third electrode is formed within the third opening.

[0049] Figure 20 is a cross-sectional view of an integrated passive device according to embodiments of the present application, after a fourth electrode and a fifth electrode are formed on a side of a second insulating layer distal from the substrate.

[0050] Figure 21 is a cross-sectional view of an integrated passive device according to embodiments of the present application, after a first conductive pin is formed within a first conductive pin via, and a second conductive pin is formed within a second conductive pin via.

[0051] Figure 22 is a schematic view of the integrated passive device related to the embodiment of the present application, after forming a first conductive layer on the second surface of the thinned substrate, and the first conductive layer is connected with the first conductive post and the second conductive post respectively.

[0052] Reference signs: 1-substrate, 11-first via, 12-second via, 2-composite structure, 21-first conductive plate, 211-first part, 212-via hole, 22-dielectric layer, 220-dielectric cover layer, 23-second conductive plate, 3-first insulating layer, 31-first opening, 32-second opening, 33-third opening, 41-first electrode, 411-first conductive post, 412-first conductive part, 42-second electrode, 421-second conductive post, 422-second conductive part, 43-third electrode, 5-second insulating layer, 51-fourth via, 52-fifth via, 61-fourth electrode, 611-fourth conductive post, 612-fourth conductive part, 62-fifth electrode, 621-fifth conductive post, 622-fifth conductive part, 63-sixth electrode, 7-third insulating layer, 71-first conductive pin via, 72-second conductive pin via, 81-first conductive pin, 82-second conductive pin, 83-third conductive pin, 9-first conductive layer, 10-fourth insulating layer. DETAILED DESCRIPTION

[0053] Example embodiments now will be described more fully hereinafter with reference to the accompanying drawings; however, the example embodiments can be implemented in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the example embodiments to those skilled in the art. Like reference numerals refer to like elements throughout the specification. Moreover, the figures can not be to scale and some features can be exaggerated to show details of particular embodiments. The both the drawings and the detailed description are intended to serve an illustrative purpose, and not as a substitute for applicable laws or regulatory requirements.

[0054] Although relative terms such as "upper", "lower", etc. are used herein to describe one component's relationship to another component as the device is positioned in a particular orientation, such terminology is used herein for convenience only and is not intended to limit the device to that orientation. It is understood that if the device were turned over, such that the upper portion is now a lower portion, the components described as being on the "upper" portion would then be oriented as being on the "lower" portion. When a structure is on another structure, it can mean that the structure is formed integrally with the other structure, or that the structure is "directly" on the other structure, or that the structure is "indirectly" on the other structure with intervening structures between the structures.

[0055] The terms "one", "a", "an", "the", and "at least one" are used to indicate the existence of one or more elements / components / etc.; the terms "including" and "having" are used to indicate the inclusion of one or more elements / components / etc. without excluding the presence of additional elements / components / etc.; the terms "first", "second", and "third" etc. are merely used to distinguish one element / component / etc. from another, and are not the limitation of the number of the elements / components / etc.

[0056] As shown in FIG. 1, the filter, as one of the integrated passive devices, can generally include a capacitor C, an inductor L and a resistor R, which are connected in series to form a filter circuit. As shown in FIG. 2, the input end of the filter circuit is connected to the inductor L, the output end of the inductor L is connected to the input end of the capacitor C, and the output end of the capacitor C is connected to the output end of the filter circuit.

[0057] As shown in FIG. 3, the integrated passive device can include a substrate 1 having a first surface and a second surface arranged oppositely, and the substrate 1 is provided with a first via hole 11 and a second via hole 12 extending from the first surface to the second surface. The integrated passive device can further include a first conductive structure, which can include a first electrode 41 and a second electrode 42, the first electrode 41 includes a first conductive column 411 and a first conductive part 412, and the second electrode 42 includes a second conductive column 421 and a second conductive part 422, the first conductive column 411 is arranged in the first via hole 11, the first conductive part 412 is arranged on the first surface of the substrate 1 and connected to the first conductive column 411, and the second conductive column 421 is arranged in the second via hole 12, and the second conductive part 422 is arranged on the first surface of the substrate 1 and connected to the second conductive column 421.

[0058] The integrated passive device can further include a first insulating layer 3 arranged between the first conductive part 412 and the second conductive part 422, and the first conductive part 412 and the second conductive part 422 are flush with or protrude from the first insulating layer 3 away from the substrate 1. The integrated passive device can further include a composite structure 2, which includes a first conductive plate 21, a dielectric layer 22 and a second conductive plate 23, the first conductive plate 21 is arranged on the side of the second conductive part 422 away from the substrate 1, the dielectric layer 22 is arranged on the side of the first conductive plate 21 away from the substrate 1, and the second conductive plate 23 is arranged on the side of the dielectric layer 22 away from the substrate 1.

[0059] It is to be noted that the first conductive plate 21 is formed by a physical vapor deposition (PVD) process, and the first conductive plate 21 has good flatness and small surface roughness.

[0060] The integrated passive device can further include a second insulating layer 5 and a second conductive structure. The second insulating layer 5 covers the composite structure 2, the first conductive part 412, the second conductive part 422, and the first insulating layer 3 on the side away from the substrate 1. The second insulating layer 5 is provided with a fourth via hole 51 and a fifth via hole 52. The second conductive structure includes a fourth electrode 61 and a fifth electrode 62. The fourth electrode 61 includes a fourth conductive column 611 and a fourth conductive part 612. The fourth conductive column 611 is arranged in the fourth via hole 51, and the fourth conductive part 612 is arranged on the side of the second insulating layer 5 away from the substrate 1. The two ends of the fourth conductive column 611 are respectively connected to the fourth conductive part 612 and the first conductive part. The fifth electrode 62 includes a fifth conductive column 621 and a fifth conductive part 622. The fifth conductive column 621 is arranged in the fifth via hole 52, and the fifth conductive part 622 is arranged on the side of the second insulating layer 5 away from the substrate 1. The two ends of the fifth conductive column 621 are respectively connected to the fifth conductive part 622 and the second conductive plate.

[0061] The integrated passive device can further include a third insulating layer 7, a first conductive pin 81, and a second conductive pin 82. The third insulating layer 7 is arranged on the side of the fourth conductive part 612, the fifth conductive part 622, and the second insulating layer 5 away from the substrate 1. The first conductive pin 81 passes through the third insulating layer 7 and is connected to the fourth conductive part 612. The second conductive pin 82 passes through the third insulating layer 7 and is connected to the fifth conductive part 622.

[0062] The input end of the integrated passive device circuit is connected to an inductor L, the output end of the inductor L is connected to a first plate of a capacitor, and the second plate of the capacitor is connected to the output end of the integrated passive device circuit. It should be noted that the first conductive pin 81 is the input end of the integrated passive device circuit, the first conductive column 411 is arranged as the inductor L, the first conductive plate 21 of the composite structure 2 is the first plate of the capacitor, the second conductive plate 23 of the composite structure 2 is the second plate of the capacitor, and the second conductive pin 82 is the output end of the integrated passive device circuit.

[0063] The first conductive column 411 and the second conductive column 421 are formed by filling copper in the first via hole 11 and the second via hole 12 arranged on the substrate 1, which is the first step. The material of the substrate 1 is usually glass. Due to the difference between the thermal expansion coefficient of copper and the thermal expansion coefficient of the substrate 1, annealing is required during the formation of the first insulating layer 3, the second insulating layer 5, and the third insulating layer 7. After annealing, the first electrode 41, the second electrode 42, the third electrode 43, the fourth electrode 61, the first insulating layer 3, the second insulating layer 5, and the third insulating layer 7 will all be warped.

[0064] The first insulating layer 3, the second insulating layer 5 and the third insulating layer 7 are defined as an insulating layer group, and the material of the first insulating layer 3, the second insulating layer 5 and the third insulating layer 7 is polyimide (PI). The first conductive structure, the second conductive structure and the first conductive layer 9 are defined as a conductive structure, the first conductive pillar 411 and the second conductive pillar 421 of the conductive structure are defined as a base conductive pillar, and the rest of the conductive structure is defined as a redistribution layer (RDL), that is, a wiring layer.

[0065] FIG. 4 is a comparative diagram of single-film layer warpage data, and it can be clearly seen that the warpage of the first conductive pillar 411 and the second conductive pillar 421 is the highest and the most serious, and in the subsequent multiple annealing processes, the warpage of the first conductive pillar 411 and the second conductive pillar 421 does not gradually increase, and the warpage is mainly affected by the first annealing. The formation of the dielectric layer 22 is performed after the first annealing, at which time the warpage of the first conductive pillar 411 and the second conductive pillar 421 is already high. The second conductive part 422 is connected to the second conductive pillar 421. The difference between the thermal expansion coefficient of copper and the thermal expansion coefficient of the substrate 1 will cause different thermal stresses between the second conductive pillar 421 and the wafer used to form the substrate 1. Different thermal stresses will cause the wafer used to form the substrate 1 to warp, which in turn causes the substrate 1 to warp. The warpage of the substrate 1 will affect the flatness of the second conductive part 422, making the thickness uniformity of the dielectric layer 22 poor, thereby affecting the uniformity of the capacitor.

[0066] In addition, the warpage of the first conductive pillar 411 will cause the first conductive part 412 to be misaligned, and the warpage of the second conductive pillar 421 will cause the first conductive part 412 to be misaligned. In the process of forming the third electrode 43 and the fourth electrode 61, the first conductive part 412 and the second conductive part 422 need to be aligned through a mask plate. The misalignment of the first conductive part 412 and the misalignment of the second conductive part 422 have a serious impact on the exposure alignment of the mask plate.

[0067] Based on this, the embodiment of the present disclosure provides an integrated passive device. As shown in FIGS. 5-12, the integrated passive device includes a substrate 1, a composite structure 2, and a first conductive structure. The substrate 1 has a first surface and a second surface arranged oppositely. The substrate 1 is provided with a first via hole 11 and a second via hole 12, which extend from the first surface to the second surface. The composite structure 2 includes a first conductive plate 21, a dielectric layer 22, and a second conductive plate 23. The first conductive plate 21 is arranged on the first surface of the substrate 1. The dielectric layer 22 is arranged on the side of the first conductive plate 21 away from the substrate 1. The second conductive plate 23 is arranged on the side of the dielectric layer 22 away from the substrate 1. The first conductive structure includes a first electrode 41 and a second electrode 42. The first electrode 41 includes a first conductive column 411. The second electrode 42 includes a second conductive column 421. The first conductive column 411 is arranged in the first via hole 11. One end of the first conductive column 411 is flush with or protrudes from the first surface. The second conductive column 421 is arranged in the second via hole 12. The second conductive column 421 is connected with the first conductive plate 21.

[0068] The integrated passive device includes the first conductive plate 21 and the second electrode 42. The first conductive plate 21 is arranged on the first surface of the substrate 1. The second electrode 42 includes the second conductive column 421. The second conductive column 421 is arranged in the second via hole 12. The second conductive column 421 is connected with the first conductive plate 21. In the process of manufacturing the integrated passive device, the first conductive plate 21 is directly formed on the substrate 1. The substrate 1 has a small coefficient of thermal expansion, which can greatly reduce the warping of the first conductive plate 21. The integrated passive device can first form the dielectric layer 22 on the first conductive plate 21, and then form the second conductive column 421. Even if the second conductive column 421 warps during the annealing process, it will not affect the flatness of the first conductive plate 21, and thus will not affect the uniformity of the thickness of the dielectric layer 22, thereby achieving the purpose of improving the uniformity of the capacitance.

[0069] The filter related to the embodiment of the present disclosure will be described in detail below in combination with specific examples.

[0070] As shown in FIGS. 5-11, the filter can include a substrate 1 and a composite structure 2. The substrate 1 has a first surface and a second surface arranged oppositely. The composite structure 2 includes a first conductive plate 21, a dielectric layer 22, and a second conductive plate 23. The first conductive plate 21 is arranged on the first surface of the substrate 1. The dielectric layer 22 is arranged on the side of the first conductive plate 21 away from the substrate 1. The second conductive plate 23 is arranged on the side of the dielectric layer 22 away from the substrate 1.

[0071] As shown in FIG. 5, the substrate 1 is provided with a first via 11 and a second via 12, the first via 11 and the second via 12 extend from the first surface to the second surface. The filter further comprises a first conductive structure, the first conductive structure comprises a first electrode 41 and a second electrode 42, the first electrode 41 comprises a first conductive post 411, the second electrode 42 comprises a second conductive post 421, the first conductive post 411 is arranged in the first via 11, one end of the first conductive post 411 is flush with or protrudes from the first surface, the second conductive post 421 is arranged in the second via 12, and the second conductive post 421 is connected to the first conductive plate 21.

[0072] As shown in FIG. 6, the first conductive plate 21 has a first portion 211 and a second portion, the first portion 211 has a first projection on the substrate 1, and the first projection does not overlap with a second projection of the second conductive plate 23 on the substrate 1, the second portion has a second projection on the substrate 1, and the second projection overlaps with the second projection of the second conductive plate 23 on the substrate 1, and the second conductive post 421 is connected to the first portion 211. By connecting the second conductive post 421 to the first portion 211 of the first conductive plate 21, the influence of the warping of the second conductive post 421 on the flatness of the first conductive plate 21 can be better reduced.

[0073] The filter can further comprise a first insulating layer 3, the first insulating layer 3 is arranged on the first surface of the substrate 1, the first insulating layer 3 covers the composite structure 2, the first insulating layer 3 is provided with a first opening 31 and a third opening 33, the first opening 31 exposes the substrate 1, and the third opening 33 exposes the second conductive plate 23. The first electrode 41 can further comprise a first conductive part 412, the first conductive part 412 is arranged in the first opening 31 of the substrate 1, the first conductive post 411 has a first projection on the first surface of the substrate 1, and the first projection is located in a first projection of the first conductive part 412 on the first surface of the substrate 1, and the first conductive part 412 is connected to one end of the first conductive post 411 close to the first surface of the substrate 1. The second electrode 42 can further comprise a second conductive part 422, the second conductive part 422 is arranged in the second opening 32, and the second conductive part 422 is connected to the first portion 211 of the first electrode plate. The second conductive structure further comprises a third electrode 43, the third electrode 43 is arranged on a side of the second conductive plate 23 away from the substrate 1, and the third electrode 43 is connected to the second conductive plate 23. The first insulating layer 3 can form insulation between the first conductive plate 21, the second conductive plate 23, the first conductive part 412, the second conductive part 422 and the third electrode 43, so as to avoid short circuit between the first conductive plate 21, the second conductive plate 23, the first conductive part 412, the second conductive part 422 and the third electrode 43.

[0074] The filter can further include a second insulating layer 5 disposed on the side of the first conductive part 412, the second conductive part 422, the third electrode 43 and the first insulating layer 3 away from the substrate 1, the second insulating layer 5 being provided with a fourth via hole 51 and a fifth via hole 52, and the filter further including a second conductive structure including a fourth electrode 61 and a fifth electrode 62, the fourth electrode 61 including a fourth conductive part 612 and a fourth conductive column 611, and the fifth electrode 62 including a fifth conductive part 622 and a fifth conductive column 621, the fourth conductive column 611 being disposed in the fourth via hole 51, the fifth conductive column 621 being disposed in the fifth via hole 52, the fourth conductive column 611 being connected to the first conductive part 412 at the end thereof close to the substrate 1, and the fifth conductive column 621 being connected to the third electrode 43 at the end thereof close to the substrate 1. The end of the fourth conductive column 611 away from the substrate 1 and the end of the fifth conductive column 621 away from the substrate 1 protrude from the side of the second insulating layer 5 away from the substrate 1, the fourth conductive part 612 being disposed on the side of the fourth conductive column 611 away from the substrate 1, and the fifth conductive part 622 being disposed on the side of the fifth conductive column 621 away from the substrate 1, the fourth conductive part 612 being connected to the end of the fourth conductive column 611 away from the substrate 1, and the fifth conductive part 622 being connected to the end of the fifth conductive column 621 away from the substrate 1.

[0075] The filter can further include a third insulating layer 7, a first conductive pin 81 and a second conductive pin 82, the third insulating layer 7 being disposed on the side of the fourth conductive part 612, the fifth conductive part 622 and the second insulating layer 5 away from the substrate 1, the first conductive pin 81 passing through the third insulating layer 7 and being connected to the fourth conductive part 612, and the second conductive pin 82 passing through the third insulating layer 7 and being connected to the fifth conductive part 622. The fifth conductive part 622 covers the normal projection of the second electrode 42 on the substrate 1.

[0076] The first via hole 11 and the second via hole 12 pass through the substrate 1 and extend from the first surface to the second surface, the other ends of the first conductive column 411 and the second conductive column 421 being flush with or protruding from the second surface, and the filter further including a first conductive layer 9 disposed on the second surface of the substrate 1 and connected to the first conductive column 411 and the second conductive column 421, respectively. The integrated passive device further includes a fourth insulating layer 10 covering the side of the first conductive layer 9 away from the substrate 1 and the area of the second surface of the substrate 1 not overlapping the first conductive layer 9, and the fourth insulating layer 10 protecting and insulating the first conductive layer 9.

[0077] As shown in FIGS. 7-11, to simplify the process, a via hole 212 can be provided on the first portion 211 of the first conductive plate 21, and the second conductive part 422 is connected with the second conductive post 421 through the via hole 212. Through one-time copper filling process, the first electrode 41 is formed in the first opening 31 and the first via hole 11, the second electrode 42 is formed in the second opening 32, the via hole 212 and the second via hole 12, and the third electrode 43 is formed in the third opening 33.

[0078] As shown in FIG. 8, the orthographic projection of the fourth electrode 61 and the fifth electrode 62 on the substrate 1 can not overlap with the orthographic projection of the second conductive part 422 and the second conductive post 421 on the substrate 1. As shown in FIG. 9, the integrated passive device can further include a sixth electrode 63 connected with the second conductive part 422 away from the substrate 1 through the second insulating layer 5, and the sixth electrode 63 is flush with or protrudes from the side of the second insulating layer 5 away from the substrate 1. The integrated passive device can further include a third conductive pin 83 connected with the sixth electrode 63 through the third insulating layer 7.

[0079] As shown in FIG. 10, the difference from FIGS. 8 and 9 is that the second conductive structure fourth electrode 61 and the fifth electrode 62, the fourth electrode 61 only includes a fourth conductive part 612, and the fifth electrode 62 includes a fifth conductive part 622, in order to simplify the film layer structure of the integrated passive device, the fourth conductive part 612 is arranged on the side of the first conductive part 412 away from the substrate 1, and the fourth conductive part 612 is connected with the side of the first conductive part 412 away from the substrate 1, and the fifth conductive part 622 is arranged on the side of the third electrode 43 away from the substrate 1, and the fifth conductive part 622 is connected with the side of the third electrode 43 away from the substrate 1.

[0080] The filter further includes a second insulating layer 5, a first conductive pin 81 and a second conductive pin 82, the second insulating layer 5 is arranged on the side of the fourth conductive part 612, the fifth conductive part 622 and the first insulating layer 3 away from the substrate 1, the first conductive pin 81 is connected with the fourth conductive part 612 through the second insulating layer 5, and the second conductive pin 82 is connected with the fifth conductive part 622 through the second insulating layer 5. The orthographic projection of the first conductive part 412 on the substrate 1 is located in the orthographic projection of the fourth conductive part 612 on the substrate 1, and the orthographic projection of the third electrode 43 on the substrate 1 is located in the orthographic projection of the fifth conductive part 622 on the substrate 1. The orthographic projection of the fifth conductive part 622 on the substrate 1 covers the orthographic projection of the second electrode 42 on the substrate 1.

[0081] As shown in Fig. 11, the orthographic projection of the fourth conductive part 612 and the fifth conductive part 622 on the substrate 1 does not overlap with the orthographic projection of the second electrode 42 on the substrate 1, and the filter can further comprise a third conductive pin 83, which is connected with the first part 211 of the first conductive plate 21 through the second insulating layer 5 and the first insulating layer 3 when the first part 211 of the first substrate 1 is not provided with the through hole 212 and the second electrode 42 is not provided with the second conductive part 422. As shown in Fig. 12, when the first part 211 of the first substrate 1 is provided with the through hole 212 and the second electrode 42 comprises the second conductive part 422, the third conductive pin 83 is connected with the second conductive part 422 through the second insulating layer 5 and the first insulating layer 3.

[0082] It can be understood that the first conductive pin 81 is an input terminal of the filter circuit, the first conductive column 411 is an inductor L, the first conductive plate 21 of the composite structure 2 is a first pole plate of a capacitor, the second conductive plate 23 of the composite structure 2 is a second pole plate of the capacitor, the second conductive pin 82 is an output terminal of the filter circuit, the first conductive pin 81 is connected with the first conductive column 411 through the fourth electrode 61 and the first electrode 41, the first conductive column 411 is connected with the first conductive plate 21 through the first conductive layer 9 and the second conductive column 421, the second conductive plate 23 is connected with the second conductive pin 82 through the third electrode 43 and the fifth electrode 62, and the first conductive plate 21 is connected with the third conductive column through the second electrode 42.

[0083] As shown in Fig. 13, the input terminal of the filter circuit is connected with an inductor L, the output terminal of the inductor L is connected with an input terminal of a capacitor C, the output terminal of the capacitor C is connected with an output terminal of the filter circuit, and the output terminal of the inductor L can be connected with a reference voltage in addition to the input terminal of the capacitor C, for example, the output terminal of the inductor L of the filter circuit is connected with the ground.

[0084] The embodiment of the present application provides a manufacturing method of an integrated passive device. As shown in Fig. 7 and Figs. 14 to 22, the method can comprise:

[0085] In step S10, a substrate 1 is provided, which has a first surface and a second surface arranged oppositely.

[0086] In step S20, a first conductive plate 21 is formed on the first surface of the substrate 1, a dielectric layer 22 is formed on the side of the first conductive plate 21 away from the substrate 1, and a second conductive plate 23 is formed on the side of the dielectric layer 22 away from the substrate 1, so as to form a composite structure 2, wherein the first conductive plate 21 has a first part 211, and the orthographic projection of the second conductive plate 23 on the substrate 1 does not overlap with the orthographic projection of the first part 211 on the substrate 1.

[0087] Step S30, forming the first via hole 11 and the second via hole 12 on the substrate 1, forming the first conductive column 411 in the first via hole 11, and forming the second conductive column 421 in the second via hole 12, one end of the first conductive column 411 flushes or protrudes from the first surface, and the second conductive column 421 passes through the second via hole 12 and is connected with the first part 211.

[0088] The specific structure and technical effects involved in the method can refer to the integrated passive device mentioned above, since the specific structure and beneficial effects of the integrated passive device have been described in detail above, and will not be repeated here.

[0089] The manufacturing method of the integrated passive device involved in the embodiment of the application will be described in detail below with reference to the integrated passive device in FIGS. 7-9.

[0090] In step S20, as shown in FIGS. 14-17, the first conductive plate 21 is formed on the first surface of the substrate 1, the dielectric layer 22 is formed on the side of the first conductive plate 21 away from the substrate 1, and the second conductive plate 23 is formed on the side of the dielectric layer 22 away from the substrate 1, which can include:

[0091] As shown in FIG. 14, the first conductive plate 21 is formed on the first surface of the substrate 1 by a physical vapor deposition (PVD) process, and the through hole 212 is formed on the first part 211 of the first conductive plate 21. In order to improve the process accuracy of the first conductive plate 21 and reduce the left-right deviation of the first conductive plate 21, dry etching can be used to form the first conductive plate 21 and the through hole 212.

[0092] As shown in FIG. 15, the dielectric cover layer 220 is formed by a chemical vapor deposition (CVD) process, which covers the first conductive plate 21, the through hole 212, and the area of the substrate 1 that does not overlap with the first conductive plate 21. The material of the dielectric cover layer 220 can be SiNx.

[0093] As shown in FIG. 16, the second conductive plate 23 is formed on the side of the dielectric cover layer 220 away from the substrate 1, and the orthographic projection of the second conductive plate 23 on the substrate 1 does not overlap with the orthographic projection of the first part 211 on the substrate 1.

[0094] As shown in FIG. 17, the dielectric cover layer 220 is dry etched to remove the part of the dielectric cover layer 220 in the through hole 212 and the part of the dielectric cover layer 220 in the area of the substrate 1 that does not overlap with the first conductive plate 21, forming the dielectric layer 22. The first conductive plate 21, the dielectric layer 22, and the second conductive plate 23 form a composite structure 2, which is a capacitor.

[0095] The forming, in step S30, of the first via 11 and the second via 12 on the substrate 1, the first conductive pillar 411 in the first via 11, and the second conductive pillar 421 in the second via 12 can include:

[0096] As shown in FIG. 18, the first insulating layer 3 is formed to cover the composite structure 2 and the first face of the substrate 1, the first opening 31, the second opening 32, and the third opening 33 are formed on the first insulating layer 3, the orthographic projection of the via 212 on the substrate 1 is located within the orthographic projection of the second opening 32 on the substrate 1, the first opening 31 and the second opening 32 expose the substrate 1, and the third opening 33 exposes the second conductive plate 23.

[0097] As shown in FIG. 19, the first via 11 is formed in the region of the substrate 1 located within the first opening 31, the second via 12 is formed in the region of the substrate 1 located within the second opening 32, the first electrode 41 is formed in the first opening 31 and the first via 11, the second electrode 42 is formed in the second opening 32, the via 212, and the second via 12, the third electrode 43 is formed in the third opening 33 and connected with the second conductive plate 23, the portion of the first electrode 41 located within the first via 11 is the first conductive pillar 411, the portion of the second electrode 42 located within the second via 12 is the second conductive pillar 421, the portion of the first electrode 41 located within the first opening 31 is the first conductive part 412, the portion of the second electrode 42 located within the second opening 32 is the second conductive part 422, and the portions of the first conductive part 412, the second conductive part 422, and the third electrode 43 protruding from the side of the first insulating layer 3 away from the substrate 1 are removed by a mask process.

[0098] As shown in FIG. 20, the method can further include forming the fourth via 51 and the fifth via 52 on the second insulating layer 5, forming the fourth electrode 61 and the fifth electrode 62 on the side of the second insulating layer 5 away from the substrate 1, the fourth conductive pillar 611 is located in the fourth via 51, the fifth conductive pillar 621 is located in the fifth via 52, the fourth conductive part 612 is located on the side of the fourth conductive pillar 611 away from the substrate 1, the fifth conductive part 622 is located on the side of the fifth conductive pillar 621 away from the substrate 1, the end of the fourth conductive pillar 611 close to the substrate 1 is connected with the first conductive part 412, the end of the fifth conductive pillar 621 close to the substrate 1 is connected with the third electrode 43, the fourth conductive part 612 is connected with the end of the fourth conductive pillar 611 away from the substrate 1, and the fifth conductive part 622 is connected with the end of the fifth conductive pillar 621 away from the substrate 1.

[0099] As shown in Fig. 21, the method can further include forming a third insulating layer 7 on the fourth conductive portion 612, the fifth conductive portion 622 and the second insulating layer 5 away from the substrate 1, forming a first conductive pin via 71 and a second conductive pin via 72 on the third insulating layer 7, forming a first conductive pin 81 in the first conductive pin via 71, forming a second conductive pin 82 in the second conductive pin via 72, the first conductive pin 81 and the second conductive pin 82 protruding from the third insulating layer 7 away from the substrate 1.

[0100] As shown in Fig. 22, the method can further include thinning the substrate 1 until the first conductive pillar 411 and the second conductive pillar 421 are exposed near the second end of the substrate 1, forming a first conductive layer 9 on the second face of the substrate 1, the first conductive layer 9 being connected to the first conductive pillar 411 and the second conductive pillar 421 respectively. As shown in Fig. 7, the method can further include forming a fourth insulating layer 10, the fourth insulating layer 10 covering the first conductive layer 9 and the portion of the second face of the substrate 1 not overlapping with the first conductive layer 9.

[0101] Other embodiments of the application will be apparent to those skilled in the art from consideration of the specification and practice of the features of the application as set forth herein. It is intended that the specification and examples be considered as exemplary only, with the true scope and spirit of the application being indicated by the following claims.

Claims

1. An integrated passive device, wherein, The integrated passive device comprises: a substrate having a first surface and a second surface arranged oppositely, the substrate being provided with a first via hole and a second via hole, the first via hole and the second via hole extending from the first surface to the second surface; a composite structure comprising a first conductive plate, a dielectric layer and a second conductive plate, the first conductive plate being arranged on the first surface of the substrate, the dielectric layer being arranged on a side of the first conductive plate away from the substrate, and the second conductive plate being arranged on a side of the dielectric layer away from the substrate; a first conductive structure comprising a first electrode and a second electrode, the first electrode comprising a first conductive column, the second electrode comprising a second conductive column, the first conductive column being arranged in the first via hole, one end of the first conductive column being flush with or protruding from the first surface, and the second conductive column being arranged in the second via hole and connected to the first conductive plate; the first conductive plate has a first part, a projection of the first part on the substrate and a projection of the second conductive plate on the substrate do not overlap, and the second conductive column is connected to the first part.

2. The integrated passive device of claim 1, wherein, The first part of the first conductive plate is provided with a through hole, and the second electrode further comprises a second conductive part, the second conductive part being connected to one end of the second conductive column close to the first surface of the substrate through the through hole.

3. The integrated passive device of claim 2, wherein, The first electrode further comprises a first conductive part, the first conductive structure further comprises a third electrode, the first conductive part being arranged on the first surface of the substrate, the first conductive part being connected to one end of the first conductive column close to the first surface of the substrate, the third electrode being arranged on a side of the second conductive plate away from the substrate, and the third electrode being connected to the second conductive plate.

4. The integrated passive device of claim 3, wherein, The integrated passive device further comprises a first insulating layer, the first insulating layer being arranged on the first surface of the substrate, the first insulating layer filling and covering the composite structure, the first insulating layer being provided with a first opening, a second opening and a third opening, the first opening and the second opening exposing the substrate, and the third opening exposing the second conductive plate, the first conductive part being arranged in the first opening, the second conductive part being arranged in the second opening, and the third electrode being arranged in the third opening.

5. The integrated passive device of claim 4, wherein, The integrated passive device further comprises a second conductive structure, the second conductive structure comprising a fourth electrode and a fifth electrode, the fourth electrode comprising a fourth conductive part, the fifth electrode comprising a fifth conductive part, the fourth conductive part being arranged on a side of the first conductive part away from the substrate, the fourth conductive part being connected to one end of the first conductive part away from the substrate, the fifth conductive part being arranged on a side of the third electrode away from the substrate, and the fifth conductive part being connected to one end of the third electrode away from the substrate.

6. The integrated passive device of claim 5, wherein, The integrated passive device further comprises a second insulating layer, a first conductive pin and a second conductive pin, the second insulating layer being arranged on a side of the fourth conductive part, the fifth conductive part and the first insulating layer away from the substrate, the first conductive pin being connected to the fourth conductive part through the second insulating layer, and the second conductive pin being connected to the fifth conductive part through the second insulating layer.

7. The integrated passive device of claim 6, wherein, The second conductive structure has a projection on the substrate which does not overlap with the projection of the second conductive part and the second conductive post on the substrate, and the integrated passive device further comprises a third conductive pin which is connected with the second conductive part through the second insulating layer and the first insulating layer.

8. The integrated passive device of claim 6, wherein, The second conductive structure has a projection on the substrate which does not overlap with the projection of the second conductive post on the substrate, and the integrated passive device further comprises a third conductive pin which is connected with the first part of the first conductive plate through the second insulating layer and the first insulating layer.

9. The integrated passive device of claim 4, wherein, The integrated passive device further comprises a second insulating layer and a second conductive structure, the second insulating layer is arranged on the side of the first conductive part, the second conductive part, the third electrode and the first insulating layer away from the substrate, the second conductive structure comprises a fourth electrode and a fifth electrode, the fourth electrode and the fifth electrode are arranged on the side of the second insulating layer away from the substrate, the fourth electrode is connected with the first conductive part through the second insulating layer, and the fifth electrode is connected with the third electrode through the second insulating layer.

10. The integrated passive device of claim 9, wherein, The integrated passive device further comprises a third insulating layer, a first conductive pin and a second conductive pin, the third insulating layer is arranged on the side of the fourth electrode, the fifth electrode and the second insulating layer away from the substrate, the first conductive pin is connected with the fourth electrode through the third insulating layer, and the second conductive pin is connected with the fifth electrode through the third insulating layer.

11. The integrated passive device of claim 10, wherein, The second conductive structure has a projection on the substrate which does not overlap with the projection of the second conductive part and the second conductive post on the substrate, and the integrated passive device further comprises a third conductive pin which is connected with the second conductive part through the second insulating layer and the first insulating layer.

12. The integrated passive device of claim 1, wherein, The first via and the second via extend through the substrate from the first surface to the second surface, the first conductive post and the second conductive post have an end away from the first conductive plate which is flush with or protrudes from the second surface, and the integrated passive device further comprises a first conductive layer arranged on the second surface of the substrate, and the first conductive layer is connected with the first conductive post and the second conductive post respectively.

13. The integrated passive device of claim 12, wherein, The integrated passive device further comprises a fourth insulating layer which covers the side of the first conductive layer away from the substrate and the area of the second surface of the substrate which does not overlap with the first conductive layer.

14. A method of fabricating the integrated passive device of any of claims 1 to 13, wherein, The method comprises: providing a substrate having a first surface and a second surface arranged oppositely; forming a first conductive plate on the first surface of the substrate, forming a dielectric layer on the side of the first conductive plate away from the substrate, and forming a second conductive plate on the side of the dielectric layer away from the substrate, the first conductive plate, the dielectric layer and the second conductive plate forming a composite structure; Forming a first via and a second via on the substrate, forming a first conductive post in the first via, forming a second conductive post in the second via, one end of the first conductive post flushes or protrudes from the first surface, the second conductive post is provided in the second via, and the second conductive post is connected to the first conductive plate.

15. The method of fabricating an integrated passive device according to claim 14, wherein, The integrated passive device is the integrated passive device of claim 2, a first conductive plate is formed on the first surface of the substrate, a dielectric layer is formed on the side of the first conductive plate away from the substrate, and a second conductive plate is formed on the side of the dielectric layer away from the substrate, comprising: Forming a first conductive plate on the first surface of the substrate, forming a via on a first portion of the first conductive plate; Forming a dielectric cover layer covering the first conductive plate, the via and the area of the substrate not overlapping with the first conductive plate; Forming a second conductive plate on the side of the dielectric cover layer away from the substrate, the orthographic projection of the second conductive plate on the substrate does not overlap with the orthographic projection of the first portion on the substrate; Dry etching the dielectric cover layer to remove the part of the dielectric cover layer in the via and the part of the dielectric cover layer in the area of the substrate not overlapping with the first conductive plate, forming a dielectric layer.

16. The method of fabricating an integrated passive device according to claim 15, wherein, The integrated passive device is the integrated passive device of claim 4, forming a first via and a second via on the substrate, forming a first conductive post in the first via, and forming a second conductive post in the second via, comprising: Forming a first insulating layer covering the composite structure and the first surface of the substrate; Forming a first opening, a second opening and a third opening on the first insulating layer, the orthographic projection of the via on the first conductive plate on the substrate is located in the orthographic projection of the second opening on the substrate, the first opening and the second opening expose the substrate, and the third opening exposes the second conductive plate; Forming a first via on the area of the substrate in the first opening and forming a second via on the area of the substrate in the second opening; Forming a first electrode in the first opening and the first via, forming a second electrode in the second opening, the via and the second via, and forming a third electrode in the third opening, the third electrode is connected to the second conductive plate, the part of the first electrode in the first via is a first conductive post, the part of the second electrode in the second via is a second conductive post, the part of the first electrode in the first opening is a first conductive part, and the part of the second electrode in the second opening is a second conductive part; Removing the part of the first conductive part, the second conductive part and the third electrode protruding from the side of the first insulating layer away from the substrate.

17. The method of fabricating an integrated passive device according to claim 16, wherein, The integrated passive device is the integrated passive device of claim 12, and the method further comprises connecting a first conductive layer to the first conductive post and the second conductive post respectively, and connecting the first conductive layer to the first conductive post and the second conductive post respectively comprising: Thinning the substrate until the first conductive post and the second conductive post are exposed; A first conductive layer is formed on a second surface of the substrate, and the first conductive layer is connected with the first conductive column and the second conductive column respectively.

18. An electronic device, comprising: An integrated passive device comprising any one of claims 1 to 13.

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