Information transmitting apparatus, information receiving apparatus, communication apparatus, information transmission method, chip

Abstract

An information sending device, an information receiving device, a communication device, an information transmission method and a chip are applied to the field of data communication. The information sending device is arranged in a physical layer of a general chip particle interconnection high-speed interconnection interface of a first die. The information sending device comprises a first unit and a second unit. The first unit is configured to generate a first boundary timing interval and a second boundary timing interval in response to receiving an abnormal event. The second unit is configured to generate a data frame based on the abnormal event, obtain a transmission frame based on the data frame, the first boundary timing interval and the second boundary timing interval, and send the transmission frame to a second die through a sideband link between the first die and the second die, wherein the first die and the second die are in a point-to-point topology. The information sending device introduces reliable communication on the sideband link to transmit the abnormal event, does not affect main band data transmission, avoids conflict with upper layer data transmission, and does not interfere with normal operation of the main band.

Description

Technical Field

[0001] The embodiments of this disclosure are applied to the field of data communication, specifically relating to an information sending device, an information receiving device, a communication device, a chip, an electronic device, an information transmission method, and a non-transitory computer-readable storage medium. Background Technology

[0002] In a point-to-point topology, two devices (such as chips, dies, etc.) are directly connected and communicate. The communication link includes a mainband link and a sideband link. The mainband link is the main transmission channel in the point-to-point link that carries the main services and core data, while the sideband link is an auxiliary frequency band or channel that exists alongside the mainband link and is used for auxiliary transmission, synchronization, signaling, or extended services.

[0003] When an anomaly is detected in the transmission link, such as a power failure (e.g., power outage, voltage drop, instantaneous voltage fluctuation) that reduces signal quality, or a hardware anomaly such as a PHY (Physical Layer), it may be necessary to interrupt the main link or perform other processing to repair the anomaly.

[0004] Currently, the transmission of abnormal events (such as interrupt signals) directly relies on mainband communication. Mainband communication requires a handshake mechanism to be executed first, which results in slow transmission speed and limited response speed. Furthermore, this method will occupy the transmission of core mainband services and may conflict with upper-layer data transmission, failing to meet the requirements for low-latency and independent alarms for abnormal events. Summary of the Invention

[0005] This invention application provides at least one embodiment of an information transmission device disposed in the physical layer of a general-purpose chip interconnect high-speed interconnect interface of a first die. The information transmission device includes a first unit and a second unit. The first unit is configured to generate a first boundary timing interval and a second boundary timing interval in response to receiving an abnormal event. The second unit is configured to: generate a data frame based on the abnormal event; obtain a transmission frame based on the data frame, the first boundary timing interval, and the second boundary timing interval; and transmit the transmission frame to the second die through a sideband link between the first die and the second die. The first die and the second die are in a point-to-point topology. In the transmission frame, the first boundary timing interval is located before the header of the data frame, and the second boundary timing interval is located after the tail of the data frame. The first boundary timing interval and the second boundary timing interval are used to indicate the boundaries of the transmission frame.

[0006] For example, in at least one embodiment of the present invention, an information transmission device is provided, wherein the first boundary timing interval includes a predetermined timing interval and a start trigger signal, wherein the predetermined timing interval is located before the start trigger signal; the second boundary timing interval includes an end trigger signal and the predetermined timing interval, wherein the end trigger signal is located before the predetermined timing interval; the start trigger signal and the end trigger signal are predefined signals used to explicitly identify the boundary of the data frame, and the start trigger signal and the end trigger signal are different.

[0007] For example, in at least one embodiment of the present invention, an information transmission device is provided, wherein the length of the predetermined time interval is greater than or equal to a first time threshold, there is no effective signal transmission within the predetermined time interval, and the clock signal within the predetermined time interval has a duty cycle offset relative to the clock signal in other time periods.

[0008] For example, in at least one embodiment of this invention, an information transmission device is provided. The first unit performs the operation of generating a first boundary timing interval and a second boundary timing interval in response to receiving an abnormal event, including performing the following operations: in response to receiving the abnormal event, adjusting the duty cycle of the clock signal to a first duty cycle and maintaining it for at least a first time threshold; after maintaining it for at least the first time threshold, adjusting the clock signal back to a second duty cycle and simultaneously outputting the start trigger signal; after the data frame ends, outputting the end trigger signal; after the end trigger signal ends, adjusting the duty cycle of the clock signal to the first duty cycle and maintaining it for at least the first time threshold; after maintaining it for at least the first time threshold, adjusting the clock signal back to the second duty cycle; wherein the first duty cycle and the second duty cycle are different, and no signal transmission is performed in the timing interval where the duty cycle of the clock signal is the first duty cycle.

[0009] For example, in at least one embodiment of the present invention, an information sending device is provided, wherein the second unit performs the operation of generating a data frame based on the abnormal event, including performing the following operations: determining an error information code based on the abnormal event; and encapsulating the error information code according to a predetermined format to obtain the data frame.

[0010] For example, in at least one embodiment of this application, an information transmission device is provided, wherein the data frame further includes a preamble, version information, an identifier of the die in which the abnormal event occurred, and a checksum.

[0011] For example, in at least one embodiment of this application, an information sending device is provided. In response to receiving the abnormal event, the information sending device caches the abnormal event in a queue for sequential processing. After an abnormal event is encapsulated into the transmission frame and sent, the next abnormal event is processed.

[0012] For example, in at least one embodiment of this application, an information sending device is provided, which is further configured to detect whether a transmission frame has a transmission error, and to record a transmission error event in response to detecting a transmission error in the transmission frame; wherein, detecting whether a transmission frame has a transmission error includes: detecting whether each part of the transmission frame has been successfully sent within a second time threshold, and determining that a transmission error has occurred in response to at least a part of the transmission frame still not being successfully sent after the second time threshold has been exceeded; or performing a format verification on the transmission frame, and determining that a transmission error has occurred in response to the format verification failing.

[0013] For example, in at least one embodiment of this application, an information transmission device is provided, and the abnormal event includes at least one of the following: an interruption event sent from upper-layer software, an abnormal event obtained through active sensing, and an interruption event detected from the physical layer.

[0014] This invention application provides at least one embodiment of an information receiving device disposed in the physical layer of a general-purpose chip interconnect high-speed interconnect interface of a first die. The information receiving device includes a third unit and a fourth unit. The third unit is configured to receive a transmission frame transmitted through a sideband link between the first die and a second die, and to identify a first boundary timing interval and a second boundary timing interval in the transmission frame, wherein the first die and the second die are in a point-to-point topology. The fourth unit is configured to perform frame synchronization and parse data frames in the transmission frame. In the transmission frame, the first boundary timing interval is located before the header of the data frame, and the second boundary timing interval is located after the tail of the data frame, and the first boundary timing interval and the second boundary timing interval are used to indicate the boundaries of the transmission frame.

[0015] For example, in at least one embodiment of the present invention, an information receiving device is provided, wherein the third unit is configured to first identify the first boundary timing interval, and the fourth unit is configured to perform frame synchronization and parse the data frames in the transmission frame after successfully identifying the first boundary timing interval; the third unit is further configured to identify the second boundary timing interval after successfully parsing the data frames in the transmission frame.

[0016] For example, in at least one embodiment of the present invention, an information receiving device is provided, wherein the information receiving device is configured to trigger an emergency handling process corresponding to an abnormal event in the transmission of the transmission frame when the first boundary timing interval and the second boundary timing interval are successfully identified and the data frame in the transmission frame is successfully parsed; and to discard the transmission frame when the identification fails in the first boundary timing interval or the second boundary timing interval, or when the parsing of the data frame in the transmission frame fails.

[0017] For example, in at least one embodiment of the present invention, an information receiving device is provided. When the third unit performs the identification of a first boundary timing interval in the transmission frame, it includes performing the following operations: in response to detecting that a predetermined timing boundary in the first boundary timing interval meets a predetermined condition, and detecting the start trigger signal after the predetermined timing boundary, it determines that the identification of the first boundary timing interval in the transmission frame is successful; otherwise, it determines that the identification of the first boundary timing interval in the transmission frame is unsuccessful. Specifically, in response to the predetermined timing interval not containing any valid data signal, having a duration greater than or equal to a first time threshold, and the clock signal in the predetermined timing interval having a duty cycle offset relative to clock signals in other time periods, it determines that the predetermined timing boundary meets the predetermined condition; otherwise, it determines that the predetermined timing boundary does not meet the predetermined condition.

[0018] For example, in at least one embodiment of the present invention, an information receiving device is provided. When the third unit identifies a second boundary timing interval in the transmission frame, it includes performing the following operations: in response to detecting the end trigger signal in the second boundary timing interval and the predetermined timing boundary in the second boundary timing interval satisfying the predetermined condition, it determines that the identification of the second boundary timing interval in the transmission frame is successful; otherwise, it determines that the identification of the second boundary timing interval in the transmission frame is unsuccessful.

[0019] For example, in at least one embodiment of this invention, an information receiving device is provided, wherein the data frame includes a preamble, an error information code corresponding to an abnormal event in the transmission frame, and a checksum. When the fourth unit performs frame synchronization and parses the data frame in the transmission frame, it includes performing the following operations: in response to parsing the preamble in the data frame, synchronizing the clock signals of the first die and the second die and preparing to receive data content; parsing each data content included in the data frame according to a predetermined format of the data frame, and performing data verification on each data content in conjunction with the checksum; in response to the data verification passing, determining that the parsing of the data frame in the transmission frame was successful, and determining the abnormal event according to the error information code; in response to the data verification failing, determining that the parsing of the data frame in the transmission frame failed.

[0020] For example, in at least one embodiment of this application, an information receiving device is provided, which is further configured to: record a reception anomaly event in response to a failure to identify the first boundary timing interval or the second boundary timing interval, or a failure to parse a data frame in the transmission frame; the information receiving device is further configured to: adjust the relevant generation parameters of the predetermined timing intervals included in the first boundary timing interval and the second boundary timing interval in response to a number of occurrences of the reception anomaly event exceeding a predetermined threshold, wherein the duration of the predetermined timing interval is greater than or equal to a first time threshold, the first time threshold being determined by a silent count threshold and a unit interval, and the relevant generation parameters including at least one of the silent count threshold and the unit interval.

[0021] This application provides at least one embodiment of a communication device that integrates an information transmitting device as described in at least one embodiment of this application, and an information receiving device as described in at least one embodiment of this application.

[0022] This application provides at least one embodiment of a chip, including multiple dies, wherein the physical layer of the universal chip interconnect high-speed interconnect interface of each die is provided with a communication device according to at least one embodiment of this application.

[0023] This application provides at least one embodiment of an electronic device, including the chip described in at least one embodiment of this application.

[0024] This invention application provides at least one embodiment of an information transmission method, comprising: in response to receiving an abnormal event in a first die, generating a first boundary timing interval and a second boundary timing interval; generating a data frame based on the abnormal event; obtaining a transmission frame based on the data frame, the first boundary timing interval, and the second boundary timing interval, and transmitting the transmission frame to the second die via a sideband link between the first die and the second die, wherein the first die and the second die are in a point-to-point topology; wherein, in the transmission frame, the first boundary timing interval is located before the header of the data frame, and the second boundary timing interval is located after the tail of the data frame, and the first boundary timing interval and the second boundary timing interval are used to indicate the boundaries of the transmission frame.

[0025] This invention application provides at least one embodiment of an information transmission method, comprising: receiving a transmission frame transmitted via a sideband link between a first die and a second die; identifying a first boundary timing interval and a second boundary timing interval in the transmission frame, wherein the first die and the second die are in a point-to-point topology; after successfully identifying the first boundary timing interval, performing frame synchronization and parsing data frames in the transmission frame; wherein, in the transmission frame, the first boundary timing interval is located before the header of the data frame, and the second boundary timing interval is located after the tail of the data frame, and the first boundary timing interval and the second boundary timing interval are used to indicate the boundaries of the transmission frame.

[0026] This application provides at least one embodiment of a non-transitory computer-readable storage medium storing computer-executable instructions, which, when executed by a processor, implement the information transmission method according to at least one embodiment of this application.

[0027] For point-to-point topology dies, this invention proposes to set up an information transmission device in the physical layer of the general-purpose high-speed interconnect interface of the die, introduce reliable communication on the sideband links between dies to transmit abnormal events, without affecting the mainband data transmission, avoiding conflicts with upper-layer data transmission, and without interfering with the normal operation of the mainband; the transmission frame establishes a clear occupancy boundary with the boundary timing intervals of the header and tail, reducing the false alarm or missed alarm event rate between dies; and the transmission frame is dedicated to abnormal event alarm, without the need for the handshake process of mainband communication, and can issue early warnings and synchronize abnormal information earlier when an abnormal event is received (e.g., before the mainband is affected). Attached Figure Description

[0028] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings of the embodiments will be briefly described below. Obviously, the drawings described below only relate to some embodiments of this disclosure and are not intended to limit this disclosure.

[0029] Figure 1 This is a schematic diagram of a point-to-point topology between dies;

[0030] Figure 2 A schematic structural diagram of an information transmission device provided in at least one embodiment of this disclosure;

[0031] Figure 3A A schematic structural diagram of a transmission frame provided in at least one embodiment of this disclosure;

[0032] Figure 3B A schematic structural diagram of a data frame provided for at least one embodiment of this disclosure;

[0033] Figure 4 A transaction processing flowchart of an information transmission device provided in at least one embodiment of this disclosure;

[0034] Figure 5 A schematic structural diagram of an information receiving device provided in at least one embodiment of this disclosure;

[0035] Figure 6 A transaction processing flowchart of an information receiving device provided in at least one embodiment of this disclosure;

[0036] Figure 7 A schematic structural diagram of a communication device provided in at least one embodiment of this disclosure;

[0037] Figure 8 A schematic structural diagram of a chip provided for at least one embodiment of this disclosure;

[0038] Figure 9 This is a schematic diagram of the architecture of a general-purpose graphics processing unit (GPGPU).

[0039] Figure 10 A schematic structural diagram of an electronic device provided for at least one embodiment of this disclosure;

[0040] Figure 11 A schematic block diagram of an electronic device provided in one embodiment of this disclosure;

[0041] Figure 12 A schematic flowchart illustrating an information transmission method provided in at least one embodiment of this disclosure;

[0042] Figure 13 A schematic flowchart illustrating another information transmission method provided in at least one embodiment of this disclosure;

[0043] Figure 14 A schematic diagram of a non-transitory computer-readable storage medium provided for at least one embodiment of the present disclosure. Detailed Implementation

[0044] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0045] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms "first," "second," and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described object changes. To keep the following description of the embodiments of this disclosure clear and concise, detailed descriptions of some known functions and components are omitted.

[0046] Figure 1 This is a schematic diagram of a point-to-point topology between dies.

[0047] exist Figure 1 The example shows a first die and a second die, both of which include the physical layer of a general-purpose chip interconnect high-speed interconnect interface (CPI). Figure 1 The middle layer is the "physical layer". There are main band links and side band links between the first die and the second die. The main band links are used to transmit core services or main data, such as service valid data and payload data. The side band links are used to transmit auxiliary information, such as initialization, configuration, power supply, reset, link training, status, control signals, etc.

[0048] The PHY (Physical Layer) is the underlying hardware for high-speed communication. It is responsible for converting digital signals into high-speed analog electrical signals (transmission) and converting analog signals back into digital signals (reception). The PHY can be integrated into the die of a System-on-Chip (SoC). It is a core peripheral module of the chip and one of the core underlying modules for implementing communication functions in the SoC. The high-speed signal pins and pads of the PHY are arranged on the die edge, which is the physical interface area for signal interaction between the PHY and the outside world (or other modules within the SoC).

[0049] Different dies transmit information via high-speed interconnect protocols such as UCIe (Universal Chiplet Interconnect Express), a universal chiplet interconnect standard. Abnormal events must be synchronized and alarmed as early as possible. For example, if an abnormal event of a die is reported late, it will cause upper-layer protocols and adjacent dies to continuously send and receive invalid data, triggering a chain of errors or even system crashes. Early alarms can prevent the spread of errors. The interconnect between dies is a high-speed serial connection, which is extremely sensitive to bit errors, loss of lock, and link jitter. Low-latency alarms are necessary to quickly trigger retraining, reset, or bypass, avoiding prolonged disconnections and ensuring link reliability.

[0050] In the Universal Interconnect Interface (UCIe), the point-to-point communication handshake of the main band link requires the link initialization to be completed through the sideband first. After the physical layer completes the link training and state synchronization with the peer through the sideband, it transmits the state to the adapter layer through the physical layer-adapter layer interface (RDI). The adapter layer then reports the handshake and initialization completion information to the protocol layer through the adapter layer-protocol layer interface (FDI). After confirmation is transmitted layer by layer, the main band can establish a reliable point-to-point connection and enter the normal data transmission state.

[0051] Currently, abnormal events are directly transmitted via mainband communication. As mentioned above, the handshake process of mainband communication is time-consuming and has limited response speed, which cannot meet the requirements for low-latency alarms for abnormal events and may lead to problems such as error propagation or decreased link reliability. In addition, the mainband link is mainly used to transmit core business data. Using the mainband link to transmit abnormal information will occupy the mainband link and may conflict with upper-layer data transmission. In environments with frequent noise, crosstalk, or power supply fluctuations, the detection timeliness and stability of this solution are insufficient, and it cannot meet the requirements for low-latency, independent alarms for abnormal events.

[0052] This disclosure provides at least one embodiment of an information transmitting device, an information receiving device, a communication device, a chip, an electronic device, an information transmission method, and a non-transitory computer-readable storage medium.

[0053] In at least one embodiment, the information transmission device is disposed in the physical layer of the general-purpose chip interconnect high-speed interconnect interface of the first die, and includes a first unit and a second unit. The first unit is configured to generate a first boundary timing interval and a second boundary timing interval in response to receiving an abnormal event. The second unit is configured to: generate a data frame based on the abnormal event; obtain a transmission frame based on the data frame, the first boundary timing interval, and the second boundary timing interval; and transmit the transmission frame to the second die through a sideband link between the first die and the second die, wherein the first die and the second die are in a point-to-point topology. In the transmission frame, the first boundary timing interval is located before the header of the data frame, and the second boundary timing interval is located after the tail of the data frame. The first boundary timing interval and the second boundary timing interval are used to indicate the boundaries of the transmission frame.

[0054] In at least one embodiment, an information receiving device is also provided, which is disposed in the physical layer of the general-purpose chip interconnect high-speed interconnect interface of the first die. The information receiving device includes a third unit and a fourth unit. The third unit is configured to receive a transmission frame transmitted through a sideband link between the first die and the second die, and identify a first boundary timing interval and a second boundary timing interval in the transmission frame, wherein the first die and the second die are in a point-to-point topology. The fourth unit is configured to perform frame synchronization and parse the data frame in the transmission frame after successfully identifying the first boundary timing interval. In the transmission frame, the first boundary timing interval is located before the header of the data frame, and the second boundary timing interval is located after the tail of the data frame. The first boundary timing interval and the second boundary timing interval are used to indicate the boundaries of the transmission frame.

[0055] In at least one embodiment of this disclosure, for a point-to-point topology die, an information sending device and an information receiving device are set in the physical layer of the general-purpose chip interconnect high-speed interconnect interface of the die. Reliable communication is introduced on the sideband links between dies to transmit abnormal events without affecting the mainband data transmission, avoiding conflicts with upper-layer data transmission, and without interfering with the normal operation of the mainband. The transmission frame establishes a clear occupancy boundary with the boundary timing intervals of the header and tail, reducing the false alarm or missed alarm event rate between dies. Furthermore, the transmission frame is dedicated to abnormal event alarms, without the need for a handshake process in the mainband communication, and can issue an early warning and synchronize abnormal information earlier when an abnormal event is received (e.g., before the mainband is affected).

[0056] The embodiments of this disclosure will now be described in detail with reference to the accompanying drawings, but this disclosure is not limited to these specific embodiments.

[0057] Figure 2 A schematic structural diagram of an information transmission device provided for at least one embodiment of this disclosure.

[0058] Figure 2The diagram shows a schematic structural diagram of an information transmission device 100. This information transmission device is disposed in the physical layer of the general-purpose chip interconnect high-speed interconnect interface of the first die, and includes a first unit 101 and a second unit 102.

[0059] The physical layer is the physical layer of the Universal Chip Interconnect High-Speed ​​Interconnect Interface (UCHTI). The UCHTI includes a protocol layer, an adaptation layer, and a physical layer. The physical layer in this disclosure is the physical layer of the UCHTI.

[0060] A multi-die integration architecture integrates multiple dies (such as compute dies, I / O dies, and memory dies) into a single package, with the dies communicating point-to-point using protocols such as UCIe. The multiple dies include a first die and a second die, which are distinct dies.

[0061] The physical layer PHY is responsible for electrical transmission and reception, clock recovery, signal equalization and impedance matching, and realizes physical layer transmission of differential or parallel signals. The information transmission device 100 is set in the physical layer PHY.

[0062] For example, the information transmission device can be designed as a hardware module that integrates IP (Intellectual Property) cores such as the first unit and the second unit. The information transmission device can be set in the physical layer of the general-purpose chip interconnect high-speed interconnect interface of the bare die.

[0063] Sideband links typically connect directly to the analog front-end and control logic of the physical layer PHY, used to transmit low-speed control information such as clock, reset, link status, interrupt enable, and power mode. The information transmission device is located within the physical layer PHY, enabling direct physical layer communication, bypassing the mainband link, and allowing direct interaction within the die's physical layer. This achieves low-latency, high-reliability die-to-die physical layer collaboration.

[0064] The first unit 101 is configured to generate a first boundary timing interval and a second boundary timing interval in response to receiving an abnormal event.

[0065] The second unit 102 is configured to: generate a data frame based on an abnormal event; obtain a transmission frame based on the data frame, the first boundary timing interval, and the second boundary timing interval; and send the transmission frame to the second die through the sideband link between the first die and the second die, wherein the first die and the second die are in a point-to-point topology.

[0066] In a transmission frame, the first boundary timing interval is located before the header of the data frame, and the second boundary timing interval is located after the tail of the data frame. The first boundary timing interval and the second boundary timing interval are used to indicate the boundaries of the transmission frame.

[0067] For example, abnormal events include at least one of the following: interrupt events sent from upper-layer software, abnormal events obtained through active sensing, and interrupt events detected from the physical layer.

[0068] For example, the upper-layer software may detect an interrupt event. This disclosure encapsulates the interrupt event into a transmission frame and transmits it with low latency via a sideband link. Compared to transmission via the main band, this can alert the second die earlier, allowing the second die to know the status of the first die sooner and trigger the corresponding emergency handling process to prevent the error from spreading.

[0069] For example, abnormal events can be detected by sensors such as temperature sensors and voltage detection circuits. When abnormal temperature or voltage is detected, an abnormal event can be generated and reliably and with low latency transmitted to the other end die via a sideband link. This allows the second die to know the status of the first die synchronously, triggering the corresponding emergency handling process and preventing the spread of errors.

[0070] For example, abnormal events can also be interruptions from the physical layer. For instance, when the physical layer experiences electrical aging problems such as power supply voltage drops or overshoots, excessive analog power supply (AVDD) ripple, reference clock lockout (PLL unlocking), differential channel impedance mismatch, poor micro-bump contact, or open circuits, or when the physical layer link training fails or an uncorrectable fault occurs, a transmission frame containing the abnormal event can be sent directly to the second die via an information transmission device. This allows the second die to quickly receive the alarm and immediately trigger link suspension, retransmission, or protection mechanisms to prevent the spread of erroneous data.

[0071] Of course, the sources of abnormal events are not limited to this. Any abnormal events that require communication between dies can be transmitted using the information transmission device provided in at least one embodiment of this disclosure.

[0072] In the transmission frame, a first boundary timing interval is set before the header of the data frame, and a second boundary timing interval is set after the tail of the data frame. The three-segment structure is adopted. The boundary timing intervals are used to establish clear occupancy boundaries and resist glitches. After the abnormal event ends, the channel is explicitly released with the second boundary timing interval, realizing reliable point-to-point event transmission and significantly reducing the end-to-end false alarm or missed alarm event rate.

[0073] The first boundary timing interval includes a predetermined timing interval and a start trigger signal, wherein the predetermined timing interval precedes the start trigger signal. The second boundary timing interval includes an end trigger signal and a predetermined timing interval, wherein the end trigger signal precedes the predetermined timing interval. The start trigger signal and the end trigger signal are predefined signals used to explicitly identify the data frame boundaries, and the start trigger signal and the end trigger signal are different.

[0074] For example, the start trigger signal and the end trigger signal can be customized as needed. For example, the bit width and format of the start trigger signal and the end trigger signal can be customized. For example, the start trigger signal can be set to "1101" and the end trigger signal can be set to "1010", etc. This disclosure does not impose specific restrictions on this.

[0075] For example, the content characteristics of a predetermined time interval can be set as needed.

[0076] For example, in at least one embodiment of this disclosure, the length of the predetermined timing interval is greater than or equal to a first time threshold, there is no effective signal transmission within the predetermined timing interval, and the clock signal within the predetermined timing interval has a duty cycle offset relative to the clock signal in other time periods.

[0077] In other words, the predetermined time interval has a dual-domain feature of silent window + duty density bias. Using the predetermined time interval as the boundary, it avoids the uncertainty of pulse width decision, and can establish a clear occupancy boundary and resist spikes. It can also explicitly release the channel after the abnormal event ends.

[0078] The predetermined timing interval can be understood as a silent window with a length greater than or equal to a first time threshold, during which the clock signal has a duty cycle offset. For example, the duty cycle may be 50% during other periods of the clock signal, and 60% or 75% during the predetermined timing interval. Those skilled in the art can set these values ​​as needed.

[0079] For example, the first time threshold can be determined by the silent count threshold Tq and the unit interval UI. UI (unit interval) is the basic time unit for high-speed serial signals, representing the nominal transmission time of one bit or symbol, and is a unified relative unit for measuring jitter, skew, and timing margin. The product of the silent count threshold Tq and the unit interval UI serves as the first time threshold, and both Tq and UI can be set as needed. For example, the silent count threshold Tq and unit interval UI can also be adjusted based on recorded abnormal events, as described later.

[0080] Figure 3A This is a schematic structural diagram of a transmission frame provided in at least one embodiment of the present disclosure.

[0081] like Figure 3A As shown, the transmission frame includes a first boundary timing interval and a second boundary timing interval, as well as a data frame located between the first boundary timing interval and the second boundary timing interval. The data frame contains information about abnormal events. Of course, the data frame may also contain other content as needed. This disclosure does not impose specific restrictions on the form, format, or data content of the data frame.

[0082] like Figure 3A As shown, the first boundary timing interval includes a predetermined timing interval and a start trigger signal ST. No valid signal transmission occurs during the predetermined timing interval, and from... Figure 3A As can be seen, the duty cycle of the clock signal is biased within the predetermined timing interval. For example, the duty cycle of the clock signal is greater than the duty cycle of the clock signal in other time periods within the predetermined timing interval.

[0083] The predetermined timing interval following the first boundary timing interval is the start trigger signal. For example, when the silence count is greater than the silence count threshold Tq, the duty cycle of the recovery clock signal is the second duty cycle without bias, and the start trigger signal ST is output.

[0084] Next, data frames are transmitted. The specific content of the data frames can be found in the following text, and will not be repeated here.

[0085] Then, the second boundary timing interval is transmitted. For example... Figure 3A As shown, the second boundary timing interval includes a predetermined timing interval and an end trigger signal ET, with the end trigger signal ET located before the predetermined timing interval. During the transmission of the end trigger signal ET, the clock signal has no bias and operates at the second duty cycle; within the predetermined timing interval of the second boundary timing interval, no valid signal is transmitted, and from... Figure 3A As can be seen, the duty cycle of the clock signal is biased within the predetermined timing interval. For example, the duty cycle of the clock signal is greater than the duty cycle of the clock signal in other time periods within the predetermined timing interval.

[0086] For example, after the transmission frame ends, an end trigger signal is output. After the end trigger signal ends, the duty cycle of the clock signal is adjusted, and the data signal is kept in a silent state (no valid data signal transmission). When the silence count is greater than the silence count threshold Tq, the duty cycle of the clock signal is restored, the sideband link is explicitly released, and other information can then be transmitted.

[0087] It should be noted that, in Figure 3A In the example, the clock cycle relationship between the clock signal and the data signal is illustrative. Those skilled in the art can set the number of clock cycles occupied by the data frame, the first boundary timing interval, and the second boundary timing interval according to actual needs. This disclosure does not impose specific limitations in this regard.

[0088] For example, in some embodiments, the first unit 101 performs the action of generating a first boundary timing interval and a second boundary timing interval in response to receiving an abnormal event, including performing the following operations: in response to receiving an abnormal event, adjusting the duty cycle of the clock signal to a first duty cycle and maintaining it for at least a first time threshold; after maintaining it for at least the first time threshold, adjusting the clock signal back to a second duty cycle and simultaneously outputting a start trigger signal; after the data frame ends, outputting an end trigger signal; after the end trigger signal ends, adjusting the duty cycle of the clock signal to the first duty cycle and maintaining it for at least the first time threshold; after maintaining it for at least the first time threshold, adjusting the clock signal back to the second duty cycle; wherein the first duty cycle and the second duty cycle are different, and no signal transmission is performed in the timing interval where the clock signal duty cycle is the first duty cycle.

[0089] For example, the first unit triggers a predetermined timing interval when an abnormal event arrives. For example, under normal circumstances, the duty cycle of the clock signal is a second duty cycle, such as 50%; when an abnormal event is received, the duty cycle of the clock signal is adjusted to a first duty cycle, such as 75%, and maintained for at least a first time threshold. For example, after setting the unit interval UI, when the silence count is greater than or equal to the silence count threshold Tq, it is considered that the clock signal has maintained the first duty cycle for at least the first time threshold, and during the timing interval when the clock signal has the first duty cycle, no signal transmission is performed, and the state remains silent.

[0090] When the silent count is greater than or equal to the silent count threshold Tq, the clock signal is adjusted to restore the second duty cycle, for example, to 50%, and a start trigger signal is output. The start trigger signal can be set as needed.

[0091] After the initial trigger signal ends, a data frame can be output.

[0092] After the data frame ends, an end trigger signal is output, which can be set as needed. Within the timing interval consisting of the start trigger signal, the data frame, and the end trigger signal, the clock signal has the second duty cycle.

[0093] After the trigger signal ends, the duty cycle of the clock signal is adjusted to a first duty cycle and maintained for at least a first time threshold. After maintaining for at least the first time threshold, the clock signal is adjusted back to a second duty cycle. For example, the clock signal duty cycle is adjusted to the first duty cycle while a silent count is performed. When the silent count is greater than or equal to the silent count threshold Tq, it is considered that the clock signal has maintained the first duty cycle for at least the first time threshold, and the clock signal duty cycle is restored to the second duty cycle, for example, 50%. Furthermore, during the timing interval when the clock signal is at the first duty cycle, no signal transmission is performed, and the system remains in a silent state.

[0094] The predetermined timing interval is composed of a dual-domain feature of a silent window and a duty density offset, which can establish a clear occupancy boundary and resist glitches, avoiding the uncertainty of pulse width decision. The start trigger signal and the end trigger signal define the data frame boundary. The start trigger signal is used to identify the effective transmission start point of the frame, and the end trigger signal is used to identify the effective transmission end point of the frame, completing the frame boundary determination and reception state reset. Together, they ensure the integrity, synchronization and reliability of data transmission.

[0095] For example, the second unit performs data frame generation based on an exception event, including performing the following operations: determining the error information code based on the exception event; encapsulating the error information code according to a predetermined format to obtain a data frame.

[0096] Error message codes and abnormal events can be mapped in a predetermined way. Different abnormal events correspond to different error message codes. Thus, sending an error message code will retrieve the abnormal event, and the receiving end's bare die can perform the corresponding emergency handling procedure.

[0097] For example, the predefined format also specifies that the data frame also includes a preamble, version information, the identifier of the die that experienced the abnormal event, and a checksum.

[0098] Figure 3B This is a schematic structural diagram of a data frame provided for at least one embodiment of the present disclosure.

[0099] It should be noted that, in Figure 3B The example does not show the predetermined timing interval, but shows the portion of the transmission frame from the start trigger signal to the end trigger signal. The complete structure of the transmission frame can be found by combining... Figure 3A Examples.

[0100] like Figure 3B As shown, the data frame includes, in sequence, a preamble, version information, the identifier of the die that caused the abnormal event, an error message code, and a checksum.

[0101] A preamble is a fixed-format sequence located at the beginning of a data frame. It acts as a data buffer, resisting interference, canceling noise, maintaining data stability, and preventing any impact on the accuracy of data transmission. Specifically, the preamble is a fixed, regular string of bits sent before the data frame officially begins, allowing the receiver to synchronize its clock, lock onto the signal, and prepare for reception.

[0102] Version information is used to indicate the version of the data frame structure currently in use, so that the same format is used for parsing during the parsing process.

[0103] The identifier is used to identify the die that experienced the abnormal event. When multiple dies experience transmission or reception abnormal events, the identifier can be used to accurately identify the die that experienced the transmission abnormal event.

[0104] The checksum can be a Cyclic Redundancy Check (CRC) checksum or other checksums used to verify the individual data elements in a data frame. For example, a CRC checksum obtained by performing a cyclic redundancy check on the data elements in a data frame may include, for instance... Figure 3B The data includes version information, identifier, error codes, etc. CRC checksums can determine whether the data content has been transmitted accurately, reducing the probability of false alarms or missed alarms.

[0105] It should be noted that, Figure 3B The order and content of the data frames shown are illustrative examples. Data frames can include more or less content as needed, or parts of the content in the data frame can be replaced as required. Data frames are scalable, verifiable, and compatible with multi-event evolution.

[0106] The core function of data frames is to transmit abnormal events. Data frames can mainly contain information related to the transmitted abnormal events, using a small frame method for extremely simple and reliable communication to achieve low-latency alarms. Simulation shows that the single transmission delay is <2. –5 µs (including silent counting and resolution process) is reduced by approximately 60–80% compared to traditional confirmation methods.

[0107] Furthermore, this disclosure employs a three-segment structure consisting of a first boundary timing interval, a data frame, and a second boundary timing interval, and sets a checksum in the data frame. This clearly defines the transmission frame boundaries and improves reliability. Simulation results show that the BER (Bit Error Rate) is 10. -9 (Under the condition that the number of erroneous bits allowed per billion bits transmitted does not exceed 1), the false alarm or missed alarm rate between die and die is <10. -12 / Second-rate.

[0108] For example, in response to receiving an abnormal event, the information sending device buffers the abnormal event in a queue to wait for sequential processing; after an abnormal event is encapsulated into a transmission frame and sent, the next abnormal event is processed.

[0109] In other words, in this disclosure, the data frames in the transmission frame are maintained and will not change even when the next abnormal event occurs, until the transmission frame is sent out before the next abnormal event is processed. The information transmission device ensures that transmission abnormalities of abnormal events converge within a single session, each abnormal event operates independently, and the occurrence of a transmission abnormality in one abnormal event will not affect the processing of the next abnormal event.

[0110] The information transmission device is further configured to detect whether a transmission frame has a transmission error, and to record a transmission error event in response to detecting a transmission error in the transmission frame; wherein, detecting whether a transmission frame has a transmission error includes: detecting whether each part of the transmission frame has been successfully transmitted within a second time threshold, and determining that a transmission error has occurred in response to at least a part of the transmission frame still not being successfully transmitted after the second time threshold has been exceeded; or performing a format check on the transmission frame, and determining that a transmission error has occurred in response to the format check failing.

[0111] For example, during transmission, the information transmitting device will perform transmission anomaly detection. For example, if a timeout occurs, such as exceeding the second time threshold Tw, and the end trigger signal in the transmission frame has not been sent, a transmission anomaly is determined to have occurred. At this time, the transmission anomaly event can be recorded, such as reporting the occurrence of the transmission anomaly event or incrementing the total number of transmission anomaly events by 1.

[0112] For example, it can also be set to retransmit the frame when a transmission error occurs. The number of retransmissions can be preset. If the frame is not successfully transmitted after the number of retransmissions is reached, the transmission error event is abandoned, and a transmission error event is reported. The total number of transmission error events is incremented by 1.

[0113] In this disclosure, the information transmission device guarantees that anomalies converge within a single session, each anomaly event operates independently, and the occurrence of a transmission failure in one anomaly event will not affect the processing of the next anomaly event. Simulation results show a frame drop rate of <10. -6 At that time, the average number of retransmissions was <1.01.

[0114] Figure 4 A transaction processing flowchart of an information transmission device provided for at least one embodiment of this disclosure.

[0115] like Figure 4 As shown, firstly, in S1, when an abnormal event is received, the abnormal event is stored in a queue to wait for sequential processing.

[0116] Then, in S2, the first unit generates the first boundary timing interval, establishes the starting boundary and synchronization. For details, please refer to the previous content, which will not be repeated here.

[0117] Next, in S3, the second unit generates and sends a data frame. The data frame carries information such as version information, identifier, and error code, and provides CRC checksum. The data frame is held until the transmission of this frame is completed.

[0118] Then, in S4, the first unit generates the second boundary timing interval, explicitly releases the channel and defines the end boundary. For details of the generated content, please refer to the aforementioned content, which will not be repeated here.

[0119] Then, in S5, when a transmission abnormality is detected, such as timeout or channel conflict, the transmission abnormality event is recorded, and the transmission frame can be retransmitted as needed.

[0120] The information transmission device provided in at least one embodiment of this disclosure adopts a three-segment + checksum structure. It uses boundary timing intervals to establish clear occupancy boundaries and resist glitches, avoiding uncertainty in pulse width determination. Furthermore, after an abnormal event ends, the channel is explicitly released using a second boundary timing interval, achieving reliable point-to-point event transmission and significantly reducing the end-to-end false alarm or missed alarm rate. It employs a simple and reliable small-frame communication method to achieve low-latency alarms. Transmission anomalies converge within a single session and do not affect the transmission of the next abnormal event, exhibiting self-healing properties. The data frame structure is scalable and verifiable, compatible with multi-event evolution. Sideband links facilitate communication of abnormal events between dies without affecting mainband data transmission, avoiding conflicts with upper-layer data transmission, and not interfering with the normal operation of the mainband.

[0121] For example, the interruption event can still be transmitted to the peer die via the mainband link, meaning the exception event transmission logic of the mainband link is not modified. Even so, exception events transmitted via the sideband link can reach the peer die earlier than those transmitted via the mainband link, allowing the receiving die to know the status of the sending die as soon as possible, ensuring consistency of status among multiple dies, triggering corresponding emergency handling procedures in a timely manner, shortening interruption response delay, preventing error propagation, and improving system reliability and stability.

[0122] certainly, Figure 2 In the example, the information transmitting device 100 may also include other circuits or units, and the connection relationship between the various circuits or units is not limited and can be determined according to actual needs.

[0123] It should be noted that, in at least one embodiment of this disclosure, the information transmitting device may include more or fewer circuits or units, and the connection relationship between the various circuits or units is not limited and can be determined according to actual needs. The specific configuration of each circuit or unit is not limited; it can be constructed from analog devices, digital chips, or other suitable methods according to circuit principles.

[0124] For example, the information transmission device can be implemented in hardware or a combination of hardware and software, and this disclosure does not impose any specific restrictions on it.

[0125] At least one embodiment of this disclosure also provides an information receiving device. Figure 5 This is a schematic structural diagram of an information receiving device provided for at least one embodiment of the present disclosure.

[0126] Figure 5 A schematic structural diagram of the information receiving device 200 is shown.

[0127] For example, in some embodiments, the information receiving device 200 and the information transmitting device 100 can be two independently configured circuit structures, which can be set separately, for example, they can be set separately in the physical layer of the universal chip interconnect high-speed interconnect interface of the same die.

[0128] For example, in some other embodiments, the information receiving device 200 and the information sending device 100 can be integrated into a single communication device as a single circuit module. See the following section on communication devices for details.

[0129] For example, in other embodiments, the information receiving device and the information sending device may be disposed on different dies. For example, the information sending device may be disposed on a first die, and the information receiving device may be disposed on another first die. Abnormal events are sent unidirectionally to the other die. This disclosure does not impose any specific limitations on this.

[0130] Similar to the information transmitting device, the information receiving device is also located in the physical layer of the general-purpose die-to-die high-speed interconnect interface of the die, realizing direct physical layer access, bypassing the mainband link communication, and directly interacting within the physical layer of the die, achieving low-latency and high-reliability die-to-die physical layer collaboration.

[0131] like Figure 5 As shown, the information receiving device 200 includes a third unit 201 and a fourth unit 202.

[0132] The third unit 201 is configured to receive a transmission frame transmitted through a sideband link between the first die and the second die, and to identify a first boundary timing interval and a second boundary timing interval in the transmission frame, wherein the first die and the second die are in a point-to-point topology.

[0133] Unit 202 is configured to perform frame synchronization and parse the data frames in the transmission frames.

[0134] In a transmission frame, the first boundary timing interval is located before the header of the data frame, and the second boundary timing interval is located after the tail of the data frame. The first boundary timing interval and the second boundary timing interval are used to indicate the boundaries of the transmission frame.

[0135] For example, the first boundary timing interval includes a predetermined timing interval and a start trigger signal, wherein the predetermined timing interval is located before the start trigger signal. The second boundary timing interval includes an end trigger signal and a predetermined timing interval, wherein the end trigger signal is located before the predetermined timing interval.

[0136] The length of the predetermined timing interval is greater than or equal to the first time threshold, there is no effective signal transmission within the predetermined timing interval, and the clock signal within the predetermined timing interval has a duty cycle offset relative to the clock signal in other time periods.

[0137] For example, the second die may be equipped with an information transmission device as described in at least one embodiment of this disclosure, which generates a transmission frame and transmits the transmission frame to the first die via a sideband link between the first and second dies. The generation method, structure, and content of the transmission frame can be referred to the description of the aforementioned embodiments of the information transmission device, and will not be repeated here.

[0138] For example, the third unit 201 can identify or parse each part of the transmission frame in sequence, and after a part is successfully identified or parsed, it will proceed to the next part; if a part fails to be identified or parsed, the transmission frame will be discarded.

[0139] For example, the third unit 201 is configured to first identify the first boundary timing interval, and the fourth unit 202 is configured to perform frame synchronization and parse the data frames in the transmission frame after the third unit 201 successfully identifies the first boundary timing interval; the third unit 201 is also configured to identify the second boundary timing interval after successfully parsing the data frames in the transmission frame.

[0140] For example, the information receiving device is configured to trigger an emergency handling procedure corresponding to an abnormal event in the transmission of the transmission frame when the first boundary timing interval and the second boundary timing interval are successfully identified and the data frame in the transmission frame is successfully parsed; and to discard the transmission frame when the identification fails in the first boundary timing interval or the second boundary timing interval, or when the parsing of the data frame in the transmission frame fails.

[0141] The first boundary timing interval, the data frame, and the second boundary timing interval are identified or parsed sequentially. After a part is successfully parsed or identified, the next part is parsed or identified. If a part fails to be parsed or identified, the transmission frame is discarded. This speeds up the processing progress of the receiving process, avoids unnecessary waste of resources, and optimizes the process of parsing the transmission frame.

[0142] For example, in some embodiments, when the third unit performs the identification of the first boundary timing interval in the transmission frame, it includes performing the following operations: in response to detecting that a predetermined timing boundary in the first boundary timing interval meets a predetermined condition, and detecting a start trigger signal after the predetermined timing boundary, determining the first boundary timing interval in the successfully identified transmission frame, otherwise determining the first boundary timing interval in the failed identified transmission frame.

[0143] For example, in response to the fact that the predetermined timing interval does not contain any valid data signal, the duration is greater than or equal to a first time threshold, and the clock signal in the predetermined timing interval has a duty cycle offset relative to the clock signal in other time periods, it is determined that the predetermined timing boundary meets the predetermined conditions; otherwise, it is determined that the predetermined timing boundary does not meet the predetermined conditions.

[0144] For example, in some embodiments, when the third unit 201 identifies a second boundary timing interval in a transmission frame, it includes performing the following operations: in response to detecting an end trigger signal in the second boundary timing interval and a predetermined timing boundary in the second boundary timing interval satisfying a predetermined condition, it determines that the second boundary timing interval in a successfully identified transmission frame is identified; otherwise, it determines that the second boundary timing interval in a failed identified transmission frame is identified.

[0145] For example, when the information receiving device receives a transmission frame, it first identifies the first boundary timing interval. Specifically, if it detects that the predetermined timing interval in the first boundary timing interval does not contain any valid data signal, the duration is greater than or equal to a first time threshold (e.g., the silence count is greater than or equal to the silence count threshold), and the clock signal in the predetermined timing interval has a duty cycle offset relative to the clock signals in other time periods, then the silence detection is determined to be successful. Otherwise, the identification of the first boundary timing interval is considered to have failed, and the transmission frame is discarded.

[0146] Next, it is checked whether the first boundary timing interval includes the start trigger signal. If the start trigger signal is detected, the first boundary timing interval is considered to have been successfully identified. If the start trigger signal is not detected, the transmission frame is discarded.

[0147] After successful identification of the first boundary time interval, frame synchronization is performed, and the data frames in the transmission frame are parsed.

[0148] Frame synchronization can accurately locate the start position of a frame, align the clock phases of the transmitting and receiving parties, and sample each bit at the correct time, avoiding bit misalignment, sampling errors, and data garbling.

[0149] For example, in some embodiments, the data frame includes a preamble, an error message code corresponding to an abnormal event during transmission, and a checksum. When the fourth unit performs frame synchronization and parses the data frame in the transmission frame, it includes performing the following operations: in response to parsing the preamble in the data frame, synchronizing the clock signals of the first die and the second die and preparing to receive data content; parsing each data content included in the data frame according to a predetermined format of the data frame, and performing data verification on each data content in conjunction with the checksum; in response to the data verification passing, determining that the parsing of the data frame in the transmission frame was successful, and determining an abnormal event based on the error message code; in response to the data verification failing, determining that the parsing of the data frame in the transmission frame failed.

[0150] For example, the structure of the data frame can be referred to the relevant description in the aforementioned information transmission device, and will not be repeated here.

[0151] For example, after successful identification of the first boundary timing interval, the system waits for the preamble; in response to parsing the preamble in the data frame, the clock signals of the first and second dies are synchronized, and preparation is made to receive data content. As mentioned earlier, the preamble is a fixed-format sequence located at the beginning of the data frame, which acts as a data buffer to resist interference, cancel noise, and maintain data stability. Receiving the preamble indicates that data content reception can begin.

[0152] Then, the data contents included in the data frame can be parsed sequentially according to the predetermined format of the data frame. For example, version information, identification number, error code, etc. can be parsed. The specific details can be determined according to the format specification of the data frame.

[0153] Next, data verification is performed on each data item. For example, the CRC8 checksum of each data item is calculated and compared with the checksum in the data frame. If they match, the data verification passes; if they do not match, the data verification fails.

[0154] When the data verification passes, it is determined that the data frame in the transmission frame was successfully parsed, and the abnormal event is identified according to the error information code, so that the corresponding emergency handling process can be executed later.

[0155] If the data verification fails, it is determined that parsing the data frame in the transmission frame has failed, and the transmission frame is discarded.

[0156] When the data frame in the transmission frame is successfully parsed, the third unit 201 identifies the second boundary timing interval in the transmission frame. Specifically, it first determines whether an end trigger signal has been received. If an end trigger signal is received, it further determines whether a predetermined timing boundary exists after the end trigger signal. For example, if it is detected that the predetermined timing interval does not contain any valid data signal, the duration is greater than or equal to a first time threshold, and the clock signal in the predetermined timing interval has a duty cycle offset relative to the clock signal in other time periods, then the identification of the second boundary timing interval is successful, and the emergency handling process corresponding to the abnormal event can be triggered, such as interrupting the main band communication link.

[0157] If no end trigger signal is received, or if the silent detection of the predetermined timing boundary in the second boundary timing interval is not passed, the transmission frame is discarded.

[0158] In this embodiment, reliable communication is introduced on the sideband links between dies to transmit abnormal events without affecting mainband data transmission, avoiding conflicts with upper-layer data transmission, and without interfering with the normal operation of the mainband. This transmission frame is dedicated to abnormal event alarms, eliminating the need for a handshake process in mainband communication. It can issue early warnings and synchronize abnormal information when an abnormal event is received (e.g., before the mainband is affected).

[0159] Furthermore, the first and second boundary timing intervals use a silent window plus duty density offset as dual-domain boundary features to establish clear occupancy boundaries and resist glitches, avoiding uncertainty in pulse width decision. In addition, by combining the start trigger signal and the end trigger signal, the boundaries of the data frame are clearly defined, enabling reliable point-to-point event transmission, reducing the false alarm or missed alarm rate at the end end, and the sideband link channel can be explicitly released after the second boundary timing interval ends.

[0160] The transmission latency of a single small frame is very low. Simulations show that the single transmission latency of a fixed-length small frame, including silence detection and data frame parsing, is less than 2. -5 us can achieve reliable low-latency alarms, synchronize abnormal events in a timely manner between dies, ensure the consistency of multiple die states, shorten interrupt response latency, and handle abnormal events in a timely manner to avoid error propagation and improve system reliability and stability.

[0161] For example, the information receiving device 200 is also configured to perform statistics and protection against reception errors of transmission frames.

[0162] For example, the information receiving device 200 is also configured to record a receiving abnormal event in response to a failure to identify a first boundary timing interval or a second boundary timing interval, or a failure to parse a data frame in a transmission frame.

[0163] For example, the information receiving device 200 is further configured to adjust the relevant generation parameters of the predetermined time interval included in the first boundary time interval and the second boundary time interval in response to the occurrence of the abnormal reception event being greater than a predetermined threshold. The duration of the predetermined time interval is greater than or equal to a first time threshold, the first time threshold being determined by a silent count threshold and a unit interval, and the relevant generation parameters including at least one of the silent count threshold and the unit interval.

[0164] For example, if the identification of the first boundary timing interval or the second boundary timing interval fails, or if the parsing of the data frame in the transmission frame fails, it is considered that a reception error has occurred. At this time, a reception error event is recorded, such as reporting the occurrence of a reception error event, and the total number of reception error events is incremented by 1.

[0165] The information receiving device is also configured to adjust the relevant generation parameters used to generate the predetermined time interval if the number of abnormal events received exceeds a predetermined threshold Emax. For example, the relevant generation parameters may include at least one of the silent counting threshold Tq and the unit interval UI as described above.

[0166] For example, when frequent reception errors are detected, the silent count threshold Tq and / or unit interval UI can be adjusted to adjust the length of the predetermined timing interval and reduce the probability of reception anomalies.

[0167] For example, in this embodiment, the information receiving device and the information sending device can be integrated into a communication device. The information receiving device can directly send the adjusted parameters to the information sending device, and the information sending device can generate subsequent transmission frames based on the parameters.

[0168] For example, the information receiving device and the information sending device can be set up separately. In this case, the adjusted parameters can be transmitted to the information sending device through the corresponding communication link, and the information sending device can generate subsequent transmission frames based on the parameters.

[0169] Figure 6 A transaction processing flowchart of an information receiving device provided for at least one embodiment of this disclosure.

[0170] like Figure 6 As shown, in S1, when a transmission frame transmitted through the sideband link is received, preprocessing and silence detection are performed. The silence detection includes identifying whether a predetermined time interval in the first boundary time interval meets a predetermined condition. For details, please refer to the above content, which will not be repeated here.

[0171] Then, in S2, if the silence detection passes, the start trigger signal is identified, and the system enters the start state to wait for the preamble. If the silence detection fails, or the start trigger signal is not identified, the transmission frame is discarded, and a reception error event is recorded.

[0172] Next, in S3, when the start trigger signal is detected, data frame parsing is performed. This includes parsing each data element according to the data frame format and performing a CRC check. If the CRC check passes, the data frame parsing is considered successful; otherwise, the data frame parsing is considered a failure, the transmission frame is discarded, and a reception anomaly event is recorded.

[0173] Subsequently, in S4, when successful data frame parsing is confirmed, the identification of the second boundary timing interval continues. When the end trigger signal and the predetermined timing interval are detected, the identification of the second boundary timing interval is deemed successful, triggering the emergency handling procedure for the abnormal event corresponding to the error code in the data frame. If the end trigger signal or the predetermined timing interval is not received after the second time threshold Tw has expired, or if the end trigger signal is received but the process does not exit after the second time threshold Tw has expired, the identification of the second boundary timing interval is deemed a failure, the transmission frame is discarded, and the reception abnormal event is recorded.

[0174] In S5, when the accumulated received abnormal events exceed the predetermined threshold Emax, the silent counting threshold Tq or UI parameter is adjusted, and new abnormal events are generated in a predetermined time interval based on the adjusted parameters.

[0175] The information receiving device provided in at least one embodiment of this disclosure receives transmission frames using a three-segment + checksum structure. It establishes clear occupancy boundaries using boundary timing intervals to resist glitches, avoiding uncertainty in pulse width decision-making. Furthermore, after an abnormal event ends, the channel is explicitly released using a second boundary timing interval, achieving reliable point-to-point event transmission and significantly reducing the end-to-end false alarm or missed alarm rate. It employs a simple and reliable small-frame communication method to achieve low-latency alarms. It can statistically analyze reception anomalies and adjust relevant parameters, exhibiting self-healing and protective capabilities. Sideband links facilitate communication of abnormal events between dies without affecting mainband data transmission, avoiding conflicts with upper-layer data transmission, and not interfering with the normal operation of the mainband.

[0176] certainly, Figure 5 In the example, the information receiving device 200 may also include other circuits or units, and the connection relationship between the various circuits or units is not limited and can be determined according to actual needs.

[0177] It should be noted that, in at least one embodiment of this disclosure, the information receiving device may include more or fewer circuits or units, and the connection relationship between the various circuits or units is not limited and can be determined according to actual needs. The specific configuration of each circuit or unit is not limited; it can be constructed from analog devices, digital chips, or other suitable methods according to circuit principles.

[0178] For example, the information receiving device can be implemented in hardware or a combination of hardware and software, and this disclosure does not impose any specific restrictions on it.

[0179] At least one embodiment of this disclosure also provides a communication device. Figure 7 A schematic structural diagram of a communication device provided for at least one embodiment of this disclosure.

[0180] like Figure 7As shown, the communication device 300 integrates an information transmitting device 100 and an information receiving device 200.

[0181] For example, the communication device 300 is disposed in the physical layer of the general-purpose chip interconnect high-speed interconnect interface of the first die.

[0182] The information transmission device 100 includes a first unit and a second unit. The first unit is configured to generate a first boundary timing interval and a second boundary timing interval in response to receiving an abnormal event; the second unit is configured to: generate a data frame based on the abnormal event; obtain a first transmission frame based on the data frame, the first boundary timing interval, and the second boundary timing interval, and transmit the first transmission frame to the second die through a sideband link between the first die and the second die, wherein the first die and the second die are in a point-to-point topology.

[0183] In the first transmission frame, the first boundary timing interval is located before the header of the data frame, and the second boundary timing interval is located after the tail of the data frame. The first boundary timing interval and the second boundary timing interval are used to indicate the boundary of the first transmission frame.

[0184] The information receiving device 200 includes a third unit and a fourth unit. The third unit is configured to receive a second transmission frame transmitted via a sideband link between a first die and a second die, the second transmission frame being, for example, from the second die, and to identify a first boundary timing interval and a second boundary timing interval in the second transmission frame. The fourth unit is configured to perform frame synchronization and parse data frames in the second transmission frame.

[0185] For more details about the information sending device 100, please refer to the relevant description of the information sending device 100 provided in at least one embodiment of this disclosure, which will not be repeated here.

[0186] For more details about the information receiving device 200, please refer to the relevant description of the information receiving device 200 provided in at least one embodiment of this disclosure, which will not be repeated here.

[0187] For example, the information transmitting device 100 and the information receiving device 200 can be integrated into a single module. The information transmitting device 100 and the information receiving device 200 can be understood as IP cores. This circuit module is set as a communication device 300 in the physical layer of the general-purpose chip interconnect high-speed interconnect interface of the bare die.

[0188] certainly, Figure 7 In the example, the communication device 300 may also include other circuits or units, and the connection relationship between the various circuits or units is not limited and can be determined according to actual needs.

[0189] It should be noted that, in at least one embodiment of this disclosure, the communication device may include more or fewer circuits or units, and the connection relationship between the various circuits or units is not limited and can be determined according to actual needs. The specific configuration of each circuit or unit is not limited; it can be constructed from analog devices, digital chips, or other suitable methods according to circuit principles.

[0190] For example, the communication device can be implemented in hardware or a combination of hardware and software, and this disclosure does not impose any specific restrictions on it.

[0191] The communication device provided in at least one embodiment of this disclosure can achieve similar technical effects to the aforementioned information sending device and information receiving device, which will not be repeated here.

[0192] This disclosure also provides a chip in at least one embodiment. Figure 8 This is a schematic structural diagram of a chip provided for at least one embodiment of the present disclosure.

[0193] like Figure 8 As shown, the chip 400 includes multiple dies, for example Figure 8 The bare dies 401 and 402 are included. Of course, chip 400 can also include more bare dies, which will not be discussed here.

[0194] For example, a communication device 300 as described in at least one embodiment of this disclosure can be provided on the physical layer of the general-purpose high-speed interconnect interface of each die, such as die 401 and die 402. Further details regarding the communication device 300 can be found in the relevant descriptions in the foregoing embodiments, and will not be repeated here.

[0195] For example, the chip provided in at least one embodiment of this disclosure may specifically be a Graphic Processing Unit (GPU), a General-Purpose Graphic Processing Unit (GPGPU), a Tensor Processing Unit (TPU), a Data Processing Unit (DPU), a Neural Processing Unit (NPU), etc., and this disclosure does not impose any specific limitations on it.

[0196] The following is based on Figure 9 For example, this illustrates the structure when the chip is a graphics processor or a general-purpose graphics processor.

[0197] Figure 9 This is a schematic diagram of a general-purpose graphics processing unit (GPGPU).

[0198] like Figure 9 As shown, a general-purpose graphics processor is actually an array of programmable multiprocessors. For example, a programmable multiprocessor can be a streaming processor cluster (SPC), such as including... Figure 9 The diagram shows multiple streaming processor clusters. In a general-purpose graphics processor, one streaming processor cluster handles one computational task, or multiple streaming processor clusters handle one computational task. Multiple streaming processor clusters share data through a global cache or global memory.

[0199] like Figure 9 As shown, a streaming processor cluster includes multiple computing units (CUs). Each computing unit (CU) is used to perform arithmetic and logical operations, such as accumulation, reduction, and regular addition, subtraction, multiplication, and division.

[0200] A computing unit comprises multiple cores (also called computing kernels or computing cores). Each computing core includes an arithmetic logic unit (ALU), a floating-point unit, etc., and is used to execute specific computational tasks. In addition, the computing unit also includes registers (e.g., ... Figure 9 The register file and shared memory in a computing unit are used to store source and destination data related to computing tasks in a hierarchical manner. The shared memory in a computing unit is used to share data between the cores of that computing unit.

[0201] like Figure 9 As shown, each computing unit also provides a tensor core for performing tensor-related computations, such as tensor shrinking operations. Tensor cores can accelerate tensor operations such as matrix multiplication. Tensor cores in multiple computing units can be scheduled and controlled uniformly.

[0202] In parallel computing, computational tasks are typically executed by multiple threads. These threads are divided into multiple thread blocks before execution in the graphics processing unit (or parallel computing processor), and then dispatched via a thread block distribution module. Figure 9 (Not shown in the image) Multiple thread blocks are distributed to various computation units. All threads in a thread block must be assigned to the same computation unit for execution. Simultaneously, thread blocks are broken down into minimum execution thread bundles (or simply warps), each containing a fixed number (or less than this fixed number) of threads, for example, 32 threads. Multiple thread blocks can execute in the same computation unit or in different computation units.

[0203] In each computing unit, the thread beam scheduling / distribution module ( Figure 9 (Not shown in the diagram) Thread bundles are scheduled and allocated so that multiple computing cores within the computing unit can run thread bundles. Depending on the number of computing cores in the computing unit, multiple thread bundles within a thread block can execute concurrently or in a time-sharing manner. Multiple threads within each thread bundle execute the same instructions. Memory-executed instructions are issued to shared memory within the computing unit or further issued to intermediate-level caches, global caches, or global memory (e.g., [example cache]). Figure 9 High Bandwidth Memory (HBM) is used for read and write operations.

[0204] At least one embodiment of this disclosure also provides an electronic device. Figure 10 A schematic structural diagram of an electronic device provided for at least one embodiment of this disclosure.

[0205] like Figure 10 As shown, the electronic device 500 includes a chip 400. Further description of the chip 400 can be found in the relevant descriptions of the foregoing embodiments, and will not be repeated here.

[0206] For example, the electronic device could be a multi-GPU system, which integrates multiple GPU cards and works together to complete large-scale parallel computing tasks. This architecture is commonly used for tasks such as artificial intelligence training, scientific computing, and high-performance graphics rendering.

[0207] For example, in some embodiments, the electronic device 500 provided in at least one embodiment of this disclosure can be a single-machine multi-card form, where multiple GPU cards are integrated in a single server or workstation, and inter-card communication is achieved through a bus (such as PCIe bus, AMD bus, etc.). For example, the electronic device 500 can also be a multi-machine multi-card form, where multiple single-machine multi-card servers are interconnected through a high-speed network to form a cluster, and each card can not only communicate with other cards in its own machine, but also interact with cards in other groups through the network.

[0208] For example, the electronic device 500 can also be a TPU cluster, a multi-FPGA accelerator card system, etc., and this disclosure does not impose specific limitations on it.

[0209] For example, this electronic device 500 overcomes the limitations of single-card computing power or memory through parallel computing, and is therefore widely used in scenarios requiring large-scale data processing, high-throughput computing, or low-latency parallel tasks. Applications include deep learning and large model training, high-performance computing, large-scale data processing and AI inference, real-time rendering and visualization, and it can be applied to fields such as large model training, scientific computing, high-concurrency AI services, and real-time rendering.

[0210] Figure 11 This is a schematic block diagram of an electronic device provided in one embodiment of the present disclosure.

[0211] like Figure 11 As shown, Figure 11 The components of the electronic device 500 shown are merely exemplary and not limiting. The electronic device 500 may have other components as needed for the actual application.

[0212] like Figure 11 As shown, the electronic device 500 may include a processing unit 501 (e.g., a central processing unit, a graphics processing unit, etc.) that can perform various appropriate actions and processes according to non-transitory computer-readable instructions stored in memory to achieve various functions.

[0213] For example, the processing device 501 may adopt the structure or function of the aforementioned chip 400.

[0214] For example, the memory may include any combination of one or more computer program products, which may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. Volatile memory may include, for example, random access memory (RAM) 503 and / or cache memory, etc., whereby computer-readable instructions can be loaded from storage device 508 into RAM 503 to execute. Non-volatile memory may include, for example, read-only memory (ROM) 502, hard disk, erasable programmable read-only memory (EPROM), portable compact disc read-only memory (CD-ROM), USB memory, flash memory, etc. Various applications and various data, such as various data used and / or generated by applications, may also be stored in the computer-readable storage medium.

[0215] For example, the processing device 501, the read-only memory (ROM) 502, and the random access memory (RAM) 503 are interconnected via a bus 504. The input / output (I / O) interface 505 is also connected to the bus 504.

[0216] Typically, the following devices can be connected to the input / output (I / O) interface 505: input devices 506 including, for example, a touchscreen, touchpad, keyboard, mouse, camera, microphone, accelerometer, gyroscope, etc.; output devices 507 including, for example, a liquid crystal display (LCD), speaker, vibrator, etc.; storage devices 508 including, for example, magnetic tape, hard disk, flash memory, etc.; and communication devices 509. Communication device 509 allows electronic device 500 to communicate wirelessly or wiredly with other electronic devices to exchange data. Although Figure 11An electronic device 500 with various devices is shown, but it should be understood that it is not required to implement or possess all of the devices shown, and the electronic device 500 may alternatively implement or possess more or fewer devices. For example, a processing device 501 can control other components in the electronic device 500 to perform desired functions. The processing device 501 may be a device with data processing capabilities and / or program execution capabilities, such as a central processing unit (CPU), a tensor processor (TPU), or a graphics processing unit (GPU). The central processing unit (CPU) may be an x86, ARM, RISC-V architecture, etc. The GPU may be directly integrated into the SOC, directly integrated into the motherboard, or built into the northbridge chip of the motherboard.

[0217] At least one embodiment of this disclosure also provides an information transmission method. Figure 12 This is a schematic flowchart illustrating an information transmission method provided in at least one embodiment of the present disclosure.

[0218] like Figure 12 As shown, the information transmission method includes steps S10-S30.

[0219] In step S10, in response to receiving an abnormal event in the first die, a first boundary timing interval and a second boundary timing interval are generated.

[0220] In step S20, a data frame is generated based on the abnormal event.

[0221] In step S30, a transmission frame is obtained based on the data frame, the first boundary timing interval, and the second boundary timing interval, and the transmission frame is sent to the second die through the sideband link between the first die and the second die.

[0222] The first and second dies have a point-to-point topology.

[0223] In a transmission frame, the first boundary timing interval is located before the header of the data frame, and the second boundary timing interval is located after the tail of the data frame. The first boundary timing interval and the second boundary timing interval are used to indicate the boundaries of the transmission frame.

[0224] For details regarding steps S10 and S20, please refer to the relevant content of the first unit 101 of the aforementioned information transmitting device 100, which will not be repeated here. For details regarding step S30, please refer to the relevant content of the second unit 102 of the aforementioned information transmitting device 100, which will not be repeated here.

[0225] The information transmission method provided in at least one embodiment of this disclosure can achieve similar technical effects to the aforementioned information sending device, and will not be described in detail here.

[0226] At least one embodiment of this disclosure also provides an information transmission method. Figure 13 This is a schematic flowchart illustrating another information transmission method provided in at least one embodiment of the present disclosure.

[0227] like Figure 13 As shown, the information transmission method includes steps S40-S50.

[0228] In step S40, a transmission frame transmitted through the sideband link between the first die and the second die is received, and the first boundary timing interval and the second boundary timing interval in the transmission frame are identified.

[0229] The first and second dies have a point-to-point topology.

[0230] In step S50, after successfully identifying the first boundary timing interval, frame synchronization is performed, and the data frames in the transmission frame are parsed.

[0231] In a transmission frame, the first boundary timing interval is located before the header of the data frame, and the second boundary timing interval is located after the tail of the data frame. The first boundary timing interval and the second boundary timing interval are used to indicate the boundaries of the transmission frame.

[0232] For details regarding step S40, please refer to the relevant content of the third unit 201 of the aforementioned information receiving device 200, which will not be repeated here. For details regarding step S50, please refer to the relevant content of the fourth unit 202 of the aforementioned information receiving device 200, which will not be repeated here.

[0233] The information transmission method provided in at least one embodiment of this disclosure can achieve similar technical effects to the aforementioned information receiving device, and will not be described in detail here.

[0234] Figure 14 A schematic diagram of a non-transitory computer-readable storage medium provided for at least one embodiment of this disclosure. For example, such as Figure 14 As shown, storage medium 600 can be a non-transitory computer-readable storage medium on which one or more computer-readable instructions 601 can be stored non-transitory. For example, when the computer-readable instructions 601 are executed by a processor, one or more steps in the information transfer method described above can be performed.

[0235] For example, the storage medium 600 can be used in an electronic device 500, such as the storage medium 600 including the storage device 508 in the electronic device 500.

[0236] For example, a storage device may include any combination of one or more computer program products, which may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. Volatile memory may include, for example, random access memory (RAM) and / or cache memory. Non-volatile memory may include, for example, read-only memory (ROM), hard disk, erasable programmable read-only memory (EPROM), portable compact disc read-only memory (CD-ROM), USB storage, flash memory, etc. One or more computer-readable instructions may be stored on the computer-readable storage medium, and a processor may execute these instructions to perform various functions of the processor. Various application programs and various data may also be stored in the storage medium.

[0237] For example, the storage medium may include a memory card for a smartphone, a cache component for a tablet computer, a hard disk for a personal computer, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), portable compact disc read-only memory (CD-ROM), flash memory, or any combination of the above storage media, or other suitable storage media.

[0238] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0239] The units described in the embodiments of this disclosure can be implemented in software or hardware. The names of the units are not, in some cases, intended to limit the specific unit.

[0240] The functions described above in this document can be performed at least in part by one or more hardware logic components. For example, exemplary types of hardware logic components that can be used, without limitation, include: field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), system-on-a-chip (SoCs), complex programmable logic devices (CPLDs), and so on.

[0241] The above description is merely a preferred embodiment of this disclosure and an explanation of the technical principles employed. Those skilled in the art should understand that the scope of this disclosure is not limited to technical solutions formed by specific combinations of the above-described technical features, but should also cover other technical solutions formed by arbitrary combinations of the above-described technical features or their equivalents without departing from the above-described concept. For example, technical solutions formed by substituting the above features with (but not limited to) technical features disclosed in this disclosure that have similar functions.

[0242] Furthermore, while the operations are described in a specific order, this should not be construed as requiring these operations to be performed in the specific order shown or in a sequential order. In certain environments, multitasking and parallel processing may be advantageous. Similarly, while several specific implementation details are included in the above discussion, these should not be construed as limiting the scope of this disclosure. Certain features described in the context of individual embodiments may also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment may also be implemented individually or in any suitable sub-combination in multiple embodiments.

[0243] Although the subject matter has been described using language specific to structural features and / or methodological logic, it should be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or actions described above. Rather, the specific features and actions described above are merely illustrative examples of implementing the claims.

[0244] The following points should be noted regarding this disclosure:

[0245] (1) The accompanying drawings of the embodiments of this disclosure only involve the structures involved in the embodiments of this disclosure. Other structures can be referred to the general design.

[0246] (2) Where there is no conflict, the embodiments of this disclosure and the features in the embodiments can be combined with each other to obtain new embodiments.

[0247] The above description is only a specific embodiment of this disclosure, but the protection scope of this disclosure is not limited thereto. The protection scope of this disclosure should be determined by the protection scope of the claims.

Claims

1. An information transmitting device, characterized in that, The information transmission device, located in the physical layer of the universal chip interconnect high-speed interconnect interface of the first bare die, includes a first unit and a second unit. The first unit is configured to generate a first boundary timing interval and a second boundary timing interval in response to receiving an abnormal event; The second unit is configured as follows: Based on the aforementioned abnormal event, a data frame is generated; Based on the data frame, the first boundary timing interval, and the second boundary timing interval, a transmission frame is obtained, and the transmission frame is sent to the second die through the sideband link between the first die and the second die, wherein the first die and the second die are in a point-to-point topology. In the transmission frame, the first boundary timing interval is located before the header of the data frame, and the second boundary timing interval is located after the tail of the data frame. The first boundary timing interval and the second boundary timing interval are used to indicate the boundary of the transmission frame.

2. The information transmitting device according to claim 1, characterized in that, The first boundary timing interval includes a predetermined timing interval and a start trigger signal, wherein the predetermined timing interval is located before the start trigger signal. The second boundary timing interval includes an end trigger signal and the predetermined timing interval, wherein the end trigger signal is located before the predetermined timing interval. The start trigger signal and the end trigger signal are predefined signals used to explicitly identify the boundaries of the data frame, and the start trigger signal and the end trigger signal are different.

3. The information transmitting device according to claim 2, characterized in that, The length of the predetermined time interval is greater than or equal to the first time threshold, there is no effective signal transmission within the predetermined time interval, and the clock signal within the predetermined time interval has a duty cycle offset relative to the clock signal in other time periods.

4. The information transmitting device according to claim 3, characterized in that, The first unit, in response to receiving an abnormal event, generates a first boundary time interval and a second boundary time interval, including performing the following operations: In response to receiving the abnormal event, the duty cycle of the clock signal is adjusted to a first duty cycle and maintained for at least the first time threshold. After at least the first time threshold, the clock signal is adjusted to restore the second duty cycle, and the start trigger signal is output simultaneously. After the data frame ends, the end trigger signal is output; After the termination trigger signal ends, the duty cycle of the clock signal is adjusted to the first duty cycle and maintained for at least the first time threshold. After at least the first time threshold, the clock signal is adjusted to restore the second duty cycle; The first duty cycle and the second duty cycle are different. During the timing interval where the duty cycle of the clock signal is the first duty cycle, no signal transmission is performed.

5. The information transmitting device according to claim 1, characterized in that, The second unit generates a data frame based on the abnormal event, including performing the following operations: Based on the aforementioned abnormal event, determine the error message code; The error information code is encapsulated according to a predetermined format to obtain the data frame.

6. The information transmitting device according to claim 5, characterized in that, The data frame also includes a preamble, version information, the identifier of the die that caused the abnormal event, and a checksum.

7. The information transmitting device according to claim 1, characterized in that, In response to receiving the abnormal event, the information sending device caches the abnormal event in a queue for sequential processing. After an abnormal event is encapsulated into the transmission frame and sent, the next abnormal event is processed.

8. The information transmitting device according to claim 1, characterized in that, The information sending device is further configured to detect whether a transmission error has occurred in the transmission frame, and to record a transmission error event in response to detecting that a transmission error exists in the transmission frame; The detection of whether the transmission frame has experienced a transmission anomaly includes: Detect whether each part of the transmission frame was successfully transmitted within a second time threshold. If, after the second time threshold has been exceeded, at least a portion of the transmission frame is still not successfully transmitted, a transmission error is determined to have occurred; or The transmission frame is format-checked, and if the format check fails, a transmission exception is determined to occur.

9. The information transmitting device according to claim 1, characterized in that, The abnormal event includes at least one of the following: Interrupt events sent from upper-layer software, abnormal events obtained through proactive sensing, and interrupt events from the physical layer.

10. An information receiving device, characterized in that, The physical layer of the general-purpose high-speed interconnect interface for the first bare die is configured in the general-purpose chip interconnect. The information receiving device includes a third unit and a fourth unit. The third unit is configured to receive a transmission frame transmitted through the sideband link between the first die and the second die, and identify a first boundary timing interval and a second boundary timing interval in the transmission frame, wherein the first die and the second die are in a point-to-point topology. The fourth unit is configured to perform frame synchronization and parse the data frames in the transmitted frame; In the transmission frame, the first boundary timing interval is located before the header of the data frame, and the second boundary timing interval is located after the tail of the data frame. The first boundary timing interval and the second boundary timing interval are used to indicate the boundary of the transmission frame.

11. The information receiving device according to claim 10, characterized in that, The third unit is configured to first identify the first boundary time interval. The fourth unit is configured to perform frame synchronization and parse the data frames in the transmission frame after successfully identifying the first boundary time interval. The third unit is further configured to identify the second boundary timing interval after successfully parsing the data frame in the transmission frame.

12. The information receiving device according to claim 10, characterized in that, The information receiving device is configured to trigger an emergency handling process corresponding to the abnormal event of the transmission frame when the first boundary time interval and the second boundary time interval are successfully identified and the data frame in the transmission frame is successfully parsed. If identification fails in the first boundary timing interval or the second boundary timing interval, or if parsing of the data frame in the transmission frame fails, the transmission frame is discarded.

13. The information receiving device according to claim 10, characterized in that, When the third unit performs the task of identifying the first boundary timing interval in the transmitted frame, it includes performing the following operations: In response to detecting that a predetermined timing boundary in the first boundary timing interval meets a predetermined condition, and detecting a start trigger signal after the predetermined timing boundary, it is determined that the first boundary timing interval has been successfully identified; otherwise, it is determined that the first boundary timing interval has failed to be identified. Specifically, in response to the fact that the predetermined timing interval does not contain any valid data signal, the duration is greater than or equal to a first time threshold, and the clock signal in the predetermined timing interval has a duty cycle offset relative to the clock signal in other time periods, it is determined that the predetermined timing boundary satisfies the predetermined condition; otherwise, it is determined that the predetermined timing boundary does not satisfy the predetermined condition.

14. The information receiving device according to claim 13, characterized in that, When the third unit identifies the second boundary timing interval in the transmitted frame, it includes performing the following operations: In response to detecting an end trigger signal in the second boundary timing interval and the predetermined timing boundary in the second boundary timing interval satisfying the predetermined condition, it is determined that the second boundary timing interval has been successfully identified; otherwise, it is determined that the second boundary timing interval has failed to be identified.

15. The information receiving device according to claim 10, characterized in that, The data frame includes a preamble, an error message code corresponding to an abnormal event during transmission, and a checksum. When the fourth unit performs frame synchronization and parses the data frames in the transmitted frame, it includes performing the following operations: In response to parsing the preamble in the data frame, the clock signals of the first die and the second die are synchronized and ready to receive data content; The data frame is parsed according to a predetermined format, and the data content is verified by combining the check code. In response to the successful data verification, it is determined that the data frame in the transmission frame was successfully parsed, and the abnormal event is determined according to the error information code; In response to the failure of the data verification, it is determined that parsing the data frame in the transmission frame has failed.

16. The information receiving device according to claim 12, characterized in that, The information receiving device is also configured to: In response to the failure to identify the first boundary timing interval or the second boundary timing interval, or the failure to parse the data frame in the transmission frame, a reception abnormality event is recorded; The information receiving device is further configured to, in response to the occurrence of the reception abnormal event being greater than a predetermined threshold, adjust the relevant generation parameters of the predetermined time interval included in the first boundary time interval and the second boundary time interval, wherein the duration of the predetermined time interval is greater than or equal to a first time threshold, the first time threshold being determined by a silent count threshold and a unit interval, and the relevant generation parameters including at least one of the silent count threshold and the unit interval.

17. A communication device, characterized in that, It integrates the information transmitting device as described in any one of claims 1-9 and the information receiving device as described in any one of claims 10-16.

18. A chip, characterized in that, It includes multiple bare dies, and the physical layer of the universal chip interconnect high-speed interconnect interface of each bare die is provided with the communication device according to claim 17.

19. An electronic device, characterized in that, Includes the chip as described in claim 18.

20. An information transmission method, characterized in that, include: In response to receiving an abnormal event from the first die, a first boundary timing interval and a second boundary timing interval are generated; Based on the aforementioned abnormal event, a data frame is generated; Based on the data frame, the first boundary timing interval, and the second boundary timing interval, a transmission frame is obtained, and the transmission frame is sent to the second die through the sideband link between the first die and the second die, wherein the first die and the second die are in a point-to-point topology. In the transmission frame, the first boundary timing interval is located before the header of the data frame, and the second boundary timing interval is located after the tail of the data frame. The first boundary timing interval and the second boundary timing interval are used to indicate the boundary of the transmission frame.

21. An information transmission method, characterized in that, include: Receive a transmission frame transmitted through a sideband link between a first die and a second die, identify a first boundary timing interval and a second boundary timing interval in the transmission frame, wherein the first die and the second die are in a point-to-point topology; After successfully identifying the first boundary time interval, frame synchronization is performed, and the data frames in the transmitted frame are parsed. In the transmission frame, the first boundary timing interval is located before the header of the data frame, and the second boundary timing interval is located after the tail of the data frame. The first boundary timing interval and the second boundary timing interval are used to indicate the boundary of the transmission frame.

22. A non-transitory computer-readable storage medium, characterized in that, The non-transitory computer-readable storage medium stores computer-executable instructions. When the computer-executable instructions are executed by the processor, they implement the information transmission method according to claim 20 or 21.

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