Configuration system and configuration method for storing chip test data
By acquiring the test mode and environmental parameters of the memory chip, calculating the deviation and adjusting the test data, the fairness problem caused by changes in the memory chip test environment is solved, and test consistency and fairness are achieved under different environments.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHENZHEN ZORAN ELECTRONICS CO LTD
- Filing Date
- 2026-03-02
- Publication Date
- 2026-06-05
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
In existing technologies, due to changes in the testing environment, it is impossible to accurately guarantee that the testing will be conducted in the same environment during the testing of memory chips, which affects the impartiality of the testing.
By acquiring the test mode, test purpose, and reference test environment parameters of the memory chip, the initial test data is determined, and the deviation is calculated based on the current test environment parameters and reference parameters. The test data is then dynamically adjusted to match the actual environment, ensuring the fairness of the test.
It enables precise adjustment of test data under different testing environments, ensuring the fairness and consistency of memory chip testing.
Smart Images
Figure CN122157751A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of chip testing technology, and more specifically to a configuration system and method for storing chip test data. Background Technology
[0002] Memory chip testing is a crucial task, ensuring the reliability and stability of the chips. However, in actual testing, the testing environment is constantly changing, making it impossible to precisely guarantee that memory chip testing will be conducted under the same conditions. This can compromise the impartiality of memory chip testing. Therefore, the issue of how to dynamically configure test data for memory chips to ensure the impartiality of testing urgently needs to be addressed. Summary of the Invention
[0003] This invention provides a system and method for configuring test data for memory chips. It can accurately utilize adjustments to the test data to compensate for the impact of differences in the test environment on the fairness of memory chip testing. In other words, it can dynamically configure the test data for memory chips to ensure the fairness of memory chip testing.
[0004] One: This invention provides a method for configuring test data for a memory chip, applied to an electronic device, the electronic device including a memory chip, and the method further includes:
[0005] Obtain the test mode, test purpose, and reference test environment parameters corresponding to the test mode of the memory chip;
[0006] Obtain initial test data according to the test mode;
[0007] Obtain the current test environment parameters of the memory chip;
[0008] The first deviation is determined based on the current test environment parameters and the reference test environment parameters;
[0009] The target test data is determined based on the first deviation, the test objective, and the initial test data.
[0010] Second: This invention provides a configuration system for memory chip test data, applied to an electronic device including a memory chip. The system includes: a first acquisition unit, a second acquisition unit, a third acquisition unit, a first determination unit, and a second determination unit, wherein...
[0011] The first acquisition unit is used to acquire the test mode, test purpose and reference test environment parameters corresponding to the test mode of the memory chip;
[0012] The second acquisition unit is used to acquire initial test data according to the test mode;
[0013] The third acquisition unit is used to acquire the current test environment parameters of the memory chip;
[0014] The first determining unit is configured to determine a first deviation based on the current test environment parameters and the reference test environment parameters;
[0015] The second determining unit is used to determine target test data based on the first deviation, the test objective, and the initial test data.
[0016] Implementing the embodiments of the present invention has the following beneficial effects:
[0017] As can be seen, the method for configuring memory chip test data described in this embodiment of the invention is applied to an electronic device, which includes a memory chip. First, the test mode, test purpose, and reference test environment parameters corresponding to the test mode of the memory chip are obtained. Initial test data is obtained according to the test mode to match the test mode. Then, the current test environment parameters of the memory chip are obtained. A first deviation is determined based on the current test environment parameters and the reference test environment parameters. The first deviation reflects the degree of difference between the actual test environment and the ideal test environment. Next, target test data is determined based on the first deviation, the test purpose, and the initial test data. That is, the initial test data is adjusted based on the degree of difference between the actual test environment and the ideal test environment and the test purpose to make the adjusted test data conform to the actual environment. Thus, the adjustment of the test data can be accurately used to compensate for the impact of test environment differences on the fairness of memory chip testing. Furthermore, the test data of the memory chip can be dynamically configured to ensure the fairness of memory chip testing. Attached Figure Description
[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0019] Figure 1 This is a flowchart illustrating a method for configuring test data for a memory chip according to an embodiment of the present invention;
[0020] Figure 2 This is a first structural schematic diagram of an electronic device provided in an embodiment of the present invention;
[0021] Figure 3This is a schematic diagram of the second structure of an electronic device provided in an embodiment of the present invention;
[0022] Figure 4 This is a schematic diagram of the configuration system for memory chip test data provided in an embodiment of the present invention. Detailed Implementation
[0023] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0024] The terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this invention are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or apparatuses.
[0025] It should be understood that the term "and / or" in this document is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this document indicates that the preceding and following related objects are in an "or" relationship. In the embodiments of this invention, "multiple" refers to two or more.
[0026] In this invention, "at least one item" or similar expressions refer to any combination of these items, including any combination of a single item or multiple items. "One or more" means one or more, while "multiple" means two or more. For example, "at least one item" of a, b, or c can represent the following seven cases: a, b, c, a and b, a and c, b and c, a, b, and c. Each of a, b, and c can be an element or a set containing one or more elements.
[0027] In the embodiments of this invention, "connection" refers to various connection methods such as direct connection or indirect connection to achieve communication between devices. The embodiments of this invention do not impose any limitations on this.
[0028] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of the invention. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.
[0029] The basis for the impartiality of memory chip testing lies in unified standards and standardized procedures, that is, in the process of batch testing of memory chips, it is necessary to ensure the uniformity of the testing environment.
[0030] Please see Figure 1 , Figure 1 This is a flowchart illustrating a method for configuring test data for a memory chip according to an embodiment of the present invention. The method is applied to an electronic device, which includes a memory chip. The method for configuring test data for a memory chip includes:
[0031] S110. Obtain the test mode, test purpose, and reference test environment parameters corresponding to the test mode of the memory chip.
[0032] The testing objective can be understood as the testing purpose of the memory chip, that is, to verify its electrical performance, functional integrity, and reliability, in order to determine whether the memory chip conforms to design specifications and meets application requirements. For example, the testing objective may include at least one of the following: testing the processing speed, testing the data transfer rate, testing the storage speed of the memory chip, etc., without limitation.
[0033] The test objective can also correspond to the test mode, with different test modes corresponding to different test objectives. For example, a pre-stored mapping relationship between preset test modes and test objectives can be used to determine the test objective corresponding to the test mode of the memory chip. Test objectives can also exist independently, and can be preset or set by system default.
[0034] Different test modes can correspond to different test environment parameters. For example, a pre-stored mapping relationship between preset test modes and test environment parameters can be used to determine the reference test environment parameters corresponding to the test mode of the memory chip. The reference test environment parameters can be preset or set by system default.
[0035] In specific implementation, the reference test environment parameters may include at least one of the following: software test environment parameters, hardware test environment parameters, physical test environment parameters, etc., without limitation. Software test environment parameters refer to test environment parameters at the software level, which may include at least one of the following: remaining memory size, network parameters, operating system, database, middleware, testing tools, dependent components, etc., without limitation. Hardware test environment parameters refer to test environment parameters at the hardware level, which may include at least one of the following: hardware model and specifications, processor load, benchmark scores, etc., without limitation. Physical test environment parameters refer to test environment parameters at the physical environment level, which may include at least one of the following: temperature, humidity, pressure, magnetic field interference parameters, etc., without limitation.
[0036] S120. Obtain initial test data according to the test mode.
[0037] Among them, the mapping relationship between preset test modes and test data can be stored in advance, that is, the initial test data can be determined based on the mapping relationship so that the obtained test data matches the test mode.
[0038] S130. Obtain the current test environment parameters of the memory chip.
[0039] The current test environment parameters may include at least one of the following: software test environment parameters, hardware test environment parameters, physical test environment parameters, etc., without limitation. Software test environment parameters refer to software-level test environment parameters, which may include at least one of the following: remaining memory size, network parameters, operating system, database, middleware, testing tools, dependent components, etc., without limitation. Hardware test environment parameters refer to hardware-level test environment parameters, which may include at least one of the following: hardware model and specifications, processor load, benchmark scores, etc., without limitation. Physical test environment parameters refer to physical environment-level test environment parameters, which may include at least one of the following: temperature, humidity, pressure, magnetic field interference parameters, etc., without limitation.
[0040] In practice, the current test environment parameters of the memory chip can be obtained in real time.
[0041] S140. Determine the first deviation based on the current test environment parameters and the reference test environment parameters.
[0042] In practice, the first deviation can be determined based on the current test environment parameters and the reference test environment parameters. The first deviation reflects the degree of difference between the actual test environment and the ideal test environment.
[0043] S150. Determine the target test data based on the first deviation, the test objective, and the initial test data.
[0044] In practice, the target test data can be determined based on the first deviation, the test objective, and the initial test data. That is, the initial test data can be adjusted based on the degree of difference between the actual test environment and the ideal test environment, as well as the test objective, so that the adjusted test data conforms to the actual environment. Thus, the adjustment of the test data can be used to compensate for the impact of the test environment difference on the fairness of the memory chip test. Furthermore, the test data of the memory chip can be dynamically configured to ensure the fairness of the memory chip test.
[0045] As can be seen, the method for configuring memory chip test data described in this embodiment of the invention is applied to an electronic device, which includes a memory chip. First, the test mode, test purpose, and reference test environment parameters corresponding to the test mode of the memory chip are obtained. Initial test data is obtained according to the test mode to match the test mode. Then, the current test environment parameters of the memory chip are obtained. A first deviation is determined based on the current test environment parameters and the reference test environment parameters. The first deviation reflects the degree of difference between the actual test environment and the ideal test environment. Next, target test data is determined based on the first deviation, the test purpose, and the initial test data. That is, the initial test data is adjusted based on the degree of difference between the actual test environment and the ideal test environment and the test purpose to make the adjusted test data conform to the actual environment. Thus, the adjustment of the test data can be accurately used to compensate for the impact of test environment differences on the fairness of memory chip testing. Furthermore, the test data of the memory chip can be dynamically configured to ensure the fairness of memory chip testing.
[0046] Optionally, the above steps, determining the target test data based on the first deviation, the test objective, and the initial test data, can be implemented in the following manner:
[0047] Determine the reference deviation threshold range corresponding to the test objective; the reference deviation threshold range includes an upper threshold and a lower threshold;
[0048] When the first deviation is within the reference deviation threshold range, the initial test data is used as the target test data;
[0049] When the first deviation is less than the lower limit threshold, a first adjustment parameter is determined based on the test objective, the first deviation, and the lower limit threshold.
[0050] The initial test data is adjusted according to the first adjustment parameter to obtain the target test data;
[0051] When the first deviation is greater than the aforementioned upper limit threshold, a second adjustment parameter is determined based on the test objective, the first deviation, and the upper limit threshold.
[0052] The initial test data is adjusted according to the second adjustment parameter to obtain the target test data.
[0053] The reference deviation threshold range can be preset or set by system default, with different reference deviation threshold ranges corresponding to different testing objectives. This means that the reference deviation threshold range corresponding to the testing objective can be determined, and the reference deviation threshold range includes an upper limit threshold and a lower limit threshold. The lower limit threshold is less than the upper limit threshold.
[0054] In practice, when the first deviation is within the reference deviation threshold range, that is, when the first deviation is greater than or equal to the lower threshold and less than or equal to the upper threshold, it indicates that the difference between the actual test environment and the ideal test environment is small, and the impact on the fairness of the memory chip test is small. Therefore, the initial test data can be directly used as the target test data.
[0055] Correspondingly, when the first deviation is less than the lower threshold, it indicates a significant difference between the actual and ideal testing environments, which has a substantial impact on the fairness of memory chip testing. Therefore, a first adjustment parameter can be determined based on the testing objective, the first deviation, and the lower threshold. The initial test data can then be adjusted according to this parameter to obtain the target test data. This not only determines the adjustment direction but also allows for adjustments to the initial test data based on the degree of difference between the actual and ideal testing environments and the testing objective. This ensures that the adjusted test data conforms to the actual environment, allowing for precise use of test data adjustments to compensate for the impact of testing environment differences on the fairness of memory chip testing. Consequently, test data for memory chips can be dynamically configured to guarantee the fairness of memory chip testing.
[0056] Furthermore, when the first deviation exceeds the aforementioned threshold, it indicates a significant difference between the actual and ideal testing environments, which greatly impacts the fairness of memory chip testing. Therefore, a second adjustment parameter can be determined based on the testing objective, the first deviation, and the upper threshold. The initial test data can then be adjusted according to this second adjustment parameter to obtain the target test data. This not only determines the adjustment direction but also allows for adjustments to the initial test data based on the degree of difference between the actual and ideal testing environments and the testing objective, ensuring that the adjusted test data conforms to the actual environment. Consequently, the adjustment of the test data can be precisely used to compensate for the impact of testing environment differences on the fairness of memory chip testing. Furthermore, the test data for memory chips can be dynamically configured to guarantee the fairness of memory chip testing.
[0057] Optionally, the above steps, in which the first adjustment parameter is determined based on the test objective, the first deviation, and the lower limit threshold, can be implemented as follows:
[0058] Determine the difference between the lower limit threshold and the first deviation difference to obtain the first difference;
[0059] The first adjustment algorithm is determined based on the stated test objective;
[0060] The first algorithm parameters of the first adjustment algorithm are determined based on the first difference.
[0061] The first adjustment parameter is determined based on the first adjustment algorithm and the first algorithm parameters.
[0062] The first adjustment algorithm is used to adjust the test data. For example, it can adjust the amount of test data, the complexity of the test data, the execution path of the test data, the testing direction of the test data, etc. The first adjustment algorithm can include at least one of the following: neural network algorithms, fixed-graph algorithms (such as the MSCAN algorithm), complex-graph algorithms (such as the GALPAT algorithm, checker testing algorithm, Marching testing algorithm), roaming algorithms, chessboard algorithms, etc., without limitation. The first algorithm parameters are used to control the algorithm effect of the first adjustment algorithm. The algorithm effect can include: test data type selection, test data complexity, test data amount, etc., without limitation.
[0063] Specifically, the difference between the lower threshold and the first deviation can be determined to obtain the first difference, i.e., the first difference = lower threshold - first deviation. A pre-stored mapping relationship between preset test objectives and adjustment algorithms can also be used, allowing the determination of the first adjustment algorithm corresponding to the test objective based on this mapping relationship. Furthermore, a pre-stored mapping relationship between the difference and the algorithm parameters of the first adjustment algorithm can be used, allowing the determination of the first algorithm parameters of the first adjustment algorithm corresponding to the first difference. The first adjustment algorithm and its parameters can be used as the first adjustment parameters, meaning the first adjustment parameters consist of the first adjustment algorithm and its parameters. This allows for the dynamic determination of the corresponding adjustment algorithm based on the difference between the actual and ideal test environments, and the matching of the corresponding algorithm parameters based on the test objective. Thus, the initial test data can be adjusted based on the degree of difference between the actual and ideal test environments and the test objective, ensuring that the adjusted test data conforms to the actual environment. This allows for precise use of test data adjustments to compensate for the impact of test environment differences on the fairness of memory chip testing. Consequently, the test data for memory chips can be dynamically configured to ensure the fairness of memory chip testing.
[0064] Optionally, the above steps, in which the second adjustment parameter is determined based on the test objective, the first deviation, and the upper limit threshold, can be implemented in the following manner:
[0065] Determine the difference between the first deviation and the upper limit threshold to obtain the second difference;
[0066] The second adjustment algorithm is determined based on the stated test objective;
[0067] The second algorithm parameters of the second adjustment algorithm are determined based on the second difference.
[0068] The second adjustment parameter is determined based on the second adjustment algorithm and the second algorithm parameters.
[0069] The second adjustment algorithm is used to adjust the test data. For example, it can adjust the amount of test data, the complexity of the test data, the execution path of the test data, the testing direction of the test data, etc. The second adjustment algorithm can include at least one of the following: neural network algorithms, fixed-graph algorithms (such as the MSCAN algorithm), complex-graph algorithms (such as the GALPAT algorithm, checker testing algorithm, Marching testing algorithm), roaming algorithms, chessboard algorithms, etc., without limitation. The second algorithm parameters are used to control the algorithm effect of the second adjustment algorithm. The algorithm effect can include: test data type selection, test data complexity, test data amount, etc., without limitation.
[0070] Specifically, the difference between the first deviation degree and the upper limit threshold can be determined to obtain the second difference, i.e., the second difference = first deviation degree - upper limit threshold. Furthermore, a pre-stored mapping relationship between preset test objectives and adjustment algorithms can be established, allowing the determination of the second adjustment algorithm corresponding to the specific test objective. Similarly, a pre-stored mapping relationship between the preset difference and the algorithm parameters of the second adjustment algorithm can be established, allowing the determination of the second algorithm parameters corresponding to the second difference. The second adjustment algorithm and its parameters can be used as the second adjustment parameters, meaning the second adjustment parameters consist of the second adjustment algorithm and its parameters. This allows for the dynamic determination of the corresponding adjustment algorithm based on the difference between the actual and ideal test environments, and the matching of the algorithm parameters to the test objective. Thus, the initial test data can be adjusted based on the degree of difference between the actual and ideal test environments and the test objective, ensuring that the adjusted test data conforms to the actual environment. This allows for precise use of test data adjustments to compensate for the impact of test environment differences on the fairness of memory chip testing. Consequently, the test data for memory chips can be dynamically configured to guarantee the fairness of memory chip testing.
[0071] Optionally, the above step of determining the first deviation based on the current test environment parameters and the reference test environment parameters can be implemented in the following manner:
[0072] Determine the reference operating environment evaluation value corresponding to the reference test environment parameters;
[0073] Determine the first operating environment evaluation value corresponding to the current test environment parameters;
[0074] The first deviation is determined based on the first operating environment evaluation value and the reference operating environment evaluation value.
[0075] In specific implementation, a pre-stored mapping relationship between preset test environment parameters and operating environment evaluation values can be stored. The operating environment evaluation value is used to evaluate the quality of the operating environment of the memory chip. Based on this mapping relationship, a reference operating environment evaluation value corresponding to the reference test environment parameters can be determined, and a first operating environment evaluation value corresponding to the current test environment parameters can be determined based on this mapping relationship. Then, a first deviation degree can be determined based on the first operating environment evaluation value and the reference operating environment evaluation value, that is, the first deviation degree = (first operating environment evaluation value - reference operating environment evaluation value) / reference operating environment evaluation value. In this way, the degree of difference between the actual test environment and the ideal test environment can be accurately determined.
[0076] Optionally, the current test environment parameters include the current software test environment parameters, the current hardware test environment parameters, and the current physical test environment parameters; the above steps, determining the first runtime environment evaluation value corresponding to the current test environment parameters, can be implemented in the following manner:
[0077] Determine the first reference operating environment evaluation value based on the current software testing environment parameters;
[0078] Determine the second reference operating environment evaluation value based on the current hardware test environment parameters;
[0079] A third reference operating environment evaluation value is determined based on the current physical test environment parameters;
[0080] The first operating environment evaluation value is determined based on the first reference operating environment evaluation value, the second reference operating environment evaluation value, and the third reference operating environment evaluation value.
[0081] In specific implementation, a first mapping relationship between preset software test environment parameters and runtime environment evaluation values, and a first mapping relationship between preset hardware test environment parameters and runtime environment evaluation values can be stored in advance. That is, the first reference runtime environment evaluation value corresponding to the current software test environment parameters can be determined based on the first mapping relationship, the second reference runtime environment evaluation value corresponding to the current hardware test environment parameters can be determined based on the second mapping relationship, and the third reference runtime environment evaluation value corresponding to the current physical test environment parameters can be determined based on the third mapping relationship. Then, the weights corresponding to the software test environment parameters, hardware test environment parameters, and physical test environment parameters are obtained respectively to obtain the first weight, the second weight, and the third weight. The first weight, the second weight, and the third weight can all be preset or defaulted by the system. The sum of the first weight, the second weight, and the third weight is 1. Then, a weighted calculation is performed based on the first reference runtime environment evaluation value, the second reference runtime environment evaluation value, the third reference runtime environment evaluation value, the first weight, the second weight, and the third weight to obtain the first runtime environment evaluation value. In this way, the degree of difference between the actual test environment and the ideal test environment can be accurately determined from the software level, the hardware level, and the physical level.
[0082] Please see Figure 3 , Figure 3 This is a schematic diagram of a second structure of an electronic device provided in an embodiment of the present invention. The electronic device includes a processor, a memory, a communication interface, and one or more programs. The one or more programs are stored in the memory and configured to be executed by the processor. The memory includes a memory chip. The programs include instructions for performing the following steps:
[0083] Obtain the test mode, test purpose, and reference test environment parameters corresponding to the test mode of the memory chip;
[0084] Obtain initial test data according to the test mode;
[0085] Obtain the current test environment parameters of the memory chip;
[0086] The first deviation is determined based on the current test environment parameters and the reference test environment parameters;
[0087] The target test data is determined based on the first deviation, the test objective, and the initial test data.
[0088] Optionally, in determining the target test data based on the first deviation, the test objective, and the initial test data, the above procedure includes instructions for performing the following steps:
[0089] Determine the reference deviation threshold range corresponding to the test objective; the reference deviation threshold range includes an upper threshold and a lower threshold;
[0090] When the first deviation is within the reference deviation threshold range, the initial test data is used as the target test data;
[0091] When the first deviation is less than the lower limit threshold, a first adjustment parameter is determined based on the test objective, the first deviation, and the lower limit threshold.
[0092] The initial test data is adjusted according to the first adjustment parameter to obtain the target test data;
[0093] When the first deviation is greater than the aforementioned upper limit threshold, a second adjustment parameter is determined based on the test objective, the first deviation, and the upper limit threshold.
[0094] The initial test data is adjusted according to the second adjustment parameter to obtain the target test data.
[0095] Optionally, in determining the first adjustment parameter based on the test objective, the first deviation, and the lower limit threshold, the above procedure includes instructions for performing the following steps:
[0096] Determine the difference between the lower limit threshold and the first deviation difference to obtain the first difference;
[0097] The first adjustment algorithm is determined based on the stated test objective;
[0098] The first algorithm parameters of the first adjustment algorithm are determined based on the first difference.
[0099] The first adjustment parameter is determined based on the first adjustment algorithm and the first algorithm parameters.
[0100] Optionally, in determining the second adjustment parameter based on the test objective, the first deviation, and the upper limit threshold, the above procedure includes instructions for performing the following steps:
[0101] Determine the difference between the first deviation and the upper limit threshold to obtain the second difference;
[0102] The second adjustment algorithm is determined based on the stated test objective;
[0103] The second algorithm parameters of the second adjustment algorithm are determined based on the second difference.
[0104] The second adjustment parameter is determined based on the second adjustment algorithm and the second algorithm parameters.
[0105] Optionally, in determining the first deviation based on the current test environment parameters and the reference test environment parameters, the above procedure includes instructions for performing the following steps:
[0106] Determine the reference operating environment evaluation value corresponding to the reference test environment parameters;
[0107] Determine the first operating environment evaluation value corresponding to the current test environment parameters;
[0108] The first deviation is determined based on the first operating environment evaluation value and the reference operating environment evaluation value.
[0109] Please see Figure 4 , Figure 4 This is a schematic diagram of a configuration system for memory chip test data provided in an embodiment of the present invention, applied to an electronic device. The electronic device includes a memory chip, and the configuration system 400 for memory chip test data includes: a first acquisition unit 410, a second acquisition unit 420, a third acquisition unit 430, a first determination unit 440, and a second determination unit 450, wherein...
[0110] The first acquisition unit 410 is used to acquire the test mode, test purpose and reference test environment parameters corresponding to the test mode of the memory chip;
[0111] The second acquisition unit 420 is used to acquire initial test data according to the test mode;
[0112] The third acquisition unit 430 is used to acquire the current test environment parameters of the memory chip;
[0113] The first determining unit 440 is used to determine a first deviation based on the current test environment parameters and the reference test environment parameters;
[0114] The second determining unit 440 is used to determine target test data based on the first deviation, the test objective, and the initial test data.
[0115] Optionally, in determining the target test data based on the first deviation, the test objective, and the initial test data, the second determining unit 450 is specifically used for:
[0116] Determine the reference deviation threshold range corresponding to the test objective; the reference deviation threshold range includes an upper threshold and a lower threshold;
[0117] When the first deviation is within the reference deviation threshold range, the initial test data is used as the target test data;
[0118] When the first deviation is less than the lower limit threshold, a first adjustment parameter is determined based on the test objective, the first deviation, and the lower limit threshold.
[0119] The initial test data is adjusted according to the first adjustment parameter to obtain the target test data;
[0120] When the first deviation is greater than the aforementioned upper limit threshold, a second adjustment parameter is determined based on the test objective, the first deviation, and the upper limit threshold.
[0121] The initial test data is adjusted according to the second adjustment parameter to obtain the target test data.
[0122] Optionally, in determining the first adjustment parameter based on the test objective, the first deviation, and the lower limit threshold, the second determining unit 450 is specifically used for:
[0123] Determine the difference between the lower limit threshold and the first deviation difference to obtain the first difference;
[0124] The first adjustment algorithm is determined based on the stated test objective;
[0125] The first algorithm parameters of the first adjustment algorithm are determined based on the first difference.
[0126] The first adjustment parameter is determined based on the first adjustment algorithm and the first algorithm parameters.
[0127] Optionally, in determining the second adjustment parameter based on the test objective, the first deviation, and the upper limit threshold, the second determining unit 450 is specifically used for:
[0128] Determine the difference between the first deviation and the upper limit threshold to obtain the second difference;
[0129] The second adjustment algorithm is determined based on the stated test objective;
[0130] The second algorithm parameters of the second adjustment algorithm are determined based on the second difference.
[0131] The second adjustment parameter is determined based on the second adjustment algorithm and the second algorithm parameters.
[0132] Optionally, in determining the first deviation based on the current test environment parameters and the reference test environment parameters, the first determining unit 440 is specifically used for:
[0133] Determine the reference operating environment evaluation value corresponding to the reference test environment parameters;
[0134] Determine the first operating environment evaluation value corresponding to the current test environment parameters;
[0135] The first deviation is determined based on the first operating environment evaluation value and the reference operating environment evaluation value.
[0136] It is understood that the functions of each program module of the memory chip test data configuration system in this embodiment can be specifically implemented according to the methods in the above method embodiments. The specific implementation process can be referred to the relevant descriptions in the above method embodiments, which will not be repeated here.
[0137] This invention also provides a computer storage medium storing a computer program for electronic data interchange, which causes a computer to perform some or all of the steps of any of the methods described in the above method embodiments.
[0138] This invention also provides a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program operable to cause a computer to perform some or all of the steps of any of the methods described in the above method embodiments. This computer program product can be a software installation package.
[0139] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that the present invention is not limited to the described order of actions, because according to the present invention, some steps can be performed in other orders or simultaneously. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to the present invention.
[0140] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.
[0141] In the several embodiments provided by this invention, it should be understood that the disclosed apparatus can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of the units described above is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical or other forms.
[0142] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.
[0143] Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.
[0144] If the aforementioned integrated units are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage device (CMD). Based on this understanding, the technical solution of this invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a memory and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this invention. The aforementioned memory includes various media capable of storing program code, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.
[0145] Those skilled in the art will understand that all or part of the steps in the various methods of the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage device, which may include: a flash drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, etc.
[0146] The embodiments of the present invention have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.
Claims
1. A method for configuring test data for a memory chip, characterized in that, Applied to an electronic device, the electronic device including a memory chip, the method includes: Obtain the test mode, test purpose, and reference test environment parameters corresponding to the test mode of the memory chip; Obtain initial test data according to the test mode; Obtain the current test environment parameters of the memory chip; The first deviation is determined based on the current test environment parameters and the reference test environment parameters; The target test data is determined based on the first deviation, the test objective, and the initial test data.
2. The method as described in claim 1, characterized in that, The step of determining the target test data based on the first deviation, the test objective, and the initial test data includes: Determine the reference deviation threshold range corresponding to the test objective; the reference deviation threshold range includes an upper threshold and a lower threshold; When the first deviation is within the reference deviation threshold range, the initial test data is used as the target test data; When the first deviation is less than the lower limit threshold, a first adjustment parameter is determined based on the test objective, the first deviation, and the lower limit threshold. The initial test data is adjusted according to the first adjustment parameter to obtain the target test data; When the first deviation is greater than the aforementioned upper limit threshold, a second adjustment parameter is determined based on the test objective, the first deviation, and the upper limit threshold. The initial test data is adjusted according to the second adjustment parameter to obtain the target test data.
3. The method as described in claim 2, characterized in that, The step of determining the first adjustment parameter based on the test objective, the first deviation, and the lower limit threshold includes: Determine the difference between the lower limit threshold and the first deviation difference to obtain the first difference; The first adjustment algorithm is determined based on the stated test objective; The first algorithm parameters of the first adjustment algorithm are determined based on the first difference. The first adjustment parameter is determined based on the first adjustment algorithm and the first algorithm parameters.
4. The method as described in claim 2 or 3, characterized in that, The step of determining the second adjustment parameter based on the test objective, the first deviation, and the upper limit threshold includes: Determine the difference between the first deviation and the upper limit threshold to obtain the second difference; The second adjustment algorithm is determined based on the stated test objective; The second algorithm parameters of the second adjustment algorithm are determined based on the second difference. The second adjustment parameter is determined based on the second adjustment algorithm and the second algorithm parameters.
5. The method according to any one of claims 1-3, characterized in that, Determining the first deviation based on the current test environment parameters and the reference test environment parameters includes: Determine the reference operating environment evaluation value corresponding to the reference test environment parameters; Determine the first operating environment evaluation value corresponding to the current test environment parameters; The first deviation is determined based on the first operating environment evaluation value and the reference operating environment evaluation value.
6. A system for configuring test data for a memory chip, characterized in that, Applied to electronic devices, the electronic devices include memory chips, and the system includes: a first acquisition unit, a second acquisition unit, a third acquisition unit, a first determination unit, and a second determination unit, wherein... The first acquisition unit is used to acquire the test mode, test purpose and reference test environment parameters corresponding to the test mode of the memory chip; The second acquisition unit is used to acquire initial test data according to the test mode; The third acquisition unit is used to acquire the current test environment parameters of the memory chip; The first determining unit is configured to determine a first deviation based on the current test environment parameters and the reference test environment parameters; The second determining unit is used to determine target test data based on the first deviation, the test objective, and the initial test data.
7. The system as described in claim 6, characterized in that, In determining the target test data based on the first deviation, the test objective, and the initial test data, the second determining unit is specifically used for: Determine the reference deviation threshold range corresponding to the test objective; the reference deviation threshold range includes an upper threshold and a lower threshold; When the first deviation is within the reference deviation threshold range, the initial test data is used as the target test data; When the first deviation is less than the lower limit threshold, a first adjustment parameter is determined based on the test objective, the first deviation, and the lower limit threshold. The initial test data is adjusted according to the first adjustment parameter to obtain the target test data; When the first deviation is greater than the aforementioned upper limit threshold, a second adjustment parameter is determined based on the test objective, the first deviation, and the upper limit threshold. The initial test data is adjusted according to the second adjustment parameter to obtain the target test data.
8. The system as described in claim 7, characterized in that, In determining the first adjustment parameter based on the test objective, the first deviation, and the lower limit threshold, the second determining unit is specifically used for: Determine the difference between the lower limit threshold and the first deviation difference to obtain the first difference; The first adjustment algorithm is determined based on the stated test objective; The first algorithm parameters of the first adjustment algorithm are determined based on the first difference. The first adjustment parameter is determined based on the first adjustment algorithm and the first algorithm parameters.
9. The system as described in claim 7 or 8, characterized in that, In determining the second adjustment parameter based on the test objective, the first deviation, and the upper limit threshold, the second determining unit is specifically used for: Determine the difference between the first deviation and the upper limit threshold to obtain the second difference; The second adjustment algorithm is determined based on the stated test objective; The second algorithm parameters of the second adjustment algorithm are determined based on the second difference. The second adjustment parameter is determined based on the second adjustment algorithm and the second algorithm parameters.
10. The system according to any one of claims 6-8, characterized in that, In determining the first deviation based on the current test environment parameters and the reference test environment parameters, the first determining unit is specifically used for: Determine the reference operating environment evaluation value corresponding to the reference test environment parameters; Determine the first operating environment evaluation value corresponding to the current test environment parameters; The first deviation is determined based on the first operating environment evaluation value and the reference operating environment evaluation value.