Automatic failure removal circuit for battery power supply and failure detection method thereof
By detecting the increased resistance of faulty battery cells, and using MOSFETs or transistors to control the automatic bypass of faulty batteries, the problem of battery failure cannot be automatically disconnected is solved. This enables automatic disconnection of faulty batteries and timely alarm, reducing the risk of battery pack failure.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- ROYPOW TECH CO LTD
- Filing Date
- 2026-05-07
- Publication Date
- 2026-06-05
AI Technical Summary
In existing technologies, battery failures cannot be automatically bypassed, leading to battery pack failure and potentially causing serious accidents.
By detecting the increased resistance of a faulty battery cell, an automatic bypass of the faulty battery is controlled using a MOSFET or transistor, and the faulty battery is automatically disconnected by combining a comparator and an alarm module.
It enables automatic disconnection of faulty batteries, timely detection and uploading of fault locations, avoids battery pack failure, and reduces the risk of accidents.
Smart Images
Figure CN122159440A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of power supply technology, and in particular to an automatic fault-clearing circuit for battery power supplies and a fault detection method thereof. Background Technology
[0002] Currently, when a battery in a battery pack malfunctions, it cannot be automatically bypassed. Instead, the control chip detects and determines the fault by monitoring the voltage of individual cells online. The battery is then disconnected only after the control chip detects the fault, which takes a considerable amount of time. During this process, the entire battery pack may fail, potentially leading to a serious accident. Summary of the Invention
[0003] The purpose of this invention is to provide an automatic fault-clearing circuit for battery power supply and a fault detection method thereof. By utilizing the characteristic of increased resistance of a faulty battery cell, the faulty battery is automatically bypassed through a switching transistor, thereby achieving automatic fault-clearing.
[0004] To solve the above-mentioned technical problems, the present invention adopts the following technical solution: One aspect of this invention provides an automatic fault-clearing circuit for a battery power supply. The automatic fault-clearing circuit includes a control module and at least two parallel battery charge / discharge control circuits. Each battery charge / discharge control circuit includes: a first MOSFET and a second MOSFET, with the first electrode of the first MOSFET connected to the first electrode of the second MOSFET, and the second electrode of the first MOSFET receiving or outputting positive power. The control module is connected to the gate of the first MOSFET and the gate of the second MOSFET, respectively. The parasitic diodes of the first MOSFET and the second MOSFET are reverse-biased. At least one battery is included, comprising a first battery, with the second electrode of the second MOSFET connected to the positive terminal of the first battery, and the negative terminal of the first battery receiving or outputting negative power.
[0005] In some embodiments, both the first MOS transistor and the second MOS transistor are NMOS transistors.
[0006] In some embodiments, the drain of the first MOSFET receives or outputs a positive power supply, the source of the first MOSFET is connected to the source of the second MOSFET, and the drain of the second MOSFET is connected to the positive terminal of the first battery.
[0007] In some embodiments, when the first battery is controlled to charge, the control module outputs a high-level signal to the gate of the first MOSFET and a low-level signal to the gate of the second MOSFET; when the first battery is controlled to discharge, the control module outputs a high-level signal to the gate of the second MOSFET and a low-level signal to the gate of the first MOSFET.
[0008] In some embodiments, the automatic fault clearing circuit of the battery power supply further includes a comparator, wherein the non-inverting input terminal of the comparator is connected to the second electrode of the first MOS transistor, the inverting input terminal of the comparator is connected to the second electrode of the second MOS transistor, and the output terminal of the comparator is connected to the control module.
[0009] In some embodiments, the automatic fault-clearing circuit for the battery power supply further includes an alarm module connected to the control module.
[0010] In some embodiments, the battery charging and discharging control circuit includes a first transistor for receiving positive power and a second transistor for outputting positive power. The input terminal of the first transistor and the output terminal of the second transistor are connected and used to receive or output positive power. The output terminal of the first transistor and the input terminal of the second transistor are connected and connected to the positive terminal of the first battery. The control module is connected to the base of the first transistor and the base of the second transistor, respectively.
[0011] One aspect of this invention provides a battery power supply fault detection method, applied to the automatic fault clearing circuit of the battery power supply as described above. The battery power supply fault detection method includes a charging fault detection method, which includes: acquiring a first voltage of the second electrode of a first MOSFET and a second voltage of the second electrode of a second MOSFET at set intervals; determining a first battery fault when the first voltage is less than the second voltage; and controlling an alarm module to issue an alarm and upload the location information of the faulty first battery when the first battery is faulty.
[0012] In some embodiments, the battery power supply fault detection method further includes a discharge fault detection method, which includes: acquiring a first voltage of the second electrode of the first MOSFET and a second voltage of the second electrode of the second MOSFET at set intervals; determining that the first battery is faulty when the first voltage is greater than the second voltage; and controlling the alarm module to issue an alarm and upload the location information of the faulty first battery when the first battery is faulty.
[0013] In some embodiments, the set duration is 50ms.
[0014] An automatic fault-clearing circuit and fault detection method for a battery power supply according to an embodiment of the present invention have at least the following beneficial effects: This application utilizes the characteristic of increased resistance in a faulty battery cell to control the automatic bypass of the faulty battery through a switching transistor, thereby achieving automatic fault-clearing. When the battery is charging or discharging, if a battery fault occurs, the alarm module issues an alarm and uploads the location information of the faulty battery to facilitate timely detection and repair.
[0015] It should be understood that the above general description and the following detailed description are merely exemplary and do not limit this disclosure. Attached Figure Description
[0016] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0017] Figure 1 This is a schematic diagram of an automatic battery power supply failure cutoff circuit for some embodiments; Figure 2 This is a block diagram illustrating the connection principle of the control module and the alarm module according to an embodiment; Figure 3 The circuit schematics show four connection combinations of MOS transistors according to the embodiments. Figure 4 This is a schematic diagram of an automatic disconnection circuit for battery power supply failure in some other embodiments. Detailed Implementation
[0018] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0019] The terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first," "second," or "third" may explicitly or implicitly include one or more of that feature. In the description of this invention, unless otherwise stated, "a plurality of" means two or more.
[0020] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "connected" and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.
[0021] The operations / steps described in this document are merely illustrative and do not necessarily include all content and operations / steps, nor do they necessarily need to be performed in the described order. For example, some operations / steps can be broken down, while others can be combined or partially combined; therefore, the actual execution order may change depending on the actual situation.
[0022] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, they are provided so that the description of this disclosure will be more complete and fully convey the concept of the exemplary embodiments to those skilled in the art. The drawings are merely illustrative of this disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and therefore repeated descriptions of them will be omitted.
[0023] The automatic fault clearing circuit of this application embodiment is briefly described below: According to some embodiments, such as Figures 1 to 2 As shown, this application provides an automatic fault clearing circuit for a battery power supply. The automatic fault clearing circuit includes a control module and at least two parallel battery charge / discharge control circuits. The battery charge / discharge control circuits include: The first MOSFET Q11 and the second MOSFET Q12 are connected. The first electrode of the first MOSFET Q11 is connected to the first electrode of the second MOSFET Q12. The second electrode of the first MOSFET Q11 receives or outputs positive power. The control module is connected to the gate of the first MOSFET Q11 and the gate of the second MOSFET Q12 respectively. Among them, such as Figure 1 As shown, the parasitic diode of the first MOSFET Q11 is reversed with the parasitic diode of the second MOSFET Q12; At least one battery, including a first battery B11, the second electrode of a second MOSFET Q12 is connected to the positive terminal of the first battery B11, and the negative terminal of the first battery B11 receives or outputs negative power.
[0024] In some preferred embodiments, such as Figure 1As shown, at least one battery includes multiple batteries and a first battery B11 connected in series to form a battery string B11 to B1n. The first battery B11 is at the head of the battery string B11 to B1n, and the positive terminal of the first battery B11 serves as the positive terminal of the battery string B11 to B1n, used to receive or output positive power. The negative terminals of the batteries at the tail of the battery string B11 to B1n serve as the negative terminals of the battery string B11 to B1n, used to receive or output negative power.
[0025] Specifically, there are many possible embodiments of the connection combination of the first MOSFET Q11 and the second MOSFET Q12 in this application, and this application does not limit them.
[0026] In the first embodiment 101 using a MOSFET, as Figure 1 As shown, both the first MOSFET Q11 and the second MOSFET Q12 are NMOS transistors. The drain of the first NMOS transistor Q11 receives or outputs a positive power supply, the source of the first NMOS transistor Q11 is connected to the source of the second NMOS transistor Q12, and the drain of the second NMOS transistor Q12 is connected to the positive terminal of the first battery B11.
[0027] When controlling battery charging, the control module outputs a high-level signal to the gate of the first NMOS transistor Q11 and a low-level signal to the gate of the second NMOS transistor Q12. The first NMOS transistor Q11 is turned on, and the charging power flows through the first NMOS transistor Q11 and then through the parasitic diode of the second NMOS transistor Q12 to charge the battery string.
[0028] When a battery string experiences an open circuit failure, its internal resistance suddenly increases. Since the battery terminal voltage during charging is equal to the sum of the open circuit electromotive force and the internal resistance voltage, the terminal voltage of the battery string containing the faulty battery rises rapidly. This causes the drain voltage V2 of the second NMOS transistor Q12 to be higher than the drain voltage V1 of the first NMOS transistor Q11. The parasitic diode of the second NMOS transistor Q12 withstands the reverse voltage and is in the off state, thereby disconnecting the faulty battery string.
[0029] When the battery is discharging, the control module outputs a high-level signal to the gate of the second NMOS transistor Q12 and a low-level signal to the gate of the first NMOS transistor Q11. The second NMOS transistor Q12 is turned on, and the battery string power supply passes through the second NMOS transistor Q12 and then through the parasitic diode of the first NMOS transistor Q11 to supply power to the load.
[0030] When a battery string experiences an open circuit failure, its internal resistance suddenly increases. Since the battery terminal voltage equals the open circuit electromotive force minus the internal resistance voltage during discharge, the terminal voltage of the faulty battery string suddenly decreases. This causes the drain voltage V1 of the first NMOS transistor Q11 to be higher than the drain voltage V2 of the second NMOS transistor Q12. The parasitic diode of the first NMOS transistor Q11 withstands the reverse voltage and is in the off state, thereby disconnecting the faulty battery string.
[0031] In the second embodiment 102 using a MOSFET, as Figure 3 As shown, both the first MOSFET Q11 and the second MOSFET Q12 are NMOS transistors. The source of the first NMOS transistor Q11 receives or outputs a positive power supply, the drain of the first NMOS transistor Q11 is connected to the drain of the second NMOS transistor Q12, and the source of the second NMOS transistor Q12 is connected to the positive terminal of the first battery B11.
[0032] When controlling battery charging, the control module outputs a high-level signal to the gate of the second NMOS transistor Q12 and a low-level signal to the gate of the first NMOS transistor Q11. The second NMOS transistor Q12 is turned on, and the charging power supply passes through the parasitic diode of the first NMOS transistor Q11 and then through the second NMOS transistor Q12 to charge the battery string.
[0033] When a battery string experiences an open circuit failure, its internal resistance suddenly increases. Since the battery terminal voltage during charging is equal to the sum of the open circuit electromotive force and the internal resistance voltage, the terminal voltage of the battery string containing the faulty battery rises rapidly. This causes the source voltage V2 of the second NMOS transistor Q12 to be higher than the source voltage V1 of the first NMOS transistor Q11. The parasitic diode of the first NMOS transistor Q11 withstands the reverse voltage and is in the off state, thereby disconnecting the faulty battery string.
[0034] When the battery is discharging, the control module outputs a high-level signal to the gate of the first NMOS transistor Q11 and a low-level signal to the gate of the second NMOS transistor Q12. The first NMOS transistor Q11 is turned on, and the battery string power supply passes through the parasitic diode of the second NMOS transistor Q12 and then through the first NMOS transistor Q11 to supply power to the load.
[0035] When a battery string experiences an open circuit failure, its internal resistance suddenly increases. Since the battery terminal voltage equals the open circuit electromotive force minus the internal resistance voltage during discharge, the terminal voltage of the faulty battery string suddenly decreases. This causes the source voltage V1 of the first NMOS transistor Q11 to be higher than the source voltage V2 of the second NMOS transistor Q12. The parasitic diode of the second NMOS transistor Q12 withstands the reverse voltage and is in the off state, thereby disconnecting the faulty battery string.
[0036] In the third embodiment 103 using a MOSFET, as Figure 3As shown, both the first MOSFET Q11 and the second MOSFET Q12 are PMOS transistors. The drain of the first PMOS transistor Q11 receives or outputs positive power, the source of the first PMOS transistor Q11 is connected to the source of the second PMOS transistor Q12, and the drain of the second PMOS transistor Q12 is connected to the positive terminal of the first battery B11.
[0037] When controlling battery charging, the control module outputs a high-level signal to the gate of the first PMOS transistor Q11 and a low-level signal to the gate of the second PMOS transistor Q12. The second PMOS transistor Q12 is turned on, and the charging power flows through the parasitic diode of the first PMOS transistor Q11 and then through the second PMOS transistor Q12 to charge the battery string.
[0038] When a battery string experiences an open circuit failure, its internal resistance suddenly increases. Since the battery terminal voltage during charging is equal to the sum of the open circuit electromotive force and the internal resistance voltage, the terminal voltage of the battery string containing the faulty battery rises rapidly. This causes the drain voltage V2 of the second PMOS transistor Q12 to be higher than the drain voltage V1 of the first PMOS transistor Q11. The parasitic diode of the first PMOS transistor Q11 withstands the reverse voltage and is in the off state, thereby disconnecting the faulty battery string.
[0039] When the battery is discharging, the control module outputs a high-level signal to the gate of the second PMOS transistor Q12 and a low-level signal to the gate of the first PMOS transistor Q11. The first PMOS transistor Q11 is turned on, and the battery string power supply passes through the parasitic diode of the second PMOS transistor Q12 and then through the first PMOS transistor Q11 to supply power to the load.
[0040] When a battery string experiences an open circuit failure, its internal resistance suddenly increases. Since the battery terminal voltage equals the open circuit electromotive force minus the internal resistance voltage during discharge, the terminal voltage of the faulty battery string suddenly decreases. This causes the drain voltage V1 of the first PMOS transistor Q11 to be higher than the drain voltage V2 of the second PMOS transistor Q12. The parasitic diode of the second PMOS transistor Q12 withstands the reverse voltage and is in the off state, thereby disconnecting the faulty battery string.
[0041] In the fourth embodiment 104 using a MOSFET, as Figure 3 As shown, both the first MOSFET Q11 and the second MOSFET Q12 are PMOS transistors. The source of the first PMOS transistor Q11 receives or outputs positive power, the drain of the first PMOS transistor Q11 is connected to the drain of the second PMOS transistor Q12, and the source of the second PMOS transistor Q12 is connected to the positive terminal of the first battery B11.
[0042] When controlling battery charging, the control module outputs a high-level signal to the gate of the second PMOS transistor Q12 and a low-level signal to the gate of the first PMOS transistor Q11. The first PMOS transistor Q11 is turned on, and the charging power flows through the first PMOS transistor Q11 and then through the parasitic diode of the second PMOS transistor Q12 to charge the battery string.
[0043] When a battery string experiences an open circuit failure, its internal resistance suddenly increases. Since the battery terminal voltage during charging is equal to the sum of the open-circuit electromotive force and the internal resistance voltage, the terminal voltage of the battery string containing the faulty battery rises rapidly. This causes the source voltage V2 of the second PMOS transistor Q12 to be higher than the source voltage V1 of the first PMOS transistor Q11. The parasitic diode of the second PMOS transistor Q12 withstands the reverse voltage and is in the off state, thereby disconnecting the faulty battery string.
[0044] When the battery is discharging, the control module outputs a high-level signal to the gate of the first PMOS transistor Q11 and a low-level signal to the gate of the second PMOS transistor Q12. The second PMOS transistor Q12 is turned on, and the battery string power supply passes through the second PMOS transistor Q12 and then through the parasitic diode of the first PMOS transistor Q11 to supply power to the load.
[0045] When a battery string experiences an open circuit failure, its internal resistance suddenly increases. Since the battery terminal voltage equals the open circuit electromotive force minus the internal resistance voltage during discharge, the terminal voltage of the faulty battery string suddenly decreases. This causes the source voltage V1 of the first PMOS transistor Q11 to be higher than the source voltage V2 of the second PMOS transistor Q12. The parasitic diode of the first PMOS transistor Q11 withstands the reverse voltage and is in the off state, thereby disconnecting the faulty battery string.
[0046] Other combinations are also possible, such as the first MOSFET Q11 being an NMOS transistor and the second MOSFET Q12 being a PMOS transistor, or the first MOSFET Q11 being a PMOS transistor and the second MOSFET Q12 being an NMOS transistor. These are not all listed in this application.
[0047] According to some embodiments, such as Figure 1 As shown, the automatic fault cut-off circuit for battery power also includes a comparator U1. The non-inverting input of the comparator U1 is connected to the second electrode of the first MOSFET Q11, the inverting input of the comparator U1 is connected to the second electrode of the second MOSFET Q12, and the output of the comparator U1 is connected to the control module.
[0048] Furthermore, such as Figure 3 As shown, the automatic fault-clearing circuit for battery power also includes an alarm module, which is connected to the control module.
[0049] Furthermore, such as Figure 3As shown, the automatic fault-clearing circuit for battery power also includes a display module, which is connected to the control module.
[0050] Based on the above embodiments, such as Figure 1 As shown, the control module obtains the first voltage V1 of the second electrode of the first MOSFET Q11 and the second voltage V2 of the second electrode of the second MOSFET Q12 through comparator U1 at set intervals. The set interval can be set according to actual needs; in some embodiments of this application, the set interval is set to 50ms.
[0051] If the battery string is charging and the first voltage V1 is less than the second voltage V2, a fault is determined. When a fault occurs, the control module controls the alarm module to issue an alarm and uploads the location information of the faulty battery string to the display module. This facilitates timely detection and repair.
[0052] If the battery is in a discharging state and the first voltage V1 is greater than the second voltage V2, then the first battery B11 is determined to be faulty. When a battery string fails, the control module controls the alarm module to issue an alarm and uploads the location information of the faulty battery string to the display module. This facilitates timely detection and repair.
[0053] According to other embodiments, such as Figure 4 As shown, in addition to the embodiment using a MOSFET, a transistor can also be used, and the specific connection method is as follows. Figure 4 As shown, the battery charging and discharging control circuit includes a first transistor QN11 for receiving positive power and a second transistor QN12 for outputting positive power. The input terminal of the first transistor QN11 and the output terminal of the second transistor QN12 are connected and used to receive or output positive power. The output terminal of the first transistor QN11 and the input terminal of the second transistor QN12 are connected and connected to the positive terminal of the first battery B11. The control module is connected to the base of the first transistor QN11 and the base of the second transistor QN12 respectively.
[0054] There are many possible combinations of the connection between the first transistor QN11 and the second transistor QN12 in this application, and this application does not limit them.
[0055] In the first embodiment using a transistor, such as Figure 4 As shown, both the first transistor QN11 and the second transistor QN12 are NPN transistors. The collector of the first NPN transistor QN11 is connected to the emitter of the second NPN transistor QN12 and is used to receive or output positive power. The emitter of the first NPN transistor QN11 is connected to the collector of the second NPN transistor QN12 and is connected to the positive terminal of the first battery B11.
[0056] When controlling battery charging, the control module outputs a high-level signal to the base of the first NPN transistor QN11 and a low-level signal to the base of the second NPN transistor QN12. The first NPN transistor QN11 is turned on, and the second NPN transistor QN12 is turned off.
[0057] When the battery is being discharged, the control module outputs a high-level signal to the base of the second NPN transistor QN12 and a low-level signal to the base of the first NPN transistor QN11. The first NPN transistor QN11 is turned off, and the second NPN transistor QN12 is turned on.
[0058] In the second embodiment using transistors (not shown in the figure), both the first transistor QN11 and the second transistor QN12 are PNP transistors. The emitter of the first PNP transistor is connected to the collector of the second PNP transistor and is used to receive or output positive power. The collector of the first PNP transistor is connected to the emitter of the second PNP transistor and is connected to the positive terminal of the first battery B11.
[0059] When controlling battery charging, the control module outputs a high-level signal to the base of the second PNP transistor and a low-level signal to the base of the first PNP transistor. The first PNP transistor is turned on, and the second PNP transistor is turned off.
[0060] When the battery is being discharged, the control module outputs a high-level signal to the base of the first PNP transistor and a low-level signal to the base of the second PNP transistor. The first PNP transistor is turned off, and the second PNP transistor is turned on.
[0061] Other combinations are also possible, such as the first transistor QN11 being an NPN transistor and the second transistor QN12 being a PNP transistor, or the first transistor QN11 being a PNP transistor and the second transistor QN12 being an NPN transistor. These are not all listed in this application.
[0062] The fault detection method of this application embodiment is briefly described below: According to some embodiments, this application provides a battery power supply fault detection method, applied to the automatic fault clearing circuit of the battery power supply as described above. The battery power supply fault detection method includes a charging fault detection method, which includes: Step 101: At set intervals, acquire the first voltage V1 of the second electrode of the first MOSFET Q11 and the second voltage V2 of the second electrode of the second MOSFET Q12. Step 102: When the first voltage V1 is less than the second voltage V2, the first battery B11 is determined to be faulty. Step 103: When the first battery B11 fails, the control alarm module issues an alarm and uploads the location information of the first battery B11 that has failed.
[0063] The duration can be set according to actual needs, and this application does not limit it. In some embodiments, the duration is 50ms.
[0064] In some specific embodiments, if both the first MOS transistor Q11 and the second MOS transistor Q12 are NMOS transistors.
[0065] When controlling battery charging, the control module outputs a high-level signal to the gate of the first NMOS transistor Q11 and a low-level signal to the gate of the second NMOS transistor Q12. The first NMOS transistor Q11 is turned on, and the charging power flows through the first NMOS transistor Q11 and then through the parasitic diode of the second NMOS transistor Q12 to charge the battery string.
[0066] Step 103 also includes the following: when the first battery B11 fails, the control module outputs a low-level signal to the gate of the first NMOS transistor Q11, and the first NMOS transistor Q11 is turned off.
[0067] Furthermore, the battery power supply fault detection method also includes a discharge fault detection method, which includes: Step 201: At set intervals, acquire the first voltage V1 of the second electrode of the first MOSFET Q11 and the second voltage V2 of the second electrode of the second MOSFET Q12. Step 202: When the first voltage V1 is greater than the second voltage V2, the first battery B11 is determined to be faulty. Step 203: When the first battery B11 fails, the control alarm module issues an alarm and uploads the location information of the first battery B11 that has failed.
[0068] The duration can be set according to actual needs, and this application does not limit it. In some embodiments, the duration is 50ms.
[0069] In some specific embodiments, if both the first MOS transistor Q12 and the second MOS transistor Q12 are NMOS transistors.
[0070] When the battery is discharging, the control module outputs a high-level signal to the gate of the second NMOS transistor Q12 and a low-level signal to the gate of the first NMOS transistor Q11. The second NMOS transistor Q12 is turned on, and the battery string power supply passes through the second NMOS transistor Q12 and then through the parasitic diode of the first NMOS transistor Q11 to supply power to the load.
[0071] Step 203 further includes the following: when the first battery B11 fails, the control module outputs a low-level signal to the gate of the second NMOS transistor Q12, and the second NMOS transistor Q12 is turned off.
[0072] In the description of the above embodiments, specific features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments or examples.
[0073] Although this disclosure has been described with reference to several typical embodiments, it should be understood that the terminology used is descriptive and exemplary, and not restrictive. Because this disclosure can be embodied in many forms without departing from the spirit or substance of this application, it should be understood that the above embodiments are not limited to any of the foregoing details, but should be interpreted broadly within the spirit and scope defined by the appended claims. Therefore, all variations and modifications falling within the scope of the claims or their equivalents should be covered by the appended claims.
Claims
1. An automatic fault-clearing circuit for battery power supply, characterized in that, The automatic fault clearing circuit for the battery power supply includes a control module and at least two parallel battery charge / discharge control circuits, wherein the battery charge / discharge control circuit includes: A first MOSFET and a second MOSFET, wherein the first electrode of the first MOSFET is connected to the first electrode of the second MOSFET, and the second electrode of the first MOSFET receives or outputs positive power, and the control module is connected to the gate of the first MOSFET and the gate of the second MOSFET respectively. The parasitic diode of the first MOSFET is reverse-biased from that of the parasitic diode of the second MOSFET. At least one battery, the at least one battery including a first battery, the second electrode of the second MOS transistor being connected to the positive terminal of the first battery, and the negative terminal of the first battery receiving or outputting negative power.
2. The automatic fault clearing circuit for battery power supply according to claim 1, characterized in that, Both the first MOS transistor and the second MOS transistor are NMOS transistors.
3. The automatic fault clearing circuit for battery power supply according to claim 2, characterized in that, The drain of the first MOSFET receives or outputs a positive power supply, the source of the first MOSFET is connected to the source of the second MOSFET, and the drain of the second MOSFET is connected to the positive terminal of the first battery.
4. The automatic fault-clearing circuit for battery power supply according to claim 3, characterized in that, When the first battery is being charged, the control module outputs a high-level signal to the gate of the first MOS transistor and a low-level signal to the gate of the second MOS transistor. When the first battery is controlled to discharge, the control module outputs a high-level signal to the gate of the second MOS transistor and a low-level signal to the gate of the first MOS transistor.
5. The automatic fault clearing circuit for battery power supply according to claim 1, characterized in that, The automatic fault clearing circuit for the battery power supply also includes a comparator. The non-inverting input of the comparator is connected to the second electrode of the first MOS transistor, the inverting input of the comparator is connected to the second electrode of the second MOS transistor, and the output of the comparator is connected to the control module.
6. The automatic fault-clearing circuit for battery power supply according to claim 1, characterized in that, The automatic fault-clearing circuit for the battery power supply also includes an alarm module, which is connected to the control module.
7. The automatic fault clearing circuit for battery power supply according to claim 1, characterized in that, Alternatively, the battery charging and discharging control circuit may include a first transistor for receiving positive power and a second transistor for outputting positive power. The input terminal of the first transistor and the output terminal of the second transistor are connected and used to receive or output positive power. The output terminal of the first transistor and the input terminal of the second transistor are connected and connected to the positive terminal of the first battery. The control module is connected to the base of the first transistor and the base of the second transistor, respectively.
8. A method for detecting faults in a battery power supply, characterized in that, An automatic fault-clearing circuit for a battery power supply as described in any one of claims 1 to 7, wherein the fault detection method for the battery power supply includes a charging fault detection method, the charging fault detection method comprising: At set intervals, the first voltage of the second electrode of the first MOSFET and the second voltage of the second electrode of the second MOSFET are acquired. When the first voltage is less than the second voltage, the first battery is determined to be faulty; When the first battery fails, the control alarm module issues an alarm and uploads the location information of the first battery that failed.
9. The battery power supply fault detection method according to claim 8, characterized in that, The battery power supply fault detection method further includes a discharge fault detection method, which includes: At set intervals, the first voltage of the second electrode of the first MOSFET and the second voltage of the second electrode of the second MOSFET are acquired. When the first voltage is greater than the second voltage, the first battery is determined to be faulty; When the first battery fails, the control alarm module issues an alarm and uploads the location information of the first battery that failed.
10. The battery power supply fault detection method according to claim 8 or 9, characterized in that, The set duration is 50ms.