A system and method for quantum key distribution post-processing based on double adaptive control

Abstract

A quantum key distribution (QKD) post-processing method and system based on double adaptive control, the application adopts a "channel confidence-rate compatible QC-LDPC" double closed-loop control architecture: the inner loop dynamically adjusts the error code detection ratio by evaluating the channel confidence, optimizes the overhead under the premise of ensuring security; the outer loop introduces a hysteresis controller with an asymmetric threshold to decide the best error correction code rate to suppress the "ping-pong effect". Cooperate with the puncturing and shortening algorithm based on the IEEE 802.11n standard base matrix, generate a rate-compatible check matrix, release bandwidth in low-noise areas, and maintain link physical survival (Keep-Alive) in extreme high-noise areas through robust mode. The application effectively balances the system throughput and robustness, and avoids system reset and time penalty caused by channel fluctuations.

Description

Technical Field

[0001] This invention relates to the field of quantum communication technology, and specifically to a system and method for quantum key distribution post-processing based on dual adaptive control. Background Technology

[0002] Quantum key distribution (QKD) provides unconditionally secure key sharing based on the laws of physics. However, practically deployed quantum channels (such as overhead optical fibers and free-space links) exhibit drastic time-varying characteristics due to environmental influences, and existing post-processing techniques face the following challenges:

[0003] First, the traditional "fixed parameter" scheme lacks flexibility. When the channel quality is good, a large number of redundant parity bits are transmitted at a fixed low bit rate, wasting bandwidth; when the channel suddenly deteriorates, it exceeds the error correction capability, resulting in decoding failure and link outage, causing time-consuming system resynchronization.

[0004] Secondly, existing adaptive solutions are mostly based on a single threshold switching. When QBER fluctuates around the threshold, the system will fall into a high-frequency "ping-pong switching" state, which increases the computational burden of the controller and may lead to synchronization loss.

[0005] Third, existing LDPC schemes lack protection mechanisms under extreme conditions. Once the bit error rate becomes too high, they stop working and cannot maintain the "keep-alive" state of the link, resulting in the inability to instantly restart key generation after the channel recovers. Therefore, there is an urgent need to design a post-processing architecture that can smoothly adapt to channel dynamics, suppress switching oscillations, and survive extreme conditions. Summary of the Invention

[0006] This invention proposes a system and method for quantum key distribution post-processing based on dual adaptive control, which solves the technical problems of low efficiency and poor survivability in high error regions of fixed parameter schemes, "ping-pong effect" oscillations caused by channel jitter in simple threshold adaptive schemes, and high time penalties caused by link interruption under extreme channel conditions in existing technologies.

[0007] This invention is achieved through the following technical solution: a quantum key distribution post-processing method based on dual adaptive control, comprising the following steps:

[0008] Step 1: Both communicating parties pre-set a quasi-cyclic low-density parity-check (QC-LDPC) basis matrix and define a rate-compatible code rate set generated through puncturing and shortening operations;

[0009] Step 2: The receiver assesses the current channel confidence based on the decoding feedback status of the previous frame, and adaptively adjusts the bit error rate detection ratio of the current frame according to the confidence status.

[0010] Step 3: The receiver uses the adjusted detection ratio to publish part of the screening data to estimate the bit error rate (QBER) of the current frame;

[0011] Step 4: Input the QBER into a hysteresis controller with an asymmetric threshold to determine the target bitrate of the current frame. If the QBER is within the hysteresis interval, maintain the bitrate mode of the previous frame.

[0012] Step 5: The two communicating parties perform deterministic puncturing or shortening operations on the base matrix according to the target code rate, generate a real-time parity check matrix, and perform error correction decoding;

[0013] Step 6: Feed back the decoded verification result to the parameter estimation module and update the channel confidence status of the next frame.

[0014] In step 1, the rate-compatible bitrate set includes high bitrate mode, normal mode and robust mode; the robust mode is generated by shortening the information bit end of the base matrix, and is used to maintain the physical layer frame synchronization and session continuity of the link by maintaining the decoding success state when the QBER exceeds the error correction limit of the normal mode, so as to achieve link keep-alive.

[0015] In step 2, the channel confidence adjustment strategy is as follows:

[0016] When the channel is in a high confidence state, that is, when the QBER is lower than the preset high confidence threshold, the bit error rate detection ratio is reduced to reduce bit consumption and enters high throughput mode.

[0017] When the channel is in a low confidence state, i.e., the QBER is higher than the preset low confidence threshold, the bit error rate detection ratio is increased to suppress statistical fluctuation deviation and ensure the security boundary of privacy amplification.

[0018] In step 4, the hysteresis controller is set with non-overlapping upgrade and downgrade thresholds, with the downgrade threshold being greater than the upgrade threshold, forming a hysteresis protection band between them. The system is triggered to switch to low bitrate mode only when QBER is higher than the downgrade threshold; the system is triggered to switch to high bitrate mode only when QBER is lower than the upgrade threshold; when QBER is between the upgrade and downgrade thresholds, the system maintains the current bitrate mode.

[0019] A system for implementing the quantum key distribution post-processing method based on dual adaptive control includes a dynamic parameter estimation module, a dual adaptive controller module, and an adaptive encoding / decoding module.

[0020] The dynamic parameter estimation module is configured to maintain the channel confidence state machine and output the bit error rate detection ratio for each frame based on the confidence level.

[0021] A dual adaptive controller module is configured to receive QBER estimates and output target bit rate instructions through hysteresis comparison logic.

[0022] The adaptive encoding / decoding module is configured to logically reconstruct the base matrix according to the target bit rate instruction, generate the corresponding parity check matrix, and execute the decoding algorithm.

[0023] The beneficial effects of this invention are as follows:

[0024] 1. Dynamic balance between efficiency and robustness: By using a channel confidence strategy, bandwidth is automatically released (bandwidth reclamation) when the channel is good, and resources are automatically allocated to ensure safety when the channel is poor, thus achieving non-uniform optimal allocation of resources;

[0025] 2. Improved system stability: The hysteresis control mechanism effectively suppresses frequent mode switching caused by small channel jitters, reduces control overhead, and ensures stable system operation;

[0026] 3. Link Keep-Alive Function: Introducing Robust Mode, even under extremely high error rate conditions (where the security key rate may drop to zero), the system can still maintain physical layer frame synchronization through powerful error correction. Once the channel disturbance disappears, the system can instantly resume key production, avoiding the second-level or even minute-level time penalty caused by interruption and reconnection in traditional solutions;

[0027] 4. Hardware-friendly: All rate changes are derived from the same base matrix, eliminating the need to store multiple sets of matrices, making it suitable for deployment on devices with limited hardware resources, such as FPGAs. Attached Figure Description

[0028] Figure 1 This is a flowchart of the method of the present invention;

[0029] Figure 2 This is a schematic diagram of the state transition logic of the hysteresis controller in this invention. Detailed Implementation

[0030] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described below through specific embodiments (the accompanying drawings are schematic diagrams of the flow logic, used to assist in understanding the technical solutions, and are not necessary limitations for implementation). It should be understood that the following embodiments are merely illustrative examples and are not intended to limit the scope of protection of this invention.

[0031] I. This invention is based on the core of "inner loop of channel confidence + outer loop of hysteresis rate control + rate compatibility matrix", and is achieved through the following stages in a coordinated manner:

[0032] 1. Dynamic parameter estimation stage (inner loop):

[0033] The receiver maintains a "channel confidence" state machine. Based on the verification feedback (success / failure, iteration count) of historical frames, it dynamically adjusts the detection ratio used for parameter estimation in the current frame. .

[0034] High confidence (low noise region): Reduce It employs a "greedy" strategy to maximize the proportion of bits used to generate the key;

[0035] Low confidence (high noise region): Improve By using the Hoeffding inequality to tighten statistical bias, security leaks can be prevented due to underestimation of the bit error rate.

[0036] 2. Hysteresis Rate Decision Stage (Outer Ring):

[0037] Introduce hysteresis comparator logic. Set an asymmetric upgrade threshold. and downgrade threshold ,and .

[0038] Only when real-time QBER > When the real-time QBER is < 0, a downgrade (switching to a lower bitrate) is triggered; only when the real-time QBER is < 0. When this occurs, an upgrade (switching to a higher bitrate) is triggered; in the buffer between the two ( Within this range, the current mode remains unchanged, thereby physically filtering out random jitter noise from the channel.

[0039] 3. Rate-compatible encoding / decoding stage:

[0040] Based on a single IEEE 802.11n standard base matrix, without changing the hardware storage structure, multi-rate matrices are generated only through logical operations: Punching: used to generate high code rate matrices to adapt to low-noise channels. Shortening: used to generate robust matrices to adapt to high-noise channels.

[0041] 4. Classic post-processing stage:

[0042] Simplified basis selection: Since both the transmitter and receiver use Z basis, there is no need to perform multi-basis comparison. The measurement result corresponding to the signal photon is directly used as the noisy raw key.

[0043] Lightweight LDPC Error Correction: An LDPC error correction model is constructed using a sparse parity-check matrix. Noise errors in the original key are iteratively corrected through a belief propagation algorithm. The sparse matrix employs an efficient storage format (such as column-compressed storage format) to reduce resource consumption.

[0044] Valid key extraction: After error correction, a valid key consistent with the sending end and the receiving end is obtained. This key inherits the absolute security and true randomness guaranteed by quantum mechanics.

[0045] II. System Architecture Design:

[0046] The present invention, adapted to the above-mentioned protocol system, includes the following core functional modules:

[0047] Dynamic parameter estimation module: responsible for running the channel confidence algorithm and outputting the value of each frame. parameter;

[0048] Dual adaptive controller: responsible for receiving QBER estimates, running hysteresis state machines, and outputting target bit rate instructions R;

[0049] Adaptive encoding / decoding module: integrates rate-compatible logic, reconstructs the basis matrix in real time according to instruction R, and executes the BP decoding algorithm.

[0050] Example 1:

[0051] Refer to Figure 1 for the dual adaptive post-processing flowchart, which includes the following steps:

[0052] S1: Initialization and Base Matrix Configuration: The system starts, and both communicating parties load the IEEE 802.11n standard (N=1944, R=0.5) base matrix. Three working modes are defined: high bit rate mode (R=0.66), normal mode (R=0.5), and robust mode (R=0.33).

[0053] S2: Channel Confidence Assessment: The receiver checks the hash verification result of the previous frame. If multiple consecutive frames pass verification, the channel confidence is determined to be "high," and the detection ratio of the current frame is increased. Set to a low value (preferably 6% in this embodiment); if a verification failure or a sudden increase in QBER occurs, the confidence level is determined to be "low". Increase to a high value (preferably 30% in this embodiment);

[0054] S3: Bit error rate estimation: based on the set... The two communicating parties compare the publicly disclosed screening base data to calculate the QBER estimate of the current frame.

[0055] S4: Hysteresis Bit Rate Decision: The controller reads the current mode and QBER, and makes a judgment based on the preset thresholds (in this embodiment, the upgrade threshold is set to 6.0%, and the downgrade threshold is set to 8.0%): If the current mode is normal and QBER > 8.0%, the channel is determined to be deteriorated, and the controller switches to robust mode; if the current mode is normal and QBER < 6.0%, the channel is determined to be excellent, and the controller switches to high bit rate mode; if QBER is between 6.0% and 8.0%, the hysteresis protection mechanism is triggered, and the current mode remains unchanged.

[0056] S5: Matrix Reconstruction and Decoding

[0057] High code rate instruction: Puncturing the parity bits of the base matrix, the decoder initializes the corresponding LLR node to 0;

[0058] Robust instructions: Shorten the information bits of the basis matrix, fill in the known bits, and the decoder initializes the corresponding node LLR to the maximum strong confidence value. The receiver uses the reconstructed matrix for confidence propagation (BP) decoding;

[0059] S6: Link Keep-Alive Processing. In S5, if in robust mode and the QBER is extremely high (e.g., reaching 9.5%), although the final key quantity generated after privacy amplification approaches zero, the system utilizes the strong error correction capability of robust mode to ensure successful error correction and verification. This maintains physical layer frame count synchronization and session continuity, achieving "link keep-alive".

[0060] S7: Feedback Update: Feedback the verification result of this frame to step S2 for confidence update in the next frame.

[0061] It should be understood that the above parameters are merely exemplary values. Those skilled in the art can flexibly adjust the width of the hysteresis protection band, the configuration mode of the rate compatibility set, and the transition conditions of the channel confidence state machine according to actual application scenarios (such as the computing resource limitations of the hardware platform, the background noise level of the quantum channel, and the security level requirements of the system). These adjustments do not depart from the technical essence and protection scope of this invention.

Claims

1. A quantum key distribution post-processing method based on dual adaptive control, characterized in that, Includes the following steps: Step 1: Both communicating parties pre-set a quasi-cyclic low-density parity-check (QC-LDPC) basis matrix and define a rate-compatible code rate set generated through puncturing and shortening operations; Step 2: The receiver assesses the current channel confidence based on the decoding feedback status of the previous frame, and adaptively adjusts the bit error rate detection ratio of the current frame according to the confidence status. Step 3: The receiver uses the adjusted detection ratio to publish part of the screening data to estimate the bit error rate (QBER) of the current frame; Step 4: Input the QBER into a hysteresis controller with an asymmetric threshold to determine the target bitrate of the current frame. If the QBER is within the hysteresis interval, maintain the bitrate mode of the previous frame. Step 5: Both communicating parties perform deterministic puncturing or shortening operations on the base matrix according to the target code rate, generate a real-time parity check matrix, and perform error correction decoding; Step 6: Feed back the decoded verification result to the parameter estimation module and update the channel confidence status of the next frame.

2. The quantum key distribution post-processing method based on dual adaptive control according to claim 1, characterized in that, In step 1, the rate-compatible bitrate set includes high bitrate mode, normal mode and robust mode; the robust mode is generated by shortening the information bit end of the base matrix, and is used to maintain the physical layer frame synchronization and session continuity of the link by maintaining the decoding success state when the QBER exceeds the error correction limit of the normal mode, so as to achieve link keep-alive.

3. The quantum key distribution post-processing method based on dual adaptive control according to claim 1, characterized in that, In step 2, the channel confidence adjustment strategy is as follows: When the channel is in a high confidence state, that is, when the QBER is lower than the preset high confidence threshold, the bit error rate detection ratio is reduced to reduce bit consumption and enters high throughput mode. When the channel is in a low confidence state, i.e., the QBER is higher than the preset low confidence threshold, the bit error rate detection ratio is increased to suppress statistical fluctuation deviation and ensure the security boundary of privacy amplification.

4. The quantum key distribution post-processing method based on dual adaptive control according to claim 1, characterized in that, In step 4, the hysteresis controller is set with non-overlapping upgrade and downgrade thresholds, with the downgrade threshold being greater than the upgrade threshold, forming a hysteresis protection band between them. The system is triggered to switch to low bitrate mode only when QBER is higher than the downgrade threshold; the system is triggered to switch to high bitrate mode only when QBER is lower than the upgrade threshold; when QBER is between the upgrade and downgrade thresholds, the system maintains the current bitrate mode.

5. A system for implementing the quantum key distribution post-processing method based on dual adaptive control as described in any one of claims 1-4, characterized in that, The system comprises a dynamic parameter estimation module, a dual adaptive controller module, and an adaptive encoder / decoder module. The dynamic parameter estimation module is configured to maintain the channel confidence state machine and output the bit error rate detection ratio for each frame based on the confidence level. A dual adaptive controller module is configured to receive QBER estimates and output target bit rate instructions through hysteresis comparison logic. The adaptive encoding / decoding module is configured to logically reconstruct the base matrix according to the target bit rate instruction, generate the corresponding parity check matrix, and execute the decoding algorithm.

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