Method for manufacturing a wiring substrate

Abstract

The present application provides a manufacturing method of a wiring substrate, which effectively utilizes a peripheral area. The manufacturing method of the wiring substrate of the embodiment includes the steps of: laminating a resin insulating layer (11) in a semi-cured state on a substrate; pressing the resin insulating layer (11) toward the substrate (100); removing a peripheral portion of the resin insulating layer (11); and forming a wiring layer on the resin insulating layer (11). The step of laminating the resin insulating layer (11) on the substrate (100) includes the step of arranging the resin insulating layer (11) having a size of at least one direction in a plan view which is larger than a size of the substrate (100) on the substrate (100), and the step of removing the peripheral portion includes the step of removing a portion of the resin insulating layer (11) in the plan view which is outside from a periphery of the substrate (100).

Description

Technical Field

[0001] This invention relates to a method for manufacturing a wiring substrate. Background Technology

[0002] Patent Document 1 discloses a method for manufacturing a printed wiring board. A first resin sheet on which a first support is disposed on a first resin composition layer is bonded to an inner layer substrate, and an insulating layer is formed by thermosetting the first resin composition layer. At the end (peripheral portion) of the first resin sheet, the first support has a blank portion that does not contact the first resin composition layer.

[0003] Patent Document 1: Japanese Patent Application Publication No. 2021-163767

[0004] In the method disclosed in Patent Document 1, it is assumed that the end (peripheral portion) of the inner substrate is not bonded to the first resin composition layer, and therefore, an insulating layer is not formed at the periphery of the inner substrate. It is considered that the periphery of the inner substrate cannot be used as a printed wiring board. Summary of the Invention

[0005] The method for manufacturing a wiring substrate according to the present invention includes the following steps: laminating a semi-cured resin insulating layer onto a substrate; applying pressure to the resin insulating layer toward the substrate; removing the peripheral portion of the resin insulating layer; and forming a wiring layer on the resin insulating layer. The step of laminating the semi-cured resin insulating layer onto the substrate includes the following steps: disposing the resin insulating layer, which, when viewed from above, has a dimension greater than or equal to that of the substrate in at least one direction; and the step of removing the peripheral portion includes the following steps: removing the portion of the resin insulating layer, when viewed from above, from the outer edge of the substrate.

[0006] According to an embodiment of the present invention, it is believed that the peripheral area of ​​the wiring substrate when viewed from above can be effectively utilized. Attached Figure Description

[0007] Figure 1 This is a cross-sectional view showing an example of a wiring substrate manufactured by the wiring substrate manufacturing method of the embodiment.

[0008] Figure 2 yes Figure 1 The top view of the wiring substrate shown.

[0009] Figure 3A This is a cross-sectional view illustrating an example of a method for manufacturing a wiring substrate according to an embodiment.

[0010] Figure 3B This is a cross-sectional view illustrating an example of a method for manufacturing a wiring substrate according to an embodiment.

[0011] Figure 3C yes Figure 3B The diagram shows a top view of the wiring substrate under manufacturing.

[0012] Figure 3D This is a cross-sectional view illustrating an example of a method for manufacturing a wiring substrate according to an embodiment.

[0013] Figure 3E yes Figure 3D The diagram shows a top view of the wiring substrate under manufacturing.

[0014] Figure 3F This is a cross-sectional view illustrating an example of a method for manufacturing a wiring substrate according to an embodiment.

[0015] Figure 3G This is a cross-sectional view illustrating an example of a method for manufacturing a wiring substrate according to an embodiment.

[0016] Figure 3H This is a cross-sectional view illustrating an example of a method for manufacturing a wiring substrate according to an embodiment.

[0017] Figure 3I This is a cross-sectional view illustrating an example of a method for manufacturing a wiring substrate according to an embodiment.

[0018] Figure 3J This is a cross-sectional view illustrating an example of a method for manufacturing a wiring substrate according to an embodiment.

[0019] Figure 3K This is a cross-sectional view illustrating an example of a method for manufacturing a wiring substrate according to an embodiment.

[0020] Label Explanation

[0021] 1: Wiring substrate; 101: Insulating layer (core insulating layer); 102: Conductor layer (core conductor layer); 10: First stacked layer; 20: Second stacked layer; 13, 23: Via conductors; 100: Substrate (core substrate); 103: Through conductor; 11: Insulating layer (first resin insulating layer); 21: Insulating layer (second resin insulating layer); 12, 22: Wiring layers; PF: Protective film; SR1, SR2: Solder resist layers. Detailed Implementation

[0022] A method for manufacturing a wiring substrate according to one embodiment of the present invention will be described with reference to the accompanying drawings. Figure 1 A cross-sectional view of a wiring substrate 1 is shown as an example of a wiring substrate manufactured using the wiring substrate manufacturing method of this embodiment. Figure 2 A top view of wiring substrate 1 is shown. The wiring substrate 1 of the illustrated example has a substrate 100 having a surface 100A and another surface 100B that is the opposite surface of surface 100A.

[0023] A first laminate 10, consisting of alternating layers of resin insulating layer 11 and wiring layer 12, is formed on one side 100A of the laminate 100. A second laminate 20, consisting of alternating layers of resin insulating layer 21 and wiring layer 22, is formed on the other side 100B. In the following description, the substrate 100 is also referred to as the core substrate 100. The core substrate 100 has an insulating layer (core insulating layer) 101 and a conductor layer (core conductor layer) 102. Furthermore, the resin insulating layers 11 and 21 will also be simply referred to as insulating layers 11 and 21 below.

[0024] Figure 1 The wiring substrate 1 shown is merely one example of a wiring substrate manufactured using the wiring substrate manufacturing method of the embodiment. That is, the wiring substrate manufacturing method of the embodiment enables the manufacture of wiring substrates having a different layered structure than wiring substrate 1 and / or containing a different number of wiring layers and resin insulating layers than the number of wiring layers and resin insulating layers in wiring substrate 1. Furthermore, in the accompanying drawings referred to in the following description, specific parts are sometimes depicted in enlarged form for ease of understanding of the disclosed embodiments; and regarding size and length, structural elements are sometimes not depicted with precise ratios to each other.

[0025] Furthermore, in the description of the wiring substrate, the side of the wiring substrate 1 away from the core insulating layer 101 in the thickness direction is referred to as "upper" or "upper side," and the side close to the core insulating layer 101 is referred to as "lower" or "lower side." Additionally, in each resin insulating layer, conductor layer, and wiring layer, the surface facing the side opposite to the core insulating layer 101 is also referred to as the "upper surface," and the surface facing the core insulating layer 101 is also referred to as the "lower surface." Therefore, for example, in the description of each element constituting the core substrate 100, the first stacked layer 10, and the second stacked layer 20, the side away from the core insulating layer 101 is referred to as "upper side," "above," "upper layer side," or simply "upper," and the side close to the core insulating layer 101 is referred to as "lower side," "below," "lower layer side," or simply "lower." Furthermore, when viewing the wiring substrate 1 from above with a line of sight along the thickness direction of the wiring substrate 1, the direction close to the center of the wiring substrate 1 is referred to as "inner" or "inner side," and the direction away from the center is referred to as "outer" or "outer side."

[0026] The core conductor layer 102 constituting one side 100A of the core substrate 100 and the core conductor layer 102 constituting the other side 100B are connected by a through conductor 103 that penetrates the core insulating layer 101 in the thickness direction. The hollow portion inside the through conductor 103 is filled with a filling material 103f.

[0027] The first stacked layer 10 is composed of alternating layers of resin insulating layer 11 and wiring layer 12 on one side 100A of the core substrate 100. The second stacked layer 20 is composed of alternating layers of resin insulating layer 21 and wiring layer 22 on the other side 100B of the core substrate 100. The resin insulating layer 11 constituting the first stacked layer 10 includes a connecting wiring layer 12 and a via conductor 13 of the conductor layer 102 formed in contact with two surfaces on opposite sides in the thickness direction. The resin insulating layer 21 constituting the second stacked layer 20 includes a connecting wiring layer 22 and a via conductor 23 of the conductor layer 102 formed in contact with two surfaces on opposite sides in the thickness direction.

[0028] A solder resist layer SR1 is formed on the first stacked layer 10. A solder resist layer SR2 is formed on the second stacked layer 20. An opening SR1o is formed in the solder resist layer SR1, through which the conductor pad 12p of the outermost wiring layer 12 in the first stacked layer 10 is exposed. An opening SR2o is formed in the solder resist layer SR2, through which the conductor pad 22p of the outermost wiring layer 22 in the second stacked layer 20 is exposed.

[0029] The core insulation layer 101, the resin insulation layer 11 constituting the first laminated portion 10, and the resin insulation layer 21 constituting the second laminated portion 20 are formed using insulating resins such as epoxy resin, bismaleimide triazine resin (BT resin), phenolic resin, or fluororesin. Each insulation layer 101, 11, 21 may contain reinforcing materials (core materials) such as glass fiber and / or inorganic fillers such as silica or alumina. In the illustrated example, the core insulation layer 101 contains a core material, while the other resin insulation layers 11 and 21 do not contain a core material.

[0030] The core conductor layer 102, wiring layer 12, wiring layer 22, through conductor 103, via conductor 13, and via conductor 23 can be formed using any metal such as copper or nickel. For example, the core conductor layer 102, wiring layer 12, and wiring layer 22 can be formed from metal foil such as copper foil and / or a metal film formed by plating or sputtering. The core conductor layer 102, wiring layer 12, wiring layer 22, through conductor 103, via conductor 13, and via conductor 23 are... Figure 1 For ease of observation, it is simplified to a single-layer structure, but it can have a multi-layer structure with two or more layers. The core conductor layer 102 can have a five-layer structure including a metal foil, a metal film layer (e.g., electroless copper plating), and a plating film layer (e.g., electroplated copper film). Wiring layer 12, wiring layer 22, through conductor 103, via conductor 13, and via conductor 23 can, for example, have a two-layer structure including a metal film layer (e.g., electroless copper plating) and a plating film layer (e.g., electroplated copper film).

[0031] The core conductor layer 102 and each wiring layer 12, 22 of the wiring substrate 1 are patterned to have a predetermined conductor pattern. As will be described in detail below, in the wiring substrate manufacturing method of the embodiment, a relatively wide area of ​​the manufactured wiring substrate can be used as an area where wiring layers can be formed. Figure 2 Viewed from above the first lamination section 10 Figure 1 The diagram shows a top view of the wiring substrate 1. The wiring substrate 1 has a rectangular planar shape. Figure 1 Show along Figure 2 The cross-section of line II in the diagram. For example... Figure 2 As shown, the wiring substrate 1 has a region FA along its periphery. Region FA is a region where wiring layer 12 and wiring layer 22 cannot be formed. Region FA is provided throughout the entire periphery of the wiring substrate 1.

[0032] According to the wiring substrate manufacturing method of the embodiment, a wiring substrate with a relatively small area FA where no wiring layer is formed can be manufactured. For example... Figure 1 As shown, wiring layers 12 and 22 are not formed in the region FA, which occupies a defined area extending inward from the periphery of the wiring substrate 1. The shortest distance between the outer edge OP (i.e., the periphery of the wiring substrate 1) and the inner edge IP of region FA can be, for example, 15 mm. That is, wiring layers 12 and 22 can be formed in the region more than 15 mm from the periphery of the wiring substrate 1. In the illustrated example, in the top view of the wiring substrate 1, the shortest distance between the outer edge OP and the inner edge IP of region FA is approximately equal on the four sides of the rectangle.

[0033] Next, to manufacture Figure 1 Taking the case of wiring board 1 as an example, refer to Figures 3A to 3K This describes an example of a method for manufacturing a wiring substrate according to one embodiment. Furthermore, in... Figures 3A to 3K In Figures 3A-3B , Figure 3D as well as Figures 3F to 3K In the middle, the diagram shows the relationship with Figure 1 The corresponding cross-sections, each conductor layer, and each wiring layer are shown as a single layer.

[0034] First, prepare the substrate. For example... Figure 3A As shown, a core substrate 100 is prepared having one side 100A and another side 100B, which is the opposite side of side 100A. In the preparation of the core substrate 100, for example, a double-sided copper-clad laminate is prepared with a metal foil (copper foil) disposed on the surface of a core insulating layer 101. Through-holes 103o are formed on the double-sided copper-clad laminate, for example, by drilling. A metal film layer, for example, as a chemically plated copper film, is formed on the inner wall of the through-holes 103o and on the upper surface of the metal foil. A plating film layer, for example, as an electroplated copper film, is formed on the metal film layer by electroplating, using the metal film layer as a power supply layer. A through conductor 103 is formed.

[0035] By injecting, for example, epoxy resin into the inner side of the through conductor 103 formed on the inner wall of the through hole 103o, the interior of the through conductor 103 is filled with a filler material 103f. After the filler material 103f cures, a metal film layer and a plating film layer are further formed on the upper surface of the filler material 103f and the plating film layer. As a result, although shown as a single layer in the figure, a core conductor layer 102 with a five-layer structure of metal foil, metal film layer, plating film, metal film layer and plating film layer is formed on both sides of the core insulating layer 101. Then, the core conductor layer 102 is patterned using a subtractive method to obtain a core substrate 100 with a predetermined conductor pattern.

[0036] Next, a resin insulating layer is laminated on the substrate. Semi-cured resin insulating layers 11 and 21 are laminated on the core substrate 100. Specifically, as... Figures 3B to 3F As shown, a semi-cured resin insulating layer 11 is stacked on one side 100A of the core substrate 100, and a resin insulating layer 21 is stacked on the other side 100B. Hereinafter, the resin insulating layer 11 stacked on one side 100A is also referred to as the first resin insulating layer 11, and the resin insulating layer 21 stacked on the other side 100B is also referred to as the second resin insulating layer 21.

[0037] The first resin insulating layer 11 and the second resin insulating layer 21 are formed of a material containing any one of the following resins: epoxy resin, thermosetting resin, fluororesin, or thermoplastic resin. Figure 3B As shown, the first resin insulating layer 11 and the second resin insulating layer 21 are disposed on the core substrate 100 in a so-called B-stage state, which is a semi-cured state. The first resin insulating layer 11 and the second resin insulating layer 21 have a protective film PF on their upper surfaces. Examples of the protective film PF include polyethylene terephthalate (PET) and polyethylene naphthalate (PEN) films. The protective film PF is adhered to the entire upper surface of the first resin insulating layer 11 and the second resin insulating layer 21.

[0038] In the manufacturing method of the embodiment, the semi-cured resin insulating layer disposed on the substrate has a size greater than the size of the substrate in at least one direction in its extension direction (viewed from above). In the example of manufacturing the wiring substrate 1 described, the first resin insulating layer 11 and the second resin insulating layer 21 disposed on the core substrate 100 have a size larger than the size of the core substrate 100 in all directions in its extension. The first resin insulating layer 11 and the second resin insulating layer 21 may also have the same size as the core substrate 100 in their extension directions.

[0039] Figure 3C This shows a top view of the core substrate 100 from one side 100A. Figure 3BA top view showing the state. (As shown) Figure 3C As shown, the first resin insulating layer 11 has a size larger than that of the core substrate 100 in all directions when viewed from above. The first resin insulating layer 11 is configured to cover the entire area of ​​one surface 100A of the core substrate 100 and protrude outward from the periphery of the core substrate 100 along its entire circumference (i.e., all peripheries).

[0040] exist Figure 3C In the top view shown, the periphery of the second resin insulating layer 21, located on the inside of the paper, overlaps with the periphery of the first resin insulating layer 11. That is, the second resin insulating layer 21, like the first resin insulating layer 11, has a dimension larger than the core substrate 100 in all directions when viewed from above. The second resin insulating layer 21 is configured to cover another surface 100B of the core substrate 100 (see reference 1). Figure 3B The entire area of ​​the core substrate 100 is covered by the protective layer PF disposed on the upper surface of the first resin insulating layer 11 and the second resin insulating layer 21, which protrude outward from the periphery of the core substrate 100 along its entire circumference. Therefore, the periphery of the first resin insulating layer 11, the periphery of the second resin insulating layer 21, and the periphery of the protective layer PF disposed on the upper surface of the first resin insulating layer 11 and the second resin insulating layer 21 are located outside the core substrate 100.

[0041] In the process of hot-pressing the first resin insulating layer 11 onto the core substrate 100, as described later, it is preferable that the thickness of the first resin insulating layer 11 on the core substrate 100 is more uniform. From this viewpoint, it is preferable that the degree to which the first resin insulating layer 11 protrudes outward from the periphery of the core substrate 100 (the shortest distance from the periphery of the core substrate 100 to the periphery of the first resin insulating layer 11 in top view) is approximately equal along the entire circumference of the first resin insulating layer 11 (on all four sides). Furthermore, from the same viewpoint, it is preferable that the degree to which the second resin insulating layer 21 protrudes outward from the periphery of the core substrate 100 is approximately equal along the entire circumference of the second resin insulating layer 21.

[0042] Furthermore, in the method for manufacturing the wiring substrate according to the embodiment, the substrate that serves as the base for the resin insulating layer is not limited to the form of a so-called core substrate like the core substrate 100 described above. For example, it may be a laminate formed by alternating layers of insulating layers and wiring layers using a lamination method. Alternatively, it may be a substrate having only a single insulating layer. The substrate that serves as the base for the resin insulating layer may be a silicon substrate, a ceramic substrate, or a glass substrate.

[0043] Next, the first resin insulating layer 11 and the second resin insulating layer 21, together with the protective film PF, are heated and pressed onto the core substrate 100. The resin constituting the first resin insulating layer 11 and the second resin insulating layer 21 is softened by heating and pressed from the top of the protective film PF toward one surface 100A or the other surface 100B by a pressure plate (not shown). As a result, the first resin insulating layer 11 is heat-pressed onto the entire area of ​​one surface 100A of the core substrate 100, and the second resin insulating layer 21 is heat-pressed onto the entire area of ​​the other surface 100B.

[0044] The first resin insulating layer 11 and the second resin insulating layer 21 are hot-pressed onto the core substrate 100, resulting in... Figure 3D , Figure 3E The state shown. Figure 3E This is a top-down view from the upper side of face 100A. Figure 3D The diagram shows a top view of the state as indicated. When the first resin insulating layer 11 and the second resin insulating layer 21 are pressed onto the core substrate 100 in a softened state due to heating, the softened resin of the first resin insulating layer 11 and the second resin insulating layer 21 expands outward. As a result, the softened resin of the first resin insulating layer 11 and the second resin insulating layer 21 wraps around the periphery of the core substrate 100, covering the side surfaces constituting the periphery of the core substrate 100.

[0045] The first resin insulating layer 11 and the second resin insulating layer 21 are pressed onto the core substrate 100 in a softened state due to heating, thereby bringing the first resin insulating layer 11 into contact with the second resin insulating layer 21. Specifically, as... Figure 3D As shown, the outer portion of the core substrate 100 starting from the periphery of the first resin insulating layer 11 contacts the outer portion of the core substrate 100 starting from the periphery of the second resin insulating layer 21. Through the contact between the softened resin of the first resin insulating layer 11 and the softened resin of the second resin insulating layer 21, the softened resin further extends outwards, forming a localized deformed portion (expansion portion) EP extending further outwards from the periphery of the protective film PF, as shown. Figure 3E As shown, the expansion portion EP can be formed to extend outward from the protective film PF around the entire circumference of the first resin insulating layer 11 and the second resin insulating layer 21 (all four sides of the protective film PF).

[0046] In the wiring substrate manufacturing method of the embodiment, during the hot pressing of the resin insulating layer against the substrate, localized deformation of the resin insulating layer occurs on the outer side of the substrate due to the flow of softened resin. No localized deformation of the resin insulating layer occurs in the portion overlapping the substrate in the thickness direction. A larger area of ​​the substrate can be used as a wiring substrate.

[0047] After the first resin insulating layer 11 and the second resin insulating layer 21 are hot-pressed onto the surface of the core substrate 100, the semi-cured first resin insulating layer 11 and the second resin insulating layer 21 are formally cured. Through formal curing, the resin constituting the first resin insulating layer 11 and the second resin insulating layer 21 is cured to the final stage of curing, the so-called C-stage state. The first resin insulating layer 11 and the second resin insulating layer 21 are formally cured, for example, by heating at a temperature suitable for the formal curing of the resin constituting the first resin insulating layer 11 and the second resin insulating layer 21 for an appropriate time. The first resin insulating layer 11 and the second resin insulating layer 21 are not limited to heat curing, but can also be formally cured by any other method such as ultraviolet irradiation.

[0048] Next, remove the periphery of the resin insulation layer. For example... Figure 3F As shown, the portions of the first resin insulating layer 11 and the second resin insulating layer 21 outside the periphery of the core substrate 100 are removed together with the protective film PF by cutting. As shown in the top view, the portions of the first resin insulating layer 11 and the second resin insulating layer 21 outside the periphery of the core substrate 100 are removed, exposing the entire periphery (side surface) of the core substrate 100. The removal of the portions of the first resin insulating layer 11 and the second resin insulating layer 21 outside the periphery of the core substrate 100 by cutting can be achieved by any method, such as milling or using a roller cutter like a cutting saw.

[0049] Next, as Figure 3G As shown, a through-hole 13a is formed on a first resin insulating layer 11 on one side 100A of the core substrate 100, and a through-hole 23a is formed on a second resin insulating layer 21 on the other side 100B. The through-holes 13a and 23a are formed, for example, by irradiation with a laser such as a carbon dioxide laser or a UV laser. The through-holes 13a and 23a are respectively formed on a substrate having a protective film PF (see reference). Figure 3F The first resin insulating layer 11 and the second resin insulating layer 21 are provided. By forming through holes 13a and 23a for vias while the protective film PF is present, resin debris generated from the first resin insulating layer 11 and the second resin insulating layer 21 can be prevented from adhering to their surfaces. Furthermore, laser is irradiated onto the surface of the protective film PF, but not directly onto the surfaces of the first resin insulating layers 11 and the second resin insulating layers 21. Therefore, excessively large through holes 13a and 23a for vias can be prevented from forming on the first resin insulating layer 11 and the second resin insulating layer 21 due to the impact during laser irradiation.

[0050] Within the formed through holes 13a and 23a, resin residue generated during the formation of the through holes 13a and 23a can be removed (so-called resin residue removal treatment). The resin residue removal treatment can be performed while the first resin insulating layer 11 and the second resin insulating layer 21 have a protective film PF. The resin residue removal treatment can be, for example, a wet process involving immersion in a solution such as a permanganate solution. Alternatively, the resin residue removal treatment can be performed using a dry process without using a solution. Dry processes for removing resin residue can be, for example, plasma treatment using plasma gases such as argon, methane tetrafluoride, a mixture of methane tetrafluoride and oxygen, or sulfur hexafluoride.

[0051] Then, the protective film PF is removed by any method to form... Figure 3G The protective film PF can be removed, for example, by stretching the protective film PF in the opposite direction to the resin insulating layers 11 and 21, respectively. Alternatively, the protective film PF can also be removed by dissolving it with a suitable solvent.

[0052] exist Figure 3G In the illustrated state, the first resin insulating layer 11 completely covers one surface 100A of the core substrate 100, and the second resin insulating layer 21 completely covers the other surface 100B. The first resin insulating layer 11 and the second resin insulating layer 21 reach the periphery of the core substrate 100 when viewed from above. In the manufacturing method disclosed in Patent Document 1, which is presented as prior art, it is considered that the resin composition layer is not formed to the periphery of the inner layer substrate, and the portion near the periphery of the inner layer substrate not covered by the resin composition layer cannot be used as a printing substrate. In contrast, according to the wiring substrate manufacturing method of the embodiment, the entire area of ​​the surface of the substrate (core substrate) perpendicular to the thickness direction is covered by the resin insulating layer. Therefore, it is considered that a portion of the periphery of the substrate can also be effectively used as a wiring substrate.

[0053] exist Figure 3G In the shown state, the upper surfaces of the resin insulating layers 11 and 21 have relatively good flatness in a relatively wide area, including the periphery when viewed from above. Therefore, it is possible to form the following reference within a relatively wide area of ​​the upper surface of the resin insulating layer 11. Figure 3H Wiring layers 12 and 22 are described. Specifically, wiring layers 12 and 22 can be formed in an inner region at a specified distance of, for example, 15 mm or more from the periphery of the resin insulating layers 11 and 21 (i.e., from the periphery of the core substrate 100).

[0054] Next, as Figure 3HAs shown, the through holes 13a and 23a penetrating the resin insulating layers 11 and 21 are filled with conductors to form through-hole conductors 13 and 23, respectively. Simultaneously, wiring layers 12 and 22 are integrally formed with the through-hole conductors 13 and 23. Wiring layer 12 is formed on the resin insulating layer 11 covering one surface 100A of the core substrate 100. Wiring layer 22 is formed on the resin insulating layer 21 covering the other surface 100B of the core substrate 100. Wiring layers 12 and 22 are formed in the region where wiring layers 12 and 22 can be formed, located at a predetermined distance from the periphery of the resin insulating layers 11 and 21.

[0055] Wiring layers 12 and 22, as well as via conductors 13 and 23, can be formed, for example, using a conventional semi-additive process. Specifically, a seed layer (not shown) composed of a metal film such as copper is formed on the surface of each resin insulating layer 11 and 21 and on the inner surface of the vias 13a and 23a by chemical plating or sputtering. A resist with appropriate openings (not shown) is formed on the formed seed layer, and an electroplated film (not shown) is formed within the openings of the resist, using the seed layer as a power supply layer. This allows the formation of wiring layers 12 and 22 and via conductors 13 and 23. Then, the exposed portions of the seed layer are removed by stripping the resist and by rapid etching, forming wiring layers 12 and 22 with the desired conductor pattern.

[0056] Next, the process of applying the reference solution to the upper side of the resin insulating layers 11 and 21 is repeated an arbitrary number of times. Figures 3B to 3H The process described is the same as the arrangement of the resin insulating layers 11 and 21 on the core substrate 100, the hot pressing onto the core substrate 100, the removal of the portion outside the periphery of the core substrate 100, and the formation of the via conductors 13 and 23 and the wiring layers 12 and 22. That is, in the method for manufacturing a wiring substrate, sometimes multiple resin insulating layers are stacked on the substrate. In this case, the portion outside the periphery of each resin insulating layer can be removed by cutting before forming the wiring layer on each resin insulating layer. The first stacked portion 10 and the second stacked portion 20 are formed, thus forming... Figure 3I The state shown.

[0057] Next, as Figure 3J As shown, a solder resist layer SR1 is formed on the first lamination portion 10, and a solder resist layer SR2 is formed on the second lamination portion 20. The solder resist layers SR1 and SR2 are made of, for example, photosensitive epoxy resin or polyimide resin, and can be formed by spraying, curtain coating or lamination.

[0058] Next, as Figure 3KAs shown, an opening SR1o is formed in the solder mask layer SR1 to expose conductor pad 12p, and an opening SR2o is formed in the solder mask layer SR2 to expose conductor pad 22p. The openings SR1o and SR2o are formed by exposure and development using a mask with an appropriate opening pattern. On the exposed surfaces of conductor pads 12p and 22p, a surface protective film (not shown) composed of Au, Ni / Au, Ni / Pd / Au, solder, or heat-resistant pre-soldering flux can also be formed by chemical plating, solder leveling, or spraying. After the above processes, wiring substrate 1 is completed.

[0059] The method for manufacturing the wiring substrate in the embodiment is not limited to the one described above. Figures 3A to 3K The method described. For example, in Figure 3D and Figure 3E In the example shown, the deformable portion (expansion portion) EP may not extend outward from the protective film PF. On the outer side of the core substrate 100, the outer end of the first resin insulating layer 11 and the outer end of the second resin insulating layer 21 coincide with the periphery of the protective film PF located on the outer side of the core substrate 100. Alternatively, a wiring substrate with a structure different from the laminated structure shown in the figures, or a wiring substrate containing a different number of resin insulating layers than those shown in the figures, can be manufactured using the wiring substrate manufacturing method of the embodiment. The wiring substrate manufacturing method of the embodiment includes the following steps: placing a resin insulating layer having a size greater than or equal to the size of a substrate in at least one direction when viewed from above, applying pressure, and removing the peripheral portion of the resin insulating layer from the outer side of the substrate when viewed from above. For example, when multiple resin insulating layers are laminated on the substrate, the peripheral portions of the resin insulating layers are sometimes removed by cutting off multiple peripheral portions at the same time. Any additional steps may be added besides the aforementioned steps, or any part of the steps described above may be omitted. In the description of the manufacturing method taking the above-mentioned wiring substrate 1 as an example, an example of stacking resin insulating layers on both sides of the substrate is shown, but the resin insulating layer stacked on the substrate only needs to be stacked on at least one side of the substrate.

Claims

1. A method for manufacturing a wiring substrate, comprising the following steps: A semi-cured resin insulating layer is laminated onto the substrate; Pressure is applied to the resin insulating layer toward the substrate; Remove the periphery of the resin insulating layer; and A wiring layer is formed on the resin insulating layer. in, The step of laminating the semi-cured resin insulating layer onto the substrate includes the following steps: disposing the resin insulating layer on the substrate with a dimension greater than or equal to the size of the substrate in at least one direction when viewed from above. The step of removing the peripheral portion includes the following steps: removing the portion of the resin insulating layer from the periphery of the substrate when viewed from above.

2. The method for manufacturing a wiring substrate according to claim 1, wherein, The substrate has a first surface and a second surface that is opposite to the first surface. The step of stacking the resin insulating layer on the substrate includes the following steps: stacking a first resin insulating layer on the first surface and stacking a second resin insulating layer on the second surface.

3. The method for manufacturing a wiring substrate according to claim 2, wherein, The step of pressurizing the resin insulating layer includes the following steps: bringing the outer portion of the first resin insulating layer from the periphery of the substrate into contact with the outer portion of the second resin insulating layer from the periphery of the substrate.

4. The method for manufacturing a wiring substrate according to claim 1, wherein, A protective film is provided on the side of the resin insulating layer stacked on the substrate opposite to the substrate. The pressurization is performed with the protective film disposed on the resin insulating layer.

5. The method for manufacturing a wiring substrate according to claim 4, wherein, After removing the peripheral portion, the process further includes the step of removing the protective film from the resin insulating layer.

6. The method for manufacturing a wiring substrate according to claim 1, wherein, A protective film is provided on the side of the resin insulating layer opposite to the substrate, and the protective film has a size greater than or equal to that of the substrate. The periphery of the protective film is located further outward than the periphery of the substrate.

7. The method for manufacturing a wiring substrate according to claim 1, wherein, The resin insulating layer has a size greater than that of the substrate in all directions when viewed from above.

8. The method for manufacturing a wiring substrate according to claim 1, wherein, The step of removing the portion of the resin insulating layer from the periphery of the substrate includes the step of exposing the periphery of the substrate.

9. The method for manufacturing a wiring substrate according to claim 1, wherein, The wiring layer is formed in the region at least 15 mm from the periphery of the substrate.

Images