Semiconductor power device and method of manufacturing the same
By introducing doped regions to protect the gate dielectric layer and increasing the well volume in semiconductor power devices, the problems of insufficient gate dielectric layer reliability and avalanche tolerance robustness are solved, achieving higher device reliability and conduction capability.
CN122161137APending Publication Date: 2026-06-05SICHAIN SEMICONDUCTORS (NINGBO) CO LTD
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Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SICHAIN SEMICONDUCTORS (NINGBO) CO LTD
- Filing Date
- 2025-12-05
- Publication Date
- 2026-06-05
AI Technical Summary
Technical Problem
Existing semiconductor power devices have low reliability of the gate dielectric layer during the reverse breakdown voltage stage, and insufficient avalanche withstand robustness.
Method used
A doped region is introduced into the drift layer. The doped region and the well region have the same conductivity type. The doped region passes through the first region to protect the gate dielectric layer and increase the overall volume of the well region to provide more hole leakage paths.
Benefits of technology
It improves the reliability and avalanche resistance robustness of the gate dielectric layer, reduces the risk of reverse breakdown, and improves forward conduction capability.
✦ Generated by Eureka AI based on patent content.
Smart Images
Figure CN122161137A_ABST
Abstract
The application provides a semiconductor power device and a preparation method thereof. The semiconductor power device comprises: a semiconductor substrate layer; a drift layer located on one side of the semiconductor substrate layer along a first direction; a plurality of well regions located in the drift layer, the plurality of well regions being arranged along a second direction and a third direction; for two rows of the well regions adjacent to each other along the second direction, one well region in one row of the well regions is located between two adjacent well regions in another row of the well regions along the second direction, and one well region in one row of the well regions and two adjacent well regions in another row of the well regions enclose a first region; and a doped region located in the drift layer, the doped region and the well regions having the same conductivity type. The second direction is perpendicular to the first direction.
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