An avalanche photodiode and a method of manufacturing the same

Abstract

The application belongs to the technical field of semiconductor manufacturing, and provides an avalanche photodiode and a preparation method thereof, wherein a transition layer structure is constructed by using an InGaAlAs quaternary material layer, the growth rate of the quaternary material layer in contact with an absorption layer is V2, the growth rate of the remaining quaternary material layer is V3, the growth rate of the absorption layer and other layers is V1, the avalanche photodiode is obtained by molecular beam epitaxy growth with V1=0.4 μm / h~0.8 μm / h, V2 / V1=1~1.1, and V3 / V1=1.5~2.5; V1 is small, which is helpful to improve the electrical performance, reduce the background concentration, reduce the surface defects, and provide a prerequisite for the smooth growth of the transition layer structure; V2 is close to V1, which can ensure the interface performance of the transition layer structure and the absorption layer; thus, by controlling V3 to be greatly improved, it is beneficial to improve the efficiency and realize the balance between high quality and high-speed production.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor fabrication technology and relates to an avalanche photodiode and its fabrication method. Background Technology

[0002] APD (Avalanche photodiode) is a photodetector device with a gain effect. Due to its high speed and gain amplification characteristics, it has wide applications in optical communication systems. With the continuous advancement of applications, the requirements for APD materials are becoming increasingly stringent, thus placing higher demands on the growth of APD structural materials. MBE (Molecular Beam Epitaxy) is an epitaxial film fabrication method that grows single-crystal thin films layer by layer using atomic or molecular beams in an ultra-high vacuum environment. This method has the advantages of precise control of film thickness at the atomic scale, and the lower substrate temperature helps reduce lattice mismatch and impurity diffusion. However, high-quality and high-speed MBE growth methods using APD materials still require further research. Summary of the Invention

[0003] In view of the problems existing in the prior art, the purpose of this invention is to provide an avalanche photodiode and its fabrication method. This fabrication method uses an InGaAlAs quaternary material layer to construct a transition layer structure. The growth rate of the quaternary material layer in contact with the absorption layer is V2, the growth rate of the remaining quaternary material layers is V3, and the growth rate of the absorption layer and other layers is V1. Molecular beam epitaxy is performed with V1 = 0.4 μm / h ~ 0.8 μm / h, V2 / V1 = 1 ~ 1.1, and V3 / V1 = 1.5 ~ 2.5 to obtain the avalanche photodiode. A smaller V1 helps improve electrical performance, reduce background concentration, reduce surface defects, and also provides a prerequisite for the smooth growth of the transition layer structure. V2 is similar to V1, which can ensure the interface performance between the transition layer structure and the absorption layer. Therefore, by controlling V3 to be significantly increased, it is beneficial to improve efficiency and achieve a balance between high quality and high-speed production.

[0004] To achieve this objective, the present invention adopts the following technical solution: In a first aspect, the present invention provides a method for fabricating an avalanche photodiode, the method comprising using molecular beam epitaxy to sequentially grow an InP epitaxial layer, a multiplication layer structure, a first transition layer structure, an InGaAs absorption layer, a second transition layer structure, a charge layer structure, and an InGaAs contact layer on an InP substrate; wherein the multiplication layer structure and the charge layer structure both include an InAlAs layer; and the first transition layer structure and the second transition layer structure both include at least two InGaAlAs quaternary material layers; The growth rate of the multiplication layer structure, the InGaAs absorber layer, the charge layer structure, and the InGaAs contact layer is V1; in the first transition layer structure and the second transition layer structure, the growth rate of the InGaAlAs quaternary material layer in contact with the InGaAs absorber layer is V2, and the growth rate of the remaining InGaAlAs quaternary material layers is V3. Then, V1 is controlled to be 0.4 μm / h to 0.8 μm / h, V2 / V1 is 1 to 1.1, and V3 / V1 is 1.5 to 2.5.

[0005] In this invention, controlling the growth rate V1 of InGaAs (referring to the absorption layer and contact layer) and InAlAs (referring to the multiplication layer structure and charge layer structure) within a small range helps to improve electrical performance, reduce background concentration, and reduce surface defects. It also provides a prerequisite for the smooth growth of the quaternary material transition layer. On this basis, controlling the overall growth rate of the transition layer structure to be greater than V1, that is, the overall growth rate of the transition layer structure is faster than that of InGaAs and InAlAs, can help to balance high quality and high-speed production. Specifically, the growth rate of the InGaAlAs quaternary material layer in direct contact with the absorption layer is equal to or slightly greater than V1, which helps to improve the interfacial contact between the transition layer structure and the absorption layer. The growth rate of the remaining InGaAlAs quaternary material layers can be further increased to V3 to improve efficiency. At the same time, V2 and V3 should not be too small or too large, so as to avoid the transition layer structure lacking V group due to excessively high growth rate, which would affect the surface performance, or to avoid poor efficiency due to too small a rate, which would even affect the subsequent growth of InGaAs or InAlAs.

[0006] V2 is similar to V1, ensuring the performance of the transition layer structure and the absorption layer interface; therefore, by controlling V3, it can be significantly improved. For example, in this invention, V1 can be 0.4μm / h, 0.45μm / h, 0.48μm / h, 0.5μm / h, 0.55μm / h, 0.57μm / h, 0.6μm / h, 0.63μm / h, 0.65μm / h, 0.7μm / h, 0.75μm / h, 0.78μm / h, or 0.8μm / h, etc., preferably 0.57μm / h to 0.63μm / h, and more preferably 0.6μm / h.

[0007] For example, in this invention, V2 / V1 can be 1, 1.01, 1.02, 1.03, 1.04, 1.05, 1.06, 1.07, 1.08, 1.09 or 1.1, etc., preferably 1 to 1.03, and more preferably 1.

[0008] For example, in this invention, V3 / V1 can be 1.5, 1.6, 1.7, 1.8, 1.9, 2, 2.1, 2.2, 2.3, 2.4 or 2.5, etc., preferably 1.8 to 2.2, and more preferably 2.

[0009] As a further example, in this invention, the growth rate can be calculated or calibrated by obtaining thickness data through a growth test piece with fixed growth conditions and sending it to a scanning electron microscope (SEM).

[0010] The following are preferred technical solutions of the present invention, but are not intended to limit the technical solutions provided by the present invention. The technical objectives and beneficial effects of the present invention can be better achieved and realized through the following technical solutions.

[0011] As a preferred technical solution of the present invention, the InP substrate includes type SI (semi-insulating type) or type N.

[0012] Preferably, the thickness of the InP substrate is 300 μm to 400 μm. Exemplarily, it can be 300 μm, 330 μm, 350 μm, 380 μm, or 400 μm, etc.

[0013] Preferably, the InP substrate is first degassed at 100℃~140℃ for 20min~40min, for example, the temperature can be 100℃, 120℃, 130℃ or 140℃, and the time can be 20min, 25min, 30min, 35min or 40min; then it is degassed a second time at 250℃~350℃ for 20min~40min, for example, the temperature can be 250℃, 280℃, 300℃, 330℃ or 350℃, and the time can be 20min, 25min, 30min, 35min or 40min.

[0014] Preferably, after the InP substrate is degassed, the InP substrate is subjected to surface reconstruction and deoxidation treatment in sequence before the growth of the InP epitaxial layer begins.

[0015] Preferably, the surface reconstruction includes (4×4) reconstruction.

[0016] Preferably, the surface reconstruction temperature is Ts, the deoxidation treatment temperature is Ts+30℃~Ts+70℃, the time is 4min~8min, and the vacuum environment is controlled to be ≤3×10 -7Torr. For example, Ts can be 530℃~570℃, such as 530℃, 540℃, 550℃, 560℃, or 570℃, etc.; when the InP substrate is type SI, the deoxidation treatment temperature can be Ts+60℃, Ts+63℃, Ts+65℃, Ts+68℃, or Ts+70℃, etc.; when the InP substrate is type N, the deoxidation treatment temperature can be Ts+30℃, Ts+33℃, Ts+35℃, Ts+38℃, or Ts+40℃, etc. As a preferred embodiment of the present invention, the InP epitaxial layer is of type N+.

[0017] Preferably, the source furnace used for growing the InP epitaxial layer includes two indium source furnaces, and the two indium source furnaces provide the same beam intensity, which represents the growth rate provided by the source furnace.

[0018] The present invention adds a transition charge layer (i.e., an inP epitaxial layer) between the multiplication layer and the substrate. The InP epitaxial layer can be grown using a dual indium source furnace, which helps to improve efficiency.

[0019] Preferably, when growing the InP epitaxial layer, the beam intensity ratio of group V elements to group III elements is (11~13):1. For example, it can be 11:1, 11.5:1, 12:1, 12.5:1 or 13:1, etc.

[0020] Preferably, the vacuum environment during InP epitaxial layer growth is 1.2 × 10⁻⁶. -7 Torr~1.3×10 -7 Torr, for example, can be 1.2 × 10 -7 Torr, 1.23×10 -7 Torr, 1.26×10 -7 Torr or 1.3×10 -7 Torr, etc.; temperature is 545℃~555℃, for example, 545℃, 548℃, 550℃, 552℃ or 555℃, etc.; rotation speed is 10rpm~30rpm, for example, 10rpm, 15rpm, 20rpm, 25rpm or 30rpm, etc. Rotation can be achieved by rotating the sample stage or heating rack, etc.

[0021] As a preferred technical solution of the present invention, the multiplication layer structure includes a first InAlAs layer, a second InAlAs layer, a third InAlAs layer and a fourth InAlAs layer stacked together.

[0022] Preferably, the first InAlAs layer is an N+ type In... 0.52 Al 0.48The As layer has a thickness of 150nm to 300nm. For example, it can be 150nm, 180nm, 200nm, 230nm, 250nm, 280nm, or 300nm, etc.

[0023] Preferably, the second InAlAs layer is an N-type In... 0.52 Al 0.48 The As layer has a thickness of 50nm to 300nm. For example, it can be 50nm, 80nm, 100nm, 150nm, 200nm, 250nm, or 300nm, etc.

[0024] In this invention, the doping concentration of N+ type is greater than that of N type, and the doping concentration of P+ type is greater than that of P type. In this invention, the N-type or N+ type of each layer can be obtained by doping with Si and controlling its doping concentration, and the N-type or P+ type can be obtained by doping with Be and controlling its doping concentration.

[0025] As a further example, the doping concentration can be calibrated by growing a single layer of InGaAs or InAlAs material with a standard thickness (1 μm) using Hall test, electrochemical capacitance-voltage method (ECV) test and secondary ion mass spectrometry (SIMS) test. Finally, the curve of the doping source furnace temperature versus doping concentration is obtained by correcting the growth rate, which can then guide the control of the doping concentration of each layer when actually preparing APD materials.

[0026] Preferably, the third InAlAs layer is an intrinsic In... 0.52 Al 0.48 The As layer has a thickness of 80nm to 120nm. For example, it can be 80nm, 90nm, 100nm, 110nm, or 120nm, etc.

[0027] Preferably, the fourth InAlAs layer is a P-type In... 0.52 Al 0.48 The As layer has a thickness of 70nm to 100nm. For example, it can be 70nm, 80nm, 90nm, or 100nm, etc.

[0028] Preferably, when growing the multiplication layer structure, the beam intensity ratio of Group V elements to Group III elements is (28~32):1. For example, it can be 28:1, 29:1, 30:1, 31:1 or 32:1, etc.

[0029] Preferably, the vacuum environment during the growth of the multiplication layer structure is 2.1 × 10⁻⁶. -7 Torr~2.3×10 -7 Torr, for example, could be 2.1 × 10 -7 Torr, 2.15×10 -7 Torr, 2.2×10-7 Torr, 2.25×10 -7 Torr or 2.3×10 -7 Torr, etc.; temperature is 610℃~630℃, for example, it can be 610℃, 620℃, 625℃ or 630℃, etc.; rotation speed is 10rpm~30rpm, for example, it can be 10rpm, 15rpm, 20rpm, 25rpm or 30rpm, etc.

[0030] As a preferred technical solution of the present invention, in the first transition layer structure, along the direction that gradually approaches the InGaAs contact layer, the gallium content in the InGaAlAs quaternary material layer increases layer by layer, and the aluminum content decreases layer by layer.

[0031] Preferably, the first transition layer structure includes a first InGaAlAs quaternary material layer, a second InGaAlAs quaternary material layer, and a third InGaAlAs quaternary material layer stacked together.

[0032] Preferably, the first InGaAlAs quaternary material layer is intrinsic InGa. 0.16 Al 0.32 As a quaternary material layer, the source furnace used includes two indium source furnaces and two aluminum source furnaces, with a growth rate of 1μm / h to 1.4μm / h, for example, 1μm / h, 1.1μm / h, 1.2μm / h, 1.3μm / h or 1.4μm / h, etc.; and a thickness of 10nm to 27nm, for example, 10nm, 13nm, 15nm, 18nm, 20nm, 22nm, 25nm or 27nm, etc.

[0033] Preferably, the second InGaAlAs quaternary material layer is intrinsic InGa. 0.24 Al 0.24 As a quaternary material layer, the source furnace used includes two indium source furnaces, with a growth rate of 1μm / h to 1.4μm / h, for example, 1μm / h, 1.1μm / h, 1.2μm / h, 1.3μm / h or 1.4μm / h, etc.; and a thickness of 10nm to 27nm, for example, 10nm, 13nm, 15nm, 18nm, 20nm, 22nm, 25nm or 27nm, etc.

[0034] Preferably, the third InGaAlAs quaternary material layer is intrinsic InGa. 032 Al 0.16The As quaternary material layer has a growth rate of 0.4 μm / h to 0.8 μm / h, for example, it can be 0.4 μm / h, 0.5 μm / h, 0.6 μm / h, 0.7 μm / h or 0.8 μm / h, etc.; and a thickness of 10 nm to 27 nm, for example, it can be 10 nm, 13 nm, 15 nm, 18 nm, 20 nm, 22 nm, 25 nm or 27 nm, etc.

[0035] As a preferred embodiment of the present invention, the InGaAs absorption layer is intrinsic In. 0.53 Ga 0.47 The As layer has a thickness of 700nm~900nm, for example, it can be 700nm, 750nm, 800nm, 850nm or 900nm, etc.

[0036] Preferably, when growing the InGaAs absorber layer, the ratio of the beam intensity of group V elements to group III elements is (22~26):1, for example, it can be 22:1, 23:1, 24:1, 25:1 or 26:1, etc.

[0037] Preferably, the vacuum environment during the growth of the InGaAs absorber layer is 1.8 × 10⁻⁶. -7 Torr~1.9×10 -7 Torr, for example, could be 1.8 × 10 -7 Torr, 1.83×10 -7 Torr, 1.85×10 -7 Torr or 1.9×10 -7 Torr, etc.; the temperature is 610℃~630℃, for example, it can be 610℃, 620℃, 625℃ or 630℃, etc., and the rotation speed is 10rpm~30rpm, for example, it can be 10rpm, 15rpm, 20rpm, 25rpm or 30rpm, etc.

[0038] As a preferred technical solution of the present invention, in the second transition layer structure, along the direction that gradually moves away from the InGaAs contact layer, the gallium content in the InGaAlAs quaternary material layer decreases layer by layer, while the aluminum content increases layer by layer.

[0039] Preferably, the first transition layer structure includes a stacked fourth InGaAlAs quaternary material layer, a fifth InGaAlAs quaternary material layer, and a sixth InGaAlAs quaternary material layer.

[0040] Preferably, the fourth InGaAlAs quaternary material layer is intrinsic InGa. 032 Al 0.16The As quaternary material layer has a growth rate of 0.4 μm / h to 0.8 μm / h, for example, it can be 0.4 μm / h, 0.5 μm / h, 0.6 μm / h, 0.7 μm / h or 0.8 μm / h, etc.; and a thickness of 10 nm to 27 nm, for example, it can be 10 nm, 13 nm, 15 nm, 18 nm, 20 nm, 22 nm, 25 nm or 27 nm, etc.

[0041] Preferably, the fifth InGaAlAs quaternary material layer is intrinsic InGa. 0.24 Al 0.24 As quaternary material layer, the source furnace used includes two indium source furnaces, the growth rate is 1μm / h~1.4μm / h, and the thickness is 10nm~27nm; Preferably, the sixth InGaAlAs quaternary material layer is intrinsic InGa. 0.16 Al 0.32 As a quaternary material layer, the source furnace used includes two indium source furnaces and two aluminum source furnaces, with a growth rate of 1μm / h to 1.4μm / h, for example, 1μm / h, 1.1μm / h, 1.2μm / h, 1.3μm / h or 1.4μm / h, etc.; and a thickness of 10nm to 27nm, for example, 10nm, 13nm, 15nm, 18nm, 20nm, 22nm, 25nm or 27nm, etc.

[0042] As a further example, the InGaAlAs quaternary material layers in the first and second transition layer structures can be grown by adjusting different source furnaces to achieve the effect of layer-by-layer growth at a constant temperature. For example, in the first transition layer structure, when growing the first or sixth InGaAlAs quaternary material layer, a first gallium source furnace, a first indium source furnace, a second indium source furnace, a first aluminum source furnace, and a second aluminum source furnace are used; when growing the second and fifth InGaAlAs quaternary material layers, a second gallium source furnace is used, and the first indium source furnace, the second indium source furnace, and the first aluminum source furnace are used; when growing the third or sixth / fourth InGaAlAs quaternary material, a first gallium source furnace and a second aluminum source furnace are used, and the second indium source furnace is used; when growing the InGaAs absorber layer, a second gallium source furnace is used, and the second indium source furnace is used.

[0043] As a preferred embodiment of the present invention, the charge layer structure includes a fifth InAlAs layer and a sixth InAlAs layer stacked together.

[0044] Preferably, the fifth InAlAs layer is a P-type In... 0.52 Al 0.48The As layer has a thickness of 50nm to 100nm, for example, it can be 50nm, 75nm, 90nm or 100nm.

[0045] Preferably, the sixth InAlAs layer is a P+ type In... 0.52 Al 0.48 The As layer has a thickness of 200nm to 400nm, for example, it can be 200nm, 250nm, 280nm, 300nm, 330nm, 350nm or 400nm, etc.

[0046] Preferably, when growing the charge layer structure, the beam intensity ratio of group V elements to group III elements is (28~32):1, for example, it can be 28:1, 29:1, 30:1, 31:1 or 32:1, etc.

[0047] Preferably, the vacuum environment is 2.1 × 10⁻⁶ when growing the charge layer structure. -7 Torr~2.3×10 -7 Torr, for example, could be 2.1 × 10 -7 Torr, 2.15×10 -7 Torr, 2.2×10 -7 Torr, 2.25×10 -7 Torr or 2.3×10 -7 Torr, etc.; temperature is 595℃~615℃, for example, it can be 595℃, 605℃, 610℃ or 615℃, etc.; rotation speed is 10rpm~30rpm, for example, it can be 10rpm, 15rpm, 20rpm, 25rpm or 30rpm, etc.

[0048] As a preferred embodiment of the present invention, the InGaAs contact layer is a P+ type In... 0.53 Ga 0.47 The As layer has a thickness of 50nm to 150nm, for example, it can be 50nm, 80nm, 100nm, 120nm or 150nm, etc.

[0049] Preferably, when growing the InGaAs contact layer, the beam intensity ratio of group V elements to group III elements is (22~26):1, for example, it can be 22:1, 23:1, 24:1, 25:1 or 26:1, etc.

[0050] Preferably, the vacuum environment is 1.8 × 10⁻⁶ when growing the InGaAs contact layer. -7 Torr~1.9×10 -7 Torr, for example, could be 1.8 × 10 -7 Torr, 1.83×10 -7 Torr, 1.85×10 -7Torr or 1.9×10 -7 Torr, etc.; 595℃~615℃, for example, it can be 595℃, 605℃, 610℃ or 615℃, etc.; rotation speed is 10rpm~30rpm, for example, it can be 10rpm, 15rpm, 20rpm, 25rpm or 30rpm, etc.

[0051] In some embodiments, the group III source furnace (including indium source furnace, gallium source furnace, etc.) in this invention reaches the operating temperature before the baffle is opened and the growth process begins. The time from the start of heating to the operating temperature can be 15 to 25 minutes. After reaching the operating temperature, it is put into use within 10 minutes to prevent consumption due to excessively long dwell time and to help avoid potential adhesion. After the growth is completed, cooling is performed, with the base temperature reduced at a rate of 8°C / min to 12°C / min, followed by the tip temperature. If the furnace is to be used again later, the corresponding source furnace temperature may be temporarily reduced by 90°C to 110°C depending on the actual program requirements.

[0052] In some embodiments, the present invention uses a phosphorus source furnace and a silicon source furnace as doping sources to perform corresponding P-type or N-type doping. The time from the doping source furnace reaching the operating temperature to the start of use should not exceed 3 minutes, and it should be immediately cooled back to the standby temperature after use.

[0053] In some embodiments, the indium source furnace and gallium source furnace in the preparation method of the present invention maintain a bottom power of less than 20% of full power during use to reduce the possibility of source sputtering, which is beneficial to further reduce surface defects.

[0054] In a second aspect, the present invention provides an avalanche photodiode, which is obtained according to the preparation method described in the first aspect.

[0055] It should be noted that, due to space limitations and to avoid redundancy, this invention does not exhaustively list all point values ​​within the above numerical range, but it is not limited to the listed values ​​either; other unlisted values ​​within the above numerical range are also applicable.

[0056] Compared with existing technical solutions, the present invention has at least the following beneficial effects: The avalanche photodiode fabrication method provided by this invention uses an InGaAlAs quaternary material layer to construct a transition layer structure. The growth rate of the quaternary material layer in contact with the absorption layer is V2, the growth rate of the remaining quaternary material layers is V3, and the growth rates of the absorption layer, multiplication layer structure, charge layer structure, and contact layer are V1. Molecular beam epitaxy is performed with V1 = 0.4 μm / h ~ 0.8 μm / h, V2 / V1 = 1 ~ 1.1, and V3 / V1 = 1.5 ~ 2.5 to obtain the avalanche photodiode. A smaller V1 helps improve electrical performance, reduce background concentration, reduce surface defects, and also provides a prerequisite for the smooth growth of the transition layer structure. V2 is similar to V1, which ensures the interface performance between the transition layer structure and the absorption layer. Therefore, by significantly increasing V3, efficiency can be improved, achieving a balance between high quality and high-speed production.

[0057] Furthermore, by optimizing and adjusting various parameters in each growth process of the preparation method, it is possible to fabricate improved SAGCM-APD (Separate Absorption Grading Charge Multiplication APD) material devices with surfaces free of defects, cracks, scratches, contamination, etc., and a defect density ≤1000 cm⁻¹. -2 (OM9-point OM×100 method test, D>0.5μm); XRD lattice-matched layer half-width at half-maximum ≤40 arcsec; XRD lattice mismatch ≤±500ppm; surface roughness ≤0.3nm; PL wavelength inhomogeneity ≤±0.5%; thickness and doping concentration can be adjusted and controlled as needed. Attached Figure Description

[0058] Figure 1 This is a schematic diagram of the coordinate system for the point where the defect density test is conducted.

[0059] Figure 2 This is a schematic diagram of the points used in the PL wavelength non-uniformity test.

[0060] Figure 3 This is a schematic diagram of the layer structure of the avalanche photodiode in Example 1. Detailed Implementation

[0061] The technical solution of the present invention will be further illustrated below through specific embodiments.

[0062] Those skilled in the art will understand that the embodiments described are merely illustrative of the invention and should not be construed as limiting the invention.

[0063] Example 1 This embodiment provides a method for fabricating an avalanche photodiode, including the following steps: S1. After loading a 2-inch, SI-type (or N-type) lnP substrate with a thickness of 350 μm, pre-degas it in a pretreatment chamber at a degassing temperature of 120℃ for 30 min. S2. After degassing in the pretreatment chamber, wait for the temperature to cool down (to <80℃) and the vacuum to improve (to <1×10⁻⁶). - 8 Torr), and then the substrate is transferred to the preparation chamber for secondary degassing at a temperature of 300°C for 30 minutes. S3. When the vacuum and temperature of the growth chamber and the pretreatment chamber are both appropriate, the substrate is transferred into the growth chamber and heated at a rate of 20℃ / min. Simultaneously, the heating rack rotation system is turned on at a rotation speed of 20rpm. When the thermocouple temperature on the heating rack reaches 300℃, open the main baffle of the equipment and the baffle of the phosphorus source furnace. Open the valve of the phosphorus source furnace at a rate of 5% / min to achieve a background vacuum of 1.5×10⁻⁶. -7 Torr; After the thermocouple temperature reaches 550℃, the current and voltage of the Reflection High Energy Electron Diffraction (RHEED) instrument are brought to operating status, the monitoring window is opened simultaneously, and the substrate surface reconstruction phenomenon is continuously observed. After obvious (4×4) reconstruction occurs, the current thermocouple temperature Ts (i.e. the surface reconstruction temperature) is recorded. Then, the temperature is continuously increased, with the SI-type substrate heated to Ts+65℃ (or the N-type substrate heated to Ts+35℃), while maintaining rotation. The substrate is left to stand for 6 minutes for deoxidation. After this time, the temperature is lowered to the growth temperature of the lnP epitaxial layer, during which the vacuum in the growth chamber is controlled to not exceed 3×10⁻⁶. -7 Torr; S4. After the temperature of the heating rack thermocouple drops to the growth temperature of the lnP epitaxial layer, start the growth according to the program settings. Observe the stripes on the substrate surface through the monitoring window. If the stripes are clear within 30 seconds, it means that the deoxidation process is going smoothly and growth can continue. Otherwise, it is judged that there is a problem with deoxidation. Determine whether to stop the growth based on the actual situation. When normal growth is possible, the growth rate provided by a single indium source furnace is 0.33 μm / h. Simultaneously, two indium source furnaces (designated as furnace 1 and furnace 2) and one phosphorus source furnace are operated for InP epitaxial layer growth, resulting in a total growth rate of 0.66 μm / h. A silicon source furnace is activated for N-type doping. During InP epitaxial layer growth, the V / III ratio (the ratio of beam intensities of group V elements to group III elements) is controlled to approximately 12. Vacuum is monitored throughout the growth process to ensure the growth chamber vacuum is maintained at 1.2 × 10⁻⁶. - 7 Torr~1.3×10 -7Between Torr; during the growth process, the sample stage temperature was maintained at 545℃~555℃ (thermocouple temperature), and the rotation speed was maintained at 20rpm; the lnP epitaxial layer was N+ type and had a thickness of 750nm; The temperature of the aluminum source furnace (designated as aluminum source furnace No. 1) was increased at a rate of 10℃ / min 25 minutes before the end of growth, to ensure that the growth of the InAlAs layer began within 10 minutes after the aluminum source furnace reached the temperature. S5. After the InP epitaxial layer growth is completed, the P-to-As conversion operation is performed first. Specifically: close the indium source furnace baffle, keep the phosphorus source furnace baffle and valve position unchanged for 30 seconds; then open the arsenic source furnace baffle, open the valve to the operating position at a rate of 6000% / min, while keeping the phosphorus source furnace baffle and valve position unchanged for 1 second; then close the phosphorus source furnace baffle and lower the valve position to 0%, keep the arsenic source furnace baffle open, and keep the valve at the operating position for 90 seconds (the specific time should be adjusted adaptively according to the usage of the arsenic source furnace, and the time should be appropriately increased in the later stages of arsenic source furnace use to ensure that the vacuum in the growth chamber is 2.1×10⁻⁶ at the end). - 7 (Torr and above); during this process, the sample heating stage temperature is increased from 555°C to 620°C at a rate of 30°C / min; the silicon source furnace temperature is reduced to the corresponding temperature at which the layer to be grown will be doped.

[0064] S6. Begin growing lattice-matched InAlAs layers to construct a multiplication layer structure. Specifically: Close the baffle of Indium source furnace No. 2, and use only Indium source furnace No. 1 and Aluminum source furnace No. 1 for growth. Grow a first InAlAs layer (N+ type) with a thickness of 220 nm, a second InAlAs layer (N type) with a thickness of 75 nm, a third InAlAs layer (intrinsically undoped, i.e., Uid type) with a thickness of 100 nm, and a fourth InAlAs layer (P type) with a thickness of 85 nm, sequentially at a growth rate of 0.66 μm / h. Control the V / Ⅲ ratio to approximately 30 during growth. Monitor the vacuum during growth to ensure the vacuum in the growth chamber is maintained at 2.1 × 10⁻⁶. -7 Torr~2.3×10 -7 Between Torr, the sample stage temperature was maintained at 620℃ (thermocouple temperature) and the rotation speed was 20 rpm during the growth process; After the first InAlAs layer was started to grow, the beryllium source furnace was raised to the operating temperature at a rate of 25℃ / min, and the fourth InAlAs layer was started to grow about 3 minutes after reaching the operating temperature. After the growth of this layer was completed, the beryllium source furnace was lowered to the standby temperature. At the same time, the No. 1 gallium source furnace, the No. 2 gallium source furnace (which provides a growth rate of 0.33 times that of the No. 1 gallium source furnace), and the No. 2 aluminum source furnace (which provides a growth rate of 0.33 times that of the No. 1 aluminum source furnace) are heated to the growth temperature to ensure that the growth of the corresponding first transition layer structure begins within 10 minutes after each furnace reaches the temperature. S7. After the fourth InAlAs layer growth is completed, the baffles of Indium Furnace No. 1 and Indium Furnace No. 2, Gallium Furnace No. 2, Aluminum Furnace No. 1 and Aluminum Furnace No. 2 are simultaneously turned on to grow the first InGaAlAs quaternary material layer at a growth rate of 1.32 μm / h. Then, Indium Furnace No. 1 and Indium Furnace No. 2, Gallium Furnace No. 1 and Aluminum Furnace No. 1 are simultaneously turned on, while the baffles of Gallium Furnace No. 2 and Aluminum Furnace No. 2 are turned off to grow the second InGaAlAs quaternary material layer at a growth rate of 1.32 μm / h. Then, the baffles of Indium Furnace No. 1, Gallium Furnace No. 2 and Aluminum Furnace No. 2 are turned on, while the baffles of Indium Furnace No. 2, Gallium Furnace No. 1 and Aluminum Furnace No. 1 are turned off to grow the third InGaAlAs quaternary material layer at a growth rate of 0.66 μm / h. Each layer is Uid-type with a thickness of 14 nm, forming a first transition layer structure with a total thickness of 42 nm. S8. Begin growing the lattice-matched InGaAs absorber layer. Open the baffle of indium source furnace No. 2, close the baffle of indium source furnace No. 1, and appropriately lower the temperature. During the growth process, control the V / III ratio at approximately 24, and monitor the vacuum throughout the growth process to ensure that the vacuum in the growth chamber is maintained at 1.8 × 10⁻⁶. -7 Torr~1.9×10 -7 Between Torr, the sample stage temperature was maintained at 620℃ (thermocouple temperature) during the growth process, the rotation speed was 20 rpm, and the growth rate was 0.66 μm / h; the InGaAs absorber layer was Uid type and had a thickness of 800 nm. S9. After the InGaAs absorber layer growth is completed, the heating stage temperature is reduced to 605℃. Then, the second transition layer structure is grown. Specifically: the baffles of indium source furnace 1, gallium source furnace 2, and aluminum source furnace 2 are turned on, and the baffles of indium source furnace 2, gallium source furnace 1, and aluminum source furnace 1 are turned off. The fourth InGaAlAs quaternary material layer is grown at a growth rate of 0.66 μm / h. Then, indium source furnace 1 and indium source furnace 2, gallium source furnace 1 and aluminum source furnace 1 are turned on, and gallium source furnace 2 is turned off. The baffles of furnaces No. 1 and No. 2 were used to grow the fifth InGaAlAs quaternary material layer at a growth rate of 1.32 μm / h. Then, the baffles of furnaces No. 1 and No. 2, furnace No. 2, furnace No. 1 and No. 2 were turned on to grow the sixth InGaAlAs quaternary material layer at a growth rate of 1.32 μm / h, forming the second transition layer structure. Each layer is Uid type and has a thickness of 14 nm, forming a second transition layer structure with a total thickness of 42 nm. S10. After the second transition layer growth is completed, the lattice-matched InAlAs layer is grown to construct the charge layer structure. Specifically: the baffles of the No. 2 indium source furnace are turned off, and growth is carried out using only the No. 1 indium source furnace and the No. 1 aluminum source furnace, with beryllium source furnace used for doping. A 75nm thick fifth InAlAs layer (P-type) and a 300nm thick sixth InAlAs layer (P+ type) are grown sequentially. During the growth process, the V / Ⅲ ratio is controlled to be approximately 30. The vacuum is monitored during the growth process to ensure that the vacuum in the growth chamber is maintained at 2.1×10⁻⁶. -7 Torr~2.3×10 -7 Between Torr, the sample stage temperature was maintained at 605℃ (thermocouple temperature) and the rotation speed was 20rpm during the growth process; S11. After the charge layer structure growth is completed, the InGaAs contact layer is grown. The baffle of the No. 2 indium source furnace is opened, the baffle of the No. 1 indium source furnace is closed, and the temperature is appropriately reduced. During the growth process, the V / III ratio is controlled at around 24, and the vacuum is monitored to ensure that the vacuum in the growth chamber is 1.8 × 10⁻⁶. -7 Torr~1.9×10 -7 Between Torr, the sample stage temperature was maintained at 605℃ (thermocouple temperature) during the growth process, the rotation speed was 20 rpm, and the growth rate was 0.66 μm / h; the InGaAs contact layer was P+ type and 100 nm thick. S12. During the growth process of the above steps, continuously monitor parameters such as vacuum, water, and high-purity gas pressure. Ensure that the temperature, power, and temperature reach of each source furnace displayed in the main program of the equipment are maintained, and that the baffles and valve positions of each source furnace are switched on and off as set. After the growth process is complete, the baffles of the Group III and doped element source furnaces are closed. The heating stage begins to cool down at a rate of 20°C / min, and the valve position of the Group V element source furnace decreases at a rate of 3% / min. When the heating stage temperature reaches 300°C, the main baffle and the Group V element source furnace baffle are closed, the valve position of the Group V element source furnace is reduced to 1%, and rotation stops. The growth chamber vacuum reading is then checked until the thermocouple temperature drops below 180°C and <1×10⁻⁶. -9 After Torr, sampling operations can be performed.

[0065] Thus, Example 1 yields an improved SAGCM-APD (Separate Absorption Grading Charge Multiplication APD) material device, such as... Figure 3 As shown, it includes an InP substrate 1, an InP epitaxial layer 2, a multiplication layer structure 3, a first transition layer structure 4, an InGaAs absorption layer 5, a second transition layer structure 6, a charge layer structure 7, and an InGaAs contact layer 8, which are stacked sequentially.

[0066] Table 1 records the growth rate, thickness, and doping type of each growth in Example 1.

[0067] Table 1 As can be seen, in Example 1, the growth rate of the multiplication layer structure, the InGaAs absorber layer, the charge layer structure, and the InGaAs contact layer is V1 = 0.66 μm / h; in the first transition layer structure and the second transition layer structure, the growth rate of the InGaAlAs quaternary material layer in contact with the InGaAs absorber layer is V2 = 0.66 μm / h, and the growth rate of the remaining InGaAlAs quaternary material layers is V3 = 1.32 μm / h, so V2 / V1 = 1, V3 / V1 = 2.

[0068] Comparative Example 1 Compared with Example 1, the first transition layer structure and the second transition layer structure are modified as shown in Table 2 below: Table 2 Among them, the InGaAs with a thickness of 8.33 nm is in contact with the absorption layer, the growth rate of all layers is 1 μm / h, and the total thickness of each transition layer structure is 50 nm.

[0069] Comparative Example 2 Compared with Example 1, the first transition layer structure and the second transition layer structure are modified as shown in Table 3 below: Table 3 Among them, the InGaAs with a single layer thickness of 0.25nm is in contact with the absorption layer, the growth rate of all layers is 1μm / h, and the total thickness of each transition layer structure is 50nm.

[0070] Comparative Example 3 and Comparative Example 4 Compared with Example 1, Comparative Examples 3 and 4 have at least one of V1, V2 or V3 adjusted, as shown in Table 4.

[0071] Table 4 The APD materials obtained in the above embodiments and comparative examples were tested: 1) Defect density test: Test equipment: Olympus STM7 measuring instrument; Test conditions: Reference Figure 1First, according to the coordinate diagram in the diagram, align the lens with the zero point in the diagram, ensuring that the objective lens moves from the zero point along the X and Y coordinates to the growth edge of the product at a distance of approximately 33.00 cm. As shown in the diagram, locate nine points: (0, 0), (0, 16.50), (0, 33.00), (16.50, 0), (16.50, 16.50), (16.50, 33.00), (33.00, 0), (33.00, 16.50), and (33.00, 33.00). Rotate the focus adjustment knob to make the image on the monitor clear. Then, take one bright-field and one dark-field photograph at 100x magnification (X10 lens). Next, find the number of defects that are visible at the nine locations in both the bright-field and dark-field sections at 100x magnification. Divide this number by 9 and multiply by 100 to obtain the surface defect density data.

[0072] 2) XRD test: Test equipment: The equipment used was the X'Pert3 MRD measuring instrument; Test conditions: The sample lattice was set to (004), the slit width was 1 / 16 of the slit width, and a coarse scan was performed first. The "Scan axis" was set to "Omega-2 Theta", the "Range" was set to 3, the "Step size" was set to 0.01, and the "Time per step" was set to 0.1. A fine scan was then performed, with the "Scan axis" set to "Omega-2 Theta", the "Range" determined according to the coarse scan range, the "Step size" set to 0.001, and the "Time per step" set to 0.3. The full width at half maximum (FWHM) and lattice mismatch were calculated.

[0073] 3) Surface roughness test: Test equipment: Park NX20; Test conditions: scan rate: 1.00Hz; Z-slope: 0.00°; Pixels: 256; Size: 5.00μm; Offset: 0; Rotation: 0; Test position is the exact center of the sample.

[0074] 4) PL wavelength non-uniformity test: Test equipment: Thermo Fisher Scientific IS50; Test conditions: Calibration phase: Detector "InSb", beam splitter "CaF2", light source "white light", gain "1", mirror speed "0.9494", aperture "32", attenuation "2%"; Test phase: Detector "InSb", beam splitter "CaF2", light source "parallel collimated emission", range limit "13000~3000", gain "2", mirror speed "0.9494", aperture "4", attenuation "no attenuation"; laser wavelength: 532nm; test location: test Figure 2 The wavelength and intensity of 9 points were measured, and the PL wavelength non-uniformity test results were calculated.

[0075] 4) Device performance testing: This includes testing for breakdown voltage, dark current, voltage drop, bandwidth, etc. The device has a photosensitive surface area of ​​16×16 (μm). Testing equipment: IV meter; Breakdown voltage test conditions: Ir = 100 μA, ideal breakdown voltage range: 23V~29V; Dark current test conditions: V=Vbr-3V, ideal dark current range: Id<30nA; Forward voltage drop test conditions: Ir = 1mA, ideal forward voltage drop condition: Ir<1.5V; V=Vbr-3V, λ@1310nm.

[0076] The test results are recorded in Tables 5 and 6.

[0077] Table 5 Table 6 As can be seen from the above, the fabrication of the improved SAGCM-APD material device in Example 1 resulted in an APD material surface free of defects, cracks, scratches, contamination, etc., with a defect density ≤1000 cm⁻¹. -2 The XRD lattice-matched layer full width at half maximum (FWHM) is ≤40 arcsec; XRD lattice mismatch is ≤±500ppm; surface roughness is ≤0.3nm; PL wavelength inhomogeneity is ≤±0.5%. Preliminary testing showed the device had a breakdown voltage (Ir = 100μA) Vbr = 24.9V, dark current (V = Vbr - 3V) Id = 23.86nA, forward voltage drop (Ir = 1mA) Vf = 1.172V, and bandwidth (V = Vbr - 3V, @1310nm) = 16GHz. Compared to Example 1, the deviation of the V1 or V3 / V1 ratio in Comparative Example 3 resulted in a significant increase in defects, severely impacting device performance. Compared to devices with other transition layer structures in Comparative Examples 1 and 2, Example 1 is more conducive to achieving better lattice matching and uniformity, achieving a high level of performance, especially in terms of bandwidth.

[0078] The preferred embodiments of the present invention have been described in detail above. However, the present invention is not limited to the specific details in the above embodiments. Within the scope of the technical concept of the present invention, various simple modifications can be made to the technical solution of the present invention, and these simple modifications all fall within the protection scope of the present invention.

[0079] It should also be noted that the various specific technical features described in the above specific embodiments can be combined in any suitable manner without contradiction. In order to avoid unnecessary repetition, the present invention will not describe the various possible combinations separately.

[0080] Furthermore, various different embodiments of the present invention can be combined in any way, as long as they do not violate the spirit of the present invention, they should also be regarded as the content disclosed by the present invention.

Claims

1. A method for fabricating an avalanche photodiode, characterized in that, The fabrication method includes using molecular beam epitaxy to sequentially grow an InP epitaxial layer, a multiplication layer structure, a first transition layer structure, an InGaAs absorption layer, a second transition layer structure, a charge layer structure, and an InGaAs contact layer on an InP substrate; wherein, the multiplication layer structure and the charge layer structure both include an InAlAs layer; and the first transition layer structure and the second transition layer structure both include at least two InGaAlAs quaternary material layers. The growth rate of the multiplication layer structure, the InGaAs absorber layer, the charge layer structure, and the InGaAs contact layer is V1; in the first transition layer structure and the second transition layer structure, the growth rate of the InGaAlAs quaternary material layer in contact with the InGaAs absorber layer is V2, and the growth rate of the remaining InGaAlAs quaternary material layers is V3. Then, V1 is controlled to be 0.4 μm / h to 0.8 μm / h, V2 / V1 is 1 to 1.1, and V3 / V1 is 1.5 to 2.

5.

2. The method for fabricating an avalanche photodiode according to claim 1, characterized in that, The InP substrate can be of type SI or type N; Preferably, the thickness of the InP substrate is 300 μm to 400 μm; Preferably, the InP substrate is pre-degassed at 100°C to 140°C for 20 to 40 minutes. Then, a second degassing process is carried out at 250℃~350℃ for 20min~40min; Preferably, after the InP substrate is degassed, the InP substrate is subjected to surface reconstruction and deoxidation treatment in sequence before the growth of the InP epitaxial layer begins. Preferably, the surface reconstruction includes (4×4) reconstruction; Preferably, the temperature of the surface reconstruction is Ts, the temperature of the deoxidation treatment is Ts+30°C~Ts+70°C, the time is 4min~8min, and the control vacuum environment is ≤3x10 -7 Torr.

3. The method for fabricating an avalanche photodiode according to claim 1 or 2, characterized in that, The InP epitaxial layer is of type N+; Preferably, the source furnace used for growing the InP epitaxial layer includes two indium source furnaces, and the two indium source furnaces provide the same beam intensity; Preferably, when growing the InP epitaxial layer, the ratio of the beam intensity of group V elements to group III elements is (11~13):1; Preferably, the vacuum environment is 1.2 x 10 -7 Torr~1.3 x 10 -7 Torr, at a temperature of 545°C~555°C, and a rotation rate of 10rpm~30rpm.

4. The method for fabricating an avalanche photodiode according to any one of claims 1-3, characterized in that, The multiplication layer structure includes a first InAlAs layer, a second InAlAs layer, a third InAlAs layer, and a fourth InAlAs layer stacked together; Preferably, the first InAlAs layer is an N+ type In... 0.52 Al 0.48 As layer, thickness 150nm~300nm; Preferably, the second InAlAs layer is an N-type In... 0.52 Al 0.48 As layer, thickness 50nm~300nm; Preferably, the third InAlAs layer is an intrinsic In... 0.52 Al 0.48 As layer, thickness 80nm~120nm; Preferably, the fourth InAlAs layer is a P-type In... 0.52 Al 0.48 The As layer has a thickness of 70nm~100nm; Preferably, when growing the multiplication layer structure, the beam intensity ratio of group V elements to group III elements is (28~32):1; Preferably, the vacuum environment during the growth of the multiplication layer structure is 2.1 × 10⁻⁶. -7 Torr~2.3×10 -7 Torr, with a temperature of 610℃~630℃ and a rotation speed of 10rpm~30rpm.

5. The method for fabricating an avalanche photodiode according to any one of claims 1-4, characterized in that, In the first transition layer structure, along the direction that gradually approaches the InGaAs contact layer, the gallium content in the InGaAlAs quaternary material layer increases layer by layer, while the aluminum content decreases layer by layer. Preferably, the first transition layer structure includes a first InGaAlAs quaternary material layer, a second InGaAlAs quaternary material layer, and a third InGaAlAs quaternary material layer stacked together. Preferably, the first InGaAlAs quaternary material layer is intrinsic InGa. 0.16 Al 0.32 As quaternary material layer, the source furnace used includes two indium source furnaces and two aluminum source furnaces, with a growth rate of 1μm / h~1.4μm / h and a thickness of 10nm~27nm; Preferably, the second InGaAlAs quaternary material layer is intrinsic InGa. 0.24 Al 0.24 The As quaternary material layer uses two indium source furnaces, with a growth rate of 1μm / h~1.4μm / h and a thickness of 10nm~27nm. Preferably, the third InGaAlAs quaternary material layer is intrinsic InGa. 032 Al 0.16 The As quaternary material layer has a growth rate of 0.4 μm / h to 0.8 μm / h and a thickness of 10 nm to 27 nm.

6. The method for fabricating an avalanche photodiode according to any one of claims 1-5, characterized in that, The InGaAs absorption layer is intrinsic In. 0.53 Ga 0.47 The As layer has a thickness of 700nm~900nm; Preferably, when growing the InGaAs absorber layer, the ratio of the beam intensity of group V elements to group III elements is (22~26):1; Preferably, the vacuum environment during the growth of the InGaAs absorber layer is 1.8 × 10⁻⁶. -7 Torr~1.9×10 -7 Torr, with a temperature of 610℃~630℃ and a rotation speed of 10rpm~30rpm.

7. The method for fabricating an avalanche photodiode according to any one of claims 1-6, characterized in that, In the second transition layer structure, along the direction that gradually moves away from the InGaAs contact layer, the gallium content in the InGaAlAs quaternary material layer decreases layer by layer, while the aluminum content increases layer by layer. Preferably, the first transition layer structure includes a stacked fourth InGaAlAs quaternary material layer, a fifth InGaAlAs quaternary material layer, and a sixth InGaAlAs quaternary material layer. Preferably, the fourth InGaAlAs quaternary material layer is intrinsic InGa. 032 Al 0.16 As quaternary material layer, with a growth rate of 0.4μm / h~0.8μm / h and a thickness of 10nm~27nm; Preferably, the fifth InGaAlAs quaternary material layer is intrinsic InGa. 0.24 Al 0.24 The As quaternary material layer uses two indium source furnaces, with a growth rate of 1μm / h~1.4μm / h and a thickness of 10nm~27nm. Preferably, the sixth InGaAlAs quaternary material layer is intrinsic InGa. 0.16 Al 0.32 As a quaternary material layer, the source furnaces used include two indium source furnaces and two aluminum source furnaces, with a growth rate of 1μm / h~1.4μm / h and a thickness of 10nm~27nm.

8. The method for fabricating an avalanche photodiode according to any one of claims 1-7, characterized in that, The charge layer structure includes a fifth InAlAs layer and a sixth InAlAs layer stacked together; Preferably, the fifth InAlAs layer is a P-type In... 0.52 Al 0.48 The As layer has a thickness of 50nm~100nm; Preferably, the sixth InAlAs layer is a P+ type In... 0.52 Al 0.48 The As layer has a thickness of 200nm~400nm; Preferably, when growing the charge layer structure, the beam intensity ratio of group V elements to group III elements is (28~32):1; Preferably, the vacuum environment is 2.1 × 10⁻⁶ when growing the charge layer structure. -7 Torr~2.3×10 -7 Torr, with a temperature of 595℃~615℃ and a rotation speed of 10rpm~30rpm.

9. The method for fabricating an avalanche photodiode according to any one of claims 1-8, characterized in that, The InGaAs contact layer is a P+ type InGaAs. 0.53 Ga 0.47 The As layer has a thickness of 50nm~150nm; Preferably, when growing the InGaAs contact layer, the ratio of the beam intensity of group V elements to group III elements is (22~26):1; Preferably, the vacuum environment is 1.8 × 10⁻⁶ when growing the InGaAs contact layer. -7 Torr~1.9×10 -7 Torr, with a temperature of 595℃~615℃ and a rotation speed of 10rpm~30rpm.

10. An avalanche photodiode, characterized in that, The preparation method according to any one of claims 1-9 is obtained.

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