Power amplifier with improved ruggedness and linearity

Abstract

Methods and apparatuses for amplifying a signal via an amplifier circuit for transmission are described. An example amplifier circuit generally includes an amplifier configured to amplify a signal for wireless transmission and including a first transistor (Q 2p ) and a second transistor (Q 2n ). The amplifier circuit also includes a transformer coupled to an output of the amplifier, a first coil (L1) coupled to the first transistor (Q 2p ) and inductively coupled to the transformer, and a second coil (L2) coupled to the second transistor (Q 2n ) and inductively coupled to the transformer.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to U.S. Patent Application No. 18 / 520,168, filed November 27, 2023, which has been assigned to the assignee of this application and is expressly incorporated herein by reference in its entirety, as fully set forth below and for all applicable purposes. Technical Field

[0003] Certain aspects of this disclosure relate generally to electronic circuits, and more specifically to power amplifiers for use in transmitter architectures. Background Technology

[0004] Wireless communication devices are widely deployed to provide a variety of communication services, such as telephone, video, data, messaging, broadcasting, and so on. These wireless communication devices can transmit and / or receive radio frequency (RF) signals via any of a variety of suitable radio access technologies (RATs), including but not limited to 5G New Radio (NR), Long Term Evolution (LTE), Code Division Multiple Access (CDMA), Time Division Multiple Access (TDMA), Wideband CDMA (WCDMA), Global System for Mobile Communications (GSM), Bluetooth, Bluetooth Low Energy (BLE), ZigBee, and Wireless Local Area Network (WLAN) RATs (e.g., WiFi).

[0005] Wireless communication networks may include multiple base stations capable of supporting communication with multiple mobile stations. A mobile station (MS) may communicate with a base station (BS) via downlink and uplink. A downlink (or forward link) refers to the communication link from the base station to the mobile station, while an uplink (or reverse link) refers to the communication link from the mobile station to the base station. The base station may transmit data and control information to the mobile station on the downlink and / or receive data and control information from the mobile station on the uplink. The base station and / or mobile station may include radio frequency front-end (RFFE) circuitry for processing and amplifying signals for transmission and reception. For example, the RFFE circuitry may include a power amplifier (PA) for amplifying radio frequency signals for transmission. Furthermore, a driver amplifier (DA) may be used to generate signals to drive the inputs of the PA. Summary of the Invention

[0006] The systems, methods, and apparatuses of this disclosure each have several aspects, none of which are solely responsible for their desired properties. Without limiting the scope of this disclosure as set forth in the following claims, some features will now be briefly discussed. Upon consideration of this discussion, and especially after reading the section entitled “Detailed Description,” it will be understood how the features of this disclosure provide advantages including improved linearity and robustness of power amplifiers (PAs).

[0007] Some aspects of this disclosure provide an amplifier circuit. The amplifier circuit typically includes an amplifier configured to amplify a signal for wireless transmission. The amplifier includes a first transistor and a second transistor. The amplifier circuit also includes a transformer coupled to the output of the amplifier. The amplifier circuit further includes: (i) a first coil coupled to the first transistor and inductively coupled to the transformer; and (ii) a second coil coupled to the second transistor and inductively coupled to the transformer.

[0008] Certain aspects of this disclosure provide a method. This method typically includes amplifying a signal via an amplifier circuit for transmission. The method also includes coupling the amplified signal to an antenna via a transformer of the amplifier circuit. The transformer is coupled to the output of the amplifier. A first coil of the amplifier circuit is coupled to a first transistor of the amplifier and inductively coupled to the transformer. A second coil of the amplifier circuit is coupled to a second transistor of the amplifier and inductively coupled to the transformer.

[0009] Certain aspects of this disclosure provide a wireless device. The wireless device typically includes an antenna and amplifier circuitry, the amplifier circuitry including an output coupled to the antenna. The amplifier circuitry includes an amplifier configured to amplify a signal for wireless transmission. The amplifier includes a first transistor and a second transistor. The amplifier circuitry also includes a transformer coupled to the output of the amplifier. The amplifier circuitry further includes: (i) a first coil coupled to the first transistor and inductively coupled to the transformer; and (ii) a second coil coupled to the second transistor and inductively coupled to the transformer.

[0010] To achieve the foregoing and related objectives, one or more aspects include the features fully described below and specifically pointed out in the claims. The following description and drawings illustrate some exemplary features of one or more aspects in detail. However, these features indicate only some of the various ways in which the principles of the various aspects may be employed, and this description is intended to include all such aspects and their equivalents. Attached Figure Description

[0011] To gain a more detailed understanding of the foregoing features of this disclosure, a more specific description, which has been briefly summarized above, can be obtained by referring to various aspects, some of which are illustrated in the accompanying drawings. However, it should be noted that the drawings illustrate only certain typical aspects of this disclosure and are therefore not to be construed as limiting its scope, as other equally valid aspects may be acknowledged in this description.

[0012] Figure 1 This is a diagram illustrating an example wireless communication network in which various aspects of the present disclosure can be practiced.

[0013] Figure 2 It is a block diagram conceptually illustrating the design of an example base station (BS) and user equipment (UE) in which various aspects of this disclosure can be practiced.

[0014] Figure 3 This is a block diagram of an example radio frequency (RF) transceiver in which various aspects of this disclosure can be practiced.

[0015] Figures 4A to 4C Example amplifier circuits according to certain aspects of this disclosure are illustrated.

[0016] Figures 5A to 5D Different views of example laminated structures of transformers for amplifier circuits according to certain aspects of this disclosure are shown.

[0017] Figure 6 This is a flowchart illustrating an example operation for amplifying a signal for transmission, based on certain aspects of this disclosure.

[0018] For ease of understanding, the same reference numerals have been used where possible to denote common elements in the figures. It is conceivable that elements disclosed in one aspect may be usefully applied to other aspects without specific description. Detailed Implementation

[0019] Certain aspects of this disclosure relate generally to electronic components, and more specifically to amplifiers (e.g., power amplifiers or "PAs") implemented via a transformer and inductively coupled to one or more coils of that transformer. As described in more detail herein, amplifier circuitry may include, but is not limited to, a first transistor coupled to the amplifier and inductively coupled to a first coil of the transformer, and a second transistor coupled to the amplifier and inductively coupled to a second coil of the transformer. As an illustrative and non-limiting example, the amplifier circuitry described herein may allow for improved performance under extreme (or harsh) conditions, such as high voltage standing wave ratio (VSWR), low temperature, and high input / supply voltage.

[0020] Various aspects of this disclosure are described more fully below with reference to the accompanying drawings. However, this disclosure may be embodied in many different forms and should not be construed as limited to any particular structure or function presented throughout this disclosure. Rather, these aspects are provided so that this disclosure will be comprehensive and complete, and will fully convey the scope of protection of this disclosure to those skilled in the art. Based on the teachings herein, those skilled in the art should understand that the scope of this disclosure is intended to cover any aspect of the disclosure herein, whether implemented independently or in combination with any other aspect of this disclosure. For example, any number of aspects set forth herein may be used to implement an apparatus or practice. Furthermore, the scope of this disclosure is intended to cover such apparatuses or methods implemented using structures, functions, or structures and functions other than or different from the aspects of the disclosure set forth herein. It should be understood that any aspect of this disclosure herein may be embodied by one or more elements of the claims.

[0021] The word “exemplary” is used in this document to mean “serving as an example, instance, or illustration.” Any aspect described as “exemplary” in this document is not necessarily to be construed as preferred or superior to other aspects.

[0022] As used herein, the term “connected to” in various tenses of the verb “connect” can mean that element A is directly connected to element B or that other elements can be connected between element A and element B (i.e., element A and element B are indirectly connected). In the context of electronic components, the term “connected to” can also be used herein to mean that a conductor, trace, or other conductive material is used to electrically connect element A and element B (and any components electrically connected between them).

[0023] Example wireless system

[0024] Figure 1 Example wireless communication network 100 is illustrated in which various aspects of this disclosure can be practiced. For example, wireless communication network 100 may be a new radio (NR) system (e.g., a fifth-generation (5G) NR network), a sixth-generation (6G) cellular system, an evolved universal terrestrial radio access (E-UTRA) system (e.g., a fourth-generation (4G) network), a universal mobile telecommunications system (UMTS) (e.g., a second-generation / third-generation (2G / 3G) network), or a code division multiple access (CDMA) system (e.g., a 2G / 3G network), or may be configured to communicate according to IEEE standards such as one or more standards in the 802.11 standard.

[0025] like Figure 1As illustrated, the wireless communication network 100 may include several base stations (BS) 110a to 110z (each individually referred to herein as BS 110 or collectively as BS 110) and other network entities. BS may also be referred to as access point (AP), evolved Node B (eNodeB or eNB), next-generation Node B (gNodeB or gNB), or some other terminology.

[0026] BS 110 can provide communication coverage for a specific geographic area (sometimes referred to as a "cell"), which can be stationary or mobile depending on the location of the mobile BS 110. In some examples, BS 110 can use any suitable transport network, interconnecting with each other and / or connecting to one or more other BSs or network nodes (not shown) in the wireless communication network 100 via various types of backhaul interfaces (e.g., direct physical connection, wireless connection, virtual network, etc.). Figure 1 In the example shown, BS 110a, 110b, and 110c can be macro BSs for macro cells 102a, 102b, and 102c, respectively. BS 110x can be a pico BS for pico cell 102x. BS 110y and 110z can be femto BSs for femto cells 102y and 102z, respectively. A BS can support one or more cells.

[0027] BS 110 communicates with one or more user equipment (UEs) 120a to 120y (each individually referred to herein as "UE 120" or collectively as "UE 120") in the wireless communication network 100. The UE can be fixed or mobile and can also be referred to as a user terminal (UT), mobile station (MS), access terminal, station (STA), client, wireless device, mobile device, or some other term. The user terminal can be a wireless device such as a cellular phone, smartphone, personal digital assistant (PDA), handheld device, wearable device, wireless modem, laptop computer, tablet computer, personal computer, etc.

[0028] BS 110 is considered a transmitting entity for downlink and a receiving entity for uplink. UE 120 is considered a transmitting entity for uplink and a receiving entity for downlink. As used herein, a “transmitting entity” is an independently operating apparatus or device capable of transmitting data via a frequency channel, and a “receiving entity” is an independently operating apparatus or device capable of receiving data via a frequency channel. In the following description, the subscript “dn” denotes downlink, and the subscript “up” denotes uplink. N can be selected. up One UE is used for simultaneous transmission on the uplink, and N can be selected. dn Each UE is used for simultaneous transmission on the downlink. N upIt can be equal to or not equal to N dn And N up and N dn It can be a static value or it can be changed for each scheduling interval. Beam control or some other spatial processing techniques can be used at BS 110 and UE 120.

[0029] UEs 120 (e.g., 120x, 120y, etc.) may be distributed throughout the wireless communication network 100, and each UE 120 may be stationary or mobile. The wireless communication network 100 may also include relay stations (e.g., relay station 110r) (also referred to as repeaters, etc.) that receive data transmissions and / or other information transmissions from upstream stations (e.g., BS 110a or UE 120r) and transmit the data transmissions and / or other information transmissions to downstream stations (e.g., UE 120 or BS 110), or relay transmissions between UEs 120 to facilitate communication between devices.

[0030] BS 110 can communicate with one or more UE 120s on both the downlink and uplink at any given time. The downlink (i.e., the forward link) is the communication link from BS 110 to UE 120, while the uplink (i.e., the reverse link) is the communication link from UE 120 to BS 110. UE 120 can also communicate peer-to-peer with another UE 120.

[0031] The wireless communication network 100 can use multiple transmit antennas and multiple receive antennas to transmit data on the downlink and uplink. BS 110 can be equipped with several (N) ap (N) antennas are used to achieve transmit diversity for downlink transmission and / or receive diversity for uplink transmission. A group (N) u Each UE 120 can receive downlink transmissions and send uplink transmissions. Each UE 120 can send user-specific data to and / or receive user-specific data from the BS 110. Typically, each UE 120 may be equipped with one or more antennas. u Each UE 120 can have the same or different number of antennas.

[0032] The wireless communication network 100 can be a time-division duplex (TDD) system or a frequency-division duplex (FDD) system. In a TDD system, the downlink and uplink share the same frequency band. In an FDD system, the downlink and uplink use different frequency bands. The wireless communication network 100 can also utilize a single carrier or multiple carriers for transmission. Each UE 120 can be equipped with a single antenna (e.g., to reduce cost) or multiple antennas (e.g., where additional cost can be supported).

[0033] Network controller 130 (sometimes referred to as a "system controller") can communicate with a group of BSs 110 and (e.g., via backhaul) provide coordination and control for these BSs 110. In some cases (e.g., in a 5G NR system), network controller 130 may include centralized units (CUs) and / or distributed units (DUs). In some aspects, network controller 130 can communicate with core network 132 (e.g., a 5G core network (5GC)) that provides various network functions such as access and mobility management, session management, user plane functions, policy control functions, authentication server functions, unified data management, application functions, network openness functions, network repository functions, network slice selection functions, etc.

[0034] In certain aspects of this disclosure, BS 110 and / or UE 120 may include a transceiver front end (TX / RX) (also referred to as a radio frequency front end (RFFE)) which includes an amplifier (e.g., PA) implemented via a transformer and an inductor coupled to one or more coils of the transformer, as described in more detail herein.

[0035] Figure 2 Examples of BS 110a and UE 120a in which aspects of this disclosure may be implemented (e.g., from...) Figure 1 Example components of a wireless communication network 100.

[0036] On the downlink, at BS 110a, the transmitting processor 220 can receive data from data source 212, control information from controller / processor 240, and / or other data (e.g., from scheduler 244). Various types of data can be transmitted on different transport channels. For example, control information can be designated for the Physical Broadcast Channel (PBCH), Physical Control Format Indicator Channel (PCFICH), Physical Hybrid Automatic Repeat Request (HARQ) Indicator Channel (PHICH), Physical Downlink Control Channel (PDCCH), Group Common PDCCH (GC PDCCH), etc. Data can be designated for the Physical Downlink Shared Channel (PDSCH), etc. The Media Access Control (MAC)-Control Element (MAC-CE) is a MAC layer communication structure that can be used for exchanging control commands between wireless nodes. The MAC-CE can be carried in shared channels such as PDSCH, Physical Uplink Shared Channel (PUSCH), or Physical Sidelink Shared Channel (PSSCH).

[0037] Processor 220 can process (e.g., encode and symbol map) data and control information to obtain data symbols and control symbols, respectively. Transmitter processor 220 can also generate reference symbols such as those for primary synchronization signal (PSS), secondary synchronization signal (SSS), PBCH demodulation reference signal (DMRS), and channel state information reference signal (CSI-RS).

[0038] The transmit (TX) multiple-input multiple-output (MIMO) processor 230 can perform spatial processing (e.g., pre-decoding) on ​​data symbols, control symbols, and / or reference symbols where applicable, and can provide the output symbol stream to the modulators (MODs) in transceivers 232a to 232t. Each modulator in transceivers 232a to 232t can process its own output symbol stream (e.g., for orthogonal frequency division multiplexing (OFDM), etc.) to obtain an output sample stream. Each transceiver in transceivers 232a to 232t can further process (e.g., convert to analog, amplify, filter, and up-convert) the output sample stream to obtain a downlink signal. The downlink signal from transceivers 232a to 232t can be transmitted via antennas 234a to 234t, respectively.

[0039] At UE 120a, antennas 252a to 252r can receive downlink signals from BS 110a and can provide the received signals to transceivers 254a to 254r respectively. Transceivers 254a to 254r can adjust (e.g., filter, amplify, down-convert, and digitize) the corresponding received signals to obtain input samples. Each demodulator (DEMOD) in transceivers 232a to 232t can further process the input samples (e.g., for OFDM, etc.) to obtain received symbols. MIMO detector 256 can obtain the received symbols from all demodulators in transceivers 254a to 254r, perform MIMO detection on the received symbols where applicable, and provide the detected symbols. Receiver processor 258 can process (e.g., demodulate, deinterleave, and decode) the detected symbols, provide the decoded data for UE 120a to data sink 260, and provide the decoded control information to controller / processor 280.

[0040] On the uplink, at UE 120a, the transmit processor 264 can receive and process data from data source 262 (e.g., for the Physical Uplink Shared Channel (PUSCH)) and control information from controller / processor 280 (e.g., for the Physical Uplink Control Channel (PUCCH)). The transmit processor 264 can also generate reference symbols for reference signals (e.g., for the Sounding Reference Signal (SRS)). Symbols from the transmit processor 264 can be pre-decoded by the TX MIMO processor 266 where applicable, further processed by modulators (MODs) in transceivers 254a to 254r (e.g., for Single Carrier Frequency Division Multiplexing (SC-FDM), etc.), and transmitted to BS 110a. At BS 110a, the uplink signal from UE 120a can be received by antenna 234, processed by demodulators in transceivers 232a to 232t, detected by MIMO detector 236 where applicable, and further processed by receiver processor 238 to obtain decoded data and control information transmitted by UE 120a. Receiver processor 238 can provide the decoded data to data sink 239 and the decoded control information to controller / processor 240.

[0041] Memory 242 and 282 can store data and program code for BS 110a and UE 120a, respectively. Memory 242 and 282 can also interface with controller / processor 240 and 280, respectively. Scheduler 244 can schedule the UE for data transmission on the downlink and / or uplink.

[0042] Antenna 252, processors 258, 264, 266 and / or controller / processor 280 of UE 120a, and / or antenna 234, processors 220, 230, 238 and / or controller / processor 240 of BS 110a may be used to perform the various techniques and methods described herein.

[0043] In some aspects of this disclosure, transceiver 232 and / or transceiver 254 may include an amplifier (e.g., PA) implemented via a transformer and an inductor coupled to one or more coils of the transformer, as described in more detail herein.

[0044] NR can use Orthogonal Frequency Division Multiplexing (OFDM) with a cyclic prefix (CP) on both the uplink and downlink. NR can use Time Division Duplex (TDD) to support half-duplex operation. OFDM and Single-Carrier Frequency Division Multiplexing (SC-FDM) divide the system bandwidth into multiple orthogonal subcarriers, which are often referred to as tones, frequency bands, etc. Each subcarrier can be modulated with data. Modulation symbols can be transmitted in the frequency domain using OFDM and in the time domain using SC-FDM. The spacing between adjacent subcarriers can be fixed, and the total number of subcarriers can depend on the system bandwidth. The system bandwidth can also be divided into subbands. For example, a subband can cover multiple resource blocks (RBs).

[0045] Example RF transceiver

[0046] Figure 3 This is a block diagram of an example radio frequency (RF) transceiver circuit 300 according to certain aspects of this disclosure. The RF transceiver circuit 300 includes at least one transmit (TX) path 302 (also referred to as a "transmit chain") for transmitting signals via one or more antennas 306 and at least one receive (RX) path 304 (also referred to as a "receive chain") for receiving signals via antenna 306. When the TX path 302 and RX path 304 share antenna 306, these paths can be connected to the antenna via an interface 308, which may include any of a variety of suitable RF devices, such as switches, duplexers, double-ended converters, multiplexers, etc.

[0047] Receiving in-phase (I) and / or quadrature (Q) baseband analog signals from a digital-to-analog converter (DAC) 310, the TX path 302 may include a baseband filter (BBF) 312, a mixer 314, a driver amplifier (DA) 316, and a power amplifier (PA) 318. The BBF 312, mixer 314, DA 316, and PA 318 may be included in a radio frequency integrated circuit (RFIC). In some respects, PA 318 may be external to the RFIC. In such respects, the RFIC (and therefore DA 316) may be coupled to PA 318 via one or more interconnects (e.g., conductive lines or cables such as coaxial cables or flexible circuits).

[0048] BBF 312 filters the baseband signal received from DAC 310, and mixer 314 mixes the filtered baseband signal with the transmit local oscillator (LO) signal to convert the baseband signal of interest to a different frequency (e.g., up-convert from baseband to RF). This frequency conversion process produces a sum and difference frequency between the LO frequency and the frequency of the baseband signal of interest. This sum and difference frequency is referred to as the "beat frequency". The beat frequency is typically in the RF range, such that the signal output from mixer 314 is typically an RF signal, which can be amplified by DA 316 and / or PA 318 before being transmitted by antenna 306. When one mixer 314 is exemplified, several mixers can be used to up-convert the filtered baseband signal to one or more intermediate frequencies and subsequently up-convert the intermediate frequency (IF) signal to the frequency used for transmission.

[0049] The RX path 304 may include a low-noise amplifier (LNA) 324, a mixer 326, and a baseband filter (BBF) 328. The LNA 324, mixer 326, and BBF 328 may be included in one or more RFICs, which may be the same RFIC as the RFIC including the TX path components, or may not be the same RFIC as the RFIC including the TX path components. The RF signal received via antenna 306 may be amplified by the LNA 324, and the mixer 326 mixes the amplified RF signal with a received local oscillator (LO) signal to convert the RF signal of interest to a different baseband frequency (e.g., down-conversion). The baseband signal output from the mixer 326 may be filtered by the BBF 328 before being converted to digital I and / or Q signals by an analog-to-digital converter (ADC) 330 for digital signal processing.

[0050] Some transceivers may employ a frequency synthesizer with a variable-frequency oscillator (e.g., a voltage-controlled oscillator (VCO) or a digitally controlled oscillator (DCO)) to generate a stable, tunable LO with a specific tuning range. Thus, the transmit LO may be generated by the TX frequency synthesizer 320, which may be buffered or amplified by amplifier 322 before being mixed with the baseband signal in mixer 314. Similarly, the receive LO may be generated by the RX frequency synthesizer 332, which may be buffered or amplified by amplifier 334 before being mixed with the RF signal in mixer 326. In some aspects, a single frequency synthesizer may be used for both TX path 302 and RX path 304. In some aspects, the TX frequency synthesizer 320 and / or the RX frequency synthesizer 332 may include a frequency multiplier (such as a doubler) driven by an oscillator (e.g., a VCO) in the frequency synthesizer.

[0051] Controller 336 (e.g., Figure 2The controller / processor 280 in the controller can direct the operation of the RF transceiver circuit 300A, such as transmitting signals via TX path 302 and / or receiving signals via RX path 304. The controller 336 can be a processor, digital signal processor (DSP), application-specific integrated circuit (ASIC), field-programmable gate array (FPGA) or other programmable logic device (PLD), discrete gate or transistor logic, discrete hardware components, or any combination thereof. Memory 338 (e.g., Figure 2 The memory 282 in the memory can store data and / or program code used to operate the RF transceiver circuit 300. The controller 336 and / or the memory 338 may include control logic (e.g., complementary metal-oxide-semiconductor (CMOS) logic).

[0052] Although Figures 1 to 3 Wireless communication is provided as an example application in which certain aspects of this disclosure can be implemented to facilitate understanding, but certain aspects described herein can be used in power amplifier circuits in any suitable system of a variety of other suitable systems (e.g., audio systems or other electronic systems).

[0053] Example power amplifier with robustness and improved linearity

[0054] As noted above, PA 318 can be used to amplify signals (e.g., RF signals) before they are transmitted by antenna 306. One issue with some PA circuits is that they may suffer from breakdown and / or failure of circuit components when operating under certain conditions. Specifically, large voltage swings across the power devices (e.g., transistors) of such PAs can degrade the PA's robustness, leading to partial failure. In a reference example, where the voltage standing wave ratio (VSWR) is 10:1, the common collector voltage (VCC) (also known as the supply voltage) is +5V, the temperature is 25 degrees Celsius (°C), the power input is between -30 dBm and 10 dBm, and the temperature is -20°C or -40°C, for some PAs, the transistor collector-emitter voltage (V... CE The swing may exceed the maximum permissible voltage (e.g., >13 volts (V)).

[0055] In some cases, impedance matching can be used to improve the robustness of a power amplifier (PA). However, achieving impedance matching may involve incorporating additional matching networks, which can increase area overhead, making this approach less than ideal in terms of cost and area. Therefore, in cost-sensitive, compact PA designs, the power and efficiency of the PA are often compromised to meet PA robustness targets (or specifications). This can result in PAs with lower performance (e.g., higher current consumption, poorer efficiency, reduced power, etc.).

[0056] Another issue with some PA circuits is that the nonlinear effects of the PA can degrade its performance. Specifically, a nonlinear phase or amplitude-to-phase modulation (AM / PM) response across power can be a cause of error vector magnitude (EVM) degradation in the PA / RFFE. High EVM degradation can affect the PA's ability to meet certain wireless standard specifications. For example, large peak-to-average power ratio (PAPR) waveforms such as Modulation and Decoding Scheme (MCS) Index 11 (MCS 11) may have a target linear / flat AM-PM response (e.g., zero or negligible AM-PM shift over a certain output power (Pout) range) to produce the desired EVM response that meets certain wireless standard specifications, such as WiFi 7 / 8 specifications.

[0057] Therefore, for large modulation bandwidth signals (e.g., 480 MHz and above) in certain wireless systems (e.g., WiFi 8 and 6G cellular systems), nonlinear AM-PM response can be detrimental and lead to severe EVM degradation. Furthermore, while digital predistortion (DPD) can be used to correct this nonlinearity, DPD consumes significant power and, in some cases, may still be insufficient to correct the nonlinearity to meet the target EVM associated with wireless communication standards.

[0058] To address the aforementioned technical challenges, certain aspects of this document describe a power amplifier (PA) circuit that is partially implemented via a transformer and inductively coupled to one or more coils of that transformer. For example, as described below, such a PA circuit may include, but is not limited to, a first transistor coupled to an amplifier and inductively coupled to a first coil of the transformer, and a second transistor coupled to an amplifier and inductively coupled to a second coil of the transformer. In some aspects, the first and second coils may be embedded within the transformer (e.g., the transformer windings may surround the first and second coils). In other aspects, the first and second coils may be partially embedded within the transformer (e.g., the transformer windings may surround only a portion of the first and second coils). In still other aspects, the first and second coils may be located outside the transformer (e.g., the first and second coils may be located outside the transformer windings).

[0059] Implementing the PA circuit described herein by coupling multiple coils to the transformer via a transformer and an inductor improves the linearity and robustness of the PA without significantly affecting the inherent performance of the transformer. For example, as an illustrative and non-limiting example, inductive coupling to the first / second coil of the transformer has a negligible effect on the transformer's losses and quality factor. Furthermore, implementing the PA circuit described herein by coupling multiple coils to the transformer via a transformer and an inductor improves the EVM, for example by providing a favorable impedance that remains constant over the desired power to achieve a linear phase / AM-PM response.

[0060] Figure 4A An example amplifier circuit 400A, which can be used to amplify a signal for transmission according to various aspects of this disclosure, is illustrated. In some aspects, amplifier circuit 400A can be used to implement DA (such as...) Figure 3 DA 316) and PA (such as Figure 3 PA 318).

[0061] As shown in the figure, the amplifier circuit 400A includes, but is not limited to, a first-stage amplifier circuit 410 (also known as a driver stage), a transformer 420, a second-stage amplifier circuit 430 (also known as an amplifier stage), and a transformer 440. In some respects, the first-stage amplifier circuit 410 can be used to implement DA (such as...) Figure 3 (DA 316), and the second-stage amplifier circuit 430 can be used to implement PA (such as Figure 3 PA 318).

[0062] The first-stage amplifier circuit 410 is configured to amplify the signal transmitted via the input node (RF) in the first amplification stage. in The received signal (e.g., an RF signal) is transmitted. Here, the first-stage amplifier circuit 410 includes a transistor Q1 (implemented as a negative-positive-negative (NPN) transistor), an inductor Lsh, a resistor R1, a variable resistor R2, and capacitors C1 and C2. The inductor Lsh is coupled in parallel to the RF signal. in and reference potential node V ref1 (For example, ground) between. Capacitor element C1 is coupled to RF. in A resistor R1 is coupled between the base of transistor Q1 and the supply voltage V, and can be used to isolate the DC component of the input signal while allowing the AC component of the input signal to pass to transistor Q1. bb1 Between the collector of transistor Q1 and the terminal of capacitor C1, the variable resistor R2 and capacitor C2 are coupled (in series). The emitter of transistor Q1 is coupled to the reference potential node V. ref2 .

[0063] The output of the first-stage amplifier circuit 410 is coupled to the input of the second-stage amplifier circuit 430 via a transformer 420, which is implemented as a coupling transformer. Transformer 420 can be configured as a balun transformer. As shown, transformer 420 includes a primary winding (L... pri ) and secondary winding (L sec The primary winding (L) of transformer 420 pri Coupled with the supply voltage V cc1 Between the collector of transistor Q1.

[0064] The first-stage amplifier circuit 410 provides a single-ended output to the transformer 420, and the transformer 420 can be configured to convert the single-ended output from the first-stage amplifier circuit 410 into a double-ended signal, which is then provided to the second-stage amplifier circuit 430. As shown, the first terminal of the secondary winding (Lsec) of the transformer 420 is coupled to the transistor Q via a capacitor element C4. 2p The base of the transformer 420, and the second terminal of the secondary winding (Lsec) of the transformer 420 is coupled to the transistor Q via capacitor C3. 2n The base of the transistor. Resistor R4 is coupled to transistor Q. 2p The base and supply voltage V bb2 Between, and the resistor element R3 is coupled to transistor Q. 2n The base and supply voltage V bb2 Between. Transistor Q 2p emitter and transistor Q 2n The emitter is coupled to the reference potential node V. ref3 (For example, ground). Transistor Q 2p The collector is connected to the capacitor element C mut Coupled to transistor Q 2n The collector.

[0065] The second-stage amplifier circuit 430 is configured to transmit power via transistor Q. 2p and Q 2n The amplified signal output from the first-stage amplifier circuit 410 is amplified and provides a two-terminal output to the transformer 440. For example, the first terminal of the primary winding (Lpri) of the transformer 440 is coupled to the transistor Q. 2p The collector of the transformer 440, and the second terminal of the primary winding (Lpri) of the transformer 440, are coupled to the transistor Q. 2n The collector. The center tap of the primary winding (Lpri) of transformer 440 can be coupled to the supply voltage V. cc2 .

[0066] Transformer 440 can be configured to convert the double-ended output from the second-stage amplifier circuit 430 into a single-ended output. This single-ended output can be provided to antenna 406 via the secondary winding (Lsec) of transformer 440, which is coupled between antenna 406 and reference potential node V. ref3 Between. Antenna 406 can be similar to Figure 3 Antenna 306.

[0067] In some aspects, the amplifier circuit 400A may also include two coils (coil L1 and coil L2) inductively coupled to the transformer 440. In some aspects, the two coils (L1 and L2) may be embedded inside the transformer 440, such as... Figure 4AAs depicted. That is, at least one winding of transformer 440 may wrap around two coils (L1 and L2). The first terminal of coil L1 is connected via capacitor element C. p Coupled to transistor Q 2p The collector of the coil, and the second terminal of the coil L1 is coupled to the reference potential node V. ref5 The first terminal of coil L2 is connected to capacitor C. n Coupled to transistor Q 2n The collector of the coil L2, and the second terminal of the coil L2 is coupled to the reference potential node V. ref4 Coils L1 and L2 and capacitor C p and C n It can be found in transistor Q 2p and Q 2n The collector terminal creates low impedance at the second harmonic frequency and can be used in transistor Q. 2p and Q 2n The collector terminal creates a high impedance at the third harmonic frequency. This is achieved by coils L1 and L2 and capacitor C. p and C n The added harmonic content can manipulate the collector voltage and current waveforms, resulting in a significant voltage (V) change. CE The swing is reduced, which in turn improves the robustness of the amplifier circuit 400A.

[0068] In some respects, coils L1 and L2 can be implemented inside transformer 440 without increasing the total area of ​​transformer 440. That is, the area of ​​transformer 440 implemented with coils L1 and L2 can be the same as the area of ​​transformer 440 implemented without coils L1 and L2.

[0069] In some respects, transformer 440 may have a laminated structure, wherein the transformer core comprises stacked layers of magnetic material within the laminate (referred to herein as laminated layers). In such respects, coils L1 and L2 can be implemented within the laminated structure without increasing the total area of ​​transformer 440. Figures 5A to 5D Different views illustrating an example laminated structure of a transformer 440 according to certain aspects of this disclosure are shown, wherein multiple coils L1 and L2 are embedded within the transformer 440. Specifically, Figure 5A A top view of a laminated structure according to certain aspects of this disclosure is illustrated. Figure 5B Another top view of a laminated structure according to certain aspects of this disclosure is illustrated. Figure 5C Perspective views of laminated structures according to certain aspects of this disclosure are illustrated, and Figure 5D Cross-sectional views of laminated structures according to certain aspects of this disclosure are illustrated.

[0070] like Figures 5A to 5CAs shown, coils L1 and L2 are surrounded by the primary winding (Lpri) and secondary winding (Lsec) of transformer 440. Figure 5D As shown, in some aspects, transformer 440, together with coils L1 and L2, may be arranged in a multilayer laminated structure. In some aspects, the multilayer laminated structure may include six layers. In such aspects, the secondary winding (Lsec) of transformer 440 may be arranged in layer L1, the primary winding (Lpri) of transformer 440 may be arranged in layer L2, and coils L1 and L2 may be arranged in layer L5. Layer L6 may be a ground layer (or a plane). It should be noted that, for clarity, in Figure 5B The layers including the primary / secondary windings of transformer 440 are not shown in order to clearly depict coils L1 and L2.

[0071] It should be noted that, although Figure 5C The primary / secondary windings of transformer 440, as well as coils L1 and L2, are depicted disposed in certain layers; however, in some aspects, the primary / secondary windings of transformer 440, as well as coils L1 and L2, may be disposed in other layers. For example, in some aspects, the primary winding (Lpri) of transformer 440 may be disposed in layers L1 and L3, the secondary winding (Lsec) of transformer 440 may be disposed in layer L2, and coils L1 and L2 may be disposed in layer L5. In other examples, the primary / secondary windings of transformer 440 may be implemented in layers L1 to L3, and coils L1 and L2 may be disposed in layer L4. In such aspects, the multilayer laminated structure may not include layer L5 (e.g., layer L4 may be adjacent to the ground plane (or plane)).

[0072] In some respects, implementing coils L1 and L2 in the manner described herein can result in a negligible effect of the coils on the Q factor / losses of transformer 440. For example, implementing coils L1 and L2 in layer L5, which is far from the main transformer layers (L1, L2, and L3), can result in less magnetic and capacitive coupling between the coils and the primary / secondary windings of transformer 440. Furthermore, by implementing coils L1 and L2 in layer L5, adjacent to the ground plane (e.g., layer L6), magnetic radiation from coils L1 and L2 can avoid interfering with the transformer coils and can terminate in the ground plane. Additionally, in some respects, coils L1 and L2 can have a thin metal width (relative to the metal width used for the main transformer layers), resulting in less magnetic and capacitive coupling with transformer 440.

[0073] Return to reference Figure 4A It should be noted that, although Figure 4A The example illustrates the implementation of coils L1 and L2 within transformer 440; however, in some respects, coils L1 and L2 can be implemented elsewhere within the amplifier circuit. For example, Figure 4BAn example amplifier circuit 400B according to certain aspects of this disclosure is illustrated, wherein coils L1 and L2 are located outside of transformer 440. Specifically, in amplifier circuit 400B, coils L1 and L2 may be located outside the primary winding (Lpri) and secondary winding (Lsec) of transformer 440. In another example, Figure 4C An example amplifier circuit 400C according to certain aspects of this disclosure is illustrated, wherein coils L1 and L2 are partially implemented within a transformer 440. Here, in amplifier circuit 400C, the primary winding (Lpri) and / or the secondary winding (Lsec) may only wrap around a portion of coil L1 and a portion of coil L2.

[0074] Furthermore, it will be understood that amplifier architectures other than those illustrated can be used to implement amplifier circuits 400A, 400B, and 400C. For example, a positive-negative-positive (PNP) transistor can replace an NPN transistor in amplifier circuits 400A, 400B, and 400C. In another example, a field-effect transistor (FET) (with a p-type metal-oxide-semiconductor (PMOS) implementation or an n-type metal-oxide-semiconductor (NMOS) implementation) can replace a bipolar junction transistor (BJT) in amplifier circuits 400A, 400B, and 400C.

[0075] Example Operation

[0076] Figure 6 This is a flowchart of an example operation 600 for amplifying a signal for transmission according to certain aspects of this disclosure. Operation 600 may be performed, for example, by an amplifier circuit (e.g., amplifier circuit 400A, amplifier circuit 400B, or amplifier circuit 400C) of a transceiver (e.g., transceiver 232 and / or transceiver 254).

[0077] Operation 600 may typically involve using an amplifier (e.g., second-stage amplifier circuit 430) of an amplifier circuit at block 602 to amplify a signal (e.g., an RF signal) for transmission.

[0078] Operation 600 may also involve coupling the amplified signal to an antenna (e.g., antenna 406) at block 604 via a transformer (e.g., transformer 440) of the amplifier circuit. The transformer may be coupled to the output of the amplifier. A first coil (e.g., coil L1) of the amplifier circuit may be coupled to a first transistor (e.g., transistor Q) of the amplifier circuit. 2p And it is inductively coupled to the transformer. The second coil of the amplifier circuit (e.g., coil L2) can be coupled to the second transistor of the amplifier (e.g., transistor Q). 2n And it is inductively coupled to the transformer.

[0079] Example

[0080] In addition to the various aspects described above, specific combinations of these aspects are also within the scope of this disclosure, some of which are detailed below:

[0081] Aspect 1: An amplifier circuit comprising: an amplifier configured to amplify a signal for wireless transmission, the amplifier including a first transistor and a second transistor; a transformer coupled to an output of the amplifier; a first coil coupled to the first transistor and inductively coupled to the transformer; and a second coil coupled to the second transistor and inductively coupled to the transformer.

[0082] Aspect 2: The amplifier circuit according to aspect 1, wherein the windings of the transformer surround the first coil and the second coil.

[0083] Aspect 3: The amplifier circuit according to aspect 1, wherein the windings of the transformer only wrap around a portion of the first coil and a portion of the second coil.

[0084] Aspect 4: The amplifier circuit according to aspect 1, wherein the first coil and the second coil are located outside the windings of the transformer.

[0085] Aspect 5: An amplifier circuit according to any one of Aspects 1 to 4, wherein: the transformer includes a primary winding and a secondary winding inductively coupled to the primary winding; the transformer is disposed in a plurality of layers; the primary winding of the transformer is disposed in at least a first layer of the plurality of layers; and the secondary winding of the transformer is disposed in a second layer of the plurality of layers.

[0086] Aspect 6: The amplifier circuit according to aspect 5, wherein the first layer is adjacent to the second layer.

[0087] Aspect 7: An amplifier circuit according to any one of Aspects 5 to 6, wherein the first coil and the second coil are disposed in the third layer of the plurality of layers.

[0088] Aspect 8: The amplifier circuit according to aspect 7, wherein at least a fourth of the plurality of layers is disposed between the first layer and the third layer.

[0089] Aspect 9: The amplifier circuit according to aspect 7, wherein at least a fourth of the plurality of layers is disposed between the second layer and the third layer.

[0090] Aspect 10: The amplifier circuit according to aspect 7, wherein the third layer is adjacent to the ground plane among the plurality of layers.

[0091] Aspect 11: An amplifier circuit according to any one of Aspects 1 to 10, wherein: the first coil is coupled to the collector or drain of the first transistor via a first capacitor element; and the second coil is coupled to the collector or drain of the second transistor via a second capacitor element.

[0092] Aspect 12: The amplifier circuit according to aspect 11, wherein the collector or drain of the first transistor is coupled to the collector or drain of the second transistor via a third capacitor element.

[0093] Aspect 13: An amplifier circuit according to any one of Aspects 1 to 12, wherein the transformer includes a primary winding and a secondary winding inductively coupled to the primary winding, wherein the primary winding is coupled to the output terminal of the amplifier, and wherein the secondary winding is coupled to the output node of the amplifier circuit.

[0094] Aspect 14: A method comprising: amplifying a signal via an amplifier circuit for transmission; and coupling the amplified signal to an antenna via a transformer of the amplifier circuit, wherein (i) the transformer is coupled to an output of the amplifier, (ii) a first coil of the amplifier circuit is coupled to a first transistor of the amplifier and inductively coupled to the transformer, and (iii) a second coil of the amplifier circuit is coupled to a second transistor of the amplifier and inductively coupled to the transformer.

[0095] Aspect 15: The method according to aspect 14, wherein the windings of the transformer surround the first coil and the second coil.

[0096] Aspect 16: According to the method of aspect 14, the windings of the transformer only wrap around a portion of the first coil and a portion of the second coil.

[0097] Aspect 17: According to the method of aspect 14, wherein the first coil and the second coil are located outside the windings of the transformer.

[0098] Aspect 18: A wireless device comprising: an antenna; and an amplifier circuit including an output coupled to the antenna, the amplifier circuit including: an amplifier configured to amplify a signal for wireless transmission, the amplifier including a first transistor and a second transistor; a transformer coupled to the output of the amplifier; a first coil coupled to the first transistor and inductively coupled to the transformer; and a second coil coupled to the second transistor and inductively coupled to the transformer.

[0099] Aspect 19: The wireless device according to aspect 18, wherein the windings of the transformer surround the first coil and the second coil.

[0100] Aspect 20: The wireless device according to aspect 18, wherein the windings of the transformer only wrap around a portion of the first coil and a portion of the second coil.

[0101] The above description provides examples and is not intended to limit the scope, applicability, or examples set forth in the claims. Changes may be made to the function and arrangement of the elements discussed without departing from the scope of this disclosure. Various processes or components may be omitted, substituted, or added as appropriate in various examples. For example, the described method may be performed in a different order than described, and various steps may be added, omitted, or combined. Furthermore, features described in some examples may be combined in some other examples. For example, any number of aspects set forth herein may be used to implement an apparatus or practice. Moreover, the scope of this disclosure is intended to cover such apparatus or methods practiced using structures, functionalities, or structures and functions other than or different from the various aspects of this disclosure set forth herein. It should be understood that any aspect of this disclosure disclosed herein may be embodied by one or more elements of these claims. The word “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any aspect described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other aspects.

[0102] The various operations of the methods described above can be performed by any suitable component capable of performing the corresponding function. This component can include various hardware and / or software components and / or modules, including but not limited to circuits, application-specific integrated circuits (ASICs), or processors. Generally, in the presence of operations illustrated in the figures, these operations can have corresponding components plus functional components. For example, a component for amplifying a signal for transmission can include an amplifier, such as... Figure 3 DA 316, Figure 3 PA 318, Figure 4A , Figure 4B or Figure 4C The first stage amplifier circuit 410, or Figure 4A , Figure 4B or Figure 4C The second-stage amplifier circuit 430. Components for coupling the amplified signal to the antenna may include a transformer, such as... Figure 4A , Figure 4B or Figure 4C Transformer 440.

[0103] As used in this article, the phrase “at least one of the items” refers to any combination of these items, including a single member. As an example, “at least one of a, b, or c” is intended to cover: a, b, c, ab, ac, bc, and abc, as well as any combination with multiple identical elements (e.g., aa, aaa, aab, aac, abb, acc, bb, bbb, bbb, cc, and ccc, or any other ordering of a, b, and c).

[0104] As used herein, “processor,” “at least one processor,” or “one or more processors” generally refers to a single processor configured to perform one or more operations, or multiple processors configured to collectively perform one or more operations. In the case of multiple processors, the execution of one or more operations may be divided among different processors, but one processor may perform multiple operations, and multiple processors may collectively perform a single operation. Similarly, “memory,” “at least one memory,” or “one or more memory” generally refers to a single memory configured to store data and / or instructions, or multiple memories configured to collectively store data and / or instructions.

[0105] The methods disclosed herein include one or more steps or actions for implementing the described methods. The steps and / or actions of the methods may be interchanged without departing from the scope of the claims. In other words, unless a specific order of steps or actions is specified, the order and / or use of a particular step and / or action may be modified without departing from the scope of the claims.

[0106] It should be understood that the claims are not limited to the precise configurations and components illustrated above. Various modifications, variations, and alterations may be made to the arrangement, operation, and details of the methods and apparatus described above without departing from the scope of the claims.

Claims

1. An amplifier circuit, the amplifier circuit comprising: An amplifier configured to amplify a signal for wireless transmission, the amplifier including a first transistor and a second transistor; A transformer, which is coupled to the output of the amplifier; A first coil, which is coupled to the first transistor and inductively coupled to the transformer; and The second coil is coupled to the second transistor and inductively coupled to the transformer.

2. The amplifier circuit of claim 1, wherein the transformer windings surround the first coil and the second coil.

3. The amplifier circuit of claim 1, wherein the windings of the transformer only wrap around a portion of the first coil and a portion of the second coil.

4. The amplifier circuit according to claim 1, wherein the first coil and the second coil are located outside the windings of the transformer.

5. The amplifier circuit according to claim 1, wherein: The transformer includes a primary winding and a secondary winding inductively coupled to the primary winding; The transformer is arranged in multiple layers; The primary winding of the transformer is disposed in at least the first layer of the plurality of layers; and The secondary winding of the transformer is disposed in the second layer of the plurality of layers.

6. The amplifier circuit of claim 5, wherein the first layer is adjacent to the second layer.

7. The amplifier circuit of claim 5, wherein the first coil and the second coil are disposed in the third layer of the plurality of layers.

8. The amplifier circuit of claim 7, wherein at least a fourth layer of the plurality of layers is disposed between the first layer and the third layer.

9. The amplifier circuit of claim 7, wherein at least a fourth layer of the plurality of layers is disposed between the second layer and the third layer.

10. The amplifier circuit of claim 7, wherein the third layer is adjacent to the ground layer among the plurality of layers.

11. The amplifier circuit according to claim 1, wherein: The first coil is coupled to the collector or drain of the first transistor via a first capacitor element; and The second coil is coupled to the collector or drain of the second transistor via a second capacitor element.

12. The amplifier circuit of claim 11, wherein the collector or drain of the first transistor is coupled to the collector or drain of the second transistor via a third capacitor element.

13. The amplifier circuit of claim 1, wherein the transformer includes a primary winding and a secondary winding inductively coupled to the primary winding, wherein the primary winding is coupled to the output terminal of the amplifier, and wherein the secondary winding is coupled to the output node of the amplifier circuit.

14. A method comprising: The signal is amplified by an amplifier circuit for transmission; as well as The amplified signal is coupled to the antenna via the transformer of the amplifier circuit, wherein (i) the transformer is coupled to the output of the amplifier, (ii) the first coil of the amplifier circuit is coupled to the first transistor of the amplifier and inductively coupled to the transformer, and (iii) the second coil of the amplifier circuit is coupled to the second transistor of the amplifier and inductively coupled to the transformer.

15. The method of claim 14, wherein the windings of the transformer surround the first coil and the second coil.

16. The method of claim 14, wherein the windings of the transformer only wrap around a portion of the first coil and a portion of the second coil.

17. The method of claim 14, wherein the first coil and the second coil are located outside the windings of the transformer.

18. A wireless device, the wireless device comprising: antenna; and An amplifier circuit, comprising an output terminal coupled to the antenna, the amplifier circuit including: An amplifier configured to amplify a signal for wireless transmission, the amplifier including a first transistor and a second transistor; A transformer, which is coupled to the output of the amplifier; A first coil, coupled to the first transistor and inductively coupled to the transformer; and The second coil is coupled to the second transistor and inductively coupled to the transformer.

19. The wireless device of claim 18, wherein the windings of the transformer surround the first coil and the second coil.

20. The wireless device of claim 18, wherein the windings of the transformer only wrap around a portion of the first coil and a portion of the second coil.

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