A circuit board-based surface etching quality detection system and method

Abstract

This invention belongs to the field of quality inspection technology, and provides a surface etching quality inspection system and method for circuit boards. The method includes: scanning the entire etched circuit board, extracting features such as sidewall roughness and flatness, and establishing a target feature parameter set containing planar roughness data; performing defect feature matching based on the target feature parameter set to obtain effective segments of sawtooth defects, extracting defect geometric features and signal insertion loss features, and constructing a quantitative mapping model; triggering phase shift detection based on the insertion loss prediction value output by the quantitative mapping model, and constructing a defect detection boundary by combining historical detection data; analyzing the distribution bias of defect parameters within the defect detection boundary, and predicting the direction of defect over-standard evolution. The system includes: a feature extraction module, a mapping establishment module, a boundary recognition module, and an evolution analysis module. This invention is beneficial for improving the etching quality of circuit boards and is applicable to circuit board etching quality inspection scenarios.

Description

Technical Field

[0001] This invention belongs to the field of quality inspection technology, specifically a surface etching quality inspection system and method for circuit boards. Background Technology

[0002] As the core carrier of electronic devices, the serrated defects on the sidewalls of the circuit boards after etching are a key issue affecting quality. These defects are caused by process factors such as fluctuations in the concentration of the etching solution, uneven spray pressure, and deviations in temperature control. They not only damage the geometric integrity of the circuits, but also cause problems such as signal distortion and reduced transmission rate by changing the circuit impedance, aggravating the attenuation of electromagnetic energy, or interfering with the timing of signal transmission. Especially in scenarios with stringent requirements for signal integrity, such as high-frequency communication and precision control, even tiny serrated defects can lead to equipment failure.

[0003] Existing technologies frequently result in false positives and false negatives in inspection. For example, some geometrical defects on a circuit board may appear to have jagged edges (such as sharp peaks), but if they have little impact on signal transmission, they are easily judged as unqualified by existing geometrical inspection methods, leading to excessive rework and increased production costs. Secondly, some minor jagged defects in geometrical shapes (such as gentle wavy shapes) may actually cause significant signal timing shifts, and are easily judged as qualified by existing inspection methods, leading to false negatives. Subsequently, after the circuit board is assembled, faults such as signal interruption and data packet loss may occur, requiring disassembly and repair, which significantly increases equipment maintenance costs and downtime risks.

[0004] Therefore, the present invention provides a surface etching quality inspection system and method based on circuit boards. Summary of the Invention

[0005] In order to overcome the shortcomings of the prior art, at least one technical problem raised in the background art is solved.

[0006] The technical solution adopted by this invention to solve its technical problem is:

[0007] A method for inspecting the surface etching quality of circuit boards, comprising:

[0008] A full-area 3D topography scan was performed on the etched board to extract the planar roughness data of the sidewall topography from the scan data, and a target feature parameter set containing the planar roughness data was established.

[0009] Based on the target feature parameter group, defect feature matching processing is performed to obtain the effective segment of the sawtooth defect. Based on the effective segment of the sawtooth defect, the defect geometric features of the sawtooth are extracted. At the same time, the signal insertion loss features of the circuit board are extracted. A quantitative mapping model is constructed based on the defect geometric features and loss features.

[0010] Based on the predicted value of signal insertion loss output by the quantitative mapping model, the phase offset is detected by combining the geometric features of sawtooth defects to obtain the mean time offset, and the defect detection boundary of the circuit board is constructed based on the mean time offset.

[0011] Defect parameters and core geometric features of the effective segment of the sawtooth defect are extracted. The distribution bias of the defect parameters within the defect detection boundary is analyzed. Based on the distribution bias and the core geometric feature type, the evolutionary dominance of the defect parameters is determined, and the over-standard evolution direction of the defect parameters is predicted.

[0012] Furthermore, the method for extracting the planar roughness data is as follows:

[0013] Independent point cloud data of the sidewalls in the line area are extracted based on the scan data, and a local coordinate system of the sidewalls is established based on the independent point cloud data.

[0014] Based on the local coordinate system along the length of the line, the single sidewall of the line is divided into N1 measurement segments, and N2 discrete points are extracted in each measurement segment. The least squares method is used to fit the baseline, and the average vertical distance from all discrete points in each measurement segment to the baseline is calculated to obtain the arithmetic mean roughness.

[0015] Based on the independent point cloud data of each sidewall of the line measurement section, an ideal sidewall plane is constructed using a plane fitting algorithm, and plane error analysis is performed to obtain the flatness error.

[0016] Flatness error and arithmetic mean roughness are used as plane roughness data.

[0017] Furthermore, the plane error analysis is performed as follows:

[0018] For each sidewall, select N2 sidewall points from the independent point cloud data, construct an ideal sidewall plane using a plane fitting algorithm, calculate the vertical distance from the N2 sidewall points to the ideal plane, define the vertical distance as the plane error of each sidewall point, and define the maximum vertical distance among the N2 sidewall points as the flatness error of the measurement segment.

[0019] Furthermore, the defect feature matching process is performed as follows:

[0020] A feature template library of typical sawtooth defects is constructed. The similarity between the target feature parameter group of each measurement segment and each standard sawtooth defect feature template in the typical sawtooth defect feature template library is calculated using the interval conformity-Euclidean distance fusion method to obtain the similarity value between the measurement segment and each standard template.

[0021] The similarity value of a single parameter is obtained by multiplying the Euclidean distance and the interval conformity coefficient. The similarity values ​​of all parameters of a single measurement segment are summed to obtain the similarity value of the measurement segment.

[0022] Similarity comparison processing is performed based on the similarity value of the measured segments to identify suspected sawtooth defect segments that match the template;

[0023] Continuous matching verification is performed on the suspected sawtooth defect segments matched with the template to obtain the valid sawtooth defect segments.

[0024] Furthermore, the quantitative mapping model is constructed as follows:

[0025] Extract the defect geometric features of the effective segment of the sawtooth defect and the loss features of the signal insertion loss of the circuit board, and construct a defect loss parameter set that includes the defect geometric features and loss features.

[0026] A quantitative mapping model is constructed based on the support vector regression algorithm. The defect loss parameter set is input into the quantitative mapping model for model training, thereby realizing the construction of the quantitative mapping model.

[0027] Furthermore, the loss characteristics are extracted in the following way:

[0028] The measured values ​​of signal insertion loss of the effective segment of the sawtooth defect at different frequency points and the measured values ​​of the preset reference area were obtained.

[0029] Based on measured values ​​at different frequency points, the mean insertion loss, peak insertion loss, and frequency sensitivity of the effective segment of the sawtooth defect in different frequency bands are extracted, and the mean insertion loss, peak insertion loss, and frequency sensitivity are used as loss characteristics of signal insertion loss.

[0030] Furthermore, the phase shift detection is performed as follows:

[0031] Obtain the test phase and reference phase of the effective segment of the sawtooth defect;

[0032] Calculate the difference between the test phase and the reference phase within the same monitoring period to obtain the phase offset, and calculate the average phase offset of the effective segment of a single sawtooth defect within all monitoring periods to obtain the average phase offset.

[0033] Based on the wave velocity formula and phase-time correlation characteristics of signal transmission, a quantitative conversion relationship between phase offset and time offset is constructed.

[0034] By quantitatively converting the input phase offset of the average phase offset to the temporal offset, the average temporal offset of the effective segment of the sawtooth defect is obtained.

[0035] Furthermore, the defect detection boundary is constructed as follows:

[0036] The system obtains the average time offset and predicted signal insertion loss of the effective segment of sawtooth defects in the historical inspection data of the circuit board, as well as the inspection status label of the pass / fail judgment result of the circuit board in actual use.

[0037] The sample dataset is constructed by integrating the temporal offset average and the predicted value of signal insertion loss of all effective segments of sawtooth defects in historical detection data with the detection status label.

[0038] Based on the detection status labels, qualified samples in the sample dataset are distinguished. The predicted values ​​of the mean time offset and the signal insertion loss of qualified samples are fitted with probability distributions. The Kolmogorov-Smirnov test is used to verify whether the probability distribution fitting results of the predicted values ​​of the mean time offset and the signal insertion loss satisfy a normal distribution.

[0039] If the normal distribution is satisfied, calculate the qualified confidence intervals of the predicted values ​​of the mean time offset and the signal insertion loss respectively;

[0040] Construct a collaborative constraint boundary between insertion loss and timing offset, obtain a preset loss threshold, and combine the qualified confidence interval and the collaborative constraint boundary to determine the defect detection boundary of the circuit board.

[0041] Furthermore, the distribution bias is obtained in the following way:

[0042] Obtain the upper limit of the average temporal offset in the defect detection boundary and the upper limit of the predicted value of the signal insertion loss. Calculate the difference between the upper limit of the predicted value of the signal insertion loss and the upper limit of the predicted value of the signal insertion loss to obtain the upper limit difference of the loss.

[0043] Calculate the difference between the average time offset and the upper limit of the average time offset to obtain the upper limit difference of the time offset;

[0044] The ratio of the timing upper limit difference to the loss upper limit difference is calculated to obtain the bias coefficient of the effective segment of a single sawtooth defect;

[0045] Calculate the average bias coefficient of all effective segments of sawtooth defects to obtain the bias determination coefficient;

[0046] The bias of the defect parameters within the defect detection boundary is determined based on the bias determination coefficient.

[0047] A surface etching quality inspection system based on circuit boards includes the following modules:

[0048] Feature extraction module: used to perform full-domain 3D topography scanning on the entire etched board, extract planar roughness data of the sidewall topography from the scan data, and establish a target feature parameter set containing the planar roughness data;

[0049] Mapping establishment module: Based on the target feature parameter group, defect feature matching processing is performed to obtain the effective segment of the sawtooth defect. Based on the effective segment of the sawtooth defect, the defect geometric features of the sawtooth are extracted. At the same time, the signal insertion loss features of the circuit board are extracted. A quantitative mapping model is constructed based on the defect geometric features and loss features.

[0050] Boundary recognition module: Based on the predicted value of signal insertion loss output by the quantitative mapping model, the phase offset is detected by combining the geometric features of sawtooth defects to obtain the mean time offset, and the defect detection boundary of the circuit board is constructed based on the mean time offset.

[0051] Evolution Analysis Module: Used to extract defect parameters and core geometric features of the effective segment of the sawtooth defect, analyze the distribution bias of defect parameters within the defect detection boundary, determine the evolutionary dominance of defect parameters based on the distribution bias and the type of core geometric features, and predict the out-of-standard evolution direction of defect parameters.

[0052] The beneficial effects of this invention are as follows:

[0053] 1. The line sidewall is divided into measurement segments based on a local coordinate system. The arithmetic mean roughness is calculated by fitting the baseline using the least squares method, and the flatness error is calculated by the plane fitting algorithm. This helps to capture subtle morphological changes in the sidewall and provides feature data that closely matches the actual etching state for subsequent defect identification. A sawtooth defect feature template library is constructed, and the core feature parameter group associated with the template is calibrated based on historical etching defect data and corresponding electrical performance test results. This enables targeted association between defect features and etching process anomalies, reducing misjudgments of non-target defects. The similarity between the target feature parameter group of the measurement segment and the template is calculated using the interval conformity-Euclidean distance fusion method, improving the accuracy of effective segment selection for sawtooth defects. The basic geometric parameters, micro-geometric parameters, and signal insertion loss features of different frequency bands of the effective segments of sawtooth defects are extracted. A quantitative mapping model is constructed based on the support vector regression algorithm to establish the correlation between defect geometry and signal insertion loss.

[0054] 2. A vector network analyzer is used to collect the test phase of the effective segment of the sawtooth defect and the reference phase of the defect-free co-source circuit area. The phase offset within the same monitoring period is calculated and averaged. Combined with the wave velocity formula and phase-time correlation characteristics, it is converted into the average time offset, which helps to supplement the analysis dimension of the defect's impact on signal timing and reduce the focus on signal insertion loss while ignoring the impact of time offset on signal transmission stability. Based on historical test data, a sample dataset is constructed. The average time offset and predicted insertion loss of qualified samples are subjected to probability distribution fitting and KS test. This helps to adapt to the changes in signal transmission characteristics caused by differences in substrate and process of different batches of circuit boards, and improves the adaptability of defect judgment to actual use requirements.

[0055] 3. Extracting bias judgment coefficients to determine the distribution bias of defect parameters within the defect detection boundary is beneficial for assessing the current risk emphasis of defects in terms of loss and timing. By dividing the evolution dominance by the ratio of average tooth height to average tooth pitch, and combining the distribution bias to predict the direction of defect overshooting, it is possible to identify the possibility of subsequent overshooting of insertion loss or timing offset when the defect is not currently overshooting, providing direction for taking early intervention measures. Based on the prediction results of different evolution directions, key adjustment parameters are focused when assisting in subsequent process optimization, reducing the probability of the same type of defect recurring and lowering the risk of circuit board failure due to subsequent overshooting of defects. Attached Figure Description

[0056] The invention will now be further described with reference to the accompanying drawings.

[0057] Figure 1 This is a flowchart illustrating the steps of a surface etching quality inspection method for circuit boards according to an embodiment of the present invention.

[0058] Figure 2 This is a flowchart of the quantitative mapping model constructed in this invention;

[0059] Figure 3 This is a flowchart illustrating whether the phase deviation detection signal is triggered in this invention;

[0060] Figure 4 This is a flowchart illustrating how the present invention determines the dominant evolutionary tendency corresponding to core geometric features;

[0061] Figure 5 This is a module architecture diagram of a circuit board-based surface etching quality inspection system according to an embodiment of the present invention. Detailed Implementation

[0062] To make the technical means, creative features, objectives and effects of this invention easier to understand, the invention will be further described below in conjunction with specific embodiments.

[0063] Example 1

[0064] Please see Figure 1 As shown in the figure, the surface etching quality inspection method for circuit boards according to an embodiment of the present invention includes the following steps:

[0065] S1. Perform a full-area 3D topography scan on the etched board, extract the planar roughness data of the sidewall topography from the scan data, and establish a target feature parameter group containing the planar roughness data.

[0066] The method for performing full-area 3D topography scanning on the etched board is as follows:

[0067] Preferably, before performing a full-area 3D topography scan on the entire etched circuit board, the circuit board is pre-treated. The pre-treated circuit board is then scanned in collaboration with a line laser 3D sensor and an XY motion platform, and the entire circuit board is scanned according to the system's preset scanning path to obtain a three-dimensional point cloud model of the entire circuit board.

[0068] It should be noted that the pretreatment of the entire circuit board includes: cleaning the surface of the entire circuit board to remove etching residues, dust and other interfering substances;

[0069] The 3D point cloud model is denoised, and a grayscale threshold region segmentation algorithm is used to identify the line regions and non-line regions of the 3D point cloud model.

[0070] Those skilled in the art will understand that the method of using grayscale threshold region segmentation algorithm to identify line regions and non-line regions of 3D point cloud model is as follows: first, the grayscale values ​​of each point in the 3D point cloud model are collected synchronously; by statistically analyzing the grayscale range of line and non-line sample regions and combining it with the Otsu algorithm, the optimal grayscale threshold is determined; then, points in the point cloud whose grayscale values ​​are within the threshold range are classified as line regions, and points that exceed the threshold range are classified as non-line regions.

[0071] Define the identification rules for the sidewalls of the line, and extract the independent point cloud data of the sidewalls in the line area based on the line area in the 3D point cloud model and in combination with the identification rules;

[0072] Preferably, the method for defining the identification rules of the circuit sidewall is as follows: starting from the top edge of the circuit board, extending downward to the bottom of the circuit where it meets the circuit board substrate, extracting the point cloud subsets of the two sides of the circuit as independent point cloud data for the left and right sides of the circuit.

[0073] The independent point cloud data is normalized by coordinate processing. A local coordinate system for the sidewall is established with the line length direction as the X-axis and the perpendicular to the circuit board substrate as the Z-axis.

[0074] Based on the local coordinate system along the length of the line, the single sidewall of the line is divided into N1 measurement segments, and N2 discrete points are extracted in each measurement segment. The least squares method is used to fit the baseline, and the average vertical distance from all discrete points in each measurement segment to the baseline is calculated to obtain the arithmetic mean roughness.

[0075] Preferably, N1=10, N2=100;

[0076] For example, the method for fitting a baseline is as follows: if there are 100 discrete points within a measurement segment, with coordinates as... X represents the length direction, and Z represents the height direction. A straight line (baseline) is fitted using the least squares method. The formula is: Z = aX + b (a is the slope, and b is the intercept). When fitting, the sum of the squares of the vertical distances from 100 points to this straight line is minimized so that the baseline can represent the ideal flatness of each sidewall.

[0077] Based on the independent point cloud data of each sidewall of the line measurement section, an ideal sidewall plane is constructed using a plane fitting algorithm;

[0078] For each sidewall, select N2 sidewall points from the independent point cloud data, construct an ideal sidewall plane using a plane fitting algorithm, calculate the vertical distance from the N2 sidewall points to the ideal plane, define the vertical distance as the plane error of each sidewall point, and define the maximum vertical distance among the N2 sidewall points as the flatness error of the measurement segment.

[0079] Those skilled in the art will understand that the method of constructing an ideal sidewall plane using a plane fitting algorithm is as follows: the discrete three-dimensional point cloud data of the actual sidewall is first denoised (outliers, duplicates and measurement noise are removed), and then a plane equation (ex+fy+gz+h=0) is established based on the least squares method. The optimization objective is to minimize the sum of squared distances from all discrete points (x, y) to the target plane. The optimal solutions for the coefficients e, f, g, and h in the equation are then solved, and finally, an ideal plane that best fits the actual sidewall shape is generated.

[0080] Flatness error and arithmetic mean roughness are used as plane roughness data;

[0081] Obtain the measured Z-axis height difference between adjacent discrete points within the measurement segment, as well as the index of consecutive adjacent measurement segments within the measurement segment;

[0082] The target feature parameter set is extracted segment by segment from N measurement segments. The target feature parameter set includes the arithmetic mean roughness of the measurement segment, the maximum flatness error of all sidewall points in the measurement segment, the measured Z-axis height difference of adjacent discrete points in the measurement segment, and the index of consecutive adjacent measurement segments of the measurement segment.

[0083] S2. Based on the target feature parameter group, defect feature matching processing is performed to obtain the effective segment of the sawtooth defect. Based on the effective segment of the sawtooth defect, the defect geometric features of the sawtooth are extracted. At the same time, the loss features of the signal insertion loss of the circuit board are extracted. Based on the defect geometric features and loss features, a quantitative mapping model from defect geometric parameters to signal insertion loss is constructed.

[0084] The method for performing defect feature matching is as follows:

[0085] Preferably, a feature template library of typical serrated defects is constructed, which includes standard serrated defect feature templates for abnormal etchant concentration, uneven spray pressure, and etch temperature fluctuation.

[0086] Each standard sawtooth defect feature template is associated with a core feature parameter set, which includes a preset roughness range (e.g., peak-shaped sawtooth template: 0.5μm-1.2μm, wavy sawtooth template: 0.3μm-0.8μm), a preset flatness error threshold (e.g., peak-shaped sawtooth template: ≥0.4μm, wavy sawtooth template: ≥0.2μm), a preset Z-axis height difference range between adjacent points (e.g., sawtooth template: 0.8μm-1.5μm, wavy sawtooth template: 0.5μm-1.0μm), and a preset number of continuous measurement segments (≥3).

[0087] It should be noted that the core feature parameter set of the standard sawtooth defect feature template is calibrated based on historical etching defect data and corresponding electrical performance test results; the historical etching defect data needs to be selected from valid data within the past 12 months, under the same batch of substrates and etching processes (excluding abnormal fluctuation data); the electrical performance test needs to collect signal insertion loss and timing offset data of the corresponding defect segment, and determine the correlation weight between defect parameters (such as roughness and flatness error) and electrical performance through linear regression analysis, thereby calibrating the core parameter range of each standard template;

[0088] The similarity between the target feature parameter group of each measurement segment and each standard sawtooth defect feature template in the typical sawtooth defect feature template library is calculated using the interval conformity-Euclidean distance fusion method to obtain the similarity value between the measurement segment and each standard template.

[0089] For example, the similarity calculation method is as follows: First, set an interval compliance coefficient for each core parameter (roughness, flatness error, Z-axis height difference): If the measured value of the parameter falls within the preset interval of the template (e.g., roughness within 0.5-1.2μm, flatness error ≥0.4μm), the interval compliance coefficient is set to 1; if the measured value of the parameter exceeds the preset interval of the template (e.g., roughness 0.4μm < 0.5μm, flatness error 0.3μm < 0.4μm), the interval compliance coefficient is set to 0.3;

[0090] Normalize the measured values ​​of each parameter and the points within the template interval that are closest to the measured values ​​(e.g., 0.4 μm corresponds to the lower limit of the interval of 0.5 μm, and 1.3 μm corresponds to the upper limit of the interval of 1.2 μm), and calculate the normalized Euclidean distance d.

[0091] The similarity value of a single parameter is obtained by multiplying the Euclidean distance and the interval conformity coefficient. The similarity values ​​of all parameters of a single measurement segment are summed to obtain the similarity value of the measurement segment.

[0092] A similarity threshold is preset. If the similarity value between the measured segment and any standard sawtooth defect feature template is greater than or equal to the preset similarity threshold, the measured segment is determined to be a sawtooth defect segment that is suspected of matching the template.

[0093] It should be noted that, firstly, 50-100 sets of standard sawtooth defect segments (such as spike-shaped and wavy) and normal line segments of different types from historical inspections are selected as samples. The similarity values ​​between the two types of samples and the feature template library are calculated using the interval conformity-Euclidean distance fusion method. The similarity threshold that can distinguish between defective and normal samples is found (e.g., the maximum similarity of normal samples is 0.6 and the minimum similarity of defective samples is 0.7, so 0.65 is taken). Then, the false judgment rate of this threshold is verified to be ≤5% using new samples. Finally, this threshold is set as the pre-set similarity threshold.

[0094] For suspected sawtooth defect segments matched with templates, continuous matching verification is performed. If N3 or more consecutive adjacent measurement segments match the same standard sawtooth defect feature template, and the target feature parameter group (arithmetic mean roughness, maximum flatness error, and Z-axis height difference between adjacent points) of the continuous measurement segments are all within the preset range of the corresponding standard template, the continuous measurement segments are determined to be valid sawtooth defect segments.

[0095] Preferably, N3=3;

[0096] Geometric features of sawtooth defects are extracted based on the effective segment of the sawtooth defect. At the same time, loss features of signal insertion loss of the circuit board are extracted. A quantitative mapping model from defect geometric parameters to signal insertion loss is constructed based on the defect geometric features and loss features, which is used to output the predicted value of signal insertion loss of the effective segment of the sawtooth defect.

[0097] like Figure 2 As shown, the method for constructing the quantitative mapping model is as follows:

[0098] S201. Extract the defect geometric features of the effective segment of the sawtooth defect and the loss features of the signal insertion loss of the circuit board, and construct a defect loss parameter set that includes the defect geometric features and loss features.

[0099] Preferably, the total length of the sawtooth defect, the average tooth height, the maximum tooth height, and the average tooth spacing of the effective segment of the sawtooth defect are extracted;

[0100] It should be noted that the total length of the defect is obtained by multiplying the number of measurement segments contained in the effective segment of the sawtooth defect by the length of a single measurement segment; the average tooth height is obtained by calculating the average Z-axis height difference between adjacent points of all measurement segments in the effective segment of the sawtooth defect.

[0101] Calculate the average distance from the tip of an adjacent sawtooth tooth to the center of the depression along the length of the track to obtain the average tooth spacing.

[0102] The total length of the effective segment of the sawtooth defect, the average tooth height, the maximum tooth height, and the average tooth spacing are used as the basic geometric parameters.

[0103] Simultaneously, the independent point cloud data of the effective segment of the sawtooth defect are fitted twice to extract the included angle between the two inclined sides of the top of the sawtooth protrusion as the inter-tooth angle.

[0104] Extract the angle between the serrated side and the ideal sidewall plane to obtain the sidewall inclination angle;

[0105] It should be noted that, firstly, based on the local coordinate system X-axis (line length direction) and Z-axis (perpendicular to the substrate direction), the local maximum value point of the Z-axis coordinate in the effective segment point cloud of the sawtooth defect is identified as the sawtooth peak, and the local minimum value point of the Z-axis coordinate between two adjacent peaks is identified as the depression center. Then, the distance between the adjacent peaks and the depression center in the X-axis direction is calculated, and the arithmetic mean of all adjacent distances is taken as the average tooth spacing.

[0106] When extracting the inter-tooth angle by performing secondary fitting on the independent point cloud data of the effective segment of the sawtooth defect, the following is added: For a single sawtooth protrusion, select the point cloud data extending from the peak to the depression on both sides of its top (take 10-15 discrete points on each side), use the least squares method to fit the straight lines of the point clouds on both sides respectively, and then calculate the angle between the two fitted straight lines using the vector dot product formula, which is the inter-tooth angle of the sawtooth. Take the arithmetic mean of the inter-tooth angles of all sawtooths as the inter-tooth angle of the effective segment of the defect.

[0107] The ideal sidewall plane is the plane constructed by the plane fitting algorithm in step S1. Select the point cloud data of a single sawtooth side along the Z-axis (take 8-12 discrete points), use the least squares method to fit the straight line of the side, calculate the angle between the fitted straight line and the normal vector of the ideal sidewall plane, and then subtract the angle from 90° to obtain the tilt angle of a single sawtooth side. Take the arithmetic mean of the tilt angles of all sawtooth sides as the sidewall tilt angle of the effective segment of the defect.

[0108] The ratio of the projected area of ​​the sawtooth defect in the vertical section of the sidewall to the area of ​​the ideal sidewall section is obtained.

[0109] The inter-tooth angle, the sidewall inclination angle, and the defect area ratio are used as the micro-geometric parameters of the defect.

[0110] Microscopic geometric parameters and fundamental geometric parameters are used as defect geometric features;

[0111] The measured values ​​of signal insertion loss at different frequency points of the effective segment of the sawtooth defect were extracted using a vector network analyzer, as well as the measured values ​​of the preset reference area.

[0112] Based on measured values ​​at different frequency points, the mean insertion loss, peak insertion loss, and loss frequency sensitivity of the effective segment of the sawtooth defect in different frequency bands are extracted.

[0113] It should be noted that the loss frequency sensitivity is the slope of the change in insertion loss as a linear fit with frequency.

[0114] The mean insertion loss, peak insertion loss, and frequency sensitivity of the loss are used as loss characteristics of signal insertion loss.

[0115] The loss characteristics and defect geometric characteristics of signal insertion loss are normalized by Min-Max to construct a defect loss parameter set that includes loss characteristics and defect geometric characteristics.

[0116] S202. Construct a quantitative mapping model based on the support vector regression algorithm, input the defect loss parameter set into the quantitative mapping model for model training, realize the construction of the quantitative mapping model, and output the predicted value of signal insertion loss.

[0117] It should be noted that the training data must include at least 500 sets of measured data on 'defect geometric features - signal insertion loss' for different defect morphologies; model training is terminated when the root mean square error (RMSE) is ≤0.05; the training set and validation set are divided in an 8:2 ratio, and the validation set accuracy must be ≥90% to determine that the model construction is complete;

[0118] Understandably, the purpose of constructing a quantitative mapping model is:

[0119] Objective 1: To establish a quantitative correlation between defect geometric parameters and signal insertion loss, enabling direct prediction of signal insertion loss levels through defect geometric characteristics and quantifying the impact of etching defects on the electrical performance of circuit boards;

[0120] Objective 2: Based on the predicted signal insertion loss value output by the model, determine whether phase shift detection needs to be initiated. Only when the predicted value reaches or exceeds the preset loss threshold can subsequent phase shift detection be triggered, reducing redundant detection of all defects and improving the targeting and efficiency of detection.

[0121] Example 2

[0122] like Figure 1 As shown in the embodiment of the present invention, a method for detecting the surface etching quality of a circuit board further includes the following steps:

[0123] S3. Based on the predicted value of signal insertion loss output by the quantitative mapping model, the phase offset is detected by combining the geometric features of the sawtooth defect to obtain the mean time offset, and the defect detection boundary of the circuit board is constructed based on the mean time offset.

[0124] like Figure 3As shown, the predicted value of the signal insertion loss of the effective segment of the sawtooth defect is based on the output of the quantitative mapping model. The predicted value of the insertion loss is compared with the preset loss threshold. If the predicted value of the insertion loss is higher than or equal to the preset loss threshold, the phase deviation detection signal is triggered.

[0125] If the predicted value of the insertion loss is lower than the preset loss threshold, the predicted value of the insertion loss will be continuously monitored.

[0126] It should be noted that those skilled in the art set the target preset loss threshold based on the application scenario of the circuit board (such as consumer electronics, automotive equipment, communication base stations), operating frequency, and signal integrity determined in the design phase.

[0127] If the phase deviation detection signal is triggered, the vector network analyzer detection platform is used to apply a test signal matching the actual working scenario to the effective segment of the sawtooth defect within the monitoring period to obtain the test phase of the effective segment of the sawtooth defect.

[0128] Meanwhile, within the monitoring period, a defect-free area of ​​the same source circuit on the circuit board is selected as the phase reference benchmark to obtain the reference phase of the reference area.

[0129] Calculate the difference between the test phase and the reference phase within the same monitoring period to obtain the phase offset, and calculate the average phase offset of the effective segment of a single sawtooth defect within all monitoring periods to obtain the average phase offset.

[0130] Based on the wave velocity formula and phase-time correlation characteristics of signal transmission, a quantitative conversion relationship between phase offset and time offset is constructed.

[0131] The quantitative conversion relationship between the input phase offset of the average phase offset and the time offset is used to obtain the average time offset of the effective segment of the sawtooth defect.

[0132] For example, through the formula: A quantitative conversion relationship between phase offset and time offset is established, and the average time offset is obtained. For wave speed, For the signal wavelength, Mean phase shift; wave velocity The signal wavelength λ is preset according to the characteristics of the circuit board substrate (e.g., FR-4 substrate preset v=1.5×10^8m / s); the signal wavelength λ is calculated according to the test signal frequency f (λ=v / f, the test signal frequency must be consistent with the actual operating frequency of the circuit board, e.g., high-frequency communication circuit board takes f=1GHz).

[0133] In particular, a single characteristic frequency (e.g., center frequency) is used when testing the phase.

[0134] The system obtains the average time offset and predicted signal insertion loss of the effective segment of sawtooth defects in the historical inspection data of the circuit board, as well as the inspection status label of the pass / fail judgment result (pass or fail) in the actual use of the circuit board.

[0135] The sample dataset is constructed by integrating the temporal offset average and the predicted value of signal insertion loss of all effective segments of sawtooth defects in historical detection data with the detection status label.

[0136] Based on the detection status labels, qualified samples in the sample dataset are distinguished. The predicted values ​​of the mean time offset and the signal insertion loss of qualified samples are fitted with probability distributions. The Kolmogorov-Smirnov test (KS test) is used to verify whether the probability distribution fitting results of the predicted values ​​of the mean time offset and the signal insertion loss satisfy the normal distribution.

[0137] If the normal distribution is satisfied, calculate the qualified confidence intervals of the predicted values ​​of the mean time offset and the signal insertion loss respectively;

[0138] If the distribution does not conform to a normal distribution, then existing nonparametric statistical methods are used to determine the quantile boundaries.

[0139] Construct a collaborative constraint boundary between insertion loss and timing offset, obtain a preset loss threshold, and combine the qualified confidence interval and the collaborative constraint boundary to determine the defect detection boundary of the circuit board;

[0140] For example, the method for determining the defect detection boundary of a circuit board is as follows: if it conforms to a normal distribution, the mean of the timing offset is marked as τ, and the predicted value of the signal insertion loss is marked as L;

[0141] The mean of L is denoted as Standard deviation is marked as The mean of τ is denoted as Standard deviation is denoted as ; Two-sided quantiles of the standard normal distribution (e.g.) When =0.05, =1.96), the qualified confidence interval for L is The qualified confidence interval for τ is ;

[0142] Set the preset loss threshold and mark it as Construct collaborative constraint boundaries: and ;

[0143] in, The two-sided quantiles are based on a standard normal distribution, and the qualified confidence intervals use a 95% confidence level (α=0.05).

[0144] It is understandable that the purpose of constructing defect detection boundaries on a circuit board is:

[0145] Function 1: By integrating the acceptable confidence interval of the average timing offset and the constraint range of the insertion loss prediction value, the permissible boundary of defects in electrical performance is quantitatively defined, reducing the misjudgment of qualified or unqualified based solely on geometric shape, or the omission of defects with slight geometric features but excessive electrical impact, ensuring that the judgment results conform to the signal transmission requirements in the actual use of the circuit board.

[0146] Secondly, it provides a basis for analyzing the current risk focus of defects. By observing the distribution of defect parameters (average timing offset, predicted insertion loss) within the boundary (such as whether it is close to the upper limit of insertion loss or the upper limit of timing offset), the risk bias of the currently qualified defects in the electrical performance dimension can be clearly identified, which helps to accurately judge the possible direction of defects exceeding the standard in the future.

[0147] S4. Extract the defect parameters and core geometric features of the effective segment of the sawtooth defect, analyze the distribution bias of the defect parameters within the defect detection boundary, determine the evolution dominance of the defect parameters based on the distribution bias and the type of core geometric features, and predict the over-standard evolution direction of the defect parameters.

[0148] Preferably, the method for extracting defect parameters and core geometric features of the effective segment of the serrated defect and analyzing the distribution bias of the defect parameters within the defect detection boundary is as follows:

[0149] The predicted value of signal insertion loss and the average time offset are used as defect parameters;

[0150] The average tooth height and average tooth spacing in S2 are used as the core geometric features;

[0151] Obtain the upper limit of the average temporal offset in the defect detection boundary and the upper limit of the predicted value of the signal insertion loss. Calculate the difference between the predicted value of the signal insertion loss and the upper limit of the predicted value of the signal insertion loss (i.e., calculate the upper limit of the predicted value of the signal insertion loss minus the predicted value of the signal insertion loss) to obtain the upper limit difference of the loss.

[0152] Calculate the difference between the average time offset and the upper limit of the average time offset to obtain the upper limit difference of the time offset;

[0153] The loss upper limit difference and the timing upper limit difference are respectively normalized by percentage based on their respective thresholds;

[0154] It should be noted that the upper limit difference of loss and the upper limit difference of timing are empirical values ​​calibrated by professionals in the field based on data environments with timing units in nanoseconds (ns) and loss units in decibels (dB).

[0155] The ratio of the timing upper limit difference to the loss upper limit difference is calculated to obtain the bias coefficient of the effective segment of a single sawtooth defect;

[0156] Calculate the mean bias coefficient of all effective segments of sawtooth defects to obtain the bias determination coefficient K;

[0157] The distribution bias of defect parameters within the defect detection boundary is determined based on the bias determination coefficient.

[0158] For example, if K≥2, it is determined to be significantly close to the insertion loss constraint side; if 0.5<K<2, it is determined to be slightly close to the insertion loss constraint side; if K≤0.5, it is determined to be significantly close to the timing offset constraint side; if 0.5<1 / K<2, it is determined to be slightly close to the timing offset constraint side; if K∈[0.8,1.2], it is determined to be in the intermediate redundancy region.

[0159] Among them, the method for determining the evolutionary dominance of defect parameters based on distribution bias combined with core geometric feature type is as follows:

[0160] Preferably, the ratio R of the average tooth height to the average tooth pitch is calculated;

[0161] like Figure 4 As shown, the evolutionary dominance corresponding to the core geometric features is determined by dividing the ratio R into large and small ranges.

[0162] The specific classification method is as follows: if the ratio R of the average tooth height to the average tooth spacing is greater than 1.2, the evolutionary dominance of the core geometric feature is determined to be loss-type, that is, this type of geometric feature is prone to causing the signal insertion loss to exceed the standard; if the ratio R of the average tooth height to the average tooth spacing is between 0.8 and 1.2, the evolutionary dominance is determined to be neutral-type, that is, the evolutionary tendency of loss-type and time-series type is similar; if the ratio R of the average tooth height to the average tooth spacing is less than 0.8, the evolutionary dominance is determined to be time-series type, that is, this type of geometric feature is prone to causing the time-series offset to exceed the standard.

[0163] It should be noted that this ratio range is determined based on the correspondence between geometric features and defect excess types in historical detection data. The larger the ratio, the sharper and denser the serrations, which is more likely to exacerbate electromagnetic energy attenuation; the smaller the ratio, the smoother and looser the serrations, which is more likely to disrupt signal transmission timing.

[0164] The method for predicting the direction of defect parameter exceedance evolution is as follows:

[0165] Preferably, combining the results of the distribution bias and the determination of the evolution dominance, the direction of the excess evolution is predicted according to the following rules: if the evolution dominance is loss-type, and the distribution bias is significantly closer to the insertion loss constraint side or slightly closer to the insertion loss constraint side, the defect parameter is determined to evolve in the direction of insertion loss excess.

[0166] If the evolution is time-series dominant and the distribution is significantly closer to the time-series offset constraint side or slightly closer to the time-series offset constraint side, the defect parameter is determined to evolve preferentially towards the direction of exceeding the time-series offset limit.

[0167] If the evolutionary dominance is neutral and the distribution is biased towards the intermediate redundant region, it is determined that the defect parameter may have a dual-parameter collaborative over-standard evolution.

[0168] If the evolutionary dominance is loss-type but the distribution is biased towards the temporal offset constraint side, or if the evolutionary dominance is temporal-type but the distribution is biased towards the insertion loss constraint side, the evolutionary dominance shall be used as the standard, and the potential over-limit risk of another dimension shall be marked at the same time.

[0169] For example, if the ratio of average tooth height to average tooth pitch is 1.3 (evolution-dominant loss type) and the bias determination coefficient is 2.1 (significantly close to the insertion loss constraint side), it is predicted to be a preferential evolution towards insertion loss exceeding the limit; if the ratio of average tooth height to average tooth pitch is 0.7 (evolution-dominant time-series type) and the bias determination coefficient is 0.4 (significantly close to the time-series offset constraint side), it is predicted to be a preferential evolution towards time-series offset exceeding the limit; if the ratio of average tooth height to average tooth pitch is 1.0 (evolution-dominant neutral type) and the bias determination coefficient is 1.0 (intermediate redundancy region), it is predicted to be a dual-parameter cooperative exceeding the limit evolution.

[0170] Example 3

[0171] Please see Figure 5 As shown in the embodiment of the present invention, a surface etching quality inspection system based on a circuit board includes the following modules:

[0172] Feature extraction module: used to perform full-domain 3D topography scanning on the entire etched board, extract planar roughness data of the sidewall topography from the scan data, and establish a target feature parameter set containing the planar roughness data;

[0173] Mapping establishment module: Based on the target feature parameter group, defect feature matching processing is performed to obtain the effective segment of the sawtooth defect. Based on the effective segment of the sawtooth defect, the defect geometric features of the sawtooth are extracted. At the same time, the loss features of the signal insertion loss of the circuit board are extracted. Based on the defect geometric features and loss features, a quantitative mapping model from defect geometric parameters to signal insertion loss is constructed.

[0174] Boundary recognition module: Based on the predicted value of signal insertion loss output by the quantitative mapping model, the phase offset is detected by combining the geometric features of sawtooth defects to obtain the mean time offset, and the defect detection boundary of the circuit board is constructed based on the mean time offset.

[0175] Evolution Analysis Module: Used to extract defect parameters and core geometric features of the effective segment of the sawtooth defect, analyze the distribution bias of defect parameters within the defect detection boundary, determine the evolutionary dominance of defect parameters based on the distribution bias and the type of core geometric features, and predict the out-of-standard evolution direction of defect parameters.

[0176] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the present invention as claimed. The scope of protection of the present invention is defined by the appended claims and their equivalents.

Claims

1. A method for inspecting the surface etching quality of circuit boards, characterized in that: include: A full-area 3D topography scan was performed on the etched board to extract the planar roughness data of the sidewall topography from the scan data, and a target feature parameter set containing the planar roughness data was established. Based on the target feature parameter group, defect feature matching processing is performed to obtain the effective segment of the sawtooth defect. Based on the effective segment of the sawtooth defect, the defect geometric features of the sawtooth are extracted. At the same time, the signal insertion loss features of the circuit board are extracted. A quantitative mapping model is constructed based on the defect geometric features and loss features. Based on the predicted value of signal insertion loss output by the quantitative mapping model, the phase offset is detected by combining the geometric features of sawtooth defects to obtain the mean time offset, and the defect detection boundary of the circuit board is constructed based on the mean time offset. Defect parameters and core geometric features of the effective segment of the sawtooth defect are extracted. The distribution bias of the defect parameters within the defect detection boundary is analyzed. Based on the distribution bias and the core geometric feature type, the evolutionary dominance of the defect parameters is determined, and the over-standard evolution direction of the defect parameters is predicted.

2. The method for detecting surface etching quality of a circuit board according to claim 1, characterized in that: The method for extracting the planar roughness data is as follows: Independent point cloud data of the sidewalls in the line area are extracted based on the scan data, and a local coordinate system of the sidewalls is established based on the independent point cloud data. Based on the local coordinate system along the length of the line, the single sidewall of the line is divided into N1 measurement segments, and N2 discrete points are extracted in each measurement segment. The least squares method is used to fit the baseline, and the average vertical distance from all discrete points in each measurement segment to the baseline is calculated to obtain the arithmetic mean roughness. Based on the independent point cloud data of each sidewall of the line measurement section, an ideal sidewall plane is constructed using a plane fitting algorithm, and plane error analysis is performed to obtain the flatness error. Flatness error and arithmetic mean roughness are used as plane roughness data.

3. The method for detecting surface etching quality of a circuit board according to claim 2, characterized in that: The plane error analysis is performed as follows: For each sidewall, select N2 sidewall points from the independent point cloud data, construct an ideal sidewall plane using a plane fitting algorithm, calculate the vertical distance from the N2 sidewall points to the ideal plane, define the vertical distance as the plane error of each sidewall point, and define the maximum vertical distance among the N2 sidewall points as the flatness error of the measurement segment.

4. The method for detecting surface etching quality of a circuit board according to claim 1, characterized in that: The defect feature matching process is performed as follows: A feature template library of typical sawtooth defects is constructed. The similarity between the target feature parameter group of each measurement segment and each standard sawtooth defect feature template in the typical sawtooth defect feature template library is calculated using the interval conformity-Euclidean distance fusion method to obtain the similarity value between the measurement segment and each standard template. The similarity value of a single parameter is obtained by multiplying the Euclidean distance and the interval conformity coefficient. The similarity values ​​of all parameters of a single measurement segment are summed to obtain the similarity value of the measurement segment. Similarity comparison processing is performed based on the similarity value of the measured segments to identify suspected sawtooth defect segments that match the template; Continuous matching verification is performed on the suspected sawtooth defect segments matched with the template to obtain the valid sawtooth defect segments.

5. The method for detecting surface etching quality of a circuit board according to claim 1, characterized in that: The quantitative mapping model is constructed as follows: Extract the defect geometric features of the effective segment of the sawtooth defect and the loss features of the signal insertion loss of the circuit board, and construct a defect loss parameter set that includes the defect geometric features and loss features. A quantitative mapping model is constructed based on the support vector regression algorithm. The defect loss parameter set is input into the quantitative mapping model for model training, thereby realizing the construction of the quantitative mapping model.

6. The method for detecting surface etching quality of a circuit board according to claim 5, characterized in that: The method for extracting the loss characteristics is as follows: The measured values ​​of signal insertion loss of the effective segment of the sawtooth defect at different frequency points and the measured values ​​of the preset reference area were obtained. Based on measured values ​​at different frequency points, the mean insertion loss, peak insertion loss, and frequency sensitivity of the effective segment of the sawtooth defect in different frequency bands are extracted, and the mean insertion loss, peak insertion loss, and frequency sensitivity are used as loss characteristics of signal insertion loss.

7. The method for detecting surface etching quality of a circuit board according to claim 1, characterized in that: The phase shift detection is performed as follows: Obtain the test phase and reference phase of the effective segment of the sawtooth defect; Calculate the difference between the test phase and the reference phase within the same monitoring period to obtain the phase offset, and calculate the average phase offset of the effective segment of a single sawtooth defect within all monitoring periods to obtain the average phase offset. Based on the wave velocity formula and phase-time correlation characteristics of signal transmission, a quantitative conversion relationship between phase offset and time offset is constructed. By quantitatively converting the input phase offset of the average phase offset to the temporal offset, the average temporal offset of the effective segment of the sawtooth defect is obtained.

8. The method for detecting surface etching quality of a circuit board according to claim 1, characterized in that: The defect detection boundary is constructed as follows: The system obtains the average time offset and predicted signal insertion loss of the effective segment of sawtooth defects in the historical inspection data of the circuit board, as well as the inspection status label of the pass / fail judgment result of the circuit board in actual use. The sample dataset is constructed by integrating the temporal offset average and the predicted value of signal insertion loss of all effective segments of sawtooth defects in historical detection data with the detection status label. Based on the detection status labels, qualified samples in the sample dataset are distinguished. The predicted values ​​of the mean time offset and the signal insertion loss of qualified samples are fitted with probability distributions. The Kolmogorov-Smirnov test is used to verify whether the probability distribution fitting results of the predicted values ​​of the mean time offset and the signal insertion loss satisfy a normal distribution. If the normal distribution is satisfied, calculate the qualified confidence intervals of the predicted values ​​of the mean time offset and the signal insertion loss respectively; Construct a collaborative constraint boundary between insertion loss and timing offset, obtain a preset loss threshold, and combine the qualified confidence interval and the collaborative constraint boundary to determine the defect detection boundary of the circuit board.

9. The method for detecting surface etching quality of a circuit board according to claim 1, characterized in that: The distribution bias is obtained as follows: Obtain the upper limit of the average temporal offset in the defect detection boundary and the upper limit of the predicted value of the signal insertion loss. Calculate the difference between the upper limit of the predicted value of the signal insertion loss and the upper limit of the predicted value of the signal insertion loss to obtain the upper limit difference of the loss. Calculate the difference between the average time offset and the upper limit of the average time offset to obtain the upper limit difference of the time offset; The ratio of the timing upper limit difference to the loss upper limit difference is calculated to obtain the bias coefficient of the effective segment of a single sawtooth defect; Calculate the average bias coefficient of all effective segments of sawtooth defects to obtain the bias determination coefficient; The bias of the defect parameters within the defect detection boundary is determined based on the bias determination coefficient.

10. A surface etching quality inspection system based on a circuit board, used to implement the surface etching quality inspection method based on a circuit board according to any one of claims 1-9, characterized in that: Includes the following modules: Feature extraction module: used to perform full-domain 3D topography scanning on the entire etched board, extract planar roughness data of the sidewall topography from the scan data, and establish a target feature parameter set containing the planar roughness data; Mapping establishment module: Based on the target feature parameter group, defect feature matching processing is performed to obtain the effective segment of the sawtooth defect. Based on the effective segment of the sawtooth defect, the defect geometric features of the sawtooth are extracted. At the same time, the signal insertion loss features of the circuit board are extracted. A quantitative mapping model is constructed based on the defect geometric features and loss features. Boundary recognition module: Based on the predicted value of signal insertion loss output by the quantitative mapping model, the phase offset is detected by combining the geometric features of sawtooth defects to obtain the mean time offset, and the defect detection boundary of the circuit board is constructed based on the mean time offset. Evolution Analysis Module: Used to extract defect parameters and core geometric features of the effective segment of the sawtooth defect, analyze the distribution bias of defect parameters within the defect detection boundary, determine the evolutionary dominance of defect parameters based on the distribution bias and the type of core geometric features, and predict the out-of-standard evolution direction of defect parameters.

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