Photosensitive current calibration circuit, photosensitive current calibration method, chip and electronic device

Abstract

The application provides a photosensitive current calibration circuit, a photosensitive current calibration method, a chip and an electronic device, and relates to the technical field of light-sensing proximity detection. The circuit comprises: a current sampling circuit for collecting the current of a photosensitive diode and converting it into digital current; a signal processing unit for adjusting the current calibration data in the register by using the dichotomy according to the comparison result of the digital current and the target current, reading the current digital-to-analog conversion calibration data and the duty cycle representation data in the current calibration data, sending the current digital-to-analog conversion calibration data to the IDAC for conversion into calibration current, converting the duty cycle representation data into an injection pulse signal and then sending it to the injection switch to adjust the duty cycle of the calibration current compensation to the photosensitive diode, and determining the target current digital-to-analog conversion calibration data and the target duty cycle representation data based on the current calibration data finally stored in the register after the iteration number of the dichotomy is completed. The adjustment accuracy and the adjustment range are improved, and the hardware resources are saved.

Description

Technical Field

[0001] This application relates to the field of optical proximity detection technology, and in particular to a photocurrent calibration circuit, a photocurrent calibration method, a chip, and an electronic device. Background Technology

[0002] Optical proximity detection is a detection technology used to detect the approach of objects. It can sense information such as the distance, direction and position of objects and can be applied to fields such as autonomous driving, robotics, and smart homes, with a wide range of applications.

[0003] Optical proximity detection chips typically integrate hardware calibration modules for ambient light, dark current, and crosstalk, working in conjunction with calibration algorithms to achieve calibration functionality. The calibration algorithm employs coarse adjustment using current compensation from a current digital-to-analog converter (IDAC), and fine adjustment using control of the IDAC injection unit's duty cycle. During calibration, the current sampled from the photodiode is compared to a set target value. Based on the comparison result, the compensation current of the IDAC is adjusted, thereby controlling the photodiode current to successively approach the set target value, completing the calibration. However, this method can only adjust the IDAC, resulting in limited adjustment accuracy. Summary of the Invention

[0004] This application provides a photocurrent calibration circuit, a photocurrent calibration method, a chip, and an electronic device to solve the problem that the calibration process of photocurrent detection in the prior art can only adjust IDAC, resulting in limited adjustment accuracy.

[0005] In a first aspect, this application provides a photosensitive current calibration circuit, including a current sampling circuit, a signal processing unit, a current digital-to-analog converter, and an injection switch; The input terminal of the current sampling circuit is used to connect to the cathode of the photodiode. The current sampling circuit is used to collect the current of the photodiode and convert the current into a digital current. The signal processing unit is configured to compare the digital current with a set target current to obtain a first comparison result. Then, based on the first comparison result, it adjusts the current calibration data stored in the register using a binary search method. It reads the current digital-to-analog conversion calibration data and duty cycle characterization data from the register, sends the current digital-to-analog conversion calibration data to the current digital-to-analog converter, and converts the duty cycle characterization data into an injection pulse signal and sends it to the injection switch. This process continues until the binary search method iterations are completed. Finally, based on the current calibration data ultimately stored in the register, it determines the target current digital-to-analog conversion calibration data and the target duty cycle characterization data. The current calibration data is formed by concatenating the current digital-to-analog conversion calibration data and the duty cycle characterization data. The current digital-to-analog converter is used to convert the current digital-to-analog conversion calibration data into a calibration current; The injection switch is connected between the output terminal of the current digital-to-analog converter and the input terminal of the current sampling circuit. The injection switch is used to adjust the duty cycle of the calibration current compensated to the photosensitive diode under the control of the injection pulse signal.

[0006] In one optional design, the current calibration data is a binary code; when the signal processing unit adjusts the current calibration data stored in the register using a binary search method based on the first comparison result, it specifically performs the following: If the first comparison result indicates that the digital current is greater than the target current, the current calibration data stored in the register is increased using a binary search method. If the first comparison result indicates that the digital current is less than or equal to the target current, the current calibration data stored in the register is reduced using a binary search method.

[0007] In one optional design, the current calibration data is in binary code, the current digital-to-analog conversion calibration data is concatenated in the high-order bits, and the duty cycle characterization data is concatenated in the low-order bits. The signal processing unit is specifically used to read the target current digital-to-analog conversion bit data of the current calibration data from the register during each binary search iteration to obtain the current digital-to-analog conversion calibration data, and to read the target duty cycle characterization bit data of the current calibration data from the register to obtain the duty cycle characterization data. The target current digital-to-analog conversion bit and the target duty cycle characterization bit are determined based on the set calibration mode, the bit width of the current digital-to-analog conversion calibration data, and the bit width of the duty cycle characterization data.

[0008] In an optional design, when the calibration mode is coarse adjustment mode and the bit width of the current digital-to-analog conversion calibration data is greater than or equal to the bit width of the duty cycle characterization data, the target current digital-to-analog conversion bit is a+1 binary bits starting from the most significant bit of the current calibration data, and the target duty cycle characterization bit is b+1 binary bits truncated from the least significant bit to the most significant bit of the target current digital-to-analog conversion bit. When the calibration mode is coarse adjustment mode and the bit width of the current digital-to-analog conversion calibration data is smaller than the bit width of the duty cycle characterization data, the target current digital-to-analog conversion bits are a+1 binary bits starting from the most significant bit of the current calibration data, and the target duty cycle characterization bits are b+1 binary bits starting from the most significant bit of the current calibration data. Where a represents the most significant bit of the current digital-to-analog conversion calibration data, and a+1 represents the bit width of the current digital-to-analog conversion calibration data; b represents the most significant bit of the duty cycle characterization data, and b+1 represents the bit width of the duty cycle characterization data.

[0009] In an optional design, when the calibration mode is fine-tuning mode, the target current digital-to-analog conversion bits are a+1 binary bits starting from the most significant bit of the current calibration data, and the target duty cycle characterization bits are b+1 binary bits truncated from the least significant bit to the most significant bit of the current calibration data. Where a represents the most significant bit of the current digital-to-analog conversion calibration data, and a+1 represents the bit width of the current digital-to-analog conversion calibration data; b represents the most significant bit of the duty cycle characterization data, and b+1 represents the bit width of the duty cycle characterization data.

[0010] In an optional design, when the calibration mode is coarse adjustment mode, the number of iterations of the bisection method is M; where M is the maximum bit width between the bit width of the current digital-to-analog conversion calibration data and the bit width of the duty cycle characterization data. When the calibration mode is fine-tuning mode, the number of iterations of the binary search method is a+b+1 times; where a represents the highest bit of the current digital-to-analog conversion calibration data and b represents the highest bit of the duty cycle characterization data.

[0011] In an optional design, when the signal processing unit determines the target current digital-to-analog conversion calibration data and the target duty cycle characterization quantity data based on the current calibration data finally stored in the register, it is specifically used for: The current digital-to-analog conversion calibration data read from the final current calibration data stored in the register is sent to the current digital-to-analog converter, and the duty cycle characterization data read from the final current calibration data stored in the register is converted into an injection pulse signal and sent to the injection switch; The digital current sent by the current sampling circuit is compared with the target current to obtain a second comparison result; Based on the current digital-to-analog conversion calibration data and duty cycle characterization data read from the current calibration data finally stored in the register, the target current digital-to-analog conversion calibration data and target duty cycle characterization data are determined according to the second comparison result.

[0012] In one alternative design, the signal processing unit is specifically used for: If the second comparison result is that the digital current is less than or equal to the target current, the current digital-to-analog conversion calibration data and duty cycle characterization data read from the current calibration data finally stored in the register are adjusted based on the set calibration mode to obtain the target current digital-to-analog conversion calibration data and target duty cycle characterization data. If the second comparison result indicates that the digital current is greater than the target current, the current digital-to-analog conversion calibration data and duty cycle characterization data read from the current calibration data finally stored in the register are determined as the target current digital-to-analog conversion calibration data and the target duty cycle characterization data.

[0013] In one optional design, the current calibration data is in binary code; the signal processing unit is specifically used for: When the calibration mode is coarse adjustment mode, the target current digital-to-analog conversion calibration data is obtained by subtracting 1 from the current calibration data finally stored in the register, and the duty cycle characterization data read from the current calibration data finally stored in the register is determined as the target duty cycle characterization data. When the calibration mode is fine-tuning mode, the current digital-to-analog conversion calibration data read from the current calibration data finally stored in the register is determined as the target current digital-to-analog conversion calibration data, and the duty cycle characterization data read from the current calibration data finally stored in the register is subtracted by 1 to obtain the target duty cycle characterization data.

[0014] Secondly, this application provides a photocurrent calibration method, applied to a photocurrent calibration circuit as described in any of the first aspects above; the photocurrent calibration method includes: The digital current sent by the current sampling circuit is compared with the set target current to obtain the first comparison result; Based on the first comparison result, the current calibration data stored in the register is adjusted using the bisection method. The current digital-to-analog conversion calibration data and duty cycle characterization data in the current calibration data are read from the register. The current digital-to-analog conversion calibration data is sent to the current digital-to-analog converter, and the duty cycle characterization data is converted into an injection pulse signal and sent to the injection switch. After the bisection method iteration is completed, the target current digital-to-analog conversion calibration data and target duty cycle characterization data are determined based on the final current calibration data stored in the register. The current calibration data is formed by splicing the current digital-to-analog conversion calibration data and the duty cycle characterization data.

[0015] Thirdly, this application provides a chip including a photocurrent calibration circuit as described in any of the first aspects above.

[0016] Fourthly, this application provides an electronic device including a photocurrent calibration circuit as described in any of the first aspects above, or including a chip as described in the third aspect above.

[0017] Fifthly, this application provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the photocurrent calibration method as described in the second aspect above.

[0018] The photocurrent calibration circuit, photocurrent calibration method, chip, and electronic device provided in this application concatenate current digital-to-analog conversion calibration data and duty cycle characterization data into current calibration data. After receiving the digital current converted from the current of the photodiode by the current sampling circuit, the signal processing unit compares this digital current with a set target current. Then, based on the first comparison result, it adjusts the current calibration data stored in the register using a binary search method. Finally, it reads the current digital-to-analog conversion calibration data and duty cycle characterization data from the register and sends the current digital-to-analog conversion calibration data. The current is converted into a calibration current by a digital-to-analog converter (DAC), and the duty cycle characterization data is converted into an injection pulse signal and sent to the injection switch to adjust the calibration current of the DAC to compensate for the duty cycle of the photodiode. This gradually adjusts the photodiode current to approach the set target value. This process is repeated until the binary search iteration is completed. Then, based on the final current calibration data stored in the register, the target current DAC calibration data and target duty cycle characterization data are determined. Using these target current DAC calibration data and target duty cycle characterization data, the photodiode current can be calibrated more effectively. In this way, by merging the current DAC calibration data and duty cycle characterization data into current calibration data and performing binary search calibration together, the calibration current of the IDAC and the duty cycle of the pulse signal injected to the injection switch can be adjusted simultaneously. Compared with adjusting only the IDAC, the adjustment accuracy is higher and the adjustment range is wider. Moreover, the calibration values ​​of the IDAC and the injection switch are obtained using the same calibration algorithm, which saves hardware resources. Attached Figure Description

[0019] Figure 1 This is a schematic diagram of the photocurrent calibration circuit provided in the embodiments of this application; Figure 2 This is one of the flowcharts illustrating the photocurrent calibration method provided in the embodiments of this application; Figure 3 This is a second schematic flowchart of the photocurrent calibration method provided in the embodiments of this application; Figure 4 This is a schematic flowchart of the overcalibration correction method in the photocurrent calibration method provided in the embodiments of this application. Detailed Implementation

[0020] In this application, "at least one" means one or more, and "more than one" means two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can mean: A alone, A and B simultaneously, or B alone. A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c alone can mean: a alone, b alone, c alone, a combination of a and b, a combination of a and c, a combination of b and c, or a, b, and c. a, b, and c can be single or multiple. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0021] The terms “center,” “longitudinal,” “lateral,” “up,” “down,” “left,” “right,” “front,” and “rear,” etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0022] The terms "connected" and "connected" should be interpreted broadly. For example, in circuit structures, "connected" or "connected" can refer not only to physical connections but also to electrical or signal connections. This could be a direct connection (physical connection) or an indirect connection via at least one intermediate component, as long as the circuit is connected. It could also refer to the internal connection between two components. Similarly, a signal connection can refer to a connection via a circuit or a medium, such as radio waves. Those skilled in the art will understand the specific meaning of these terms in this application based on the specific circumstances.

[0023] Optical proximity detection chips typically integrate hardware calibration modules for ambient light, dark current, and crosstalk, and work with calibration algorithms to achieve calibration functionality. The calibration algorithm uses IDAC current compensation for coarse adjustment and fine-tuning by controlling the duty cycle of the current injected into the IDAC output by the current-to-digital converter injection unit. During calibration, the current collected from the photodiode is compared with a set target value. Based on the comparison result, the compensation current of the IDAC is adjusted, thereby controlling the photodiode current to successively approach the set target value, completing the calibration. However, this method can only adjust the IDAC, resulting in limited adjustment accuracy. Furthermore, introducing fine-tuning with the current-to-digital converter injection unit requires additional resources if a separate duty cycle control algorithm for the current-to-digital converter injection unit is designed.

[0024] Based on this, this application provides a scheme for calibrating photosensitive current. The scheme concatenates the current analog-to-digital conversion calibration data used to adjust the compensation current of the IDAC and the duty cycle characterization data used to adjust the pulse signal injected into the injection switch into current calibration data. Then, a binary search method is used to calibrate the current calibration data, gradually bringing the photodiode current closer to the set target value. Finally, the required target current analog-to-digital conversion calibration data and target duty cycle characterization data are obtained from the final current calibration data, achieving the calibration purpose. This allows for simultaneous adjustment of the IDAC calibration current and the duty cycle of the pulse signal injected into the injection switch. Compared to a scheme that only adjusts the IDAC, this results in higher adjustment accuracy and a wider adjustment range. Furthermore, since the calibration values ​​for the IDAC and the injection switch are obtained using the same calibration algorithm, hardware resources are saved.

[0025] The following is combined Figure 1 The photocurrent calibration circuit provided in the embodiments of this application will be described in detail.

[0026] Figure 1 A schematic diagram of the photocurrent calibration circuit provided in an embodiment of this application is shown. (Refer to...) Figure 1 As shown, the photosensitive current calibration circuit includes a current sampling circuit 11, a signal processing unit 12, a current digital-to-analog converter (IDAC), and an injection switch (IDAC_INJ). The injection switch (IDAC_INJ) is connected between the output terminal of the current digital-to-analog converter (IDAC) and the input terminal of the current sampling circuit 11. The input terminal of the current sampling circuit 11 serves as the input terminal IN of the photosensitive current calibration circuit and is connected to the cathode of the photodiode (PD). The output terminal of the current sampling circuit 11 is connected to the input terminal of the signal processing unit 12. The first output terminal S1 of the signal processing unit 12 is connected to the control input terminal of the current digital-to-analog converter (IDAC), and the second output terminal S2 of the signal processing unit 12 is connected to the injection control terminal of the injection switch (IDAC_INJ).

[0027] The current sampling circuit 11 is used to collect the current of the photodiode PD and convert the current into a digital current.

[0028] Specifically, such as Figure 1 As shown, the current sampling circuit 11 may include an integrating amplifier IA and an analog-to-digital converter ADC. The integrating amplifier IA is used to integrate and amplify the current of the acquired photodiode PD and input the integrated and amplified current into the analog-to-digital converter ADC. The analog-to-digital converter ADC converts the integrated and amplified current into a digital current and inputs the digital current into the signal processing unit 12.

[0029] For example, the integrating amplifier IA can be a charge-transfer integrator amplifier (CITA).

[0030] For example, the analog-to-digital converter (ADC) can be a successive approximation register analog-to-digital converter (SAR ADC).

[0031] The signal processing unit 12 compares the digital current output by the current sampling circuit 11 with the set target current to obtain a first comparison result. Then, based on the first comparison result, it adjusts the current calibration data stored in the register using a binary search method. It then reads the current digital-to-analog conversion calibration data and duty cycle characterization data from the current calibration data in the register. It sends the current digital-to-analog conversion calibration data to the current digital-to-analog converter through the first output terminal S1, and converts the duty cycle characterization data into an injection pulse signal and sends it to the injection switch IDAC_INJ through the second output terminal S2. This process is repeated until the number of binary search iterations is completed. Finally, the target current digital-to-analog conversion calibration data and target duty cycle characterization data are determined based on the current calibration data finally stored in the register.

[0032] For example, the signal processing unit 12 may be a processor or a programmable logic device, etc.

[0033] For example, in the coarse adjustment mode of calibration, the bisection method iterates M times, where M is the maximum bit width between the current digital-to-analog conversion calibration data and the duty cycle characterization data. In the fine adjustment mode of calibration, the bisection method iterates a+b+1 times, where a represents the highest bit of the current digital-to-analog conversion calibration data and b represents the highest bit of the duty cycle characterization data.

[0034] Specifically, assuming the current digital-to-analog converter calibration data IDAC[a:0] has a bit width of a+1 bits and the duty cycle characterization data num[b:0] has a bit width of b+1 bits, in the coarse adjustment calibration mode, if a > b, the number of bisection iterations is a+1; if a < b, the number of bisection iterations is b+1; if a = b, the number of bisection iterations is either a+1 or b+1. In the fine adjustment calibration mode, the number of bisection iterations is a+b+1.

[0035] The target current can be set according to calibration requirements. The current calibration data is composed of current digital-to-analog converter calibration data and duty cycle characterization data. The current digital-to-analog converter calibration data is used to control the calibration current output by the current digital-to-analog converter (IDAC); the duty cycle characterization data is used to control the duty cycle of the injected switch IDAC_INJ.

[0036] Specifically, the duty cycle (Duty) of the injection switch IDAC_INJ can be expressed as Duty = num / clk, where num represents the number of injection pulses injected into the injection switch IDAC_INJ, and clk represents the number of integration cycle clocks of the current sampling circuit 11. In this embodiment, the number of integration cycle clocks clk is fixed, so the duty cycle of the injection switch IDAC_INJ can be controlled by controlling the number of injection pulses num. Therefore, in one embodiment, the number of injection pulses num can be used as the duty cycle representation data. The signal processing unit 12 can convert the duty cycle representation data into an injection pulse signal according to the expression Duty = num / clk and send it to the injection switch IDAC_INJ to control the duty cycle of the injection switch IDAC_INJ. In another embodiment, the duty cycle (Duty) of the injection switch IDAC_INJ can also be directly used as the duty cycle representation data. The signal processing unit 12 can directly generate an injection pulse signal with a duty cycle of Duty and send it to the injection switch IDAC_INJ.

[0037] The current digital-to-analog converter (IDAC) is used to convert the current digital-to-analog conversion calibration data sent by the signal processing unit 12 into a calibration current; the injection switch IDAC_INJ is used to adjust the calibration current output by the current digital-to-analog converter (IDAC) to compensate the duty cycle of the photosensitive diode (PD) under the control of the injection pulse signal sent by the signal processing unit 12.

[0038] In this way, by merging the current digital-to-analog conversion calibration data and the duty cycle characterization data into current calibration data and performing binary calibration together, the calibration current of the IDAC and the duty cycle of the pulse signal injected into the injection switch IDAC_INJ can be adjusted simultaneously. Compared with adjusting only the IDAC, the adjustment accuracy is higher and the adjustment range is wider. Moreover, the calibration values ​​of the IDAC and the injection switch are obtained using the same calibration algorithm, which can save hardware resources.

[0039] For example, current calibration data can be represented in binary code, and correspondingly, current analog-to-digital conversion calibration data and duty cycle characterization data can also be represented in binary code form. When constructing current calibration data, the current analog-to-digital conversion calibration data and duty cycle characterization data can be directly concatenated in binary code, for example, placing the current analog-to-digital conversion calibration data in the high-order bits and the duty cycle characterization data in the low-order bits.

[0040] For example, taking the duty cycle representation data as the number of injected pulses *num*, assuming the current digital-to-analog converter calibration data IDAC[a:0] has a bit width of *a+1* bits and the duty cycle representation data *num*[b:0] has a bit width of *b+1* bits, then the current digital-to-analog converter calibration data IDAC[a:0] can be placed in the high-order bits, and the duty cycle representation data *num*[b:0] can be placed in the low-order bits, merging them to obtain the current calibration data cali[a+b+1:0], which has a total of *a+b+2* bits. Here, *a* represents the highest bit of the current digital-to-analog converter calibration data, and *b* represents the highest bit of the duty cycle representation data.

[0041] Specifically, when the signal processing unit 12 adjusts the current calibration data stored in the register using the binary division method according to the first comparison result, it specifically performs the following: when the first comparison result is that the digital current is greater than the target current, it increases the current calibration data stored in the register using the binary division method; when the first comparison result is that the digital current is less than or equal to the target current, it decreases the current calibration data stored in the register using the binary division method.

[0042] Specifically, according to Figure 1 As shown, the current I of the photodiode PD is sampled from the input terminal IN of the photocurrent calibration circuit. IN It can be represented as I IN =I PD -I IDAC This refers to the calibrated photocurrent of the photodiode (PD). Where I... PD I represents the photocurrent generated by the photodiode PD. IDAC This indicates the calibration current provided by the current-to-analog converter IDAC. Figure 1 The direction of the dashed arrow indicates the current I. INThe direction. Based on this, if the first comparison result shows that the digital current is greater than the target current, it indicates that the calibration current I provided by the current-to-analog converter IDAC is... IDAC If the value is too small, then the current calibration data stored in the register is increased using the binary search method to increase the calibration current I. IDAC This reduces the current I. IN This causes the digital current output by the current sampling circuit 11 to approach the target current. If the first comparison result indicates that the digital current is less than or equal to the target current, it indicates that the calibration current I provided by the current-to-analog converter IDAC... IDAC If the value is too high, then the binary search method is used to reduce the current calibration data stored in the register, thereby reducing the calibration current I. IDAC This increases the current I. IN This causes the digital current output by the current sampling circuit 11 to move closer to the target current.

[0043] For example, assuming the initial value of the current calibration data cali stored in the register is 0B0111…1 (where there are a+b+1 "1"s, where a represents the most significant bit of the current digital-to-analog conversion calibration data and b represents the most significant bit of the duty cycle characterization data), then the initial value of the current digital-to-analog conversion calibration data IDAC[a:0] is the a+1 bits of binary code truncated from the most significant bit to the least significant bit of cali, and the initial value of the duty cycle characterization data num[b:0] is the b+1 bits of binary code remaining in the lower bits of cali. Combined with… Figure 1 The initial value of the current digital-to-analog converter calibration data IDAC[a:0] is sent to the current digital-to-analog converter IDAC to be converted into the calibration current I. IDAC The initial value of the duty cycle characterization data num[b:0] is converted into an injection pulse signal with a duty cycle of Duty and then sent to the injection switch IDAC_INJ to control the duty cycle of the injection switch IDAC_INJ to regulate the calibration current I output by the current-to-analog converter IDAC. IDAC Fine adjustments are made to regulate the current of the photodiode PD, resulting in an adjusted current I at the input terminal IN of the photocurrent calibration circuit. IN =I PD -I IDAC The current I INAfter being converted into an initial digital current adc_data[1] by the current sampling circuit 11, it is sent to the signal processing unit 12 for the first binary division adjustment. Specifically, the signal processing unit 12 compares the initial digital current adc_data[1] with the set target current target. If adc_data[1] > target, then the median value 0B1011…1 (where the highest bit "10" is followed by a+b "1"s) is taken in the direction of increasing cali, that is, the current calibration data cali stored in the register is increased by the binary division method to increase the calibration current I. IDAC This reduces the current I. IN This causes the digital current output by the current sampling circuit 11 to move closer to the target current. Otherwise, the median value 0B0011…1 (containing a+b "1"s) is taken in the direction of decreasing cali, that is, the current calibration data cali stored in the register is reduced by using the binary search method to reduce the calibration current I. IDAC This increases the current I. IN This causes the digital current output by the current sampling circuit 11 to move closer to the target current. Then, it continues to read the current digital-to-analog conversion calibration data IDAC[a:0] and duty cycle characterization data num[b:0] from the updated current calibration data cali stored in the register, and according to... Figure 1 The compensation loop continues to perform a second bisection adjustment to obtain new current calibration data cali. This process is repeated until the bisection iteration is completed. In this way, the same bisection algorithm can be used to adjust the current calibration data cali to achieve the adjustment of the current digital-to-analog converter calibration data IDAC[a:0] and the duty cycle characterization data num[b:0]. During the adjustment process, only the data with the corresponding bit width needs to be selected from the current calibration data cali to obtain the current digital-to-analog converter calibration data IDAC[a:0] and the duty cycle characterization data num[b:0]. This not only results in higher adjustment accuracy but also saves hardware resources.

[0044] For example, the current digital-to-analog conversion calibration data IDAC[a:0] can be concatenated in the high-order bits, and the duty cycle characterization data num[b:0] can be concatenated in the low-order bits, forming the current calibration data, which can be represented as cali[a+b+1:0]={IDAC[a:0], num[b:0]}. Correspondingly, the signal processing unit 12 can read the target current digital-to-analog conversion bit data of the current calibration data cali from the register during each binary search iteration to obtain the current digital-to-analog conversion calibration data IDAC[a:0], and read the target duty cycle characterization bit data of the current calibration data cali from the register to obtain the duty cycle characterization data num[b:0]. The target current digital-to-analog conversion bit and the target duty cycle characterization bit can be determined based on the set calibration mode, the bit width a+1 of the current digital-to-analog conversion calibration data IDAC[a:0], and the bit width b+1 of the duty cycle characterization data num[b:0].

[0045] Specifically, when the calibration mode is coarse adjustment mode and the bit width of the current digital-to-analog converter calibration data is greater than or equal to the bit width of the duty cycle characterization data, the target current digital-to-analog converter bits are a+1 binary bits starting from the most significant bit of the current calibration data, and the target duty cycle characterization bits are b+1 binary bits truncated from the least significant bit to the most significant bit of the target current digital-to-analog converter bits; when the calibration mode is coarse adjustment mode and the bit width of the current digital-to-analog converter calibration data is less than the bit width of the duty cycle characterization data, the target current digital-to-analog converter bits are a+1 binary bits starting from the most significant bit of the current calibration data, and the target duty cycle characterization bits are b+1 binary bits starting from the most significant bit of the current calibration data. When the calibration mode is fine-tuning mode, the target current digital-to-analog conversion bits are a+1 binary bits starting from the most significant bit of the current calibration data, and the target duty cycle characterization bits are b+1 binary bits truncated from the least significant bit to the most significant bit of the current calibration data. Where a represents the highest bit of the current digital-to-analog conversion calibration data, and a+1 represents the bit width of the current digital-to-analog conversion calibration data; b represents the highest bit of the duty cycle characterization data, and b+1 represents the bit width of the duty cycle characterization data.

[0046] For example, the bit width of the current digital-to-analog conversion calibration data IDAC[a:0] is a+1, the bit width of the duty cycle characterization data num[b:0] is b+1, and the combined current calibration data is cali[a+b+1:0]={IDAC[a:0],num[b:0]}. In coarse calibration mode, if a > b, then a+1 binary search iterations are required. The a+1 bits starting from the most significant bit in the current calibration data cali[a+b+1:0] will be calibrated, meaning the bit containing the current digital-to-analog converter calibration data IDAC[a:0] in cali[a+b+1:0] will be calibrated. During calibration, the target current digital-to-analog converter bit is the a+1 bits [a+b+1:b+1] truncated from the most significant bit a+b+1 to the least significant bit in cali[a+b+1:0]. The target duty cycle representation bit is the b+1 bits truncated from the least significant bit to the most significant bit in the a+1 bits [a+b+1:b+1]. If a < b, then b+1 binary search iterations are required. The b+1 binary bits starting from the highest bit in the current calibration data cali[a+b+1:0] will be calibrated. That is, the binary bits containing the current digital-to-analog conversion calibration data IDAC[a:0] and the binary bits starting from the highest bit of the duty cycle characterization data num[b:0] will be calibrated. During the calibration process, the target current digital-to-analog conversion bit is the a+1 binary bits [a+b+1:b+1] truncated from the highest bit a+b+1 to the lowest bit of cali[a+b+1:0]. The target duty cycle characterization bit is the b+1 binary bits starting from the highest bit.

[0047] When the calibration mode is fine-tuning mode, a+b+1 binary search iterations are required. Each bit of the current calibration data cali[a+b+1:0] is calibrated. During the calibration process, the target current digital-to-analog conversion bit is a+1 binary bits [a+b+1:b+1] truncated from the highest bit a+b+1 of cali[a+b+1:0] to the lowest bit. The target duty cycle characterization bit is b+1 binary bits [b:0] truncated from the lowest bit to the highest bit of cali[a+b+1:0].

[0048] The photosensitive current calibration circuit provided in this application concatenates current digital-to-analog conversion calibration data and duty cycle characterization data into current calibration data. After receiving the digital current converted from the current of the photosensitive diode by the current sampling circuit, the signal processing unit compares this digital current with a set target current. Then, based on the first comparison result, it adjusts the current calibration data stored in the register using a binary search method. Next, it reads the current digital-to-analog conversion calibration data and duty cycle characterization data from the register and sends the current digital-to-analog conversion calibration data to the current digital-to-analog converter (IDAC) for conversion. The calibration current is used, and the duty cycle characterization data is converted into an injection pulse signal and sent to the injection switch IDAC_INJ to adjust the calibration current of the current-to-analog converter IDAC to compensate for the duty cycle of the photodiode, thereby gradually adjusting the photodiode current to approach the set target value. This process is repeated until the binary search iteration is completed. Then, based on the final current calibration data stored in the register, the target current-to-analog converter calibration data and the target duty cycle characterization data are determined. Using this target current-to-analog converter calibration data and the target duty cycle characterization data, the photodiode current can be calibrated more effectively. In this way, by merging the current-to-analog converter calibration data and the duty cycle characterization data into current calibration data and performing binary search calibration together, the calibration current of the current-to-analog converter IDAC and the duty cycle of the pulse signal injected into the injection switch IDAC_INJ can be adjusted simultaneously. Compared with adjusting only the current-to-analog converter IDAC, the adjustment accuracy is higher and the adjustment range is wider. Moreover, the calibration values ​​of the current-to-analog converter IDAC and the injection switch IDAC_INJ are obtained using the same calibration algorithm, which can save hardware resources.

[0049] based on Figure 1 In an exemplary embodiment of this application, after obtaining the current calibration data through the final binary search, the signal processing unit 12 can directly determine the current analog-to-digital conversion calibration data and duty cycle characterization data stored in the register as the target current analog-to-digital conversion calibration data and target duty cycle characterization data. Alternatively, after obtaining the current calibration data through the final binary search, the signal processing unit 12 can use the current calibration data to determine whether overcalibration has occurred. If no overcalibration has occurred, the current analog-to-digital conversion calibration data and duty cycle characterization data stored in the register are directly determined as the target current analog-to-digital conversion calibration data and target duty cycle characterization data. If overcalibration has occurred, overcalibration correction is performed based on the current calibration data finally stored in the register to obtain the final required target current analog-to-digital conversion calibration data and target duty cycle characterization data.

[0050] Specifically, in combination Figure 1After completing the bisection method iterations, when the signal processing unit 12 determines the target current digital-to-analog conversion calibration data and the target duty cycle characterization data based on the current calibration data finally stored in the register, it specifically performs the following: sending the current digital-to-analog conversion calibration data read from the current calibration data finally stored in the register to the current digital-to-analog converter IDAC, and sending the duty cycle characterization data read from the current calibration data finally stored in the register as an injection pulse signal to the injection switch IDAC_INJ; comparing the digital current sent by the current sampling circuit 11 with the target current to obtain a second comparison result; and determining the target current digital-to-analog conversion calibration data and the target duty cycle characterization data based on the second comparison result, using the current digital-to-analog conversion calibration data and the duty cycle characterization data read from the current calibration data finally stored in the register.

[0051] Specifically, when the signal processing unit 12 determines the target current digital-to-analog conversion calibration data and target duty cycle characterization data based on the current calibration data and duty cycle characterization data read from the current calibration data finally stored in the register, according to the second comparison result, it is used for: If the second comparison result is that the digital current is less than or equal to the target current, the current analog-to-digital conversion calibration data and duty cycle characterization data read from the final current calibration data stored in the register are adjusted based on the set calibration mode to obtain the target current analog-to-digital conversion calibration data and target duty cycle characterization data; if the second comparison result is that the digital current is greater than the target current, the current analog-to-digital conversion calibration data and duty cycle characterization data read from the final current calibration data stored in the register are determined as the target current analog-to-digital conversion calibration data and target duty cycle characterization data.

[0052] Specifically, after obtaining the current calibration data using the final binary search method, the signal processing unit 12 will once again send the current digital-to-analog conversion calibration data from the final current calibration data to the current digital-to-analog converter (IDAC), which will then convert it into the calibration current I. IDAC Simultaneously, the signal processing unit 12 replaces the duty cycle characterization data in the current calibration data with an injection pulse signal of duty cycle 'Duty' and sends it to the injection switch IDAC_INJ to control the duty cycle of the injection switch IDAC_INJ's on / off state, thereby affecting the calibration current I output by the current digital-to-analog converter IDAC. IDAC Fine adjustments are made to regulate the current of the photodiode PD, resulting in an adjusted current I at the input terminal IN of the photocurrent calibration circuit. IN =I PD -I IDAC The current I INThe current sampled by circuit 11 is converted into a digital current, denoted as adc_data[N]. Signal processing unit 12 then compares the digital current adc_data[N] with the target current target. If adc_data[N] > target, it can be determined that no calibration has occurred. In this case, the current-to-analog conversion calibration data and duty cycle characterization data from the last binary method-obtained current calibration data can be directly identified as the target current-to-analog conversion calibration data and target duty cycle characterization data. If adc_data[N] ≤ target, it can be determined that overcalibration has occurred. In this case, the current calibration data obtained from the last binary method can be corrected according to the set calibration mode to avoid overcalibration.

[0053] For example, the current calibration data is binary code; when the second comparison result is that the digital current adc_data[N] is less than or equal to the target current target, the signal processing unit 12 adjusts the current analog-to-digital conversion calibration data and duty cycle characterization data read from the current calibration data finally stored in the register based on the set calibration mode to obtain the target current analog-to-digital conversion calibration data and target duty cycle characterization data, which can be specifically used for: When the calibration mode is coarse adjustment mode, the current digital-to-analog conversion calibration data read from the final current calibration data stored in the register is subtracted by 1 to obtain the target current digital-to-analog conversion calibration data, and the duty cycle characterization data read from the final current calibration data stored in the register is determined as the target duty cycle characterization data; when the calibration mode is fine adjustment mode, the current digital-to-analog conversion calibration data read from the final current calibration data stored in the register is determined as the target current digital-to-analog conversion calibration data, and the duty cycle characterization data read from the final current calibration data stored in the register is subtracted by 1 to obtain the target duty cycle characterization data.

[0054] The method by which the signal processing unit 12 reads the current digital-to-analog conversion calibration data and duty cycle characterization data from the current calibration data finally stored in the register is the same as the reading method in the above-mentioned bisection calibration stage, and will not be described again here.

[0055] Specifically, when the second comparison result is that the digital current adc_data[N] is less than or equal to the target current target, and the calibration mode is coarse adjustment mode, the target current digital-to-analog conversion calibration data can be represented as IDAC[a:0]=cali[a+b+1:b+1]-1, which is the callback current digital-to-analog conversion calibration data. Here, cali[a+b+1:b+1] represents the first a+1 bits of the current calibration data cali[a+b+1:0] stored in the register, starting from the most significant bit, which is also the target current digital-to-analog conversion bit. The target duty cycle representation data can be represented as num[b:0]=cali[2b:b+1] when a≥b, which is b+1 bits of data extracted from the least significant bit to the most significant bit of cali[a+b+1:b+1], which is also the data of the target duty cycle representation bits; the target duty cycle representation data can be represented as cali[a+b+1:a+1] when a<b, which is b+1 bits of binary data extracted from the most significant bit to the least significant bit of the current calibration data cali[a+b+1:0], which is also the data of the target duty cycle representation bits.

[0056] When the calibration mode is fine-tuning mode, the target current digital-to-analog conversion calibration data can be represented as IDAC[a:0]=cali[a+b+1:b+1], which is the a+1 bits of binary code extracted from the most significant bit to the least significant bit of the current calibration data cali[a+b+1:0] stored in the register, which is also the data of the target current digital-to-analog conversion bits; the target duty cycle characterization data can be represented as num[b:0]=cali[b:0]-1, which is the number of injected pulse signals reduced by 1 to reduce the duty cycle, where cali[b:0] represents the b+1 bits of binary data extracted from the least significant bit to the most significant bit of the current calibration data cali[a+b+1:0] in the register, which is also the data of the target duty cycle characterization bits.

[0057] The photosensitive current calibration circuit provided in this application embodiment performs a compensation calibration by re-inputting the calibrated current calibration data into the compensation loop after the last bit of the current calibration data is calibrated. The signal processing unit 12 compares the digital current obtained from the current sampling circuit 11 with the set target current. Based on the comparison result, it determines whether overcalibration has occurred in the previous successive approximation calibration process. If overcalibration is determined to have occurred, it selects to call back the current digital-to-analog conversion calibration data or the number of injected pulse signals according to the current calibration mode to correct the overcalibration and avoid the overcalibration problem.

[0058] Based on the photocurrent calibration circuits of the above embodiments, this application also provides a photocurrent calibration method, which can be applied to the photocurrent calibration circuits described in any of the above embodiments.

[0059] The following is combined Figures 2-4 The photocurrent calibration method provided in the embodiments of this application will be described in detail.

[0060] Figure 2 This paper illustrates one of the flowcharts of the photocurrent calibration method provided in this application embodiment. (Refer to...) Figure 2 As shown, the photocurrent calibration method may include the following steps 210 to 220.

[0061] Step 210: Compare the digital current sent by the current sampling circuit with the set target current to obtain the first comparison result.

[0062] Combination Figure 1 The photosensitive current calibration circuit shown includes a current sampling circuit 11 that can acquire the current of the photodiode PD from its input terminal IN and convert it into a digital current input to the signal processing unit 12. The signal processing unit 12 compares the digital current sent by the current sampling circuit 11 with a set target current to obtain a first comparison result. The target current can be set according to calibration requirements.

[0063] Step 220: Based on the first comparison result, adjust the current calibration data stored in the register using the bisection method, read the current digital-to-analog conversion calibration data and duty cycle characterization data from the current calibration data in the register, send the current digital-to-analog conversion calibration data to the current digital-to-analog converter, and convert the duty cycle characterization data into an injection pulse signal and send it to the injection switch. After completing the bisection method iteration, determine the target current digital-to-analog conversion calibration data and the target duty cycle characterization data based on the final current calibration data stored in the register.

[0064] Specifically, during each binary calibration process, after the current-to-analog converter (DAC) calibration data is sent to the DAC, the DAC converts the calibration data into a calibration current. The injection switch IDAC_INJ is connected between the output of the DAC and the input IN of the current sampling circuit 11. After receiving an injection pulse signal, the injection switch IDAC_INJ can adjust the calibration current output by the DAC to compensate for the duty cycle of the photodiode PD under the control of the injection pulse signal.

[0065] The bisection method iterates M+1 times, where M is the maximum bit width between the current digital-to-analog conversion calibration data and the duty cycle characterization data.

[0066] Specifically, assuming the current digital-to-analog converter calibration data IDAC[a:0] has a bit width of a+1 bits and the duty cycle characterization data num[b:0] has a bit width of b+1 bits, if a > b, the number of bisection iterations is a+1; if a < b, the number of bisection iterations is b+1; if a = b, the number of bisection iterations is either a+1 or b+1. Here, a represents the highest bit of the current digital-to-analog converter calibration data, and b represents the highest bit of the duty cycle characterization data.

[0067] The current calibration data is constructed by concatenating the current digital-to-analog converter (DAC) calibration data and the duty cycle characterization data. The DAC calibration data is used to control the calibration current output by the DAC; the duty cycle characterization data is used to control the duty cycle of the injection switch IDAC_INJ. For example, the duty cycle (Duty) of the injection switch IDAC_INJ can be directly used as the duty cycle characterization data, or the number of injection pulses (num) can be used as the duty cycle characterization data.

[0068] For example, current calibration data can be binary code. When constructing current calibration data, the current analog-to-digital conversion calibration data and the duty cycle characterization data can be directly concatenated into binary code. For example, the current analog-to-digital conversion calibration data can be placed in the high bit and the duty cycle characterization data can be placed in the low bit.

[0069] For example, taking the duty cycle representation data as the number of injected pulses *num*, assuming the current digital-to-analog converter calibration data IDAC[a:0] has a bit width of *a+1* bits and the duty cycle representation data *num*[b:0] has a bit width of *b+1* bits, then the current digital-to-analog converter calibration data IDAC[a:0] can be placed in the high-order bits, and the duty cycle representation data *num*[b:0] can be placed in the low-order bits, merging them to obtain the current calibration data cali[a+b+1:0], which has a total of *a+b+2* bits. Here, *a* represents the highest bit of the current digital-to-analog converter calibration data, and *b* represents the highest bit of the duty cycle representation data.

[0070] In one embodiment, adjusting the current calibration data stored in the register using the binary search method based on the first comparison result may include: increasing the current calibration data stored in the register using the binary search method when the first comparison result indicates that the digital current is greater than the target current; and decreasing the current calibration data stored in the register using the binary search method when the first comparison result indicates that the digital current is less than or equal to the target current.

[0071] For example, in each iteration of the binary search method, reading the current digital-to-analog conversion calibration data and duty cycle characterization data from the current calibration data in the register may include: reading the target current digital-to-analog conversion bit data from the register to obtain the current digital-to-analog conversion calibration data, and reading the target duty cycle characterization bit data from the register to obtain the duty cycle characterization data; wherein, the target current digital-to-analog conversion bit and the target duty cycle characterization bit are determined based on the set calibration mode, the bit width of the current digital-to-analog conversion calibration data, and the bit width of the duty cycle characterization data.

[0072] Specifically, when the calibration mode is coarse adjustment mode and the bit width of the current digital-to-analog conversion calibration data is greater than or equal to the bit width of the duty cycle characterization data, the target current digital-to-analog conversion bits are a+1 binary bits starting from the most significant bit of the current calibration data, and the target duty cycle characterization bits are b+1 binary bits truncated from the least significant bit to the most significant bit of the target current digital-to-analog conversion bits; when the calibration mode is coarse adjustment mode and the bit width of the current digital-to-analog conversion calibration data is less than the bit width of the duty cycle characterization data, the target current digital-to-analog conversion bits are a+1 binary bits starting from the most significant bit of the current calibration data, and the target duty cycle characterization bits are b+1 binary bits starting from the most significant bit of the current calibration data; when the calibration mode is fine adjustment mode, the target current digital-to-analog conversion bits are a+1 binary bits starting from the most significant bit of the current calibration data, and the target duty cycle characterization bits are b+1 binary bits truncated from the least significant bit to the most significant bit of the current calibration data.

[0073] Where a represents the highest bit of the current digital-to-analog conversion calibration data, and a+1 represents the bit width of the current digital-to-analog conversion calibration data; b represents the highest bit of the duty cycle characterization data, and b+1 represents the bit width of the duty cycle characterization data.

[0074] In one embodiment, after completing the number of iterations of the bisection method, determining the target current digital-to-analog conversion calibration data and the target duty cycle characterization data based on the final current calibration data stored in the register may include: directly determining the current digital-to-analog conversion calibration data and the duty cycle characterization data read from the final current calibration data stored in the register as the target current digital-to-analog conversion calibration data and the target duty cycle characterization data.

[0075] In another embodiment, after completing the bisection method iterations, the current calibration data finally stored in the register can be used to determine whether overcalibration has occurred. If no overcalibration has occurred, the current analog-to-digital conversion calibration data and duty cycle characterization data stored in the register are directly determined as the target current analog-to-digital conversion calibration data and target duty cycle characterization data. If overcalibration has occurred, overcalibration correction is performed based on the current calibration data finally stored in the register to obtain the final required target current analog-to-digital conversion calibration data and target duty cycle characterization data.

[0076] Specifically, determining the target current digital-to-analog conversion calibration data and the target duty cycle characterization data based on the final current calibration data stored in the register may include: sending the current digital-to-analog conversion calibration data read from the final current calibration data stored in the register to the current digital-to-analog converter IDAC, converting it into a calibration current through the current digital-to-analog converter IDAC, and converting the duty cycle characterization data read from the final current calibration data stored in the register into an injection pulse signal and sending it to the injection switch IDAC_INJ to control the duty cycle of the injection switch IDAC_INJ; comparing the digital current sent by the current sampling circuit 11 with the target current to obtain a second comparison result; and determining the target current digital-to-analog conversion calibration data and the target duty cycle characterization data based on the second comparison result, using the current digital-to-analog conversion calibration data and the duty cycle characterization data read from the final current calibration data stored in the register.

[0077] For example, determining the target current digital-to-analog conversion calibration data and target duty cycle characterization data based on the current calibration data finally stored in the register and the current digital-to-analog conversion calibration data and target duty cycle characterization data according to the second comparison result may include: if the second comparison result is that the digital current is less than or equal to the target current, adjusting the current digital-to-analog conversion calibration data and duty cycle characterization data read from the current calibration data finally stored in the register based on a set calibration mode to obtain the target current digital-to-analog conversion calibration data and target duty cycle characterization data; if the second comparison result is that the digital current is greater than the target current, determining the current digital-to-analog conversion calibration data and duty cycle characterization data read from the current calibration data finally stored in the register as the target current digital-to-analog conversion calibration data and target duty cycle characterization data.

[0078] Specifically, after obtaining the current calibration data using the final binary search method, the signal processing unit 12 will once again send the current digital-to-analog conversion calibration data from the final current calibration data to the current digital-to-analog converter (IDAC), which will then convert it into the calibration current I. IDACSimultaneously, the signal processing unit 12 replaces the duty cycle characterization data in the current calibration data with an injection pulse signal of duty cycle 'Duty' and sends it to the injection switch IDAC_INJ to control the duty cycle of the injection switch IDAC_INJ's on / off state, thereby affecting the calibration current I output by the current digital-to-analog converter IDAC. IDAC Fine adjustments are made to regulate the current of the photodiode PD, resulting in an adjusted current I at the input terminal IN of the photocurrent calibration circuit. IN =I PD -I IDAC The current I IN The current sampled by circuit 11 is converted into a digital current, denoted as adc_data[N]. Signal processing unit 12 then compares the digital current adc_data[N] with the target current target. If adc_data[N] > target, it can be determined that no calibration has occurred. In this case, the current-to-analog conversion calibration data and duty cycle characterization data from the last binary method-obtained current calibration data can be directly identified as the target current-to-analog conversion calibration data and target duty cycle characterization data. If adc_data[N] ≤ target, it can be determined that overcalibration has occurred. In this case, the current calibration data obtained from the last binary method can be corrected according to the set calibration mode to avoid overcalibration.

[0079] For example, the current calibration data is binary code; when the second comparison result is that the digital current is less than or equal to the target current, the current digital-to-analog conversion calibration data and duty cycle characterization data read from the final current calibration data stored in the register are adjusted based on the set calibration mode to obtain the target current digital-to-analog conversion calibration data and target duty cycle characterization data, which may include: When the calibration mode is coarse adjustment mode, the current digital-to-analog conversion calibration data read from the final current calibration data stored in the register is subtracted by 1 to obtain the target current digital-to-analog conversion calibration data, and the duty cycle characterization data read from the final current calibration data stored in the register is determined as the target duty cycle characterization data; when the calibration mode is fine adjustment mode, the current digital-to-analog conversion calibration data read from the final current calibration data stored in the register is determined as the target current digital-to-analog conversion calibration data, and the duty cycle characterization data read from the final current calibration data stored in the register is subtracted by 1 to obtain the target duty cycle characterization data.

[0080] The method by which the signal processing unit 12 reads the current digital-to-analog conversion calibration data and duty cycle characterization data from the current calibration data finally stored in the register is the same as the reading method in the above-mentioned bisection calibration stage, and will not be described again here.

[0081] Thus, after obtaining the current calibration data through the final binary search, this current calibration data is sent back into the compensation loop to perform a compensation calibration of the photodiode's (PD) photocurrent. The calibrated digital current is then compared with the target current. If the second comparison result shows that the digital current is less than or equal to the target current, it can be determined that overcalibration has occurred. In this case, if the calibration mode is coarse adjustment mode, the overcalibration can be corrected by subtracting 1 from the current digital-to-analog conversion calibration data obtained through the final binary search. If the calibration mode is fine adjustment mode, the overcalibration can be corrected by reducing the duty cycle by subtracting 1 from the number of injected pulse signals.

[0082] The photosensitive current calibration method provided in this application concatenates current digital-to-analog conversion calibration data and duty cycle characterization data into current calibration data. After receiving the digital current converted from the current of the photosensitive diode by the current sampling circuit, the digital current is compared with the set target current. Then, based on the first comparison result, the current calibration data stored in the register is adjusted using a binary search method. The current digital-to-analog conversion calibration data and duty cycle characterization data are then read from the register. The current digital-to-analog conversion calibration data is sent to the current digital-to-analog converter to be converted into a calibration current, and the duty cycle characterization data is converted into an injection pulse signal and sent to the injection switch to adjust the calibration current of the current digital-to-analog converter to compensate the duty cycle of the photosensitive diode, thereby adjusting the current of the photosensitive diode to gradually approach the set target value. This process is repeated until the number of binary search iterations is completed. Finally, the target current digital-to-analog conversion calibration data and target duty cycle characterization data are determined based on the final current calibration data stored in the register. The target current digital-to-analog conversion calibration data and target duty cycle characterization data can be used to calibrate the current of the photosensitive diode more effectively. In this way, by merging the current digital-to-analog converter calibration data and the duty cycle characterization data into current calibration data and performing binary calibration together, the calibration current of the IDAC and the duty cycle of the pulse signal injected into the injection switch can be adjusted simultaneously. Compared with adjusting only the IDAC, the adjustment accuracy is higher and the adjustment range is wider. Moreover, the calibration values ​​of the IDAC and the injection switch are obtained using the same calibration algorithm, which saves hardware resources. In addition, after obtaining the current calibration data in the last binary method, the current calibration data after calibration is re-input into the compensation loop for a compensation calibration. The digital current obtained from the current sampling circuit is compared with the set target current. Based on the comparison result, it is determined whether overcalibration has occurred in the previous successive approximation calibration process. If overcalibration is found, the overcalibration is corrected by either recalling the current digital-to-analog converter calibration data or recalling the number of injected pulse signals, depending on the current calibration mode, thus avoiding the overcalibration problem.

[0083] Based on the above embodiments, combined with Figure 1 The following example illustrates the photocurrent calibration circuit and method provided in this application, using the duty cycle representation data as the number of injected pulses (num), the current digital-to-analog conversion calibration data (IDAC[a:0]) with a bit width of a+1, and the duty cycle representation data (num[b:0]) with a bit width of b+1. Here, 'a' represents the most significant bit of the current digital-to-analog conversion calibration data, and 'b' represents the most significant bit of the duty cycle representation data.

[0084] Figure 3 This is a second schematic flowchart of the photocurrent calibration method provided in this application embodiment, referring to... Figure 3 As shown, the current calibration data, which is the result of merging the current digital-to-analog conversion calibration data IDAC[a:0] and the duty cycle characterization data num[b:0], can be represented as cali[a+b+1:0]={IDAC[a:0],num[b:0]}, where the current digital-to-analog conversion calibration data IDAC[a:0] is set in the high bit and the duty cycle characterization data num[b:0] is set in the low bit.

[0085] The number of iterations for the binary search method can be determined based on the set calibration mode. For example, in the coarse adjustment mode, the number of iterations is M, where M is the maximum bit width between the bit width a+1 of the current digital-to-analog converter calibration data IDAC[a:0] and the bit width b+1 of the duty cycle characterization data num[b:0]. In the fine adjustment mode, the number of iterations is a+b+1.

[0086] According to the binary search principle, the initial value of the current calibration data cali stored in the register can be set to 0B0111…1 (a+b+2 bits in total, of which a+b+1 “1”s). At this time, the current digital-to-analog converter calibration data IDAC[a:0] output by the signal processing unit 12 to the current digital-to-analog converter IDAC through the first output terminal S1 and the duty cycle characterization data num[b:0] corresponding to the injection pulse current output to the injection switch IDAC_INJ through the second output terminal S2 are also initial values. The initial value of the current digital-to-analog converter calibration data IDAC[a:0] is the a+1 bits of binary code truncated from the highest bit to the lowest bit of cali, and the initial value of the duty cycle characterization data num[b:0] is the b+1 bits of binary code of the remaining low bits of cali.

[0087] Signal processing unit 12 sends the initial value of the current digital-to-analog converter calibration data IDAC[a:0] to the current digital-to-analog converter IDAC, which then converts it into a calibration current I. IDACSimultaneously, the signal processing unit 12 converts the initial value of the duty cycle characterization data num[b:0] into an injection pulse signal with a duty cycle of Duty according to the duty cycle expression Duty=num / clk, and then sends it to the injection switch IDAC_INJ to control the duty cycle of the injection switch IDAC_INJ to regulate the calibration current I output by the current-to-analog converter IDAC. IDAC Fine adjustments are made to regulate the current of the photodiode PD, resulting in an adjusted current I at the input terminal IN of the photocurrent calibration circuit. IN =I PD -I IDAC The current I IN After being converted into an initial digital current adc_data[1] by the current sampling circuit 11, it is sent to the signal processing unit 12 for the first binary division adjustment. Specifically, the signal processing unit 12 compares the initial digital current adc_data[1] with the set target current target. If adc_data[1] > target, the updated current calibration data cali=0B1011…1 (where the highest bit "10" is followed by a+b "1"s) is obtained by taking the median value in the direction of increasing cali. That is, the current calibration data cali stored in the register is increased by using the binary division method to increase the calibration current I. IDAC This reduces the current I. IN This causes the digital current output by the current sampling circuit 11 to move closer to the target current target. If adc_data[1]≤target, then the updated current calibration data cali=0B0011…1 (with a+b “1”s) is obtained by taking the median value in the direction of decreasing cali using the bisection method. That is, the current calibration data cali stored in the register is reduced by using the bisection method to reduce the calibration current I. IDAC This increases the current I. IN This causes the digital current output by the current sampling circuit 11 to move closer to the target current.

[0088] After the first binary search is completed, the current calibration data cali stored in the register is updated. The signal processing unit 12 continues to read the current digital-to-analog conversion calibration data IDAC[a:0] and the duty cycle characterization data num[b:0] from the updated current calibration data cali stored in the register, and then... Figure 1 The compensation loop continues to adjust the current compensation of the photodiode PD to obtain a new current I. IN The current I INAfter being converted into digital current adc_data[2] by the current sampling circuit 11, it is sent to the signal processing unit 12 for the second binary division adjustment, and the current calibration data cali in the register is updated again. This process continues until the number of binary division iterations is completed.

[0089] Specifically, the signal processing unit 12 reads the target current digital-to-analog conversion bit data from the current calibration data cali[a+b+1:0] stored in the register to obtain the current digital-to-analog conversion calibration data IDAC[a:0], and reads the target duty cycle characterization bit data from the current calibration data cali[a+b+1:0] stored in the register to obtain the duty cycle characterization data num[b:0]. The target current digital-to-analog conversion bit and the target duty cycle characterization bit can be determined based on the set calibration mode, the bit width a+1 of the current digital-to-analog conversion calibration data IDAC[a:0], and the bit width b+1 of the duty cycle characterization data num[b:0].

[0090] When the calibration mode is coarse adjustment, if the bit width a+1 of the current digital-to-analog converter calibration data IDAC[a:0] is greater than or equal to the bit width b+1 of the duty cycle characterization data num[b:0], then the number of binary search iterations is a+1. To ensure that both the current digital-to-analog converter calibration data IDAC[a:0] and the duty cycle characterization data num[b:0] are calibrated, the target current digital-to-analog converter bit can be set to the highest bit in the current calibration data cali[a+b+1:0]. The first a+1 binary bits are the target duty cycle representation bits, which are b+1 binary bits truncated from the least significant bit to the most significant bit of the target current digital-to-analog converter bit. At this time, the read current digital-to-analog converter calibration data IDAC[a:0] is cali[a+b+1:b+1], and the read duty cycle representation data num[b:0] is b+1 binary data truncated from the least significant bit to the most significant bit of cali[a+b+1:b+1], which is cali[2b:b+1].

[0091] When the calibration mode is coarse adjustment mode, if the bit width a+1 of the current digital-to-analog converter calibration data IDAC[a:0] is smaller than the bit width b+1 of the duty cycle characterization data num[b:0], in order to ensure that both the current digital-to-analog converter calibration data IDAC[a:0] and the duty cycle characterization data num[b:0] are calibrated data, the number of bisection iterations can be set to b+1 times. Correspondingly, the target current digital-to-analog converter bit can be set to a+1 bits starting from the most significant bit in the current calibration data cali[a+b+1:0]. The binary bits, that is, the data bits occupied by IDAC[a:0] in cali[a+b+1:0]={IDAC[a:0],num[b:0]} when data is merged, are set to b+1 binary bits starting from the highest bit of the current calibration data. At this time, the read current digital-to-analog conversion calibration data IDAC[a:0] is cali[a+b+1:b+1], and the read duty cycle characterization data num[b:0] is cali[a+b+1:a+1].

[0092] When the calibration mode is fine-tuning mode, the binary search method iterates a+b+1 times, which can calibrate all data bits of the current calibration data cali[a+b+1:0]. At this time, the target current digital-to-analog conversion bit can be set to a+1 binary bits starting from the highest bit of the current calibration data cali[a+b+1:0], which is the data bit occupied by IDAC[a:0] in cali[a+b+1:0]={IDAC[a:0], num[b:0]} when data is merged. The target duty cycle characterization bit can be set to b+1 binary bits truncated from the lowest bit to the highest bit of the current calibration data, which is the data bit occupied by num[b:0] in cali[a+b+1:0]={IDAC[a:0], num[b:0]} when data is merged. At this point, the read current digital-to-analog conversion calibration data IDAC[a:0] is cali[a+b+1:b+1], and the read duty cycle characterization data num[b:0] is cali[b:0].

[0093] After completing all the bisection iterations, the signal processing unit 12 can read the target current digital-to-analog conversion bit data from the current calibration data cali[a+b+1:0] finally stored in the register according to the currently set calibration mode, to obtain the current digital-to-analog conversion calibration data IDAC[a:0], and read the target duty cycle characterization bit data from the current calibration data cali[a+b+1:0] finally stored in the register, to obtain the duty cycle characterization data num[b:0]. Then, the read current digital-to-analog conversion calibration data IDAC[a:0] and duty cycle characterization data num[b:0] are directly determined as the final target current digital-to-analog conversion calibration data and target duty cycle characterization data to obtain the final calibration result; or, overcalibration can be determined based on the read current digital-to-analog conversion calibration data IDAC[a:0] and duty cycle characterization data num[b:0]. If overcalibration is determined to have occurred, the read current digital-to-analog conversion calibration data IDAC[a:0] and duty cycle characterization data num[b:0] are corrected to obtain the final target current digital-to-analog conversion calibration data and target duty cycle characterization data to obtain the final calibration result.

[0094] Figure 4 This paper illustrates a flowchart of the overcalibration correction method in the photocurrent calibration method provided in an embodiment of this application. (Refer to...) Figure 4 As shown, combined with Figure 1 After completing the bisection method iterations, the signal processing unit 12 can read the target current digital-to-analog conversion bit data and the target duty cycle characterization bit data from the final current calibration data cali[a+b+1:0] stored in the register according to the currently set calibration mode, to obtain the current digital-to-analog conversion calibration data IDAC[a:0] and the duty cycle characterization data num[b:0]. Then, the current digital-to-analog conversion calibration data IDAC[a:0] is sent to the current digital-to-analog converter IDAC, which converts the current digital-to-analog conversion calibration data IDAC[a:0] into the calibration current I. IDAC The duty cycle data num[b:0] is converted into an injection pulse signal with a duty cycle of Duty according to the expression Duty=num / clk, and then sent to the injection switch IDAC_INJ to control the duty cycle of the injection switch IDAC_INJ to regulate the calibration current I output by the current-to-analog converter IDAC. IDAC Fine adjustments are made to regulate the current of the photodiode PD, resulting in an adjusted current I at the input terminal IN of the photocurrent calibration circuit. IN =I PD -I IDAC The current I INThe current sampled by the current sampling circuit 11 is also converted into a digital current, for example, denoted as adc_data[N]. After the signal processing unit 12 obtains the digital current adc_data[N], it compares the digital current adc_data[N] with the set target current target. If adc_data[N] > target, it can be determined that no calibration has occurred. At this time, the signal processing unit 12 directly determines the target current digital-to-analog conversion calibration data IDAC[a:0] and the duty cycle characterization data num[b:0] read from the register as the target current digital-to-analog conversion calibration data and the target duty cycle characterization data. That is, the target current digital-to-analog conversion calibration data is determined to be IDAC[a:0] = cali[a+b+1:b+1], the target duty cycle characterization data num[b:0] is cali[2b:b+1] (a≥b) or cali[a+b+1:a+1] (a<b) in coarse adjustment mode, and the target duty cycle characterization data num[b:0] is cali[b:0] in fine adjustment mode.

[0095] If adc_data[N] ≤ target, it can be determined that overcalibration has occurred. In this case, the signal processing unit 12 corrects the read current digital-to-analog conversion calibration data IDAC[a:0] and duty cycle characterization data num[b:0] based on the set calibration mode. The specific correction method is as follows: When the calibration mode is coarse adjustment mode, the read current digital-to-analog conversion calibration data IDAC[a:0] is decremented by 1 to retrieve the current digital-to-analog conversion calibration data IDAC[a:0]. At this time, the target current digital-to-analog conversion calibration data can be obtained as IDAC[a:0] = cali[a+b+1:b+1]-1. The target duty cycle characterization data num[b:0] is cali[2b:b+1] when a≥b, and cali[a+b+1:a+1] when a<b.

[0096] When the calibration mode is fine-tuning mode, the duty cycle characterization data num[b:0] is reduced by 1 to decrease the duty cycle. At this time, the target current digital-to-analog conversion calibration data can be obtained as IDAC[a:0]=cali[a+b+1:b+1], and the target duty cycle characterization data num[b:0] is cali[b:0]-1.

[0097] according to Figure 3 and Figure 4The photocurrent calibration method provided in this application can, on the one hand, combine the current digital-to-analog converter calibration data IDAC[a:0] and the duty cycle characterization data num[b:0] to form current calibration data. The calibration of both IDAC[a:0] and num[b:0] can be achieved by adjusting the current calibration data cali using the same bisection algorithm. Compared to adjusting only the current digital-to-analog converter IDAC, this method offers higher adjustment accuracy and a wider adjustment range. Furthermore, during the calibration process, the calibration values ​​of the current digital-to-analog converter IDAC and the injection switch IDAC_INJ are obtained using the same calibration algorithm. Only the corresponding data bits and corresponding bit width data need to be selected from the current calibration data cali to obtain the current digital-to-analog converter calibration data IDAC[a:0] and the duty cycle characterization data num[b:0], thus saving hardware resources. On the other hand, after the last bit of the current calibration data is calibrated, the calibrated current calibration data is re-input into the compensation loop for a compensation calibration. The digital current obtained from the current sampling circuit 11 is compared with the set target current. Based on the comparison result, it is determined whether the previous successive approximation calibration process has overcalibrated. If it is determined that overcalibration has occurred, the current digital-to-analog conversion calibration data or the number of injected pulse signals is selected according to the current calibration mode to correct the overcalibration and avoid the overcalibration problem.

[0098] This application also provides a chip that includes the photocurrent calibration circuit described in any of the above embodiments. The working principle and beneficial effects of this chip are the same as those of the photocurrent calibration circuit described in any of the above embodiments, and will not be repeated here.

[0099] This application also provides an electronic device, which includes the photocurrent calibration circuit described in any of the above embodiments, or includes the chip described above. The electronic device may include at least one of the following: mobile phone, computer, vehicle terminal, tablet computer, wearable device, smart home device, augmented reality (AR) device, virtual reality (VR) device, etc., but is not limited thereto.

[0100] In one exemplary embodiment of this application, the electronic device may include a processor, an external memory interface, internal memory, a Universal Serial Bus (USB) interface, a charging management module, a power management module, a battery, an antenna, a mobile communication module, a wireless communication module, an audio module, a speaker, a microphone, a headphone jack, a sensor module, buttons, a motor, an indicator, a camera, a display screen, and a Subscriber Identification Module (SIM) card interface, etc. The sensor module may include motion sensors and gyroscopes, etc.

[0101] It is understood that the structures illustrated in the embodiments of this application do not constitute a specific limitation on the electronic device. In other exemplary embodiments of this application, the electronic device may include more or fewer components, or combine some components, or split some components, or have different component arrangements. These components may be implemented in hardware, software, or a combination of software and hardware.

[0102] The processor may include one or more processing units, such as, but not limited to, an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, a video codec, a digital signal processor (DSP), a baseband processor, and a neural network processing unit (NPU). Different processing units may be independent devices or integrated into one or more processors. The controller can generate operation control signals based on instruction opcodes and timing signals to control instruction fetching and execution. The processor may also include memory for storing instructions and data. In some embodiments, the memory in the processor may be a cache memory. This memory can store instructions or data that the processor has just used or that are used repeatedly. If the processor needs to reuse the instruction or data, it can retrieve it from memory. This avoids repeated accesses, reduces processor waiting time, and thus improves system efficiency.

[0103] The charging management module receives charging signals from the charger. The charger may include a wireless charger or a wired charger. In some wired charging embodiments, the charging management module receives charging input from the wired charger via a USB interface. In some wireless charging embodiments, the charging management module receives wireless charging input via the wireless charging coil of the electronic device. While charging the battery, the charging management module can also supply power to the electronic device via the power management module.

[0104] The power management module connects the battery, the charging management module, and the processor. It receives input from the battery and / or the charging management module to power the processor, internal memory, display screen, camera, and wireless communication module. The power management module can also monitor parameters such as battery capacity, battery cycle count, and battery health status (leakage current, impedance). In some embodiments, the power management module may be located within the processor. In other embodiments, the power management module and the charging management module may be located in the same device.

[0105] Wireless communication functionality in electronic devices can be implemented through antennas, mobile communication modules, wireless communication modules, modem processors, and baseband processors. Antennas are used to transmit and receive electromagnetic wave signals. Mobile communication modules can provide solutions for wireless communication applications in electronic devices, including 2G / 3G / 4G / 5G. In some embodiments, at least some functional modules of the mobile communication module can be housed in the same device as at least some modules of the processor.

[0106] Wireless communication modules can provide solutions for at least one of the following wireless communication technologies used in electronic devices: Wireless Local Area Networks (WLANs) (such as Wireless Fidelity (Wi-Fi) networks), Bluetooth (BT), Global Navigation Satellite System (GNSS), Frequency Modulation (FM), Near Field Communication (NFC), and Infrared (IR), but are not limited to these. A wireless communication module can be one or more devices integrating at least one communication processing module. The wireless communication module receives electromagnetic waves via an antenna, modulates and filters the electromagnetic wave signal, and sends the processed signal to a processor. The wireless communication module can also receive signals to be transmitted from the processor, modulate and amplify them, and then radiate them as electromagnetic waves via the antenna.

[0107] The electronic device provided in this application embodiment can achieve the same beneficial effects as the photocurrent calibration circuit described in any of the above embodiments, and will not be repeated here.

[0108] Based on the photocurrent calibration method described in any of the above embodiments, this application also provides a computer-readable storage medium. For example, a non-transitory computer-readable storage medium may be a read-only memory (ROM), a random access memory (RAM), a CD-ROM, magnetic tape, a floppy disk, and an optical data storage device, etc. This storage medium stores computer instructions for executing the photocurrent calibration method described in any of the above embodiments, which will not be elaborated further here.

[0109] Those skilled in the art will understand that all or part of the steps of the above embodiments can be implemented by hardware, or by a program instructing related hardware to implement them. The program can be stored in a computer-readable storage medium, such as a read-only memory, a disk, or an optical disk.

[0110] Other embodiments of this application will readily occur to those skilled in the art upon consideration of the specification and practice of the disclosure herein. This application is intended to cover any variations, uses, or adaptations thereof that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this application are indicated by the claims.

Claims

1. A photocurrent calibration circuit, characterized in that, Includes current sampling circuit, signal processing unit, current-to-analog converter and injection switch; The input terminal of the current sampling circuit is used to connect to the cathode of the photodiode. The current sampling circuit is used to collect the current of the photodiode and convert the current into a digital current. The signal processing unit is configured to compare the digital current with a set target current to obtain a first comparison result. Then, based on the first comparison result, it adjusts the current calibration data stored in the register using a binary search method. It reads the current digital-to-analog conversion calibration data and duty cycle characterization data from the register, sends the current digital-to-analog conversion calibration data to the current digital-to-analog converter, and converts the duty cycle characterization data into an injection pulse signal and sends it to the injection switch. This process continues until the binary search method iterations are completed. Finally, based on the current calibration data ultimately stored in the register, it determines the target current digital-to-analog conversion calibration data and the target duty cycle characterization data. The current calibration data is formed by concatenating the current digital-to-analog conversion calibration data and the duty cycle characterization data. The current digital-to-analog converter is used to convert the current digital-to-analog conversion calibration data into a calibration current; The injection switch is connected between the output terminal of the current digital-to-analog converter and the input terminal of the current sampling circuit. The injection switch is used to adjust the duty cycle of the calibration current compensated to the photosensitive diode under the control of the injection pulse signal.

2. The photocurrent calibration circuit according to claim 1, characterized in that, The current calibration data is in binary code; when the signal processing unit adjusts the current calibration data stored in the register using a binary search method based on the first comparison result, it specifically performs the following: If the first comparison result indicates that the digital current is greater than the target current, the current calibration data stored in the register is increased using a binary search method. If the first comparison result indicates that the digital current is less than or equal to the target current, the current calibration data stored in the register is reduced using a binary search method.

3. The photocurrent calibration circuit according to claim 1, characterized in that, The current calibration data is in binary code, with the current digital-to-analog conversion calibration data concatenated in the high-order bits and the duty cycle characterization data concatenated in the low-order bits. The signal processing unit is specifically used to read the target current digital-to-analog conversion bit data of the current calibration data from the register during each binary search iteration to obtain the current digital-to-analog conversion calibration data, and to read the target duty cycle characterization bit data of the current calibration data from the register to obtain the duty cycle characterization data. The target current digital-to-analog conversion bit and the target duty cycle characterization bit are determined based on the set calibration mode, the bit width of the current digital-to-analog conversion calibration data, and the bit width of the duty cycle characterization data.

4. The photocurrent calibration circuit according to claim 3, characterized in that, When the calibration mode is coarse adjustment mode and the bit width of the current digital-to-analog conversion calibration data is greater than or equal to the bit width of the duty cycle characterization data, the target current digital-to-analog conversion bit is a+1 binary bits starting from the most significant bit of the current calibration data, and the target duty cycle characterization bit is b+1 binary bits truncated from the least significant bit to the most significant bit of the target current digital-to-analog conversion bit. When the calibration mode is coarse adjustment mode and the bit width of the current digital-to-analog conversion calibration data is smaller than the bit width of the duty cycle characterization data, the target current digital-to-analog conversion bits are a+1 binary bits starting from the most significant bit of the current calibration data, and the target duty cycle characterization bits are b+1 binary bits starting from the most significant bit of the current calibration data. Where a represents the most significant bit of the current digital-to-analog conversion calibration data, and a+1 represents the bit width of the current digital-to-analog conversion calibration data; b represents the most significant bit of the duty cycle characterization data, and b+1 represents the bit width of the duty cycle characterization data.

5. The photocurrent calibration circuit according to claim 3, characterized in that, When the calibration mode is fine-tuning mode, the target current digital-to-analog conversion bits are a+1 binary bits starting from the most significant bit of the current calibration data, and the target duty cycle characterization bits are b+1 binary bits truncated from the least significant bit to the most significant bit of the current calibration data. Where a represents the most significant bit of the current digital-to-analog conversion calibration data, and a+1 represents the bit width of the current digital-to-analog conversion calibration data; b represents the most significant bit of the duty cycle characterization data, and b+1 represents the bit width of the duty cycle characterization data.

6. The photocurrent calibration circuit according to claim 1, characterized in that, When the calibration mode is coarse adjustment mode, the number of iterations of the binary search method is M; where M is the maximum bit width between the bit width of the current digital-to-analog conversion calibration data and the bit width of the duty cycle characterization data. When the calibration mode is fine-tuning mode, the number of iterations of the binary search method is a+b+1 times; where a represents the highest bit of the current digital-to-analog conversion calibration data and b represents the highest bit of the duty cycle characterization data.

7. The photocurrent calibration circuit according to any one of claims 1 to 6, characterized in that, When the signal processing unit determines the target current digital-to-analog conversion calibration data and the target duty cycle characterization quantity data based on the current calibration data finally stored in the register, it is specifically used for: The current digital-to-analog conversion calibration data read from the final current calibration data stored in the register is sent to the current digital-to-analog converter, and the duty cycle characterization data read from the final current calibration data stored in the register is converted into an injection pulse signal and sent to the injection switch; The digital current sent by the current sampling circuit is compared with the target current to obtain a second comparison result; Based on the current digital-to-analog conversion calibration data and duty cycle characterization data read from the current calibration data finally stored in the register, the target current digital-to-analog conversion calibration data and target duty cycle characterization data are determined according to the second comparison result.

8. The photocurrent calibration circuit according to claim 7, characterized in that, The signal processing unit is specifically used for: If the second comparison result is that the digital current is less than or equal to the target current, the current digital-to-analog conversion calibration data and duty cycle characterization data read from the current calibration data finally stored in the register are adjusted based on the set calibration mode to obtain the target current digital-to-analog conversion calibration data and target duty cycle characterization data. If the second comparison result indicates that the digital current is greater than the target current, the current digital-to-analog conversion calibration data and duty cycle characterization data read from the current calibration data finally stored in the register are determined as the target current digital-to-analog conversion calibration data and the target duty cycle characterization data.

9. The photocurrent calibration circuit according to claim 8, characterized in that, The current calibration data is in binary code; the signal processing unit is specifically used for: When the calibration mode is coarse adjustment mode, the target current digital-to-analog conversion calibration data is obtained by subtracting 1 from the current calibration data finally stored in the register, and the duty cycle characterization data read from the current calibration data finally stored in the register is determined as the target duty cycle characterization data. When the calibration mode is fine-tuning mode, the current digital-to-analog conversion calibration data read from the current calibration data finally stored in the register is determined as the target current digital-to-analog conversion calibration data, and the duty cycle characterization data read from the current calibration data finally stored in the register is subtracted by 1 to obtain the target duty cycle characterization data.

10. A method for calibrating photocurrent, characterized in that, Applied to the photocurrent calibration circuit as described in any one of claims 1 to 9; The photocurrent calibration method includes: The digital current sent by the current sampling circuit is compared with the set target current to obtain the first comparison result; Based on the first comparison result, the current calibration data stored in the register is adjusted using the bisection method. The current digital-to-analog conversion calibration data and duty cycle characterization data in the current calibration data are read from the register. The current digital-to-analog conversion calibration data is sent to the current digital-to-analog converter, and the duty cycle characterization data is converted into an injection pulse signal and sent to the injection switch. After the bisection method iteration is completed, the target current digital-to-analog conversion calibration data and target duty cycle characterization data are determined based on the final current calibration data stored in the register. The current calibration data is formed by splicing the current digital-to-analog conversion calibration data and the duty cycle characterization data.

11. A chip, characterized in that, Includes the photocurrent calibration circuit as described in any one of claims 1 to 9.

12. An electronic device, characterized in that, It includes the photocurrent calibration circuit as described in any one of claims 1 to 9, or the chip as described in claim 11.

13. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the photocurrent calibration method as described in claim 10.

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