A method, system, device and storage medium for improving crosstalk noise

Abstract

This invention discloses a method, system, device, and storage medium for improving crosstalk noise. The core of this noise improvement method lies in two aspects: firstly, importing the physical coordinate information of the chip layout, enabling noise repair to incorporate this physical information; secondly, improving the anti-interference capability of the affected party and reducing the driving capability of the interfering party by changing the multiple, value, or channel length of the standard cells of the interfering or affected party; and thirdly, reducing coupling capacitance by inserting buffers in the middle of the affected lines, ultimately achieving noise repair. This improvement method and system can anticipate the impact on the chip layout after optimization operations, adjust the repair path in a timely manner, provide the optimal solution, and directly determine whether noise violations still exist after repair, greatly shortening the iteration time of noise optimization.

Description

Technical Field

[0001] This invention relates to the field of noise processing technology, and in particular to methods for suppressing and repairing crosstalk noise, as well as systems, devices and storage media for implementing such methods. Background Technology

[0002] With the continuous advancement of semiconductor process technology, as chips have entered the ultra-deep submicron realm, the pursuit of improved circuit functionality and performance has led to increasingly larger chip sizes, more metal layers, and reduced linewidth and spacing. This has resulted in interconnect capacitance accounting for a significantly larger proportion of the total capacitance, making crosstalk noise problems more pronounced. The emergence of noise causes variations in device cell delays, making it difficult to meet timing requirements for setup and hold times. In severe cases, this can generate glitches, affecting the circuit's logic functionality.

[0003] Crosstalk noise is divided into functional noise and delay noise. Functional noise (static noise) refers to glitches caused by voltage changes in the interfering line when the affected line is initially in a static state (constant 0 or constant 1). When these glitches exceed the noise tolerance and alter the original signal value, the memory captures the change, leading to a functional error. Delay noise refers to the interference line simultaneously changing its voltage, causing the transition time of the affected line to speed up or slow down, thus affecting setup and hold times. If this type of noise does not exceed the noise tolerance and the timing meets design requirements, it can be ignored and requires no treatment. However, if the timing cannot meet design requirements, noise reduction is necessary. Furthermore, noise signals may be amplified during propagation, causing continuous switching on the affected line, which can also lead to functional errors.

[0004] Currently, the industry mainly addresses crosstalk noise issues through noise verification and noise repair. The general approach involves first performing noise analysis to identify areas in the design where noise exceeds noise tolerance limits. Then, automatic placement and routing tools are used to manually adjust these areas to reduce coupling capacitance or increase the anti-interference capability of standard cells. Finally, verification and repair are performed again, iterating multiple times until the noise is eliminated. This method suffers from drawbacks such as low efficiency and numerous crosstalk noise violations. Summary of the Invention

[0005] The following description of the invention illustrates the contribution of this invention to the prior art.

[0006] The problem addressed by this invention is that the verification and repair process for crosstalk noise suffers from numerous noise violations and low efficiency.

[0007] One objective of this invention is to provide an efficient method for improving crosstalk noise. After automatic placement and routing, the method mitigates crosstalk noise caused by capacitive coupling by methods such as skipping metal lines, reducing parallel trace lengths, and increasing trace spacing. The steps of this crosstalk noise improvement method include:

[0008] S1. Start the device density control unit and control the density of standard cells in densely wired areas according to the overall layout of the chip. By adding soft blocking blocks for logic cells, standard cells are not placed in densely wired areas.

[0009] S2. Standard cells are placed using automatic layout cells;

[0010] S3. After completing the automatic layout, insert a buffer to reduce the wiring coupling capacitance.

[0011] S4. Use the routing pre-control unit to obtain the standard cell density distribution map, the standard cell external pipe pin density distribution map and the global hypothetical routing map, adjust and optimize the routing direction of the local area, and then complete the actual routing of the layout.

[0012] S5. Cabling inspection and optimization;

[0013] S6, Insert Dummy;

[0014] S7. Perform noise detection and output a noise detection report. For areas where the noise exceeds the noise tolerance value, proceed to step S8.

[0015] S8, Noise Repair;

[0016] S9. Execute the noise repair instruction file output in step S8 and perform physical repair on the layout.

[0017] Further, step S3 includes:

[0018] Automatic layout involves extracting the straight-line distance between two connected standard cells after the standard cells are placed and storing it in a temporary information table A.

[0019] From temporary information table A, filter out data whose straight-line distance is greater than the limit value M and store them in the pending list B;

[0020] Based on the list of cells to be processed, insert buffers at equal intervals between two interconnected standard cells, with a recommended spacing of M between adjacent buffers.

[0021] Further, step S5 includes:

[0022] Same-layer detection: Detect the interconnect signal lines of any object and find two or more lines within 4 times the pitch of the same layer metal wiring layer. When the length of the parallel line exceeds the limit value M, the disturbed line will be skipped in metal layer every N micrometers (Mn+2 or Mn-2) or the distance between the interfering line and the disturbed line will be increased.

[0023] Cross-layer detection: Detects two or more lines in adjacent metal wiring layers. When the length of their parallel lines exceeds the limit value M, they are skipped to another layer.

[0024] Global detection detects the actual wiring length between two interconnected standard units. When the total length of all wiring layers connecting the two standard units exceeds the limit value M, the buffer is inserted again using the method in step S3.

[0025] Further, step S6 includes:

[0026] The Dummy unit uses the GDS file to obtain the direction information of the wiring layer to be inserted into the Dummy area, and records this coordinate information in the temporary management table C;

[0027] Insert the Dummy perpendicular to the cabling direction, based on the cabling direction information in Temporary Management Table C.

[0028] Further, step S8 includes:

[0029] S81. Using the noise detection report, extract the path information of the noise violation, and prepare the DEF file of the detected data.

[0030] S82. The anti-interference capability of the disturbed party can be improved and the driving capability of the interfering party can be reduced by changing the multiple of the standard cell of the interfering party or the disturbed party, or by changing the threshold value, or by changing the channel length; a buffer can also be inserted in the middle of the disturbed line.

[0031] S83. Import the DEF file and combine the above repair methods with the actual physical signals of the layout to determine the feasibility of the repair approach.

[0032] Further, step S83 includes:

[0033] Obtain the noise tolerance value A and the noise violation amount B of the violation path before repair, where B > A;

[0034] Case 1: When step S8 uses the method of changing standard cell attributes (including changes to threshold, channel length, and tube multiple), refer to the "Device Attribute Table" to find the noise tolerance value A' corresponding to the changed standard cell. When the noise tolerance value A' is greater than the noise violation amount B after the repair (when only the standard cell attributes are changed, the external wiring environment is basically unchanged, so the noise violation amount is still B), it indicates that the repair is effective.

[0035] Case 2: When step S8 uses the method of inserting a buffer, it is equivalent to reducing the inter-line coupling capacitance Cc. The noise violation amount after inserting the buffer is B', B' = B / (number of buffers + 1). When the noise tolerance value A of the violation path before repair is greater than the noise violation amount B' after inserting the buffer, it indicates that the repair is effective.

[0036] Case 3: For cases where both standard cell attribute changes and buffer insertion are combined, obtain the noise tolerance value A' after the standard cell change and the noise violation amount B' after the buffer insertion. When A' > B', it indicates that the repair is effective.

[0037] When the number of noise violations corresponding to different noise repair methods is less than the noise tolerance value, the noise repair method will generate an instruction file.

[0038] Another object of the present invention is to provide a crosstalk noise improvement system capable of implementing the method.

[0039] Another object of the present invention is to provide an apparatus for a method of improving crosstalk noise, the apparatus comprising:

[0040] A memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that the processor, when executing the computer program, implements the method as described in the foregoing embodiments.

[0041] Another object of the present invention is to provide a computer-readable storage medium storing a computer program that, when executed by a processor, implements the method described in the foregoing embodiments.

[0042] Compared with existing technologies, the crosstalk noise improvement method and system of the present invention can minimize crosstalk noise in the early stage of design through a noise suppression system; then, a noise repair system is used to further repair the noise that still exists after the noise suppression system repairs it; by importing the physical information of the layout through the noise repair system, the feasibility of the repair path can be determined in the repair stage, the optimal repair path can be quickly found, and the design cycle can be shortened, which has obvious advantages in advanced process chip design.

[0043] The design concept, principle, and implementation means of the present invention will be described below with reference to the accompanying drawings and embodiments, so as to more clearly describe the technical features and beneficial effects of the present invention. Attached Figure Description

[0044] The accompanying drawings provided herein are used to further illustrate embodiments of the present invention and constitute a part of this application, but do not constitute a limitation on the embodiments of the present invention.

[0045] Figure 1 This is a flowchart of crosstalk noise improvement in Embodiment 1 of the present invention;

[0046] Figure 2 This is a flowchart of the wiring detection and optimization process of the present invention;

[0047] Figure 3 A comparison of the traditional dummy insertion method with the low-parasitic dummy insertion method of the present invention;

[0048] Figure 4 This is a schematic diagram of the crosstalk noise improvement system in Embodiment 2 of the present invention. Detailed Implementation

[0049] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to specific examples and accompanying drawings. The illustrative embodiments and descriptions of this invention are for illustrative purposes only. However, those skilled in the art should understand that well-known structures, materials, or operating methods have not been shown or described in detail to avoid obscuring specific content.

[0050] Example 1

[0051] Analysis revealed that crosstalk noise mainly originates from capacitive coupling. When there is coupling capacitance between two adjacent signal lines, the flipping of one signal line (interference line) will inject a certain charge into the other signal line (disturbed line), causing the voltage of the disturbed line to deviate. As the process advances to ultra-deep submicron, the noise problem becomes more and more obvious. The main reasons are: (1) Increased wiring density. As the feature size, line width and line spacing of advanced processes are further reduced, advanced processes will greatly increase the complexity of wiring in order to integrate more devices onto the chip while keeping the chip area unchanged, making the wiring more crowded and the coupling capacitance between lines larger and larger. (2) Increased metal line thickness leads to increased side area. Since the metal resistance is inversely proportional to its width and thickness and directly proportional to its length, in order to reduce resistance, the thickness of metal lines in advanced processes is constantly increasing, even greater than the width. In ultra-large scale designs, the length of metal lines is longer than before, resulting in an increase in cross-coupling capacitance between metal lines. (3) Increased wiring metal layers. Under the new process, due to the reduction in device feature size and the high integration of devices, wiring becomes difficult. Therefore, compared with the previous process, metal wiring layers are added to alleviate the wiring difficulties. With the increase of metal layers, the distance between the upper metal layer and ground increases, the capacitance to ground decreases, and the proportion of cross-coupling capacitance between the upper metal layers increases. (4) Increased operating frequency. Under high-frequency operation, the noise sources generated by device charging and discharging increase, and with the increasing coupling capacitance, the impact of crosstalk superposition becomes more and more serious. (5) Reduced operating voltage. With the reduction of voltage, the noise margin decreases, and noise violations are more likely to occur.

[0052] This invention provides an efficient method for improving crosstalk noise, which differs from existing methods in that: (1) a noise suppression system is used to avoid most crosstalk noise in advance from the initial design stage to the layout and routing stage, reducing the number of noise violations; (2) a noise repair system is used to repair the crosstalk noise that the noise suppression system failed to eliminate. Since the noise repair system incorporates the physical information of the layout, it can determine in advance whether the repair strategy can be physically implemented during the noise repair stage, thereby saving repair time.

[0053] The crosstalk noise reduction method of the present invention includes the following steps:

[0054] S1. Activate the device density control unit and control the density of standard cells in densely wired areas according to the overall layout diagram (Floorplan) of the chip. By adding soft blockages for logic cells, standard cells are not placed in densely wired areas.

[0055] S2. Automatic placement of standard cells.

[0056] S3. After completing the automatic layout, insert a buffer to reduce the wiring coupling capacitance.

[0057] Furthermore, step S3 specifically includes:

[0058] Automatic layout involves extracting the straight-line distance between two connected standard cells after the standard cells are placed and storing it in a temporary information table A.

[0059] From temporary information table A, filter out data whose straight-line distance is greater than the limit value M and store them in the pending list B;

[0060] Based on the list of cells to be processed, insert buffers at equal intervals between two interconnected standard cells, with a recommended spacing of M between adjacent buffers.

[0061] It should be noted that the recommended limit value M is 80um for the 40nm process and 50nm for the 22nm process.

[0062] By inserting a buffer to cut long wiring, the wiring between two standard units is shortened, the wiring coupling capacitance is reduced, and crosstalk noise is suppressed.

[0063] S4. Using the routing pre-control unit, obtain the standard cell density distribution map, the standard cell external connector pin density distribution map, and the global hypothetical routing map (using the default routing rules). Adjust and optimize the routing direction of local areas, and then complete the actual routing of the layout. The method for optimizing the routing direction of local areas is to combine the entire hypothetical routing map. If a local area is found to be congested, it means that the default routing rules of that area are unreasonable and its routing direction needs to be adjusted. Reverse the default routing direction of the unreasonable routing area (i.e., change horizontal to vertical, and vertical to horizontal), while other areas retain the default routing rules.

[0064] S5. Cabling inspection and optimization, such as Figure 2 As shown, it specifically includes:

[0065] (1) Same-layer detection: Detect the interconnect signal lines (net) of any object, and find two or more lines within a range of 4 times the pitch of the same metal wiring layer (Mn layer). When the length of the parallel lines exceeds the limit value M, the disturbed lines are skipped in the metal layer every N micrometers (Mn+2 or Mn-2) or the spacing between the interfering lines and the disturbed lines is increased. Pitch refers to the center-to-center distance between two signal lines under the minimum wiring rule, which is one pitch.

[0066] (2) Cross-layer detection: detect two or more lines in adjacent metal wiring layers (Mn and Mn+1 or Mn and Mn-1). When the length of their parallel lines exceeds the limit value M, they are skipped.

[0067] The steps for skipping layers are to first obtain the routing direction of any object, then determine whether there is routing space in the metal layer (Mn+2 or Mn-2) that is one layer apart. If there is routing space, then skip the metal lines that are parallel to the object.

[0068] (3) Global detection: detect the actual wiring length between two interconnected standard units. When the total length of all wiring layers connecting the two standard units exceeds the limit value M, the buffer is inserted again using the method in step S3.

[0069] It should be noted that in same-layer or cross-layer detection, if the conditions are not met and no layer skipping or line spacing is not increased, noise violations will be repaired through the noise repair unit if they occur later.

[0070] S6. Insert a dummy. A dummy is a filler without logical function, used to ensure density balance in different areas and flatness in each layer. Specific steps include:

[0071] The Dummy unit uses the GDS file to obtain the direction information of the wiring layer to be inserted into the Dummy area, and records this coordinate information in the temporary management table C;

[0072] Based on the wiring direction information in temporary management table C, insert the dummy perpendicular to the wiring direction; the effect is as follows. Figure 3 As shown. This method of inserting the dummy perpendicular to the wiring direction can better reduce the coupling capacitance between wirings and suppress noise generation.

[0073] S7. Use the PT tool to perform noise detection on the design data and output a noise detection report. For areas where the noise exceeds the noise tolerance value (noise violation exists), jump to S8 to perform noise repair.

[0074] S8. Noise repair includes the following steps:

[0075] S81. Using the noise detection report, extract the path information of noise violations (including the standard cell name, address, noise tolerance value, and violation amount of the violation), and at the same time prepare the DEF file (i.e., Design exchange format, which is a chip data format containing detailed graphical configuration information of chip physics) of the detected data.

[0076] S82. The noise reduction capability of the affected party can be improved by changing the multiple of the standard cells of the interfering or affected party, changing the threshold value, or changing the channel length; alternatively, a buffer can be inserted in the middle of the affected line. These noise reduction methods can be used individually or in combination.

[0077] It should be noted that the affected party refers to the standard cell whose noise exceeds the noise tolerance value due to the influence of adjacent line capacitive coupling, and the lines connected to it. The interfering party refers to the standard cell that has a direct parasitic effect on the affected party, and the lines connected to it.

[0078] S83. Import the DEF file and combine the above repair methods with the actual physical signals of the layout to determine the feasibility of the repair approach, specifically including:

[0079] Obtain the noise tolerance value A and the noise violation amount B of the violation path before repair, where B > A;

[0080] Case 1: When step S8 uses the method of changing standard cell attributes (including changes to threshold, channel length, and tube multiple), refer to the "Device Attribute Table" to find the noise tolerance value A' corresponding to the changed standard cell. When the noise tolerance value A' is greater than the noise violation amount B after the repair (when only the standard cell attributes are changed, the external wiring environment is basically unchanged, so the noise violation amount is still B), it indicates that the repair is effective.

[0081] Case 2: When step S8 uses the method of inserting a buffer, it is equivalent to reducing the inter-line coupling capacitance Cc. The noise violation amount after inserting the buffer is B', B' = B / (number of buffers + 1). When the noise tolerance value A of the violation path before repair is greater than the noise violation amount B' after inserting the buffer, it indicates that the repair is effective.

[0082] Case 3: For cases where both standard cell attribute changes and buffer insertion are combined, obtain the noise tolerance value A' after the standard cell change and the noise violation amount B' after the buffer insertion. When A' > B', it indicates that the repair is effective.

[0083] When the number of noise violations corresponding to the above different noise repair methods is less than the noise tolerance value, the noise repair method will generate an instruction file.

[0084] S9. Execute the noise repair instruction file output in step S8 and perform physical repair on the layout.

[0085] The noise improvement method provided by this invention, on the one hand, utilizes a noise repair system to first identify all regions exceeding the noise tolerance limit, and then imports a file recording the physical coordinate information of the entire chip layout, enabling noise repair to incorporate physical information. On the other hand, it improves the anti-interference capability of the affected party and reduces the driving capability of the interfering party by changing the multiple of the standard cells of the interfering or affected party, changing the threshold size, or changing the channel length. Furthermore, it reduces the coupling capacitance by inserting a buffer in the middle of the affected line, ultimately achieving noise repair. Because physical information is imported, the noise repair system can anticipate the impact on the chip layout after optimization operations, adjust the repair approach in a timely manner, provide the optimal solution, and directly determine whether noise violations still exist after repair, greatly shortening the iteration time of noise optimization.

[0086] Example 2

[0087] The difference between this embodiment and Embodiment 1 is that this embodiment provides a system for implementing the above-described crosstalk noise reduction method, the system as follows: Figure 4 As shown, the crosstalk noise suppression and repair system includes:

[0088] Device density pre-control unit, used to control the density of standard cells in densely wired areas according to the overall layout of the chip;

[0089] Automatic placement cells are used to place standard cells.

[0090] A buffer insertion unit is used to insert buffers at equal intervals between two interconnected standard units;

[0091] The wiring pre-control unit acquires the standard cell density distribution map, the standard cell external connector pin density distribution map, and the global hypothetical wiring map, and optimizes the wiring direction in local areas;

[0092] Automatic routing unit, used to perform actual routing of the layout;

[0093] The wiring inspection and optimization unit is used to perform same-layer inspection, cross-layer inspection and global inspection, and to perform processing steps such as metal layer skipping, increasing line spacing and inserting buffers;

[0094] Dummy insertion unit: Use GDS file to obtain the direction information of the wiring layer of the area where dummy needs to be inserted, and insert dummy perpendicular to the wiring direction;

[0095] The noise detection unit performs noise detection on the design data and outputs a noise detection report.

[0096] The noise repair unit selects a noise repair path and determines the feasibility of the repair.

[0097] The result output unit outputs the repair path in the form of an instruction file when the repair is effective.

[0098] Another embodiment of the present invention provides an apparatus for a method to improve crosstalk noise, the apparatus comprising:

[0099] A memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that the processor, when executing the computer program, implements the method as described in the foregoing embodiments.

[0100] Another embodiment of the present invention provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the method described in the foregoing embodiments.

[0101] The various technical features of the embodiments described above can be combined arbitrarily. For the sake of brevity, not all possible combinations of the various technical features in the above embodiments are described. However, as long as the combination of these technical features does not contradict each other, it should be considered to be within the scope of this specification. Moreover, the terms "having," "comprising," "including," and similar terms should be understood as "comprising," unless otherwise specifically stated. In addition, the accompanying drawings are provided for the purpose of explaining to those skilled in the art, and the drawings are not necessarily drawn to scale.

Claims

1. A method for improving crosstalk noise, characterized in that, The method includes: S1. Start the device density control unit and control the density of standard cells in densely wired areas according to the overall layout of the chip. By adding soft blocking blocks for logic cells, standard cells are not placed in densely wired areas. S2. Standard cells are placed using automatic layout cells; S3. After completing the automatic layout, insert a buffer to reduce the wiring coupling capacitance. S4. Use the routing pre-control unit to obtain the standard cell density distribution map, the standard cell external pipe pin density distribution map and the global hypothetical routing map, adjust and optimize the routing direction of the local area, and then complete the actual routing of the layout. S5. Cabling inspection and optimization; S6, Insert Dummy; S7. Perform noise detection and output a noise detection report. For areas where the noise exceeds the noise tolerance value, proceed to step S8. S8, Noise Repair; S9. Execute the noise repair instruction file output in step S8 and perform physical repair on the layout.

2. The method for improving crosstalk noise according to claim 1, characterized in that, Step S3 includes: Automatic layout involves extracting the straight-line distance between two connected standard cells after the standard cells are placed and storing it in a temporary information table A. From temporary information table A, filter out data whose straight-line distance is greater than the limit value M and store them in the pending list B; Based on the list of cells to be processed, insert buffers at equal intervals between two interconnected standard cells, with a recommended spacing of M between adjacent buffers.

3. The method for improving crosstalk noise according to claim 1, characterized in that, Step S5 includes: Same-layer detection: Detect the interconnect signal lines of any object and find two or more lines within 4 times the pitch of the same layer metal wiring layer. When the length of the parallel line exceeds the limit value M, the disturbed line will be skipped in metal layer every N micrometers (Mn+2 or Mn-2) or the distance between the interfering line and the disturbed line will be increased. Cross-layer detection: Detects two or more lines in adjacent metal wiring layers. When the length of their parallel lines exceeds the limit value M, they are skipped to another layer. Global detection detects the actual wiring length between two interconnected standard units. When the total length of all wiring layers connecting the two standard units exceeds the limit value M, the buffer is inserted again using the method in step S3.

4. The method for improving crosstalk noise according to claim 1, characterized in that, Step S6 includes: The Dummy unit uses the GDS file to obtain the direction information of the wiring layer to be inserted into the Dummy area, and records this coordinate information in the temporary management table C; Insert the Dummy perpendicular to the cabling direction, based on the cabling direction information in Temporary Management Table C.

5. The method for improving crosstalk noise according to claim 1, characterized in that, Step S8 includes: S81. Using the noise detection report, extract the path information of the noise violation, and prepare the DEF file of the detected data. S82. The anti-interference capability of the disturbed party can be improved and the driving capability of the interfering party can be reduced by changing the multiple of the standard cell of the interfering party or the disturbed party, or by changing the threshold value, or by changing the channel length; a buffer can also be inserted in the middle of the disturbed line. S83. Import the DEF file and combine the above repair methods with the actual physical signals of the layout to determine the feasibility of the repair approach.

6. The method for improving crosstalk noise according to claim 5, characterized in that, Step S83 includes: Obtain the noise tolerance value A and the noise violation amount B of the violation path before repair, where B > A; Case 1: When step S8 uses the method of changing standard cell attributes (including changes to threshold, channel length, and tube multiple), refer to the "Device Attribute Table" to find the noise tolerance value A' corresponding to the changed standard cell. When the noise tolerance value A' is greater than the noise violation amount B after the repair (when only the standard cell attributes are changed, the external wiring environment is basically unchanged, so the noise violation amount is still B), it indicates that the repair is effective. Case 2: When step S8 uses the method of inserting a buffer, it is equivalent to reducing the inter-line coupling capacitance Cc. The noise violation amount after inserting the buffer is B', B' = B / (number of buffers + 1). When the noise tolerance value A of the violation path before repair is greater than the noise violation amount B' after inserting the buffer, it indicates that the repair is effective. Case 3: For cases where both standard cell attribute changes and buffer insertion are combined, obtain the noise tolerance value A' after the standard cell change and the noise violation amount B' after the buffer insertion. When A' > B', it indicates that the repair is effective. When the number of noise violations corresponding to different noise repair methods is less than the noise tolerance value, the noise repair method will generate an instruction file.

7. A system capable of implementing the crosstalk noise improvement method as described in any one of claims 1-6, characterized in that, The system includes: Device density pre-control unit, used to control the density of standard cells in densely wired areas according to the overall layout of the chip; Automatic placement cells are used to place standard cells. A buffer insertion unit is used to insert buffers at equal intervals between two interconnected standard units; The wiring pre-control unit acquires the standard cell density distribution map, the standard cell external connector pin density distribution map, and the global hypothetical wiring map, and optimizes the wiring direction in local areas; Automatic routing unit, used to perform actual routing of the layout; The wiring inspection and optimization unit is used to perform same-layer inspection, cross-layer inspection and global inspection, and to perform processing steps such as metal layer skipping, increasing line spacing and inserting buffers; Dummy insertion unit: Use GDS file to obtain the direction information of the wiring layer of the area where dummy needs to be inserted, and insert dummy perpendicular to the wiring direction; The noise detection unit performs noise detection on the design data and outputs a noise detection report. The noise repair unit selects a noise repair path and determines the feasibility of the repair. The result output unit outputs the repair path in the form of an instruction file when the repair is effective.

8. An apparatus for improving crosstalk noise, characterized in that, The device includes: A memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that the processor, when executing the computer program, implements the method as claimed in any one of claims 1 to 6.

9. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by a processor, it implements the method as described in any one of claims 1 to 6.

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