A full-angle control system and method for a hemispherical gyroscope based on a dual-frequency carrier scheme.

Abstract

This invention discloses a full-angle control system and method for a hemispherical gyroscope based on a dual-frequency carrier scheme, employing a dual-frequency carrier excitation / readout scheme. In this scheme, two high-frequency carriers of different frequencies are used to excite / read out the hemispherical gyroscope. x, y The electrostatic driving force signal in the directional direction is modulated and applied to the circumferential excitation electrodes of the gyroscope, causing the vibration signals in the two axes to propagate in mutually independent frequency bands. At this time, the resonator's spherical shell acts as a common capacitor plate; therefore, a front-end amplifier is used to read the modulation signals of the two axes from the resonator, which are then fed into subsequent circuits for filtering and demodulation to obtain the displacement information for each axis. Since the signal originates from... x, y The detection signals from both axes are read out through the same circuit, thereby suppressing the asymmetry of the anisotropic electrodes and x, y This system detects errors caused by asymmetry in analog circuit parameters. It achieves full-angle output functionality for a hemispherical resonant gyroscope and possesses high practical value.

Description

Technical Field

[0001] This invention belongs to the field of hemispherical resonant gyroscope control technology, specifically relating to a hemispherical resonant gyroscope full-angle control system and method based on a dual-frequency carrier scheme. Background Technology

[0002] As a type of solid-state wave gyroscope, the micro-hemispherical resonator gyroscope has wide applications in resource exploration, strategic guidance, aerospace, and other fields due to its advantages such as simple structure, high precision, high reliability, and strong anti-disturbance capability. The full-angle control mode of the hemispherical resonator gyroscope is a rate integral operating mode, which can directly output the current precession angle with a large angle measurement bandwidth, making it of high research value.

[0003] However, the complexity of the control principle of the full-angle mode greatly increases the design difficulty of its measurement and control system. Based on the kinematic principle of the hemispherical harmonic oscillator and the existing technical conditions in the laboratory, this invention studies and implements a digital measurement and control system for the full-angle control mode of a micro-hemispherical resonant gyroscope. The implemented full-angle measurement and control system for the micro-hemispherical resonant gyroscope can realize the function of real-time detection of the rotation angle in physical space by reading the mode precession angle. Summary of the Invention

[0004] To address the aforementioned issues, this invention discloses a full-angle control system for a hemispherical resonant gyroscope based on a dual-frequency carrier scheme. Using a Zynq SoC as the main control core and employing a dual-frequency carrier excitation / readout scheme, a digital measurement and control circuit system is researched and implemented. This system realizes the full-angle output function of the hemispherical resonant gyroscope, providing a new research approach for improving the full-angle mode control accuracy of hemispherical resonant gyroscopes.

[0005] To achieve the above objectives, the technical solution of the present invention is as follows:

[0006] A full-angle control system for a hemispherical resonant gyroscope based on a dual-frequency carrier scheme includes a front-end excitation / readout module, a signal processing module, and a back-end loop control module. The front-end excitation / readout circuit adopts a dual-frequency carrier modulation scheme. After the signal read from the common plate is amplified, it enters the signal processing module, where carrier demodulation and filtering are used to obtain the x and y axial displacement signals. These signals are then demodulated into a low-frequency variable c by the phase-locked loop signal. x s x c y s y Then, through combined calculations, E, Q, L, and θ are obtained and sent to the back-end loop control module, corresponding to the control quantities of the amplitude loop, quadrature loop, phase loop, and precession angle output. The corresponding control force is obtained through PI control and coupled with the carrier wave and DC voltage, and finally applied to the x and y plane external excitation electrodes in real time to complete the closed-loop control of the system.

[0007] The front-end circuit includes a front-end excitation circuit and a front-end amplification circuit. The former converts the voltage signal output by the DAC into a suitable electrostatic driving force and applies it to the excitation electrode after carrier modulation. The latter is responsible for amplifying the weak voltage signal from the resonator readout terminal to a level that the ADC chip can pick up with as little distortion as possible.

[0008] The dual-frequency carrier-based excitation method uses an excitation signal f that tracks the resonant frequency along the x and y axes. x f y The signal is modulated onto a high-frequency carrier wave of different frequencies. The carrier wave and the excitation force are coupled and modulated through an adder circuit to obtain a modulated high-frequency AC signal. This signal is then inverted by an inverter to obtain an inverted high-frequency AC signal, which is then coupled with a DC voltage of the corresponding axis to obtain electrostatic force signals Vx+, Vx-, Vy+, and Vy- on the two axial electrodes. These signals are applied to the positive and negative excitation electrodes on the x and y axes, respectively, forming a differential push-pull drive.

[0009] The function of the front-end amplifier circuit is to convert the physical signal of the gyroscope's vibration into an electrical signal through the change of the parallel plate capacitor, that is, to extract the readout signal output by the gyroscope head. Since the vibration signal on the spherical shell is extremely weak, this amplifier circuit also needs a sufficiently high gain level and signal-to-noise ratio to ensure smooth reading by the subsequent analog-to-digital conversion circuit. This is generally achieved using a charge amplifier. This invention uses a charge amplifier with a "T-type RC" network. The T-type RC network changes the first-order high-pass filtering characteristic of a conventional charge amplifier to a second-order high-pass filtering characteristic, providing higher noise suppression capability in the low-frequency range and improving the signal-to-noise ratio for high-frequency signal detection.

[0010] The beneficial effects of this invention are as follows:

[0011] This invention discloses a full-angle control system for a hemispherical resonator gyroscope based on a dual-frequency carrier scheme. Based on the kinematic principle of the hemispherical harmonic oscillator, and targeting the full-angle control mode of the hemispherical resonator gyroscope, a digital measurement and control circuit system is researched and implemented using a dual-frequency carrier excitation / readout method. This system achieves the full-angle output function of the hemispherical resonator gyroscope and has high practical value. Attached Figure Description

[0012] Figure 1 This is a framework diagram of the full-angle control system for the hemispherical resonator gyroscope designed for this invention;

[0013] Figure 2 This is a schematic diagram of the gyroscope embedded system based on ZynqSoC of the present invention;

[0014] Figure 3 This is a flowchart of the PS-end signal calculation program of the present invention. Detailed Implementation

[0015] The present invention will be further illustrated below with reference to the accompanying drawings and specific embodiments. It should be understood that the following specific embodiments are for illustrative purposes only and are not intended to limit the scope of the invention.

[0016] This invention employs a dual-frequency carrier excitation / readout scheme. In this scheme, two high-frequency carriers of different frequencies modulate the electrostatic driving force signals in the x and y directions and apply them to the circumferential excitation electrodes of the gyroscope, allowing the vibration signals of the two axes to propagate in mutually independent signal frequency bands. At this time, the resonator shell acts as a common capacitor plate; therefore, a front-end amplifier reads the modulated signals of both axes from the resonator, which are then fed into subsequent circuits for filtering and demodulation to obtain the displacement information for each axis. Since the detection signals from both the x and y axes are read out through the same circuit, errors caused by asymmetry of the electrodes in each direction and asymmetry of the parameters of the x and y detection analog circuits are suppressed.

[0017] The main steps in implementing this invention are as follows:

[0018] Step 1: Determine the signal flow and hardware module division. After the readout signal obtained from the resonant oscillator shell is processed by the front-end circuit, it is acquired by a high-speed ADC chip and transmitted to the PL terminal of the Zynq. The two high-frequency carrier signals used in modulation are used to demodulate the readout signal, and then these two signals are bandpass filtered to obtain the displacement change signals of the x and y axes operating at the resonant frequency. At this time, the resonant frequency tracking signal generated by the phase-locked loop (PLL) is used to further demodulate the displacement signal. The four low-frequency variables are transmitted from the PL terminal to the PS terminal through the AXI bus. A series of parameter calculations are performed to obtain E, Q, and L, which are respectively associated with the amplitude control loop, the quadrature control loop, and the PLL phase tracking loop to obtain the control force f. as f qc The precession angle θ, calculated from the parameters, is orthogonally decomposed into the x and y axes, and then transmitted back to the PL terminal via the AXI bus. There, it receives modulation from the phase-locked loop reference signal to obtain the AC control force f. x and f y The output from the low-speed DAC is modulated with a high-frequency carrier wave from the corresponding high-speed DAC and applied to the excitation electrode to achieve closed-loop control. In addition to the above modules, a separate DAC chip is also required to output DC and quadrature voltages in real time.

[0019] Step Two: Divide the tasks according to the characteristics of the PS and PL terminals. The PL terminal is responsible for handling high-frequency, parallel tasks with high timing requirements, namely driving peripherals, signal transmission and reception, and filtering and demodulation. The PS terminal is responsible for more complex floating-point operations, such as extracting parameters E, Q, and L, controlling PI parameters, and communicating with the host computer. When the PL terminal communicates with the PS terminal, by defining the register address on the bus, the x and y axis detection signals are demodulated and filtered by the PL terminal to generate c. x s x c y s y The signals are stored in the input register of the AXI4 bus for the PS terminal to read, and the calculated control signals are stored in the output register for the PL terminal to read and generate control forces. Based on this idea, an IP core with an AXI bus is designed. The input ports include input clock, reset, and receiving data from the PL terminal, and the output ports output the calculated parameters to the FPGA at the PL terminal.

[0020] Step 3: Building the Peripheral Driver Hardware Logic. The main peripheral modules of this system are the digital-to-analog converter (DAC) and the analog-to-digital converter (ADC), which serve as the bridge between the digital system and the gyroscope head. For the high-speed ADC and DAC drivers, since parallel communication is used, it is only necessary to read the data from the ADC input bus into the register or transfer the data from the register to the output data bus connected to the DAC under clock synchronization. However, for the 20-bit high-precision DAC11001B with output control, SPI serial data communication is used, therefore a communication protocol module needs to be written to control it. The DAC driver logic code is then built according to the timing requirements.

[0021] Step 4: Decarrier demodulation of the readout signal (to obtain x and y displacement signals), readout signal filtering (CIC, FIR), displacement signal multiplication and demodulation (to obtain low-frequency variable c) x s x c y s y The readout signal from the resonant oscillator shell is acquired by the ADC and sent to the FPGA after passing through a front-end analog amplifier and analog filter. After demodulation by two carrier waves, it is separated into x-axis and y-axis signals, which are then filtered separately. During filtering, the first-stage CIC filter removes some high-frequency signals and downsamples the signal to a sampling frequency suitable for the FIR filter. Then, it passes through a second-stage CIC filter to upsample the signal, increasing the sampling rate to match the sampling rate of the phase-locked loop signal, in order to perform the next stage of slow variable demodulation. The entire process requires strict sampling timing control, so it is implemented using hardware logic at the ZynqPL level.

[0022] Step 5: Signal Generation Logic Design. In the dual-carrier scheme, two types of sinusoidal signals need to be continuously output: one is two high-frequency carrier signals with fixed frequencies; the other is a phase-locked loop (PLL) signal tracking the gyroscope's resonant frequency, synchronized with the resonator's vibration state by a PI controller. This module uses a PL terminal with good time synchronization. The implementation method is a lookup table approach. A ROM table for the sinusoidal signal is generated beforehand, and then BlockRAM resources are called in the FPGA as the memory for the ROM table data. The continuous output of the sinusoidal signal is achieved by continuously incrementing the address. The carrier signal is a fixed-frequency sine wave, so the address increment remains constant. However, the PLL signal tracking the resonant frequency needs continuous frequency adjustment, so the address increment is controlled by the PI controller. Finally, the digital output signal is sent to a DAC to be converted into the required analog voltage signal.

[0023] Step Six: Complete the PL-side logic function design. After designing each control module of the logic section, design the top-level module to call and instantiate each sub-module. Each instantiation is equivalent to reusing the module once in the system, similar to the function of a function in a software language. The role of the top-level module is to connect the various functional modules to form a complete FPGA on-chip hardware logic system. The entire system is encapsulated to obtain the PL-side IP core. In addition to external input clock signals, reset signal lines, and bus ports for exchanging data with the AXI bus control IP core, the PL-side control logic IP core also includes signal lines bound to the FPGA pins of the control peripherals. Finally, a BlockDesign is created in a new Vivado project, the Zynq main IP core is added, the Zynq is configured according to the hardware, and the AXI bus IP core and the encapsulated PL-side IP core are added to the design. Clicking the automatic connection option, the system will automatically generate the matching interconnect modules, using the reset signal generated by the PS end as the global reset, and the 100MHz clock signal generated by the internal PLL of the PS end as the PL-side clock. Further timing constraints and pin constraints are then completed, and finally, a bitstream file is generated.

[0024] Step 7: Complete the PS software program design. Figure 3The demonstration shows the signal calculation process on the PS (Power Supply) side. After configuring various parameters upon power-on, it enters a loop waiting for interrupt signals from the PL (Power Producer). An interrupt is triggered when four low-frequency variables are updated, initiating the interrupt service routine and starting the signal calculation process. First, the PS retrieves the low-frequency variables transmitted from the PL from the AXI bus register. Then, it calculates five important parameters: E, Q, L, S, and R. This data then enters the incremental PI controller within the phase-locked loop, amplitude, and quadrature control loops, calculating the current mode shape precession angle. Finally, the amplitude and quadrature control forces are synthesized and decomposed onto the x and y axes. In addition, the PS is responsible for transmitting important data to the host computer in real time via the UART port. The host computer program collects and saves the data for analysis and processing.

[0025] It should be noted that the above content merely illustrates the technical concept of the present invention and should not be construed as limiting the scope of protection of the present invention. For those skilled in the art, various improvements and modifications can be made without departing from the principle of the present invention, and all such improvements and modifications fall within the scope of protection of the claims of the present invention.

Claims

1. A full-angle control method for a hemispherical resonant gyroscope based on a dual-frequency carrier scheme, characterized in that: The system includes a control system comprising a front-end excitation / readout module, a signal processing module, and a back-end loop control module. The front-end excitation / readout circuit employs a dual-frequency carrier modulation scheme. The signal read from the common plate is amplified and then enters the signal processing module. Carrier demodulation and filtering are used to obtain the x and y axial displacement signals, which are then demodulated into a low-frequency variable φ by the phase-locked loop signal. 𝑥 , 𝑥 , 𝑐 𝑦 , 𝑦 Then, through combination calculations, E, Q, L, and θ are obtained and sent to the back-end loop control module. The corresponding control quantities of the amplitude loop, quadrature loop, phase loop, and precession angle output are obtained through PI control, and coupled with the carrier and DC voltage, and finally applied to the x and y plane external excitation electrodes in real time to complete the closed-loop control of the system. The control method includes the following steps: Step 1: Determine the signal flow and hardware module division; After the readout signal obtained from the resonant oscillator shell is processed by the front-end circuit, it is acquired by a high-speed ADC chip and transmitted to the PL terminal of the Zynq. The two high-frequency carrier signals used in modulation are used to demodulate the readout signal, and then these two signals are bandpass filtered to obtain the displacement change signals of the x and y axes operating at the resonant frequency. At this time, the resonant frequency tracking signal generated by the phase-locked loop is used to further demodulate the displacement signal. The four low-frequency variables are transmitted from the PL terminal to the PS terminal through the AXI bus. The calculated E, Q, and L are associated with the amplitude control loop, quadrature control loop, and PLL phase tracking loop, respectively, to obtain the control force f. as f qc The precession angle θ, calculated from the parameters, is orthogonally decomposed into the x and y axes, and then transmitted back to the PL terminal via the AXI bus. The AC control force f is obtained by modulating the phase-locked loop reference signal. x and f y The output of the low-speed DAC is modulated with the high-frequency carrier of the corresponding high-speed DAC output and applied to the excitation electrode to achieve closed-loop control. The front-end circuit includes a front-end excitation circuit and a front-end amplification circuit. The former converts the voltage signal output by the DAC into a suitable electrostatic driving force and applies it to the excitation electrode after carrier modulation. The latter is responsible for amplifying the weak voltage signal from the resonator spherical shell readout end to a level that the ADC chip can pick up with as little distortion as possible. Step 2: Divide the tasks according to the characteristics of the PS and PL ends; Step 3: Build the peripheral driver hardware logic; Step 4: Read out the carrier demodulation of the signal to obtain the x and y displacement signals; Readout signal filtering; Displacement signal multiplication and demodulation yields low-frequency variable c. x s x c y s y ; The readout signal from the resonator spherical shell is acquired by the ADC and sent to the FPGA after passing through the front-end analog amplifier and analog filter. After demodulation by two carriers, it is separated into x-axis and y-axis signals, which are then filtered separately. During filtering, the first-stage CIC filter removes some high-frequency signals and downsamples the signal to a sampling frequency suitable for the FIR filter. Then, it is upsampled by another CIC filter to increase the sampling rate to match the sampling rate of the phase-locked loop signal, so as to perform the next stage of slow variable demodulation. The timing control of the entire sampling process is implemented by hardware logic at the ZynqPL end. Step 5: Signal generation logic design; In the dual-frequency carrier scheme, two types of sinusoidal signals need to be continuously output: one is two high-frequency carrier signals with fixed frequencies; the other is a phase-locked loop (PLL) signal that tracks the resonant frequency of the gyroscope, which is synchronized with the oscillation state of the resonator by adjustment through a PI controller. The signal generation logic module is implemented using a PL terminal with good time synchronization. The implementation method is to use a lookup table to generate a ROM table of sinusoidal signals in advance, and then call the BlockRAM resource in the FPGA as the memory for the ROM table data. The continuous output of the sinusoidal signal is achieved by continuously incrementing the address. Among them, the carrier signal is a sinusoidal wave with a fixed frequency, so the address increment is constant. However, the PLL signal that tracks the resonant frequency needs to be continuously adjusted in frequency, so the address increment is controlled by the PI controller. Finally, the digital output of the signal is sent to the DAC to be converted into the required analog voltage signal. Step Six: Complete the logic function design for the PL terminal; Step 7: Complete the PS software program design.

2. The full-angle control method for a hemispherical resonant gyroscope based on a dual-frequency carrier scheme according to claim 1, characterized in that: Step two is as follows: The PL (Programmer) side handles high-frequency, parallel tasks with strict timing requirements, including driving peripherals, signal transmission and reception, and filtering and demodulation. The PS (Power Supply) side performs complex floating-point operations. When the PL and PS sides communicate, the x and y axis detection signals are demodulated and filtered by the PL side after defining the register addresses on the bus to generate c. x s x c y s y The signals are stored in the input register of the AXI4 bus for the PS terminal to read, and the calculated control signals are stored in the output register for the PL terminal to read and generate control force. Based on this idea, an IP core with an AXI bus is designed. The input ports include input clock, reset, and receiving data from the PL terminal. The output ports output the calculated parameters to the FPGA at the PL terminal.

3. The full-angle control method for a hemispherical resonant gyroscope based on a dual-frequency carrier scheme according to claim 1, characterized in that: Step three is as follows: The peripheral modules of the control system are digital-to-analog converters and analog-to-digital converters. For the driving of high-speed ADCs and DACs, since it is parallel communication, it is only necessary to read the data from the ADC input data bus into the register or transfer the data in the register to the output data bus connected to the DAC under clock synchronization. For the 20-bit high-precision DAC11001B with output control force, it adopts SPI serial data communication mode, so a communication protocol module is required to complete its control.

4. The full-angle control method for a hemispherical resonant gyroscope based on a dual-frequency carrier scheme according to claim 1, characterized in that: Step six is ​​as follows: After designing each control module of the logic section, the top-level module calls and instantiates each sub-module. Each instantiation is equivalent to reusing the sub-module once in the system. The role of the top-level module is to connect the functional modules to form a complete FPGA on-chip hardware logic system. The entire system is encapsulated to obtain the PL-side IP core. In addition to external input clock signals, reset signal lines, and bus ports for exchanging data with the AXI bus control IP core, the PL-side control logic IP core also includes signal lines bound to the FPGA pins of the control peripherals. Finally, a BlockDesign is created in a new Vivado project, the Zynq main IP core is added, and the AXI bus IP core and the encapsulated PL-side IP core are added to the design. Clicking the automatic connection option, the system will automatically generate the matching interconnect modules, using the reset signal generated by the PS side as the global reset, and the 100MHz clock signal generated by the internal phase-locked loop of the PS side as the PL-side clock. Timing constraints and pin constraints are then further completed, and finally a bitstream file is generated.

5. The full-angle control method for a hemispherical resonant gyroscope based on a dual-frequency carrier scheme according to claim 1, characterized in that: Step seven is as follows: After configuring all parameters upon startup, the system enters a loop waiting for interrupt signals from the PL terminal. When the four low-frequency variables are updated, an interrupt is triggered, and the interrupt service routine begins the signal calculation process. First, the PS terminal obtains the low-frequency variables transmitted from the PL terminal from the AXI bus register, then calculates the five important parameters E, Q, L, S, and R. Subsequently, it enters the incremental PI controller of the phase-locked loop, amplitude, and quadrature control loop, and calculates the current mode precession angle. Finally, the amplitude and quadrature control forces are synthesized and decomposed onto the x and y axes. In addition, the PS terminal also transmits important data information to the host computer in real time via the UART port. The host computer program collects and saves the data and then analyzes and processes it.

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