A vertical cavity surface emitting laser structure and a method of manufacturing the same

Abstract

This invention discloses a vertical-cavity surface-emitting laser (VCSEL) structure and its fabrication method, comprising, from bottom to top, an N-type electrode, a substrate, an N-type DBR layer, an active region, and a first P-plane DBR layer. The first P-plane DBR layer is an unintentionally doped DBR layer, and a recessed region penetrating the first P-plane DBR layer is provided within the recessed region. A secondary epitaxial highly doped layer is provided within the recessed region. The secondary epitaxial highly doped layer is a p-plane DBR. + -GaAs layer or p + -AlGaAs layer, doped with C, with a doping concentration of 1E. 19 cm ‑3 ~5E 19 cm ‑3 A P-type electrode is disposed on the secondary epitaxial highly doped layer, so that current is injected from the P-type electrode at the top of the secondary epitaxial highly doped layer, passes through the secondary epitaxial highly doped layer and reaches the active region. With the above structure, this application significantly reduces the longitudinal series resistance between the P-type electrode and the active region without significantly increasing the light absorption loss and the risk of impurity diffusion.

Description

Technical Field

[0001] This invention belongs to the field of laser technology, and specifically relates to a vertical cavity surface-emitting laser structure and its fabrication method. Background Technology

[0002] Vertical-cavity surface-emitting lasers (VCSELs) possess advantages such as low threshold current, circular output spot, ease of two-dimensional integration, and low-cost testing, making them a core light source device in fields such as three-dimensional sensing, optical communication, and lidar. A typical VCSEL epitaxial structure, from bottom to top, includes: a GaAs substrate, an N-type DBR layer, an active region, an oxide layer, a P-type DBR, and an ohmic contact layer. During operation, charge carriers are injected from the electrode at the top of the P-type DBR, pass through the entire P-type DBR layer, and reach the active region where they undergo radiative recombination.

[0003] However, a long-standing unresolved technical problem in existing VCSEL structures is the excessively high series resistance of the P-type DBR. The DBR structure of a VCSEL is typically formed by alternating growth of two semiconductor materials with significant band gaps (such as AlGaAs / AlAs or AlGaAs / GaAs) over dozens of cycles. At the interface of each DBR heterojunction, the discontinuity in the heterojunction bands creates a potential barrier peak, severely hindering carrier transport. This problem is particularly pronounced in P-type DBRs: the large effective mass and low mobility of holes result in a much higher series resistance than N-type DBRs. This excessively high series resistance not only causes severe Joule heating but also significantly reduces the electro-optical conversion efficiency and reliability of the device, becoming a major bottleneck restricting the electrical performance of VCSELs.

[0004] To reduce the series resistance of P-type DBRs, various improvement schemes have been proposed in the prior art. For example, one scheme is to introduce a compositionally graded transition layer at the heterojunction interface of the DBR, thereby reducing band spikes by forming a gradually changing junction, thus reducing the interface resistance. Another scheme is to locally heavily dopant each pair of interface regions of the DBR to enhance the tunneling effect or reduce the barrier width, thereby reducing the series resistance.

[0005] However, none of the above technical solutions fundamentally resolved a key contradiction—the longitudinal conductivity mismatch between the highly doped region and the active region in a P-type DBR. The specific situation is as follows: 1. In a P-type DBR, the portion near the active region must maintain a low doping concentration (approximately 1E). 18 cm -3 Otherwise, the absorption of free carriers introduced by high doping will seriously increase optical loss, and the doped impurities are easy to diffuse into the active region under high temperature operating conditions, forming non-radiative recombination centers, which will lead to a sharp deterioration in the optical efficiency and reliability of the device. 2. Although the P-type ohmic contact layer has a high doping concentration (typically greater than 1E), 19 cm -3 However, it is extremely thin (only 10nm~30nm) and located at the very top of the P-type DBR, separated from the end point of current injection (active region) by a long high-resistance path (P-type DBR body). 3. The P-type electrode is directly placed on top of the P-type DBR. The current must pass longitudinally through the entire P-type DBR layer with high series resistance to reach the active region. This longitudinal current injection path leads to a large voltage drop and heat dissipation.

[0006] Therefore, in the existing vertical structure of VCSELs, the low-doped section of the P-type DBR is located precisely in the middle of the current path (neither at the top ohmic contact nor at the bottom active region), exhibiting high resistance. This hinders carrier injection to the active region. While existing solutions can reduce resistance by simply increasing the overall doping concentration of the P-type DBR, this severely sacrifices the device's optical performance and reliability. Therefore, significantly reducing the vertical series resistance from the P-type electrode to the active region in a VCSEL without substantially increasing light absorption loss and impurity diffusion risk has become a long-standing and urgent technical problem in this field. Summary of the Invention

[0007] The purpose of this invention is to provide a vertical cavity surface-emitting laser structure and its fabrication method, which significantly reduces the longitudinal series resistance between the P-type electrode and the active region without significantly increasing the light absorption loss and the risk of impurity diffusion.

[0008] To achieve the above objectives, the present invention provides a vertical-cavity surface-emitting laser (VCSEL) structure, comprising, from bottom to top, an N-type electrode, a substrate, an N-type DBR layer, an active region, and a first P-type DBR layer. The first P-type DBR layer is an unintentionally doped DBR layer, and a recessed region penetrating the first P-type DBR layer is provided within the recessed region. A secondary epitaxial highly doped layer is provided within the recessed region. The secondary epitaxial highly doped layer is a p-type... + -GaAs layer or p + -AlGaAs layer, doped with C, with a doping amount of 1E. 19 cm -3 ~5E 19 cm -3 A P-type electrode is disposed on the secondary epitaxial highly doped layer, so that current is injected from the P-type electrode at the top of the secondary epitaxial highly doped layer, passes through the secondary epitaxial highly doped layer and reaches the active region.

[0009] Furthermore, a second P-plane DBR layer is provided between the first P-plane DBR layer and the active region. The thickness of the second P-plane DBR layer is less than that of the first P-plane DBR layer, and the doping element of the second P-plane DBR layer is the p-type dopant element C, with a doping amount of 5E. 17 cm -3 ~5E 18 cm -3 .

[0010] Furthermore, both the first P-plane DBR layer and the second P-plane DBR layer are formed by alternating growth of high-Al content AlGaAs layers and low-Al content AlGaAs layers. The Al content of the high-Al content AlGaAs layers ranges from 80% to 95%, and the Al content of the low-Al content AlGaAs layers ranges from 0% to 55%. A transition layer is provided between the high-Al content AlGaAs layers and the low-Al content AlGaAs layers. The number of alternation pairs in the first P-plane DBR layer is 10 to 20, and the number of alternation pairs in the second P-plane DBR layer is 2 to 5. The thickness of each pair is 100 mm to 150 nm.

[0011] Furthermore, an oxide layer is provided between the second P-side DBR layer and the active region, the recessed region is prepared by selective etching, an etching stop layer is provided between the first P-side DBR layer and the second P-side DBR layer, and the recessed region penetrates the etching stop layer and is located above the second P-side DBR layer.

[0012] Furthermore, the oxide layer is Al. 0.98 Ga 0.02 The As layer has a thickness of 20 nm; the corrosion stop layer is Ga. x In 1-x The P-layer, wherein 0.45 ≤ x ≤ 0.55, has a thickness of 20 nm to 30 nm, and is doped with p-type Zn at a doping concentration of 5E. 17 cm -3 ~5E 18 cm -3 .

[0013] Furthermore, an N-type electrode is disposed on the back side of the substrate, and the P-type electrode includes a first P-type electrode and a second P-type electrode. The first P-type electrode is stacked on a secondary epitaxial highly doped layer. A portion of the area from the first P-side DBR layer to the N-type DBR layer is etched with isolation trenches to form a light-emitting mesa. A passivation layer is disposed on the surface of the isolation trench and on the exposed area of ​​the first P-side DBR layer. The second P-type electrode is disposed on the passivation layer on the surface of the isolation trench and on the first P-type electrode.

[0014] Furthermore, the structure of the N-type DBR layer is the same as that of the first P-plane DBR layer and the second P-plane DBR layer, except that the number of alternating pairs of high-Al content AlGaAs layers and low-Al content AlGaAs layers in the N-type DBR layer is 40 to 60, and the doping element is the N-type dopant element Si with a doping amount of 5E. 17 cm -3 ~5E 18 cm -3 .

[0015] Furthermore, the thickness of the secondary epitaxial highly doped layer is 2000nm~3000nm.

[0016] This application also provides a method for fabricating a vertical-cavity surface-emitting laser (VCSEL) structure, used to fabricate the VCSEL structure described in any of the above claims, comprising: A substrate is provided, and an N-type DBR layer is grown on the front side of the substrate; Active regions are grown on N-type DBR layers; The first P-plane DBR layer is grown on the active region; A recessed region penetrating the first P-side DBR layer is etched out in the first P-side DBR layer. A secondary epitaxial highly doped layer is grown in the recessed region, wherein the secondary epitaxial highly doped layer is p + -GaAs layer or p + -AlGaAs layer, doped with C, with a doping amount of 1E. 19 cm -3 ~5E 19 cm -3 ; P-type electrodes are grown on a heavily doped secondary epitaxial layer; An N-type electrode is grown on the back side of the substrate.

[0017] After adopting the above solution, the beneficial effects of the present invention are as follows: 1. This application addresses the issue of traditional structures where current must traverse the entire high-resistivity P-type DBR by creating a recessed region penetrating the first P-plane DBR layer and placing a highly doped secondary epitaxial layer within this recessed region. The P-type electrode is positioned on this secondary highly doped layer, allowing current injection from the P-type electrode directly into the secondary highly doped layer, passing through it to reach the active region. Furthermore, the doping level of the secondary highly doped layer is 1E. 19 cm -3 ~5E 19 cm -3 With high doping content, its resistivity is lower than that of conventional P-type DBR, which significantly reduces the longitudinal series resistance between the P-type electrode and the active region.

[0018] 2. In this application, a secondary epitaxial highly doped layer is only set below the injection current region of the P-type electrode, rather than increasing the doping concentration in the entire first P-plane DBR layer. The first P-plane DBR layer occupies most of the optical field distribution area and is an unintentionally doped DBR layer, thereby avoiding the free carrier absorption loss introduced by large-area high doping and ensuring the high reflectivity and low absorption loss of the DBR.

[0019] 3. The secondary epitaxial highly doped layer in this application is p + -GaAs layer or p + -AlGaAs layer, with carbon (C) as the dopant. The diffusion coefficient of carbon doping in GaAs or AlGaAs is extremely low, far lower than that of traditional zinc (Zn) or beryllium (Be) dopants, even at ultra-high doping concentrations (>1E). 19 cm -3 It can maintain good thermal stability even under certain conditions, achieving high doping concentration while preventing impurities from diffusing into the active region.

[0020] 4. This application uses a carbon-doped secondary epitaxial highly doped layer, and the highly doped layer is located at the top of the P-plane DBR region. There is a second P-plane DBR layer of full thickness between it and the active region. It is far enough away from the active region to effectively block the thermal diffusion path of impurities to the active region and eliminate the negative impact of non-radiative recombination centers introduced by high doping on the luminous efficiency and reliability of the device. Attached Figure Description

[0021] Figure 1 This is a schematic diagram of the structure after the epitaxial layer of the present invention has been grown once.

[0022] Figure 2 This is a schematic diagram of the structure after selective etching according to the present invention; Figure 3 This is a schematic diagram of the structure after the secondary epitaxial highly doped layer of the present invention is grown; Figure 4 This is a schematic diagram of the structure of the oxide layer after oxidation according to the present invention; Figure 5 This is a schematic diagram of the structure of the electrode after it has been fabricated according to the present invention; Figure 6 This is a process flow diagram of the present invention.

[0023] Label Explanation: 1. N-type electrode; 2. Substrate; 3. GaAs buffer layer; 4. N-type DBR layer; 5. Active region; 6. Oxide layer; 7. Second P-side DBR layer; 8. Etching stop layer; 9. First P-side DBR layer; 10. Recessed region; 11. Secondary epitaxial highly doped layer; 12. SiN x 13. Mask; 14. Isolation trench; 15. Passivation layer; 16. First P-type electrode; 17. Second P-type electrode. Detailed Implementation

[0024] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application, and the range values ​​mentioned in this application all include endpoint values.

[0025] Key references Figure 5 The present invention provides a vertical cavity surface emission laser structure, comprising an N-type electrode 1, a substrate 2, an N-type DBR layer 4, an active region 5, and a first P-plane DBR layer 9 stacked sequentially from bottom to top, wherein the N-type DBR layer 4, the active region 5, and the first P-plane DBR layer 9 are primary epitaxial layers grown on the front side of the substrate 2.

[0026] The first P-plane DBR layer 9 is an unintentionally doped DBR layer, and a recessed region 10 penetrating the first P-plane DBR layer 9 is provided in the first P-plane DBR layer 9. A secondary epitaxial highly doped layer 11 is provided in the recessed region 10. The secondary epitaxial highly doped layer 11 is a p-plane DBR layer. + -GaAs layer or p + The AlGaAs layer, i.e., a heavily doped P-type GaAs layer or a P-type AlGaAs layer, requires the secondary epitaxial highly doped layer 11 to fill the recessed region 10, with a specific thickness of 2000 nm to 3000 nm. A P-type electrode is disposed on the secondary epitaxial highly doped layer 11. Current injected from the P-type electrode directly enters the secondary epitaxial highly doped layer 11, passes through it, and reaches the active region 5, effectively avoiding the problem in traditional structures where the current must traverse the entire high-resistivity P-type DBR. Furthermore, the doping amount of the secondary epitaxial highly doped layer 11 is 1E. 19 cm -3 ~5E 19 cm -3 The high doping concentration results in a lower resistivity than conventional P-type DBRs, significantly reducing the longitudinal series resistance between the P-type electrode and the active region 5. Furthermore, this application only places a secondary epitaxial highly doped layer 11 below the P-type electrode injection current region, rather than increasing the doping concentration throughout the entire first P-plane DBR layer 9. The first P-plane DBR layer 9 occupies the majority of the optical field distribution area and is an unintentionally doped DBR layer, thus avoiding free carrier absorption losses introduced by large-area high doping and ensuring high reflectivity and low absorption loss in the P-type DBR region.

[0027] The secondary epitaxial highly doped layer 11 is doped with p-type carbon (C). Carbon doping has an extremely low diffusion coefficient in GaAs or AlGaAs, far lower than that of traditional zinc (Zn) or beryllium (Be) dopants, even at ultra-high doping concentrations (>1E). 19 cm -3 It can maintain good thermal stability even under high doping concentration, and avoid impurities from diffusing into the active region 5.

[0028] Preferably, a second P-side DBR layer 7 is provided between the first P-side DBR layer 9 and the active region 5, that is, a second P-side DBR layer 7 of complete thickness is provided between the secondary epitaxial highly doped layer 11 and the active region 5, which is far enough away from the active region 5 to effectively block the thermal diffusion path of impurities to the active region 5 and eliminate the negative impact of non-radiative recombination centers introduced by high doping on the luminous efficiency and reliability of the device.

[0029] Optionally, the thickness of the second P-side DBR layer 7 is less than the thickness of the first P-side DBR layer 9, and the doping element of the second P-side DBR layer 7 is the P-type dopant element C, with a doping amount of 5E. 17 cm -3 ~5E 18 cm -3 That is, the second P-side DBR layer 7 is lightly doped, has high reflectivity and low absorption loss, and has conductivity. The current passes through the secondary epitaxial highly doped layer 11 and then through the second P-side DBR layer 7 to reach the active region 5. Although the low doping of the second P-side DBR layer 7 will lead to high resistance, the first P-side DBR layer 9 has ensured sufficient high reflectivity and low absorption loss. The thickness of the second P-side DBR layer 7 can be set to be extremely thin, so that the first P-side DBR layer 9 occupies the main part of the P-side DBR region, reducing the impact of the high resistance of the second P-side DBR layer 7 on the current transmission.

[0030] Specifically, both the first P-side DBR layer 9 and the second P-side DBR layer 7 are formed by alternating growth of high-Al content AlGaAs layers and low-Al content AlGaAs layers. The Al content of the high-Al content AlGaAs layers ranges from 80% to 95%, and the Al content of the low-Al content AlGaAs layers ranges from 0% to 55%. A 20nm transition layer is provided between the high-Al content AlGaAs layers and the low-Al content AlGaAs layers. The optical thickness of the high-Al content AlGaAs layers plus the transition layer is one-quarter of the emitted laser wavelength, and the optical thickness of the low-Al content AlGaAs layers plus the transition layer is also one-quarter of the emitted laser wavelength. The first P-side DBR layer 9 has 10 to 20 alternation pairs, and the second P-side DBR layer 7 has 2 to 5 alternation pairs. The thickness of each pair is 100mm to 150nm, meaning the thickness of the second P-side DBR layer 7 is only 1 / 10 to 1 / 2 of that of the first P-side DBR layer 9, thus having a smaller impact on current transfer.

[0031] Preferably, an oxide layer 6 is provided between the second P-side DBR layer 7 and the active region 5, and the oxide layer 6 is Al. 0.98 Ga 0.02 The As layer has a thickness of 20 nm. The function of oxide layer 6 is to restrict current injection, taking advantage of the fact that AlGaAs with a high Al content is easily oxidized by water vapor to form AlO. x It exhibits excellent electrical insulation properties, and AlO has good performance characteristics. x Its refractive index is low, so it acts as a refractive index waveguide and can effectively confine the beam. Because the oxide layer 6 introduces oxygen, there is an uncertain element. Therefore, the oxide layer 6 needs to be placed at the valley of the resonant cavity to ensure that the light attenuation is minimized.

[0032] Preferably, the recessed region 10 is prepared by selective wet etching. The recessed region 10 can be in the shape of an annular groove. An etching stop layer 8 is provided between the first P-side DBR layer 9 and the second P-side DBR layer 7. By sequentially etching the first P-side DBR layer 9 and the etching stop layer 8 with two selective wet etching solutions, the recessed region can be etched until the etching stop layer 8 is reached, so that the recessed region 10 sequentially penetrates the first P-side DBR layer 9 and the etching stop layer 8 and is located above the second P-side DBR layer 7. The etching stop layer 8 is isolated from the oxide layer 6 by the second P-side DBR layer 7. The second P-side DBR layer 7 has a multi-group DBR structure, which can avoid the influence of the etching solution on the oxide layer 6 during the wet etching process, and ensure the integrity and oxidation uniformity of the oxide layer 6.

[0033] Optionally, the corrosion stop layer 8 is Ga x In 1-xThe P-layer, wherein 0.45 ≤ x ≤ 0.55, has a thickness of 20 nm to 30 nm, and is doped with p-type Zn at a doping concentration of 5E. 17 cm -3 ~5E 18 cm -3 Using GaInP as the corrosion stop layer 8 can ensure accurate stoppage of wet corrosion.

[0034] Specifically, the structure of the N-type DBR layer 4 is the same as that of the first P-plane DBR layer 9 and the second P-plane DBR layer 7, except that the number of alternating pairs of high-Al content AlGaAs layers and low-Al content AlGaAs layers in the N-type DBR layer 4 is 40 to 60, and the doping element is the N-type dopant element Si with a doping amount of 5E. 17 cm -3 ~5E 18 cm -3 .

[0035] Preferably, the N-type electrode 1 is disposed on the back side of the substrate, and the P-type electrode includes a first P-type electrode 15 and a second P-type electrode 16. The first P-type electrode 15 is stacked on the secondary epitaxial highly doped layer 11. A portion of the area from the first P-side DBR layer 9 down to the N-type DBR layer 4 is etched to form an isolation trench 13, creating a light-emitting mesa. After etching the isolation trench 13, Al in the oxide layer 6 can be oxidized to form a current aperture for smooth current input. After oxidation, a passivation layer 14 is disposed on the surface of the isolation trench 13 and the exposed area of ​​the first P-side DBR layer 9 (i.e., the light-emitting aperture area). The passivation layer 14 is SiN. x The passivation layer, or SiO2 passivation layer, prevents device oxidation or corrosion, as well as leakage or short circuits, through passivation of the passivation layer 14. The second P-type electrode 16 is disposed on the passivation layer 14 and the first P-type electrode 15 on the surface of the isolation trench 13. The first P-type electrode 15 is used to connect the chip (epitaxy wafer) and the second P-type electrode 16, and the second P-type electrode 16 is used to complete the interconnection between devices.

[0036] Optionally, the material of the P-type electrode is preferably a multilayer metal system such as Ti / Pt / Au or Ti / Pd / Au, and the material of the N-type electrode is preferably an AuGe / Ni / Au system. The electrodes are deposited by electron beam evaporation or magnetron sputtering.

[0037] Optionally, the active region 5 is composed of multiple groups of InGaAs and AlGaAs grown alternately, wherein the In component content is between 0 and 0.2, the Al component content is between 0 and 0.45, and the single-layer thickness of InGaAs and AlGaAs is 8 nm. The active region needs to be placed at the peak of the resonant cavity to ensure maximum gain.

[0038] Optionally, the substrate 2 may be a 2-gaas substrate, and a GaAs buffer layer 3 is provided between the substrate 2 and the N-type DBR layer 4. The GaAs buffer layer 3 has a thickness of 500 nm and its function is to connect the substrate 2 with the subsequently grown epitaxial layer and reduce defects in the epitaxial layer.

[0039] like Figures 1-6 As shown, this application also provides a method for fabricating a vertical-cavity surface-emitting laser (VCSEL) structure, which includes: S1. A substrate is provided, and a primary epitaxial layer is grown on the front side of the substrate 2 using metal-organic chemical vapor deposition (MOCVD). The primary epitaxial layer includes, from bottom to top, a GaAs buffer layer 3, an N-type DBR layer 4, an active region 5, an oxide layer 6, a second P-plane DBR layer 7, an etching stop layer 8, and a first P-plane DBR layer 9. The structure of the primary epitaxial layer after deposition is as follows: Figure 1 As shown, the specific preparation steps are as follows: S1.1. A GaAs buffer layer 3 is grown on the front side of the substrate 2. The substrate 2 is preferably a 2-layer GaAs substrate. The growth thickness of the GaAs buffer layer 3 is 500 nm. The purpose of growing the GaAs buffer layer 3 is to connect the substrate 2 with the subsequently grown epitaxial layer and reduce defects in the epitaxial layer.

[0040] S1.2. An N-type DBR layer 4 is grown on the GaAs buffer layer 3. The N-type DBR layer 4 is formed by alternating growth of a high-Al content AlGaAs layer and a low-Al content AlGaAs layer. The Al content of the high-Al content AlGaAs layer ranges from 80% to 95%, and the Al content of the low-Al content AlGaAs layer ranges from 0% to 55%. A 20 nm transition layer is grown between the high-Al content AlGaAs layer and the low-Al content AlGaAs layer. The optical thickness of the high-Al content AlGaAs layer plus the transition layer is one-quarter of the emitted laser wavelength, and the optical thickness of the low-Al content AlGaAs layer plus the transition layer is one-quarter of the emitted laser wavelength.

[0041] Optionally, the N-type DBR layer 4 has 40 to 60 alternating pairs, each pair has a thickness of 100 mm to 150 nm, and the doping element is N-type Si with a doping amount of 5E. 17 cm -3 ~5E 18 cm -3 .

[0042] S1.3. An active region 5 is grown on the N-type DBR layer 4. The active region 5 is composed of multiple groups of InGaAs and AlGaAs grown alternately. The In content is between 0 and 0.2, and the Al content is between 0 and 0.45. The single-layer growth thickness of InGaAs and AlGaAs is 8nm. The active region 5 needs to be grown at the position of the resonant cavity wave peak to ensure maximum gain.

[0043] S1.4. An oxide layer 6 is grown on the active region 5, wherein the oxide layer 6 is Al. 0.98 Ga 0.02 The As layer has a growth thickness of 20 nm. The function of oxide layer 6 is to restrict current injection, taking advantage of the fact that AlGaAs with a high Al content is easily oxidized by moisture to form AlO. x It exhibits excellent electrical insulation properties, and AlO has good performance characteristics. x With a low refractive index, it acts as a refractive index waveguide, effectively confining the beam. Because oxide layer 6 introduces oxygen, there are uncertain elements present. Therefore, oxide layer 6 needs to be grown at the valley of the resonant cavity to ensure that the light attenuation is minimized.

[0044] S1.5. A second P-plane DBR layer 7 is grown on oxide layer 6. The structure of the second P-plane DBR layer 7 is the same as that of the N-type DBR layer 4, consisting of multiple sets of alternating high-Al content AlGaAs layers and low-Al content AlGaAs layers, with each pair having a thickness of 100 mm to 150 nm. The difference is that the number of alternating pairs in the second P-plane DBR layer 7 is 2 to 5 pairs, and the doping element is the P-type dopant element C, with a doping amount of 5E. 17 cm -3 ~5E 18 cm -3 That is, the second P-side DBR layer 7 is lightly doped, has high reflectivity and low absorption loss, and is also conductive.

[0045] S1.6. An etching stop layer 8 is grown on the second P-side DBR layer 7, wherein the etching stop layer 8 is Ga x In 1-x The P-layer, wherein 0.45 ≤ x ≤ 0.55, has a growth thickness of 20 nm to 30 nm, and is doped with p-type Zn at a doping concentration of 5E. 17 cm -3 ~5E 18 cm -3 .

[0046] S1.7. A first P-side DBR layer 9 is grown on the etch stop layer 8. The structure of the first P-side DBR layer 9 is the same as that of the second P-side DBR layer 7. The difference is that the number of alternating pairs of high Al content AlGaAs layers and low Al content AlGaAs layers in the first P-side DBR layer 9 is 10 to 20 pairs. It is an unintentionally doped layer that is not actively doped, which ensures high reflectivity and low absorption loss in the P-side DBR region and can effectively improve photoelectric conversion efficiency.

[0047] S2, such as Figure 2 As shown, a recessed region 10 is selectively etched to penetrate the first P-side DBR layer 9 and the etch stop layer 8, which can be achieved by surface deposition of SiN. x The recessed region 10 is created using masking, photolithography, and dry etching processes. The specific steps are as follows: S2.1 Deposit a layer of SiN on the surface of the primary epitaxial layer structure. x Mask 12, applied to SiN using photolithography. x A secondary epitaxial pattern is defined on mask 12. The pattern is a ring with an inner diameter of 25 μm and an outer diameter of 35 μm. S2.2. An annular shallow trench is etched at the secondary epitaxial pattern using an ICP dry etching equipment. The etching depth stops at a certain interface in the first P-side DBR layer 9, at a position 50nm~100nm above the etching stop layer 8. S2.3. Using a selective wet etching solution, the first P-side DBR layer 9 and the etching stop layer 8 are selectively etched at the location of the annular shallow trench, forming a recessed region 10. The bottom surface of the recessed region 10 is located above the second P-side DBR layer 7, meaning that the etching depth of the recessed region 10 is precisely controlled above the second P-side DBR layer 7 without touching it. More importantly, the second P-side DBR layer 7 pre-set above the oxide layer 6 is a multi-group DBR structure, which can isolate the influence of wet etching on the oxide layer 6, ensuring the integrity of the oxide layer 6 and the subsequent formation of oxide pores.

[0048] Optionally, the selective wet etching solution for etching the first P-side DBR layer 9 is preferably a dilute sulfuric acid / hydrogen peroxide system (H2SO4:H2O2:H2O), which exhibits isotropic corrosion characteristics on AlGaAs materials and a low corrosion rate on GaInP materials, thus demonstrating good corrosion selectivity. The etching of the first P-side DBR layer 9 can begin at the annular shallow trench and continue until the etching stop layer 8 is reached. The etching stop layer 8 is a GaInP layer, and for GaInP materials, a selective wet etching solution using a hydrochloric acid system (HCl:H2O) is preferred. This solution also exhibits isotropic corrosion characteristics on GaInP materials and a low corrosion rate on AlGaAs materials, demonstrating good corrosion selectivity.

[0049] S3. A secondary epitaxial highly doped layer 11 is grown within the recessed region 10, wherein the secondary epitaxial highly doped layer 11 is p + -GaAs layer or p + -AlGaAs layer, doped with C, with a doping amount of 1E. 19 cm -3 ~5E 19 cm -3 The specific steps include: placing the entire epitaxial wafer, after the processing in step S2, back into the MOCVD reaction chamber, and selectively growing a secondary epitaxial highly doped layer 11 in the recessed region 10, that is, only on SiN... x The recessed region 10 exposed by mask 12 is used to grow a secondary epitaxial highly doped layer 11, SiN. x No growth occurs in the area covered by mask 12. The thickness of the secondary epitaxial highly doped layer 11 needs to fill the recessed region 10, and the specific thickness can be 2000nm~3000nm. The structure after growing the secondary epitaxial highly doped layer 11 is as follows. Figure 2 As shown.

[0050] Optionally, before selecting the region for epitaxial growth, an in-situ surface cleaning treatment is performed in the MOCVD reaction chamber, i.e., the temperature is raised to 650℃~700℃ under an AsH3 protective atmosphere and heat-treated for 3 to 8 minutes to remove oxides and carbon contaminants that may remain on the surface after etching, so as to ensure the crystal quality and interface electrical properties of the secondary epitaxial highly doped layer 11.

[0051] Specifically, the process conditions for the selected region epitaxial growth are as follows: growth temperature of 600℃~700℃, reaction chamber pressure of 50mbar~150mbar, V / III ratio of 20~80, and the p-type doping source is CBr4 or CCl4. The secondary epitaxial highly doped layer 11 utilizes carbon doping in GaAs or AlGaAs, which has a low diffusion coefficient and a doping concentration as high as 1E. 20 cm -3 These features enable high doping concentrations while preventing impurities from diffusing into the active region.

[0052] S4. Oxidize oxide layer 6, the specific steps of which include: S4.1 First, use the corresponding selective wet etching solution to etch SiN... x After removing the mask 12, the area that does not require secondary epitaxy is exposed. The etching solution is preferably a mixed solution of HF: H2O. 4.2. The light-emitting mesa pattern is defined using photolithography. This pattern is circular with a diameter of 45 μm, and then SiN is used as the substrate. x As a hard mask, a dry etching process was used to etch isolation trenches 13 in the area surrounding the light-emitting mesa pattern, forming a raised mesa with a diameter of 45 μm. The etched structure is as follows: Figure 4As shown. During etching, it is necessary to etch through the first P-side DBR layer 9, the etch stop layer 8, the second P-side DBR layer 7, the oxide layer 6 and the active region 5, until reaching the N-type DBR layer 4; S4.3, Removal of SiN x A mask is applied, and the epitaxial wafer is placed in an oxidation furnace for selective oxidation at 350°C to 450°C under a water vapor atmosphere. The water vapor carried by the oxidizing gas seeps in from the sidewall of the platform (i.e., the sidewall of the isolation trench 13), oxidizing the Al in the oxide layer 6 to form current apertures. Since the selective etching in step S2 does not reach the oxide layer 6, the integrity and oxidation uniformity of the oxide layer 6 are ensured.

[0053] S5. Electrode fabrication includes growing a P-type electrode on the secondary epitaxial highly doped layer 11 and an N-type electrode 1 on the back side of the substrate 2. The P-type electrode includes a first P-type electrode 15 and a second P-type electrode 16. The first P-type electrode 15 is used to connect the chip (epitaxy wafer) and the second P-type electrode 16, and the second P-type electrode 16 is used to complete the interconnection between devices. The specific steps for electrode fabrication are as follows: S5.1. The electrode pattern of the first P-type electrode 15 is defined by photolithography. Ti / Pt / Au or Ti / Pd / Au is deposited by electron beam evaporation to form the first P-type electrode 15. Then, AuGe / Ni / Au is deposited on the back side of the substrate 2 in the same way to form the N-type electrode 1. S5.2 Depositing SiN on the light-emitting mesa x The passivation layer or SiO2 passivation layer, through the passivation of the passivation layer 14, can prevent device oxidation or corrosion, as well as prevent leakage or short circuit, and is used to protect and passivate the etched surface and light-emitting holes. S5.3. The surface area of ​​the first P-type electrode 15 is exposed by photolithography. The pattern of the second P-type electrode 16 is defined again by photolithography. W / Pt / Au is deposited by electron beam evaporation deposition to form the second P-type electrode 16, completing the device interconnection and electrode fabrication. The structure of the electrode after fabrication is as follows. Figure 5 As shown; S5.4 Finally, alloy anneal at 400℃ for 5 minutes to complete the fabrication of the entire device.

[0054] In summary, this application selectively etches a recessed region 10 penetrating the first P-side DBR layer 9, and selectively grows a secondary epitaxial highly doped layer 11 within the recessed region 10. A P-type electrode is disposed on the secondary epitaxial highly doped layer 11. Current injected from the P-type electrode directly enters the secondary epitaxial highly doped layer 11, passes through it, and reaches the active region 5 (if an oxide layer 6 and a second P-side DBR layer 7 are not present, the oxide layer 6 and the second P-side DBR layer 7 can be optionally provided). This effectively avoids the problem in traditional structures where the current must traverse the entire high-resistivity P-type DBR. Since the doping amount of the secondary epitaxial highly doped layer 11 is 1E... 19 cm -3 ~5E 19 cm -3 The high doping concentration results in a lower resistivity than conventional P-type DBRs, significantly reducing the longitudinal series resistance between the P-type electrode and the active region 5. Furthermore, before selective etching, this application first deposits a mask, then fabricates annular shallow trenches using photolithography and dry etching processes. By limiting the growth of the mask, a secondary epitaxial highly doped layer 11 is grown only below the injection current region of the P-type electrode, rather than increasing the doping concentration throughout the entire first P-side DBR layer 9. Moreover, the first P-side DBR layer 9 occupies the majority of the optical field distribution area, being an unintentionally doped DBR layer. This avoids the free carrier absorption loss introduced by large-area high doping, ensuring high reflectivity and low absorption loss of the DBR.

[0055] The following example illustrates a method for fabricating a 940 nm VCSEL chip, with specific steps including: S1. Growth of a primary epitaxial layer, including: Using the AIXTRON G4 MOCVD system, on a 4-inch N... + A primary epitaxial layer is grown on the front side of a GaAs 2-degree substrate, the primary epitaxial layer comprising: N-type DBR layer 4: composed of 45 pairs of Al 0.12 Ga 0.88 As / Al 0.92 Ga 0.08 Al is formed by alternating As growth, with a 20nm Al composition gradient transition layer between the two layers, and the Si doping concentration is 1E. 18 cm -3 The thickness corresponds to a center wavelength of 940 nm. Active region 5: Composed of three periods of InGaAs / GaAs multiple quantum wells, with an emission wavelength of 920 nm; Oxide layer 6: Specifically Al 0.98 Ga 0.02 The As layer has a thickness of 20 nm. Second P-side DBR layer 7:3 pairs of Al0.12 Ga 0.88 As / Al 0.92 Ga 0.08 The structure is formed by alternating As growth, with an intermediate 20nm Al composition gradient transition layer, and the C doping concentration is 1E. 18 cm -3 The thickness corresponds to a center wavelength of 940 nm. Corrosion stop layer 8: 20nm Ga 0.5 In 0.5 P layer; First P-side DBR layer 9:17 pairs with Al 0.12 Ga 0.88 As / Al 0.92 Ga 0.08 As is grown alternately without active doping, and the thickness corresponds to the center wavelength of 940 nm.

[0056] S2. Prepare the recessed area, including: A SiN layer is deposited on the surface of a primary epitaxial structure. x Mask 12, applied to SiN using photolithography. x A secondary epitaxial pattern is defined on mask 12. This pattern is a ring with an inner diameter of 25 μm and an outer diameter of 35 μm. Then, an annular shallow trench is etched on the secondary epitaxial pattern using an ICP dry etching device. The etching depth stops at a position 50 nm-100 nm above the etching stop layer 8. Then, a dilute sulfuric acid / hydrogen peroxide system (H2SO4:H2O2:H2O=3:1:1) etching solution is used to etch at 25°C for 20 seconds until the etching stop layer 8 is reached. Finally, a hydrochloric acid system (HCl:H2O=1:1) etching solution is used to etch at 25°C for 10 seconds to etch the etching stop layer 8, forming a recessed region 10.

[0057] S3. A secondary epitaxial highly doped layer 11 is grown within the recessed region 10, including: The etched epitaxial wafer was reloaded into the MOCVD reaction chamber and cleaned in situ for 5 minutes at 680°C under an AsH3 protective atmosphere. Subsequently, p-type epitaxial growth was carried out in a selected area within the recessed region 10. + The secondary epitaxial highly doped layer 11 of GaAs was fabricated using the following process parameters: growth temperature 650℃; reaction chamber pressure 50 mbar; group III source TMGa with a flow rate of 100 sccm; group V source AsH3 with a flow rate of 200 sccm; p-type dopant source CBr4 with a flow rate of 200 sccm; growth time 34 minutes; growth thickness 2000 nm; and carbon doping concentration 3E. 19 cm -3 .

[0058] S4. Oxidize oxide layer 6, including: First remove SiN x Mask 12 uses photolithography to define the light-emitting mesa pattern. This pattern is circular with a diameter of 45 μm, and then SiN is used as the substrate. x As a hard mask, an isolation trench 13 was etched in the area surrounding the light-emitting mesa pattern using a dry etching process, with an etching depth of 3.5 μm. After etching, the SiN was removed. x The epitaxial wafer is then placed in an oxidation furnace and oxidized at 430°C in a steam atmosphere for 30 minutes to form a current aperture with a diameter of approximately 8 μm.

[0059] S5. Electrode preparation, including: The first P-type electrode pattern was defined using photolithography. Ti / Pt / Au was deposited as the first P-type electrode 15 via electron beam evaporation, with thicknesses of 20 nm / 50 nm / 200 nm, an inner diameter of 15 μm, and an outer diameter of 35 μm. AuGe / Ni / Au was deposited as the N-type electrode 1 on the back side of substrate 2, with thicknesses of 50 nm / 20 nm / 100 nm. Then, SiN was deposited. x A passivation layer 14 with a thickness of 230 nm is formed. Then, the surface area of ​​the first P-type electrode 15 is etched to expose it. The second P-type electrode 16 (with a thickness of 20 nm / 50 nm / 1200 nm) is deposited by electron beam evaporation using photolithography to complete the device interconnection. Finally, the chip is alloyed and annealed at 400°C for 5 minutes.

[0060] It is worth noting that the N-type electrode 1, substrate 2, GaAs buffer layer 3, N-type DBR layer 4, active region 5, oxide layer 6, second P-side DBR layer 7, etch stop layer 8, first P-side DBR layer 9, recessed region 10, secondary epitaxial highly doped layer 11, and SiN shown in the accompanying drawings of this application are... x The thicknesses of mask 12, isolation trench 13, passivation layer 14, first P-type electrode 15, and second P-type electrode 16 are merely examples and do not represent their actual thicknesses. Furthermore, the thicknesses of N-type electrode 1, substrate 2, GaAs buffer layer 3, N-type DBR layer 4, active region 5, oxide layer 6, second P-side DBR layer 7, etch stop layer 8, first P-side DBR layer 9, recessed region 10, secondary epitaxial highly doped layer 11, and SiN are also shown. x The actual proportions of the mask 12, isolation trench 13, passivation layer 14, first P-type electrode 15, and second P-type electrode 16 are not as shown in the attached figures and are for reference only.

[0061] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0062] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A vertical-cavity surface-emitting laser structure, characterized in that: The structure includes, from bottom to top, an N-type electrode, a substrate, an N-type DBR layer, an active region, and a first P-plane DBR layer. The first P-plane DBR layer is an unintentionally doped DBR layer, and it has a recessed region that penetrates the first P-plane DBR layer. A secondary epitaxial highly doped layer is disposed within the recessed region. The secondary epitaxial highly doped layer is a p-plane DBR layer. + -GaAs layer or p + -AlGaAs layer, doped with C, with a doping amount of 1E. 19 cm -3 ~5E 19 cm -3 A P-type electrode is disposed on the secondary epitaxial highly doped layer, so that current is injected from the P-type electrode at the top of the secondary epitaxial highly doped layer, passes through the secondary epitaxial highly doped layer and reaches the active region.

2. The vertical-cavity surface-emitting laser structure as described in claim 1, characterized in that: A second P-plane DBR layer is disposed between the first P-plane DBR layer and the active region. The thickness of the second P-plane DBR layer is less than that of the first P-plane DBR layer, and the doping element of the second P-plane DBR layer is the p-type dopant element C, with a doping amount of 5E. 17 cm -3 ~5E 18 cm -3 .

3. The vertical-cavity surface-emitting laser structure as described in claim 2, characterized in that: Both the first and second P-plane DBR layers are formed by alternating growth of high-Al content AlGaAs layers and low-Al content AlGaAs layers. The Al content of the high-Al content AlGaAs layers ranges from 80% to 95%, and the Al content of the low-Al content AlGaAs layers ranges from 0% to 55%. A transition layer is provided between the high-Al content AlGaAs layers and the low-Al content AlGaAs layers. The number of alternation pairs in the first P-plane DBR layer is 10 to 20, and the number of alternation pairs in the second P-plane DBR layer is 2 to 5. The thickness of each pair is 100 mm to 150 nm.

4. The vertical-cavity surface-emitting laser structure as described in claim 3, characterized in that: An oxide layer is provided between the second P-side DBR layer and the active region. The recessed region is prepared by selective etching. An etching stop layer is provided between the first P-side DBR layer and the second P-side DBR layer. The recessed region penetrates the etching stop layer and is located above the second P-side DBR layer.

5. The vertical-cavity surface-emitting laser structure as described in claim 4, characterized in that: The oxide layer is Al. 0.98 Ga 0.02 The As layer has a thickness of 20 nm; the corrosion stop layer is Ga. x In 1-x The P-layer, wherein 0.45 ≤ x ≤ 0.55, has a thickness of 20 nm to 30 nm, and is doped with p-type Zn at a doping concentration of 5E. 17 cm -3 ~5E 18 cm -3 .

6. The vertical-cavity surface-emitting laser structure as described in claim 4, characterized in that: An N-type electrode is disposed on the back side of the substrate. The P-type electrode includes a first P-type electrode and a second P-type electrode. The first P-type electrode is stacked on a secondary epitaxial highly doped layer. A portion of the area from the first P-side DBR layer to the N-type DBR layer is etched with isolation trenches to form a light-emitting mesa. A passivation layer is disposed on the surface of the isolation trench and on the exposed area of ​​the first P-side DBR layer. The second P-type electrode is disposed on the passivation layer on the surface of the isolation trench and on the first P-type electrode.

7. The vertical-cavity surface-emitting laser structure as described in claim 3, characterized in that: The structure of the N-type DBR layer is the same as that of the first P-plane DBR layer and the second P-plane DBR layer. The difference is that the number of alternating pairs of high-Al content AlGaAs layers and low-Al content AlGaAs layers in the N-type DBR layer is 40 to 60, and the doping element is the N-type dopant element Si with a doping amount of 5E. 17 cm -3 ~5E 18 cm -3 .

8. The vertical-cavity surface-emitting laser structure as described in claim 1, characterized in that: The thickness of the secondary epitaxial highly doped layer is 2000nm~3000nm.

9. A method for fabricating a vertical-cavity surface-emitting laser structure, characterized in that, The method for fabricating the vertical-cavity surface-emitting laser structure according to any one of claims 1-8 includes: A substrate is provided, and an N-type DBR layer is grown on the front side of the substrate; Active regions are grown on N-type DBR layers; The first P-plane DBR layer is grown on the active region; A recessed region penetrating the first P-side DBR layer is etched out in the first P-side DBR layer. A secondary epitaxial highly doped layer is grown in the recessed region, wherein the secondary epitaxial highly doped layer is p + -GaAs layer or p + -AlGaAs layer, doped with C, with a doping amount of 1E. 19 cm -3 ~5E 19 cm -3 ; P-type electrodes are grown on a heavily doped secondary epitaxial layer; An N-type electrode is grown on the back side of the substrate.

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