A thin thermal interface layer with high thermal conductivity and low thermal resistance, a preparation method thereof and a heat dissipation system
By combining a thermally conductive framework with a specific radius of curvature and a thermal interface material, along with a gradient rolling process, the problems of thermal conductivity and poor contact in the warped region of ultrathin thermal interface materials were solved, resulting in a thermal interface layer with high thermal conductivity and low thermal resistance, which improved the heat transfer performance and stability in the warped region.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- CHANGZHOU HONGJU ELECTRIC TECH CO LTD
- Filing Date
- 2026-03-04
- Publication Date
- 2026-06-09
Smart Images
Figure CN122180384A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of thermal interface materials technology, and in particular to a thin thermal interface layer with high thermal conductivity and low thermal resistance, its preparation method, and a heat dissipation system. Background Technology
[0002] In the consumer electronics field, especially in portable devices such as laptops, ultrabooks, and high-performance tablets, processor performance and heat dissipation capabilities are always in a tense balance. With continuous advancements in integrated circuit technology, the transistor density and operating frequency of chips (such as CPUs and GPUs) are constantly increasing, leading to a dramatic increase in their heat flux density per unit area. In these highly integrated and space-constrained devices, the thermal interface material between the chip and the heat dissipation module becomes increasingly important.
[0003] However, the "chip lift-off" phenomenon severely disrupts the chip's heat dissipation path. In compact spaces such as laptops, heat dissipation modules are typically fixed with mechanical pressure. When this pressure is applied to a warped chip surface, it can cause excessive pressure on localized areas (especially the warped edges), while other areas suffer from insufficient contact, or even air gaps. This non-uniform contact poses extremely stringent challenges to the heat dissipation interface: First, thermal resistance increases dramatically. Air gaps are excellent thermal insulators, and their presence significantly increases contact thermal resistance, preventing effective heat dissipation. Second, the requirements for interface materials become extreme: to solve the contact problems caused by lift-off, traditional solutions often require thermal interface materials to possess excellent compressibility and compliance, enabling them to flow and fill uneven surfaces even under lower pressure. Simultaneously, to meet the increasingly demanding thinner and lighter requirements of consumer electronics, the overall height of the heat dissipation module is drastically compressed, leaving extremely limited vertical space for the thermal interface material.
[0004] Therefore, there is a strong market demand for an extremely thin thermal interface material. However, in existing technologies, there is an inherent contradiction between ultrathinness, high thermal conductivity, and high warp compliance in thermal interface materials. Ultrathin materials often become hardened due to the addition of high thermal conductivity fillers, making it impossible to fully fill warp gaps under low pressure; while sufficiently flexible materials struggle to maintain structural stability and high thermal conductivity in ultrathin forms. Therefore, developing an interface material that can achieve sustained high thermal conductivity, low thermal resistance, and warp tolerance under these harsh operating conditions has become a critical technological bottleneck that urgently needs to be overcome in this field. Summary of the Invention
[0005] The purpose of this application is to address the shortcomings of existing ultra-thin thermal interface materials in achieving both high thermal conductivity and low thermal resistance. Therefore, this application proposes a thin thermal interface layer with high thermal conductivity and low thermal resistance, its preparation method, and a heat dissipation system. The thermal interface layer of this application includes a thermally conductive framework with a specific radius of curvature and a thermal interface material. The thermally conductive framework has different thicknesses and opening configurations in different regions, enabling it to construct efficient thermal conduction pathways. Simultaneously, the thermal interface material uses specific tertiary polarized thermally conductive fillers with different particle sizes, which can effectively improve the horizontal thermal conductivity of the thermal interface material. Furthermore, the thermal interface material at the warped interface can reduce contact thermal resistance. This application achieves a high thermal conductivity and low thermal resistance thin thermal interface layer by synergistically combining a thermal interface material with a specific thermally conductive framework.
[0006] In a first aspect, the thin thermal interface layer with high thermal conductivity and low thermal resistance provided in this application adopts the following technical solution: the thermal interface layer includes a thermally conductive frame with through holes and a thermal interface material filling the through holes and covering the outer surface of the thermally conductive frame. The thermally conductive frame is divided into a first region and a second region. The first region corresponds to the warped region of the chip to be packaged, and the second region corresponds to the normal region of the chip to be packaged. The thickness of the first region is greater than the thickness of the second region, the opening area of the first region is greater than the opening area of the second region, and the predicted radius of curvature of the chip to be packaged and the surface radius of curvature of the thermally conductive frame near the chip to be packaged satisfy the following relationship: Equation (1), in which R1 is the surface radius of curvature of the thermally conductive frame, and R2 is the predicted radius of curvature of the chip to be packaged; the raw material components of the thermal interface material include a resin matrix, a crosslinking agent, a phase change material, and a thermally conductive filler, wherein the thermally conductive filler includes D 50 The first-stage packing material is 0.8~2 μm, D 50 The second-stage packing material is 5~15 μm and D 50 Third-stage packing material with a diameter of ≥50 μm.
[0007] Through the above technical solution, Figure 2 For example, if the hot spots of the chip to be packaged are located at the edges, it will result in high thermal stress and expansion around the chip. From Figure 2 As can be seen from b, the radius of curvature of the chip to be packaged after warping is close to the radius of curvature of the thermally conductive frame. Figure 2 c represents the thermal interface layer under stress, where the warped area of the chip to be packaged contacts the thermally conductive frame, while the thermal interface material fills the normal area of the chip to be packaged, and no gaps are generated between the thermal interface material and the normal area of the chip to be packaged. Figure 3The curvature of the thermally conductive frame in the thermal interface layer is opposite to the predicted curvature direction of the chip to be packaged. Under stress, although the warped area of the chip to be packaged is in contact with the thermally conductive frame, a gap is generated between the thermal interface material and the normal area of the chip to be packaged. Air has extremely low thermal conductivity, only 0.026 W(m·K). -1 This creates a very high contact thermal resistance, which reduces its thermal conductivity. Figure 2 c and Figure 3 As can be seen from this, only when the surface curvature radius of the thermal conductive frame is close to the curvature radius of the warped chip surface and satisfies equation (1) can the thermal conductive frame better perform its thermal conduction function; The first region corresponds to the warped area of the chip to be packaged, and the second region corresponds to the normal area of the chip to be packaged. The thickness of the first region is greater than that of the second region. The thicker thermally conductive frame region forms the main longitudinal thermal conduction path, which is beneficial to reduce the chip junction temperature. The lower temperature reduces thermal stress and improves the warping situation. At the same time, there is thermal interface material on both the top and bottom of the thermally conductive frame. Since the thermally conductive frame has a large opening design in the high warping area, more thermal interface material can be "mobilized" from the horizontal and vertical directions to fill the gaps in the warping area. Compared with the design without openings or with small openings, it is less prone to delamination. The thermal interface material of this design can always adhere well to the chip surface, thus maintaining efficient heat transfer and improving the warping situation. from Figure 4 As can be seen, the third tier of materials in the thermal interface material is arranged horizontally, improving its horizontal temperature uniformity. The thermally conductive frame is an integrated structure with a complete and efficient lateral heat conduction pathway. The combination of the thermally conductive frame and the thermal interface material can significantly improve the overall temperature uniformity of the thermal interface material. With improved temperature uniformity, the heat generated by the chip hotspots is quickly spread out, the temperature difference between the two different regions decreases, thermal stress is reduced, and warpage is improved.
[0008] In this application, the predicted radius of curvature of the chip to be packaged, the warped region of the chip to be packaged, and the normal region of the chip to be packaged can all be obtained by finite element thermo-mechanical simulation, and the software used is COMSOL.
[0009] In a specific implementation, the first-stage packing is selected as D. 50 Ceramic fillers of 0.8~2 μm, such as alumina, zinc oxide, aluminum nitride, and boron nitride fillers, have a thermal conductivity of 20~30 W / (m·K) for single-crystal oxides, approximately 319 W / (m·K) for single-crystal aluminum nitride ceramics, and 300~400 W / (m·K) (in-plane) and 30~40 W / (m·K) (across planes) for single-crystal boron nitride. Limiting the particle size and material type of the first-stage filler can improve the insulation capacity of the thermally conductive phase change material while ensuring thermal conductivity.
[0010] In a specific implementation, the second-stage packing is selected as D. 50 The filler material is one or more of ceramic, metal, and carbon materials with a thickness of 5-15 μm, preferably spherical metal filler. The thermal conductivity of pure aluminum is 237 W / (m·K), and that of high-purity copper is 401 W / (m·K). Spherical filler has good fluidity, low surface energy, and high filling capacity, making it easy to form a high thermal conductivity path inside the thermally conductive phase change material. However, if the first-stage filler is still constructed from metal powder, the dielectric strength of the thermally conductive phase change material will be greatly reduced because the metal spheres conduct heat and electricity at the same time when they are in contact with each other, which is not conducive to the heat dissipation of electronic devices. Therefore, the first-stage filler uses high thermal conductivity insulating ceramic powder, which destroys the conductive network while constructing the thermally conductive path, improves the insulation performance of the thermal interface material, and reduces the risk of leakage.
[0011] When choosing D 50 Using ceramic fillers <0.8 μm as the first-stage filler results in decreased thermal conductivity and increased thermal resistance. Excessively small particle sizes (e.g., nanometer-scale) lead to a dramatic increase in specific surface area, requiring extensive resin encapsulation, resulting in a thicker resin layer and significantly increased interparticle contact thermal resistance. Furthermore, ceramic fillers are difficult to disperse sufficiently around metal spherical fillers, easily agglomerating to form insulating clumps that block thermal conduction. When D... 50 Using ceramic fillers with a diameter >2 μm as the first-stage filler reduces thermal conductivity and increases thermal resistance: the number of particles decreases and the skeleton becomes sparser; it cannot effectively fill the tiny gaps between metal particles, leaving an air thermal barrier and increasing interfacial thermal resistance.
[0012] When the second-stage packing is D 50 For metal fillers <5 μm, similar to the problem of smaller primary fillers, the resin coating thickens, the number of highly thermally conductive metal particles per unit volume decreases, the channel density drops, and it becomes difficult to construct an efficient thermally conductive network; when the secondary filler is D... 50 Metal fillers with a diameter >15 μm exhibit reduced thermal conductivity and increased thermal resistance; excessively large or insufficient particle size results in sparse pathways, making it difficult to form a continuous network; and excessive size differences between the fillers and the first and third-stage fillers lead to fewer interfacial contact points and higher contact thermal resistance.
[0013] When the third-stage filler fiber is too short (D) 50 <50µm), losing its "bridging" advantage, it only functions as ordinary particles, unable to form an effective long-range heat conduction path, contributing little to reducing thermal resistance, and failing to achieve temperature uniformity; excessively long fibers (D 50 Although samples with a diameter of ≥550 μm have higher horizontal thermal conductivity due to the existence of longer and more complete thermal conduction pathways, this can affect the moldability of the samples and increase the risk of electrical conductivity.
[0014] Optionally, the first-stage packing is D. 50The zinc oxide is 0.8~1.5 μm, and the second-stage filler is D. 50 The third-stage filler is spherical copper powder with a diameter of 8-14 μm. 50 The carbon fiber is 60~80 μm, and more preferably it is a high thermal conductivity carbon fiber with a thermal conductivity of 1000 W / (m·K) or higher.
[0015] Through the above technical solutions, such as Figure 5 As shown, the first and second stage fillers are more preferably spherical copper powder coated with amorphous zinc oxide powder. While constructing a thermally conductive path, they also interrupt the conductive network, making the prepared thermal interface material safer, free from the risk of conductive short circuits, and with a wider range of applications. Long carbon fibers have high thermal conductivity and are approximately in the hundreds of micrometers or even millimeters in length. First, they can further improve the thermal conductivity path between powders, and they also have a fiber reinforcement effect. Finally, long carbon fibers are one-dimensional materials, and carbon fibers tend to align parallel to the plane in the gradient calendering process, thus having the ability to improve the horizontal temperature equalization effect.
[0016] In a specific embodiment, the thermally conductive frame is selected from a three-dimensional interconnected porous foam structure, a mesh film structure, a foil perforated structure, or a fiber braided structure.
[0017] In a specific embodiment, the resin matrix is selected from siloxane structure or polyolefin structure, for example, it can be selected from one or more of addition-type liquid silicone rubber, polyisobutylene, hydroxyl-terminated polybutadiene, hydroxyl-terminated polyisobutylene, hydroxyl-terminated butadiene-acrylonitrile rubber, hydroxyl-terminated polyisoprene, and hydroxyl-terminated polysiloxane.
[0018] In specific embodiments, the crosslinking agent is selected from one or more of polyisocyanates, epoxy resins, amino resins, polybasic acids, and polybasic acid derivatives. Preferably, the crosslinking agent is a polyisocyanate and / or an amino resin.
[0019] In a specific embodiment, the phase change material is selected from one or more of high-purity paraffin wax, Fischer-Tropsch wax, polyethylene glycol, silicone wax, polyethylene wax, polypropylene wax, microcrystalline wax, polyester wax, AMS wax, and fatty acids. Preferably, the phase change material is high-purity paraffin wax and / or microcrystalline wax.
[0020] Optionally, the latent heat of phase change of the phase change material is ≥200 J / g, and the mass ratio of the phase change material to the resin matrix is 1.2~2.5:1, specifically, for example, it can be 1.2:1, 1.5:1, 1.8:1, 2.2:1 or 2.5:1; and based on the total mass of the raw material components of the thermal interface material as 100%, the content of the phase change material is 20~25%.
[0021] By using the above technical solutions, the latent heat and content of phase change materials are further limited. Using phase change materials with high content and high latent heat has the following advantages: the resulting thermal interface material has a higher latent heat of phase change and a higher resistance to instantaneous thermal shock, thereby further improving the thermal conductivity of the thermal interface layer.
[0022] Optionally, based on the total mass of the thermally conductive filler as 100%, the content of the first-stage filler is 21-29%, the content of the second-stage filler is 65-73%, and the content of the third-stage filler is 5-6%.
[0023] Optionally, the raw material components of the thermal interface material may further include styrene-butadiene-styrene block copolymer, wherein the mass of the styrene-butadiene-styrene block copolymer is 8 to 20% of the mass of the resin matrix, specifically, for example, 8%, 10%, 12%, 14%, 16%, 18% or 20%.
[0024] By adding a certain amount of SBS (styrene-butadiene-styrene block copolymer) through the above technical solution, the flexibility of the material can be effectively improved, thereby increasing the elongation of the thermal interface material. This ensures that the material still has good bonding strength with the chip and the thermally conductive frame when the chip warps due to thermal stress, preventing the thermal interface layer from separating from the chip. Therefore, it can always maintain efficient heat transfer and improve the warping situation.
[0025] Optionally, the crosslinking agent is a dynamic crosslinking agent containing borate ester bonds and / or disulfide bonds. Specifically, the dynamic crosslinking agent is 4-formylphenylboronic acid.
[0026] By adding a dynamic crosslinking agent containing borate ester bonds and / or disulfide bonds through the above technical solution, the thermal interface material can have a better self-recovery ability when facing pumping out and cracking, thus giving the thermal interface layer the characteristics of being pump-out resistant and crack-resistant.
[0027] In a specific embodiment, based on the total mass of the raw material components of the thermal interface material as 100%, the content of the resin matrix is 8-12%, the content of the crosslinking agent is 0.5-1%, the content of the phase change material is 20-25%, the content of the thermally conductive filler is 60-71%, and the content of the styrene-butadiene-styrene block copolymer is 0.5-2%.
[0028] By using the above technical solution, the resin matrix, crosslinking agent, phase change material and thermally conductive filler are used synergistically, and their amounts are limited, which can improve the thermal conductivity of the thermal interface layer.
[0029] Optionally, the maximum thickness of the first region is 70~120 μm, and the maximum thickness of the second region is 30~50 μm; the ratio of the opening area of the first region to the opening area of the second region is 3~5:1.
[0030] Through the above technical solution, the maximum thickness of the first region is limited to 70~120 μm, the thermal interface layer meets the requirements of ultra-thinness, and more high thermal conductivity material, i.e. thermally conductive frame material, is introduced in the vertical thermal conduction direction of the warped region, which is beneficial to improve the vertical thermal conductivity of the warped region. The larger opening area of the warped region also helps to improve the strength of the thermally conductive phase change material on the upper and lower surfaces of the thermally conductive frame, which facilitates the thermally conductive phase change material in the warped region to pull the lower thermally conductive phase change material. This avoids the thermally conductive phase change material in the warped region from delaminating with the chip or thermally conductive frame due to the limited mass and stretchability of the thermally conductive phase change material at that location when the chip warps, thereby improving the contact thermal resistance.
[0031] Secondly, this application provides a method for preparing the above-mentioned thin thermal interface layer with high thermal conductivity and low thermal resistance, the preparation method comprising the following steps: S1. The thermally conductive frame is pretreated, and the resin matrix, crosslinking agent, phase change material and thermally conductive filler are mixed to obtain a phase change composite slurry; S2. The pretreated thermally conductive frame is impregnated in the phase change composite slurry using a gradient calendering process. The gradient calendering process includes an initial calendering stage and a final calendering stage. The conditions for the initial calendering stage are: temperature 100~120 ℃, pressure 0.5~1 MPa, and time 5~10 min. The conditions for the final calendering stage are: temperature 80~100 ℃, pressure 1~2 MPa, and time 3~5 min, to obtain a preform. S3. The preform is cured to obtain the thin thermal interface layer with high thermal conductivity and low thermal resistance.
[0032] Through the above technical solution, the gradient calendering process is operated in a two-roll calender or a multi-roll calender. In the gradient calendering process, initial pressing is first performed at a temperature of 100~120 ℃ and a pressure of 0.5~1 MPa. The initial pressing stage is carried out at a temperature and initial pressure higher than the melting point of the phase change material. The key to this stage is to completely melt the thermally conductive phase change material to obtain excellent fluidity and adhesion, thereby fully impregnating and adhering to every pore and surface of the thermally conductive frame under pressure, expelling interfacial air, and achieving a high adhesion rate. Subsequently, at a temperature of 80~100 ℃ and a pressure of 1~2 MPa, the process is further refined. Final pressing at MPa allows for effective relaxation and redistribution of internal stress through pressure and temperature control in the intermediate stage. Final pressing provides "stress-relieving" precision thickness determination and surface leveling of the formed composite material, ensuring the target thickness is achieved while avoiding stress concentration, interface delamination, or material damage caused by excessively rapid one-time molding. The entire process achieves a controlled transition from "flow filling" to "stress relaxation" and then to "dimensional stability," which is key to obtaining high-performance and highly reliable interfaces.
[0033] In a specific embodiment, the pretreatment method for the heat-conducting frame in step S1 is as follows: the heat-conducting frame is sequentially subjected to degreasing, oxide layer removal, activation treatment, and surface roughening treatment. In this application, degreasing, oxide layer removal, activation treatment, and surface roughening treatment are all conventional operations in the art.
[0034] Optionally, when the raw material components of the thermal interface material further include a styrene-butadiene-styrene block copolymer, and the crosslinking agent is a dynamic crosslinking agent containing borate ester bonds and / or disulfide bonds, the preparation method includes the following steps: S1. The thermally conductive frame is pretreated, and the resin matrix, styrene-butadiene-styrene block copolymer, dynamic crosslinking agent and phase change material are mixed at 70~90 °C to obtain a homogeneous mixture. Then the homogeneous mixture and the thermally conductive filler are mixed in vacuum stirring and ultrasonic dispersion to obtain a phase change composite slurry. S2. The pretreated thermally conductive frame is impregnated in the phase change composite slurry using a gradient calendering process. The gradient calendering process includes an initial calendering stage and a final calendering stage. The conditions for the initial calendering stage are: temperature 100~120 ℃, pressure 0.5~1 MPa, and time 5~10 min. The conditions for the final calendering stage are: temperature 80~100 ℃, pressure 1~2 MPa, and time 3~5 min, to obtain a preform. S3. The preform is first treated at 90~110 ℃ for 1~2 h, and then treated at 120~160 ℃ for 4~6 h to obtain the thin thermal interface layer with high thermal conductivity and low thermal resistance.
[0035] The purpose of mixing the resin matrix, styrene-butadiene-styrene block copolymer, dynamic crosslinking agent, and phase change material at 70-90 °C is to mix them above the phase change point, allowing the phase change material to transform from solid to liquid so that the raw materials can be fully and uniformly mixed, avoiding the obvious graininess and uneven mixing of solid paraffin at room temperature. Treating the preform at 90-110 °C first allows for the initial crosslinking of dynamic covalent bonds, and then the final curing of the thermal interface layer is completed at 120-160 °C.
[0036] Thirdly, this application provides a heat dissipation system, including a chip to be packaged, a heat dissipation device, and a thin thermal interface layer with high thermal conductivity and low thermal resistance as described above. The thin thermal interface layer with high thermal conductivity and low thermal resistance is located between the chip to be packaged and the heat dissipation device, and the thermally conductive frame in the thermal interface is correspondingly disposed with respect to the chip to be packaged.
[0037] In summary, this application includes at least one of the following beneficial technical effects: 1. The thermal interface layer described in this application includes a thermally conductive frame with a specific radius of curvature and a thermal interface material. The thermally conductive frame can better perform its thermal conductivity function. At the same time, the thickness and opening area of the thermally conductive frame corresponding to the warped part of the chip are set to be greater than the thickness and opening area corresponding to the normal part of the chip. This allows the thermally conductive frame to form a longitudinal thermal conduction path. Furthermore, the pores and surface of the thermally conductive frame have a specific thermal interface material. The thermal interface material can always adhere well to the chip surface, reducing thermal resistance and thus maintaining efficient heat transfer. Meanwhile, the third-level graded material in the thermal interface material is arranged in the horizontal direction, improving its horizontal temperature uniformity. Therefore, the synergistic use of a specific thermally conductive frame structure and a specific thermal interface material can significantly improve the overall temperature uniformity of the thermal interface layer. The heat generated by the chip hot spot is quickly spread out, the temperature difference between the two different regions is reduced, thermal stress is reduced, and chip warpage is improved. 2. The thermal interface layer described in this application uses a specific gradient calendering process during its preparation, which achieves a controlled transition from "flow filling" to "stress relaxation" and then to "dimensional stability", ultimately obtaining a high-performance and highly reliable thermal interface layer; 3. In a preferred embodiment, the addition of a dynamic crosslinking agent containing borate ester bonds and / or disulfide bonds can enhance the self-recovery ability of the thermal interface material in the face of pumping out and cracking, thereby giving the thermal interface layer anti-pumping and anti-cracking properties. Attached Figure Description
[0038] Figure 1 This refers to the thermal interface layer designed based on the edge warping of the chip in Example 1, where a is a front view of the thermal interface layer and b is a top view of the thermal interface layer. Figure 1In section b, the large hole area is the first area of the thermal conductive frame, corresponding to the warped area of the chip to be packaged, and the small hole area is the second area of the thermal conductive frame, corresponding to the normal area of the chip to be packaged. Figure 2 The thermal interface layer is designed based on the edge warping of the chip. a is a schematic diagram of the chip, thermal interface layer and heat sink before warping; b is a schematic diagram of the chip, thermal interface layer and heat sink after warping; c is a schematic diagram of the chip, thermal interface layer and heat sink after being subjected to stress. The stress is the internal stress that the chip experiences when it rises from room temperature (25 ℃) to operating temperature (85 ℃). Figure 3 This is a schematic diagram of the structure of the warped chip, thermal interface layer and heat sink. The surface radius of curvature of the thermal interface layer near the chip is opposite to the direction of the predicted radius of curvature of the chip. Figure 4 The diagrams show the thermal conductivity mechanisms of different graded packings, where a represents the thermal conductivity mechanism of the first-stage packing, b represents the thermal conductivity mechanism of the first-stage and second-stage packings, and c represents the thermal conductivity mechanism of the first-stage, second-stage, and third-stage packings. Figure 5 SEM images of the two-stage packing material at different scales are shown. The first-stage packing material is zinc oxide with a D50 of 1.4 μm, and the second-stage packing material is D... 50 The secondary filler consists of 12 μm spherical copper powder, which is coated with amorphous zinc oxide powder. Figure 6 The original test curve of vertical thermal conductivity and thermal diffusivity diagram of the heat dissipation system described in Comparative Example 6 are used for application. Figure 7 The original test curve of vertical thermal conductivity and thermal diffusivity diagram of the heat dissipation system described in Comparative Example 5 are used for application. Figure 8 The original test curve of vertical thermal conductivity and thermal diffusivity diagram of the heat dissipation system described in Example 1 are shown. Figure 9 The graph shows the trend of chip temperature change over time when the heat dissipation system described in Application Example 1 and Comparative Examples 4-6 is tested at 92 °C. Figure 10 The image shows the warpage displacement of the chip in the heat dissipation system described in Example 1 after testing at 92 °C for 120 min. Detailed Implementation
[0039] The following combination Figures 1-10 The present application will be further described in detail with reference to specific embodiments.
[0040] The following examples further illustrate the high thermal conductivity, low thermal resistance thin thermal interface layer, its preparation method, and heat dissipation system described in this application. These examples are implemented based on the technical solution of this application, providing detailed implementation methods and specific operating procedures; however, the scope of protection of this application is not limited to the following examples.
[0041] Unless otherwise specified, the experimental methods used in the following embodiments are conventional methods in the art. Unless otherwise specified, the experimental materials used in the following embodiments are commercially available.
[0042] Thermal conductive frame: perforated copper mesh, purchased from Kangwei Metal Wire Mesh Products Co., Ltd. Hydroxyl-terminated polyisobutylene (resin matrix): Purchased from Xi'an Qiyue Biotechnology Co., Ltd. High-purity paraffin (phase change material): purchased from Shanghai Joule Wax Industry Co., Ltd., with a latent heat of phase change of 248 J / g; Styrene-butadiene-styrene block copolymer: Purchased from Ningbo Changhong Polymer Technology Co., Ltd.; Spherical copper powder (secondary filler): purchased from Changsha Tianjiu Metal Materials Co., Ltd. Carbon fiber (third-stage filler): Purchased from Toray Industries, Inc.
[0043] Example 1 A thin thermal interface layer with high thermal conductivity and low thermal resistance, such as Figure 1 As shown, the thermal interface layer includes a copper circular mesh with through holes and a thermal interface material filling the through holes and covering the outer surface of the copper circular mesh. The thermally conductive frame is divided into a first region and a second region, as shown... Figures 1-2 As shown, the first region corresponds to the warped area of the chip to be packaged, and the second region corresponds to the normal area of the chip to be packaged. The maximum thickness of the first region is 90 μm, the maximum thickness of the second region is 30 μm, and the opening area of the first region is 210 mm². 2 The opening area of the second region is 70 mm. 2 The predicted radius of curvature of the chip to be packaged and the surface radius of curvature of the thermally conductive frame near the chip to be packaged satisfy equation (1). Taking the minimum predicted radius of curvature of the chip to be packaged as an example, the minimum predicted radius of curvature of the chip to be packaged is -1.85 m, and the radius of curvature of the surface of the thermally conductive frame near the position of the minimum predicted radius of curvature of the chip to be packaged is -2 m. The raw material components of the thermal interface material include polyisobutylene (resin matrix), 4-formylphenylboronic acid (dynamic crosslinking agent), high-purity paraffin (phase change material), styrene-butadiene-styrene block copolymer, and thermally conductive filler. Based on the total mass of the raw material components of the thermal interface material as 100%, the content of polyisobutylene is 12%, the content of 4-formylphenylboronic acid is 0.72%, the content of high-purity paraffin is 21.6% (the mass ratio of phase change material to resin matrix is 1.8:1), the content of styrene-butadiene-styrene block copolymer is 1.68%, and the content of thermally conductive filler is 64%. The thermally conductive filler includes D... 50 Zinc oxide powder with a diameter of 0.8 μm and D 50 8 μm spherical copper powder and D 50 The carbon fiber is 60 μm thick, and based on the total mass of the thermally conductive filler (100%), the content of zinc oxide powder is 25%, the content of spherical copper powder is 70%, and the content of carbon fiber is 5%.
[0044] A method for preparing a thin thermal interface layer with high thermal conductivity and low thermal resistance, the method comprising the following steps: S1. The thermally conductive frame is pretreated, and the polyisobutylene, styrene-butadiene-styrene block copolymer, 4-formylphenylboronic acid and high-purity paraffin are mixed at 80 °C to obtain a homogeneous mixture. Then the homogeneous mixture and the thermally conductive filler are mixed in vacuum stirring and ultrasonic dispersion to obtain a phase change composite slurry. S2. The pretreated thermally conductive frame is impregnated in the phase change composite slurry using a gradient calendering process. The gradient calendering process includes an initial calendering stage and a final calendering stage. The conditions for the initial calendering stage are: temperature of 110 ℃, pressure of 0.8 MPa, and time of 8 min. The conditions for the final calendering stage are: temperature of 90 ℃, pressure of 1.5 MPa, and time of 4 min, to obtain a preform. S3. The preform is first treated at 100 °C for 1.5 h, and then treated at 140 °C for 5 h to obtain a 90 μm thin thermal interface layer with high thermal conductivity and low thermal resistance.
[0045] Example 2 Implemented in accordance with Example 1, except that D 50 All 8 μm spherical copper powders were replaced with D. 50 Zinc oxide powder with a thickness of 8 μm was used to obtain a thin thermal interface layer with a thickness of 90 μm, characterized by high thermal conductivity and low thermal resistance.
[0046] Example 3 Implemented in accordance with Example 1, except that D 50 All 8 μm spherical copper powders were replaced with D.50 A thin thermal interface layer with high thermal conductivity and low thermal resistance of 90 μm was obtained by using 8 μm carbon fibers.
[0047] Example 4 The method is implemented in accordance with Example 1, except that, based on the total mass of the thermally conductive filler being 100%, the content of the zinc oxide powder is 21%, the content of the spherical copper powder is 73%, and the content of the carbon fiber is 6%, resulting in a 90 μm thin thermal interface layer with high thermal conductivity and low thermal resistance.
[0048] Example 5 The method is implemented in accordance with Example 1, except that, based on the total mass of the thermally conductive filler being 100%, the content of the zinc oxide powder is 29%, the content of the spherical copper powder is 66%, and the content of the carbon fiber is 5%, to obtain a 90 μm thin thermal interface layer with high thermal conductivity and low thermal resistance.
[0049] Example 6 The method is implemented in accordance with Example 1, except that in step S2, the conditions of the initial pressure stage include: a temperature of 100 ℃, a pressure of 0.5 MPa, and a time of 5 min, to obtain a 90 μm thin thermal interface layer with high thermal conductivity and low thermal resistance.
[0050] Example 7 The method is implemented in accordance with Example 1, except that in step S2, the conditions of the initial pressure stage include: temperature of 120 ℃, pressure of 1 MPa, and time of 10 min, to obtain a 90 μm thin thermal interface layer with high thermal conductivity and low thermal resistance.
[0051] Example 8 The method is implemented in accordance with Example 1, except that in step S2, the conditions of the final pressure stage include: temperature of 80 ℃, pressure of 1 MPa, and time of 3 min, to obtain a 90 μm thin thermal interface layer with high thermal conductivity and low thermal resistance.
[0052] Example 9 The method is implemented in accordance with Example 1, except that in step S2, the conditions of the final pressure stage include: a temperature of 100 ℃, a pressure of 2 MPa, and a time of 5 min, to obtain a 90 μm thin thermal interface layer with high thermal conductivity and low thermal resistance.
[0053] Example 10 Implemented in accordance with Example 1, except that the thermally conductive filler includes D 50 Zinc oxide powder with a diameter of 1.5 μm, D 50 5 μm spherical copper powder and D 50A thin thermal interface layer with high thermal conductivity and low thermal resistance of 90 μm was obtained from 50 μm carbon fibers.
[0054] Example 11 Implemented in accordance with Example 1, except that the thermally conductive filler includes D 50 Zinc oxide powder with a diameter of 2 μm, D 50 15 μm spherical copper powder and D 50 A thin thermal interface layer with high thermal conductivity and low thermal resistance of 90 μm was obtained from 500 μm carbon fibers.
[0055] Example 12 Implemented in accordance with Example 1, except that the thermally conductive filler includes D 50 Zinc oxide powder with a diameter of 2 μm, D 50 15 μm spherical copper powder and D 50 A thin thermal interface layer with high thermal conductivity and low thermal resistance of 90 μm was obtained from 550 μm carbon fibers.
[0056] Example 13 Implemented in accordance with Example 1, except that the thermally conductive filler includes D 50 0.8 μm spherical copper powder, D 50 8 μm spherical copper powder and D 50 A thin thermal interface layer with high thermal conductivity and low thermal resistance of 90 μm was obtained from 60 μm carbon fibers.
[0057] Comparative Example 1 Implemented in accordance with Example 1, except that, as Figure 3 As shown, the minimum predicted radius of curvature of the chip to be packaged is -1.85 m, and the radius of curvature of the thermally conductive frame surface near the minimum predicted radius of curvature of the chip to be packaged is +2 m.
[0058] Comparative Example 2 The implementation follows the method of Example 1, except that the thickness of the first region and the thickness of the second region are both 50 μm.
[0059] Comparative Example 3 The method is implemented in accordance with Embodiment 1, except that the opening area of both the first region and the second region is 70 mm. 2 .
[0060] Comparative Example 4 Implemented in accordance with Example 1, except that the thermally conductive filler includes D 50 Zinc oxide powder with a diameter of 0.8 μm and D 50The copper powder is spherical with a diameter of 8 μm. Based on the total mass of the thermally conductive filler (100%), the content of zinc oxide powder is 28%, and the content of spherical copper powder is 72%.
[0061] Comparative Example 5 The implementation follows the method of Example 1, except that the thermal interface layer only includes thermal interface material and does not include a thermally conductive frame.
[0062] Comparative Example 6 The method is implemented in accordance with Comparative Example 4, except that the thermal interface layer only includes thermal interface material and does not include a thermally conductive frame.
[0063] Comparative Example 7 Implemented in accordance with Example 1, except that the thermally conductive filler includes D 50 Zinc oxide powder with a diameter of 0.5 μm, D 50 3 μm spherical copper powder and D 50 It is a 30 μm carbon fiber.
[0064] Comparative Example 8 The process is implemented in accordance with Example 1, except that in step S2, a one-step calendering process is performed. The specific process of step S2 is as follows: the pretreated thermally conductive frame is immersed in the phase change composite slurry using a one-step calendering process. The conditions of the one-step calendering process include: temperature of 90 ℃, pressure of 1.5 MPa, and time of 4 min.
[0065] Application Examples 1-13 Application Example 1 A heat dissipation system, such as Figure 2 As shown, the device includes a chip to be packaged, a heat dissipation device, and a thin thermal interface layer with high thermal conductivity and low thermal resistance as described in Example 1. The thin thermal interface layer with high thermal conductivity and low thermal resistance is located between the chip to be packaged and the heat dissipation device, and the thermally conductive frame in the thermal interface is correspondingly arranged with respect to the chip to be packaged. Figure 10 As shown, the dimensions of the chip to be packaged are 20 mm × 28 mm × 1 mm, and the predicted warpage is 0.08 mm.
[0066] Application Examples 2 to 13 are all implemented in the same manner as Application Example 1, except that the thin thermal interface layer with high thermal conductivity and low thermal resistance described in Example 1 is replaced with the thin thermal interface layer with high thermal conductivity and low thermal resistance described in Examples 2 to 13.
[0067] Application Comparative Examples 1-8 Comparative Examples 1 to 8 were implemented in the same manner as Application Example 1, except that the thin thermal interface layer with high thermal conductivity and low thermal resistance described in Example 1 was replaced with the thermal interface layer prepared in Comparative Examples 1 to 8.
[0068] Test case Horizontal thermal conductivity: Thermal conductivity is calculated by measuring the thermal diffusivity using the laser flare method, in accordance with ASTM E1461; Vertical thermal conductivity: Thermal conductivity is calculated by measuring the thermal diffusivity using the laser flare method, following ASTM E1461. The formula for calculating the vertical thermal diffusivity is: α = 0.1388 * L 2 / t 1 / 2 L represents the precise thickness of the sample, and t 1 / 2 This is half the heating time; Thermal resistance at 50 Psi: Steady-state method for measuring thermal resistance, in accordance with ASTM D5470; The heat dissipation systems prepared in Application Examples 1-13 and Comparative Examples 1-8 were tested and calculated for horizontal thermal conductivity, vertical thermal conductivity, thermal resistance at 50 Psi, and vertical thermal diffusivity. The results are shown in Table 1. Table 1
[0069] As can be seen from Table 1, in the heat dissipation systems described in Application Examples 1-13, the relationship between the surface curvature radius of the thermally conductive frame and the curvature radius of the surface of the chip to be packaged at the same corresponding location satisfies Equation (1). The third-level gradation material in the thermal interface material will be arranged in the horizontal direction to improve its horizontal temperature equalization capability. This application uses a specific thermally conductive frame structure in conjunction with a specific thermal interface material, which can significantly improve the thermal conductivity and thermal diffusivity of the thermal interface layer, while reducing the thermal resistance. Application Example 12 uses D 50 Although the 550 μm carbon fiber produces a sample with higher horizontal thermal conductivity due to the existence of a longer and more complete thermal conduction path, this affects the sample's formability and increases the risk of electrical conductivity. In Application Example 13, replacing the same size zinc oxide powder with spherical copper powder actually results in higher thermal conductivity and lower thermal resistance, but it cannot be used for heat dissipation in electronic devices because it is not insulating and poses a risk of leakage.
[0070] The heat dissipation systems of Application Example 1 and Comparative Examples 4-6 were tested at a temperature of 92 °C, and the temperature of the chip warpage area was measured. The test results are as follows: Figure 9 As shown, from Figure 9 As can be seen, the chip temperature in Application Example 1 is always lower than the chip temperature in Application Comparative Examples 4 to 6. The lower the chip temperature, the lower the thermal stress and the smaller the impact on warpage. Figure 10 The warpage of the chip in the heat dissipation system described in Example 1 at 92°C is shown to be approximately 80 μm, indicating a low degree of warpage.
[0071] The embodiments described in this specific implementation are preferred embodiments of this application and are not intended to limit the scope of protection of this application.
Claims
1. A thin thermal interface layer with high thermal conductivity and low thermal resistance, characterized in that, The thermal interface layer includes a thermally conductive frame with through holes and a thermal interface material filling the through holes and covering the outer surface of the thermally conductive frame. The thermally conductive frame is divided into a first region and a second region. The first region corresponds to the warped region of the chip to be packaged, and the second region corresponds to the normal region of the chip to be packaged. The thickness of the first region is greater than the thickness of the second region, and the opening area of the first region is greater than the opening area of the second region. The predicted radius of curvature of the chip to be packaged and the surface radius of curvature of the thermally conductive frame near the chip to be packaged satisfy the following relationship: Equation (1), In equation (1), R1 is the surface curvature radius of the thermally conductive frame, and R2 is the predicted curvature radius of the chip to be packaged. The raw material components of the thermal interface material include a resin matrix, a crosslinking agent, a phase change material, and a thermally conductive filler, wherein the thermally conductive filler includes D... 50 The first-stage packing material is 0.8~2 μm, D 50 The second-stage packing material is 5~15 μm and D 50 Third-stage packing material with a diameter of ≥50 μm.
2. The thin thermal interface layer with high thermal conductivity and low thermal resistance according to claim 1, characterized in that, The first stage packing is D 50 The zinc oxide is 0.8~1.5 μm, and the second-stage filler is D. 50 The third-stage filler is spherical copper powder with a diameter of 8-14 μm. 50 It consists of carbon fibers with a thickness of 60~80 μm.
3. The thin thermal interface layer with high thermal conductivity and low thermal resistance according to claim 1, characterized in that, The latent heat of phase change of the phase change material is ≥200 J / g, the mass ratio of the phase change material to the resin matrix is 1.2~2.5:1, and the content of the phase change material is 20~25% based on the total mass of the raw material components of the thermal interface material as 100%.
4. The thin thermal interface layer with high thermal conductivity and low thermal resistance according to claim 1 or 2, characterized in that, Based on the total mass of the thermally conductive filler as 100%, the content of the first-stage filler is 21-29%, the content of the second-stage filler is 65-73%, and the content of the third-stage filler is 5-6%.
5. The thin thermal interface layer with high thermal conductivity and low thermal resistance according to claim 1, characterized in that, The raw material components of the thermal interface material also include styrene-butadiene-styrene block copolymer, wherein the mass of the styrene-butadiene-styrene block copolymer is 8 to 20% of the mass of the resin matrix.
6. The thin thermal interface layer with high thermal conductivity and low thermal resistance according to claim 1, wherein the crosslinking agent is a dynamic crosslinking agent containing borate ester bonds and / or disulfide bonds.
7. The thin thermal interface layer with high thermal conductivity and low thermal resistance according to claim 1, characterized in that, The maximum thickness of the first region is 70~120 μm, and the maximum thickness of the second region is 30~50 μm; The ratio of the opening area of the first region to the opening area of the second region is 3~5:
1.
8. A method for preparing a thin thermal interface layer with high thermal conductivity and low thermal resistance as described in any one of claims 1 to 7, characterized in that, The preparation method includes the following steps: S1. The thermally conductive frame is pretreated, and the resin matrix, crosslinking agent, phase change material and thermally conductive filler are mixed to obtain a phase change composite slurry; S2. The pretreated thermally conductive frame is impregnated in the phase change composite slurry using a gradient calendering process. The gradient calendering process includes an initial calendering stage and a final calendering stage. The conditions for the initial calendering stage are: temperature 100~120 ℃, pressure 0.5~1 MPa, and time 5~10 min. The conditions for the final calendering stage are: temperature 80~100 ℃, pressure 1~2 MPa, and time 3~5 min, to obtain a preform. S3. The preform is cured to obtain the thin thermal interface layer with high thermal conductivity and low thermal resistance.
9. The method for preparing a thin thermal interface layer with high thermal conductivity and low thermal resistance according to claim 8, characterized in that, When the raw material components of the thermal interface material further include styrene-butadiene-styrene block copolymer, and the crosslinking agent is a dynamic crosslinking agent containing borate ester bonds and / or disulfide bonds, the preparation method includes the following steps: S1. The thermally conductive frame is pretreated, and the resin matrix, styrene-butadiene-styrene block copolymer, dynamic crosslinking agent and phase change material are mixed at 70~90°C to obtain a homogeneous mixture. Then the homogeneous mixture and the thermally conductive filler are mixed in vacuum stirring and ultrasonic dispersion to obtain a phase change composite slurry. S2. The pretreated thermally conductive frame is impregnated in the phase change composite slurry using a gradient calendering process. The gradient calendering process includes an initial calendering stage and a final calendering stage. The conditions for the initial calendering stage are: temperature 100~120 ℃, pressure 0.5~1 MPa, and time 5~10 min. The conditions for the final calendering stage are: temperature 80~100 ℃, pressure 1~2 MPa, and time 3~5 min, to obtain a preform. S3. The preform is first treated at 90~110 ℃ for 1~2 h, and then treated at 120~160 ℃ for 4~6 h to obtain the thin thermal interface layer with high thermal conductivity and low thermal resistance.
10. A heat dissipation system, characterized in that, The package includes a chip to be packaged, a heat dissipation device, and a thin thermal interface layer with high thermal conductivity and low thermal resistance as described in any one of claims 1 to 7. The thin thermal interface layer with high thermal conductivity and low thermal resistance is located between the chip to be packaged and the heat dissipation device, and the thermally conductive frame in the thermal interface is correspondingly disposed with respect to the chip to be packaged.