Current detection circuit, chip and electronic device

Abstract

The disclosure provides a current detection circuit, a chip and an electronic device, comprising a differential operational amplifier circuit and a current compensation circuit, the differential operational amplifier circuit determines the output voltage of the current detection circuit based on the voltage difference between the external sampling resistor, wherein the voltage difference between the external sampling resistor is proportional to the current to be measured, and the current compensation circuit absorbs the compensation current from the differential operational amplifier circuit and releases it to the ground, wherein the compensation current is equal to the output current of the differential operational amplifier circuit. The circuit can offset the influence of the protection resistor on the current detection circuit through the compensation current absorbed by the current compensation circuit, thereby improving the stability of the current detection circuit and the accuracy of the current detection result.

Description

Technical Field

[0001] Embodiments of this disclosure relate to the field of integrated circuit technology, and more particularly to current detection circuits, chips, and electronic devices. Background Technology

[0002] In the field of electronic systems, current sensing is a fundamental and critical function, and its accuracy and reliability directly affect the control and protection performance of the system. In order to improve the robustness of current sensing circuits in complex electromagnetic environments and enhance their electrostatic discharge (ESD) protection and common-mode noise suppression capabilities, existing technologies generally adopt the solution of connecting an additional protective resistor and a filter capacitor in series outside the current sensing input pin.

[0003] However, since the protective resistor in this scheme affects the actual voltage division at the detection node together with the external detection resistor, the signal processed by the subsequent circuit includes not only the information of the current to be measured, but also the error introduced by the protective resistor parameters. This causes the output result of the current detection circuit to change, thereby reducing the stability of the current detection circuit and the accuracy of the current detection result. Summary of the Invention

[0004] This disclosure provides a current detection circuit, chip, and electronic device that can improve the stability of the current detection circuit and the accuracy of the current detection results.

[0005] In a first aspect, this disclosure provides a current detection circuit, which includes a differential operational amplifier circuit and a current compensation circuit. The non-inverting input terminal of the differential operational amplifier circuit is connected to the first terminal of an external sampling resistor via a first protection resistor. The inverting input terminal of the differential operational amplifier circuit is connected to the second terminal of the external sampling resistor via a second protection resistor. The inverting input terminal of the differential operational amplifier circuit is connected to the current compensation circuit. A filter capacitor is connected between the non-inverting and inverting input terminals of the differential operational amplifier circuit. The output terminal of the differential operational amplifier circuit is connected to the output terminal of the current detection circuit. The resistance values ​​of the first and second protection resistors are equal.

[0006] The differential operational amplifier circuit is configured to determine the output voltage of the current detection circuit based on the voltage difference across the external sampling resistor, wherein the voltage difference across the external sampling resistor is proportional to the current to be measured.

[0007] The current compensation circuit is configured to draw in compensation current from the inverting input terminal of the differential operational amplifier circuit and release it to ground, wherein the compensation current is equal to the output current of the differential operational amplifier circuit.

[0008] In some embodiments of this disclosure, the differential operational amplifier circuit includes a first input resistor, a second input resistor, an output resistor, a first operational amplifier, and a first power transistor. The first input resistor and the second input resistor have equal resistance values. The first end of the first input resistor is connected to the first end of the external sampling resistor through the first protection resistor. The first end of the second input resistor is connected to the second end of the external sampling resistor through the second protection resistor. The first end of the second input resistor is connected to the current input terminal of the current compensation circuit.

[0009] The second end of the first input resistor is connected to the non-inverting input of the first operational amplifier and the first end of the first power transistor. The second end of the second input resistor is connected to the inverting input of the first operational amplifier. The output of the first operational amplifier is connected to the control terminal of the first power transistor. The second end of the first power transistor is connected to the first end of the output resistor and the output of the current detection circuit. The second end of the output resistor and the current output of the current compensation circuit are grounded.

[0010] In some embodiments of this disclosure, the current compensation circuit is further configured to mirror the output current of the differential operational amplifier circuit to the compensation current.

[0011] In some embodiments of this disclosure, the current compensation circuit includes a second power transistor and a grounding resistor. A first terminal of the second power transistor is connected to a first terminal of the second input resistor, and a second terminal of the second power transistor is grounded through the grounding resistor. A control terminal of the second power transistor is connected to a control terminal of the first power transistor. The second power transistor and the first power transistor form a current mirror.

[0012] In some embodiments of this disclosure, the grounding resistor and the output resistor have the same resistance value, and the second power transistor and the first power transistor have the same size.

[0013] In some embodiments of this disclosure, the current compensation circuit is further configured to perform voltage-to-current conversion on the output voltage of the current detection circuit to obtain the compensation current.

[0014] In some embodiments of this disclosure, the current compensation circuit includes a voltage-to-current conversion circuit and a current limiting circuit. The input terminal of the voltage-to-current conversion circuit is connected to the output terminal of the current detection circuit, and the output terminal of the voltage-to-current conversion circuit is grounded through the current limiting circuit.

[0015] The voltage-to-current conversion circuit is configured to perform voltage-to-current conversion on the output voltage of the current detection circuit.

[0016] The current limiting circuit is configured to limit the converted current to the compensation current.

[0017] In some embodiments of this disclosure, the voltage-to-current conversion circuit includes a second operational amplifier and a third power transistor. The first terminal of the third power transistor is connected to the first terminal of the second input resistor. The second terminal of the third power transistor is connected to the input terminal of the current limiting circuit and the inverting input terminal of the second operational amplifier. The non-inverting input terminal of the second operational amplifier is connected to the output terminal of the current detection circuit. The output terminal of the second operational amplifier is connected to the control terminal of the third power transistor.

[0018] In some embodiments of this disclosure, the current limiting circuit includes a current limiting resistor with the same resistance value as the output resistor. The first end of the current limiting resistor is connected to the second end of the third power transistor and the inverting input of the second operational amplifier, and the second end of the current limiting resistor is grounded.

[0019] Secondly, this disclosure provides a chip including any of the current detection circuits provided in the first aspect.

[0020] Thirdly, this disclosure provides an electronic device including any of the chips provided in the second aspect.

[0021] This disclosure provides a current detection circuit, including a differential operational amplifier circuit and a current compensation circuit. The differential operational amplifier circuit determines the output voltage of the current detection circuit based on the voltage difference across an external sampling resistor, wherein the voltage difference across the external sampling resistor is proportional to the current to be measured. The current compensation circuit draws compensation current from the differential operational amplifier circuit and releases it to ground, wherein the compensation current is equal to the output current of the differential operational amplifier circuit. Thus, this current detection circuit can offset the influence of the protective resistor on the current detection circuit through the compensation current drawn by the current compensation circuit, thereby improving the stability of the current detection circuit and the accuracy of the current detection results. Attached Figure Description

[0022] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. It should be understood that the drawings described below only relate to some embodiments of this disclosure and are not intended to limit this disclosure, wherein: Figure 1 A circuit diagram of a current detection circuit provided by the prior art.

[0023] Figure 2 A circuit diagram of another current detection circuit provided by the prior art.

[0024] Figure 3 This is a schematic diagram of a current detection circuit provided in an embodiment of the present disclosure.

[0025] Figure 4 This is a circuit diagram of a current detection circuit provided in an embodiment of the present disclosure.

[0026] Figure 5 A circuit diagram of another current detection circuit provided in an embodiment of this disclosure. Detailed Implementation

[0027] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are also within the scope of protection of this disclosure.

[0028] In this disclosure, the reference to "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of the phrase "embodiment" in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a mutually exclusive, independent, or alternative embodiment. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described in this disclosure can be combined with other embodiments.

[0029] Furthermore, the terms "first," "second," etc., in the specification, claims, or the accompanying drawings are used to distinguish different objects rather than to describe a specific order, and may explicitly or implicitly include one or more of the features.

[0030] In the description of this disclosure, unless otherwise stated, "multiple" and "at least two" mean two or more (including two), and similarly, "multiple groups" and "at least two groups" mean two or more (including two groups).

[0031] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings.

[0032] Figure 1 A circuit diagram of a current detection circuit provided for the prior art, such as... Figure 1As shown, the current detection circuit 100 includes a first input resistor R1, a second input resistor R2, a first operational amplifier OP1, a first power transistor M1, and an output resistor R0. The first terminal of the external sampling resistor RSNS is connected to the first terminal of the first input resistor R1, and the second terminal of RSNS is connected to the first terminal of the second input resistor R2. The second terminal of the first input resistor R1 is connected to the non-inverting input terminal of the first operational amplifier OP1 and the first terminal of the first power transistor M1. The second terminal of the second input resistor R2 is connected to the inverting input terminal of the first operational amplifier OP1. The output terminal of the first operational amplifier OP1 is connected to the control terminal of the first power transistor M1. The second terminal of the first power transistor M1 is connected to the first terminal of the output resistor R0 and the output terminal of the current detection circuit 100. The second terminal of the output resistor R0 is grounded.

[0033] Current to be measured I BUS The current flows in from the first terminal of the external sampling resistor RSNS, passes through RSNS, and exits from the second terminal of RSNS, generating a voltage drop across RSNS, i.e., VP - VN = I. BUS R SNS Where VP is the voltage across the first terminal of the external sampling resistor RSNS, VN is the voltage across the second terminal of the external sampling resistor RSNS, and R SNS The resistance value of the external sampling resistor RSNS.

[0034] Due to the virtual short characteristic of the first operational amplifier OP1, the voltages at the non-inverting and inverting input terminals of OP1 are equal, and the voltage drop across the second input resistor R2 is 0. Therefore, the voltage drop across the first input resistor R1 VR1 = VP - VN = I BUS R SNS The current flowing through the first input resistor R1 is I0 = VR1 / R1 = I BUS R SNS / R1, where R1 is the resistance value of the first input resistor R1 and the second input resistor R2. The current I0 passes through the first power transistor M1 and the output resistor R0 in sequence. Therefore, the output voltage V of the current detection circuit 100 is... OUT =I0 R0=I BUS R SNS R0 / R1, where R0 is the resistance value of the output resistor R0.

[0035] In practical applications, to improve the robustness of the current detection circuit 100 in complex electromagnetic environments and enhance its ESD protection and common-mode noise suppression capabilities, existing technologies generally employ a method of connecting a protection resistor (first protection resistor RESD1 and second protection resistor RESD2) and a filter capacitor C0 in series at the current detection input terminal, such as... Figure 2 As shown, Figure 2 A circuit diagram of another current detection circuit provided by the prior art.

[0036] The voltage drop (VP-VN) across the external sampling resistor RSNS is equal to the sum of the voltage drop VRESD1 across the first protection resistor RSD1 and the voltage drop VR1 across the first input resistor R1, i.e., VP-VN = VR1 + VRESD1 = I0 (R) ESD1 +R1)=I BUS R SNS , where R ESD1 Let I0 be the resistance value of the first protective resistor RSD1. BUS R SNS / (R) ESD1 +R1), the output voltage V of the current detection circuit 100 OUT =I0 R0=I BUS R SNS R0 / (R ESD1 +R1).

[0037] The above analysis shows that the output voltage V of the current detection circuit 100 is... OUT The output results change, which reduces the stability of the current detection circuit 100 and can easily affect the accuracy of the current detection results.

[0038] In view of this, this disclosure provides a current detection circuit, including a differential operational amplifier circuit and a current compensation circuit. The differential operational amplifier circuit determines the output voltage of the current detection circuit based on the voltage difference across an external sampling resistor, wherein the voltage difference across the external sampling resistor is proportional to the current to be measured. The current compensation circuit draws compensation current from the differential operational amplifier circuit and releases it to ground, wherein the compensation current is equal to the output current of the differential operational amplifier circuit. Thus, this circuit can offset the influence of the protective resistor on the current detection circuit through the compensation current drawn by the current compensation circuit, thereby improving the stability of the current detection circuit and the accuracy of the current detection result.

[0039] The disclosed technical solutions are described in detail below with several specific embodiments.

[0040] Figure 3 This is a schematic diagram of a current detection circuit provided in an embodiment of the present disclosure, as shown below. Figure 3 As shown, the current detection circuit 200 includes a differential operational amplifier circuit 210 and a current compensation circuit 220. The non-inverting input of the differential operational amplifier circuit 210 is connected to the first terminal of the external sampling resistor RSNS through the first protection resistor RSD1, and the inverting input of the differential operational amplifier circuit 210 is connected to the second terminal of the external sampling resistor RSNS through the second protection resistor RSD2. The inverting input of the differential operational amplifier circuit 210 is connected to the current compensation circuit 220. A filter capacitor C0 is connected between the non-inverting input and the inverting input of the differential operational amplifier circuit 210. The output of the differential operational amplifier circuit 210 is connected to the output of the current detection circuit 200. The resistance values ​​of the first protection resistor RSD1 and the second protection resistor RSD2 are equal.

[0041] The differential operational amplifier circuit 210 is configured to determine the output voltage V of the current detection circuit 200 based on the voltage difference across the external sampling resistor RSNS. OUT The voltage difference across the external sampling resistor RSNS is related to the measured current I. BUS Proportional.

[0042] The current compensation circuit 220 is configured to draw a compensation current I from the inverting input terminal of the differential operational amplifier circuit 210. COMP And released to ground, wherein the compensation current I COMP It is equal to the output current I0 of the differential operational amplifier circuit 210.

[0043] For example, such as Figure 3 As shown, the differential operational amplifier circuit 210 includes a first input resistor R1, a second input resistor R2, an output resistor R0, a first operational amplifier OP1, and a first power transistor M1. The resistance values ​​of the first input resistor R1 and the second input resistor R2 are equal.

[0044] The first end of the first input resistor R1 is connected to the first end of the external sampling resistor RSNS through the first protection resistor RSD1. The first end of the second input resistor R2 is connected to the second end of the external sampling resistor RSNS through the second protection resistor RSD2. The first end of the second input resistor R2 is connected to the current input terminal of the current compensation circuit 220.

[0045] The second end of the first input resistor R1 is connected to the non-inverting input of the first operational amplifier OP1 and the first end of the first power transistor M1. The second end of the second input resistor R2 is connected to the inverting input of the first operational amplifier OP1. The output of the first operational amplifier OP1 is connected to the control terminal of the first power transistor M1. The second end of the first power transistor M1 is connected to the first end of the output resistor R0 and the output of the current detection circuit 200. The second end of the output resistor R0 and the current output terminal of the current compensation circuit 220 are grounded.

[0046] Current to be measured I BUS The current flows in from the first terminal of the external sampling resistor RSNS, passes through RSNS, and exits from the second terminal of RSNS, generating a voltage drop across RSNS, i.e., VP - VN = I. BUS R SNS Where VP is the voltage across the first terminal of the external sampling resistor RSNS, VN is the voltage across the second terminal of the external sampling resistor RSNS, and R SNS The resistance value of the external sampling resistor RSNS.

[0047] At this time, the output current I0 of the differential operational amplifier circuit 210 flows through the first protection resistor RSD1, generating a voltage drop VRESD1=I0 across the first protection resistor RSD1. R ESD , where R ESD Here are the resistance values ​​of the first protection resistor RSD1 and the second protection resistor RSD2. The compensation current I... COMP The current flows through the second protective resistor RSD2, resulting in a voltage drop VRESD2=I across the second protective resistor RSD2. COMP R ESD Because the output current I0 of the differential operational amplifier circuit 210 is different from the compensation current I... COMP Since they are equal, VRESD1 = VRESD2, meaning that the voltage drops across the first protection resistor RSD1 and the second protection resistor RSD2 are equal.

[0048] Therefore, the voltage drop across the first input resistor R1 is VR1 = VP - VN = I. BUS R SNS The current flowing through the first input resistor R1 is I0 = VR1 / R1 = I BUS R SNS / R1, the output current I0 passes through the first power transistor M1 and the output resistor R0 in sequence, then the output voltage V OUT =I0 R0=I BUS R SNS R0 / R1. Clearly, the output voltage V... OUT The current detection circuit 200 was not affected by the protection resistors (first protection resistor RSD1 and second protection resistor RSD2), thus ensuring the stability of the current detection circuit and the accuracy of the current detection results.

[0049] In summary, the embodiments of this disclosure utilize a current compensation circuit 220 to draw in a compensation current equal to the output current of the differential operational amplifier circuit 210 from the inverting input terminal of the differential operational amplifier circuit 210 and release it to ground. This can counteract the influence of the protection resistor on the current detection circuit 200, thereby improving the stability of the current detection circuit 200 and the accuracy of the current detection results.

[0050] In some embodiments, the current compensation circuit 220 is further configured to mirror the output current I0 of the differential operational amplifier circuit 210 as a compensation current I. COMP .

[0051] For example, Figure 4 This is a circuit diagram of a current detection circuit provided in an embodiment of the present disclosure, as shown below. Figure 4 As shown, the current compensation circuit 220 includes a second power transistor M2 and a grounding resistor R3. The first terminal of the second power transistor M2 is connected to the first terminal of the second input resistor R2, and the second terminal of the second power transistor M2 is grounded through the grounding resistor R3. The control terminal of the second power transistor M2 is connected to the control terminal of the first power transistor M1. The second power transistor M2 and the first power transistor M1 together form a current mirror.

[0052] For example, such as Figure 4 As shown, both the first power transistor M1 and the second power transistor M2 are N-type metal-oxide-semiconductor field-effect transistors (NMOS). The gate of the first power transistor M1 is connected to the gate of the second power transistor M2. Therefore, the gate voltage VG1 of the first power transistor M1 is equal to the gate voltage VG2 of the second power transistor M2.

[0053] The source of the second power transistor M2 is grounded through the grounding resistor R3, and the source of the first power transistor M1 is grounded through the output resistor R0. The grounding resistor R3 and the output resistor R0 have the same resistance value. Therefore, the source voltage VS1 of the first power transistor M1 is equal to the source voltage VS2 of the second power transistor M2. Consequently, the gate-source voltage VGS1 of the first power transistor M1 is equal to the gate-source voltage VGS2 of the second power transistor M2, so that the second power transistor M2 and the first power transistor M1 form a current mirror.

[0054] Since the second power transistor M2 and the first power transistor M1 are the same size, the second power transistor M2 can mirror the current flowing through the first power transistor M1 proportionally to the output current. The current flowing through the first power transistor M1 is the output current I0. Therefore, the second power transistor M2 can mirror the output current I0 proportionally to the compensation current I. COMP And it is released to ground through grounding resistor R3.

[0055] In some embodiments, the current compensation circuit 220 is further configured to compensate for the output voltage V of the current detection circuit 200. OUT The voltage-to-current conversion is performed to obtain the compensation current I. COMP .

[0056] For example, Figure 5 A circuit diagram of another current detection circuit provided in an embodiment of this disclosure is shown below. Figure 5 As shown, the current compensation circuit 220 includes a voltage-to-current conversion circuit and a current limiting circuit. The input terminal of the voltage-to-current conversion circuit is connected to the output terminal of the current detection circuit 200, and the output terminal of the voltage-to-current conversion circuit is grounded through the current limiting circuit.

[0057] The voltage-to-current conversion circuit includes a second operational amplifier OP2 and a third power transistor M3. The first terminal of the third power transistor M3 is connected to the first terminal of the second input resistor R2. The second terminal of the third power transistor M3 is connected to the input terminal of the current limiting circuit and the inverting input terminal of the second operational amplifier OP2. The non-inverting input terminal of the second operational amplifier OP2 is connected to the output terminal of the current detection circuit 200. The output terminal of the second operational amplifier OP2 is connected to the control terminal of the third power transistor M3.

[0058] For example, the third power transistor M3 can be an NMOS, and its gate voltage is the output voltage of the second operational amplifier OP2. The third power transistor M3 can convert the output voltage of the second operational amplifier OP2 into current. The output voltage of the second operational amplifier OP2 is related to its non-inverting input voltage, that is, to the output voltage V of the current detection circuit 200. OUT Related.

[0059] Therefore, the voltage-to-current conversion circuit can convert the output voltage V of the current detection circuit 200. OUT Perform voltage-to-current conversion.

[0060] See also Figure 5 The current limiting circuit includes a current limiting resistor R4. The first end of the current limiting resistor R4 is connected to the second end of the third power transistor M3 and the inverting input of the second operational amplifier OP2. The second end of the current limiting resistor R4 is grounded.

[0061] For example, the second operational amplifier OP2 forms a voltage clamp on the first terminal of the current-limiting resistor R4, such that the voltage at the first terminal of the current-limiting resistor R4 is equal to the output voltage V of the current detection circuit 200. OUT Similarly, since the current-limiting resistor R4 and the output resistor R0 have the same resistance value, the compensation current I flowing through the current-limiting resistor R4 is the same. COMP The output current I0 is the same as the output current flowing through the output resistor R0.

[0062] Therefore, the current limiting circuit can limit the converted current to a compensation current I equal to the output current I0. COMP .

[0063] This disclosure also provides a chip including the current detection circuit 200 provided in any of the above embodiments, which has the functional modules and beneficial effects of the current detection circuit 200, and will not be described in detail here.

[0064] This disclosure also provides an electronic device including the chip described above, specifically including the current detection circuit 200 provided in any of the above embodiments, which has the functional modules and beneficial effects of the current detection circuit 200, and will not be repeated here.

[0065] Electronic devices include, but are not limited to, smartphones, tablets, smart home devices, vehicles, and wearable devices.

[0066] Unless otherwise expressly indicated by the context, the singular form of words used herein and in the appended claims includes the plural form, and vice versa. Thus, when referring to the singular, the plural form of the corresponding term is generally included. Similarly, the terms “comprising” and “including” are to be interpreted as including rather than exclusively. Likewise, the terms “including” and “or” should be interpreted as including unless such interpretation is expressly prohibited herein. Where the term “example” is used herein, the “example” is merely exemplary and illustrative, and should not be considered exclusive or extensive.

[0067] Several embodiments of this disclosure have been described in detail above. However, it is obvious that those skilled in the art can make various modifications and variations to the embodiments of this disclosure without departing from the spirit and scope of this disclosure. The scope of protection of this disclosure is defined by the appended claims.

Claims

1. A current detection circuit, characterized in that, Includes differential operational amplifier circuits and current compensation circuits; The non-inverting input terminal of the differential operational amplifier circuit is connected to the first terminal of an external sampling resistor through a first protection resistor, and the inverting input terminal of the differential operational amplifier circuit is connected to the second terminal of the external sampling resistor through a second protection resistor. The inverting input terminal of the differential operational amplifier circuit is connected to the current compensation circuit. A filter capacitor is connected between the non-inverting input terminal and the inverting input terminal of the differential operational amplifier circuit. The output terminal of the differential operational amplifier circuit is connected to the output terminal of the current detection circuit. The resistance values ​​of the first protection resistor and the second protection resistor are equal. The differential operational amplifier circuit is configured to determine the output voltage of the current detection circuit based on the voltage difference across the external sampling resistor, wherein the voltage difference across the external sampling resistor is proportional to the current to be measured. The current compensation circuit is configured to draw in compensation current from the inverting input terminal of the differential operational amplifier circuit and release it to ground, wherein the compensation current is equal to the output current of the differential operational amplifier circuit.

2. The current detection circuit according to claim 1, characterized in that, The differential operational amplifier circuit includes a first input resistor, a second input resistor, an output resistor, a first operational amplifier, and a first power transistor, wherein the resistance values ​​of the first input resistor and the second input resistor are equal; The first end of the first input resistor is connected to the first end of the external sampling resistor through the first protection resistor, the first end of the second input resistor is connected to the second end of the external sampling resistor through the second protection resistor, and the first end of the second input resistor is connected to the current input terminal of the current compensation circuit. The second end of the first input resistor is connected to the non-inverting input of the first operational amplifier and the first end of the first power transistor. The second end of the second input resistor is connected to the inverting input of the first operational amplifier. The output of the first operational amplifier is connected to the control terminal of the first power transistor. The second end of the first power transistor is connected to the first end of the output resistor and the output of the current detection circuit. The second end of the output resistor and the current output of the current compensation circuit are grounded.

3. The current detection circuit according to claim 2, characterized in that, The current compensation circuit is further configured to mirror the output current of the differential operational amplifier circuit as the compensation current.

4. The current detection circuit according to claim 3, characterized in that, The current compensation circuit includes a second power transistor and a grounding resistor; The first terminal of the second power transistor is connected to the first terminal of the second input resistor, the second terminal of the second power transistor is grounded through the grounding resistor, and the control terminal of the second power transistor is connected to the control terminal of the first power transistor; wherein, the second power transistor and the first power transistor form a current mirror.

5. The current detection circuit according to claim 4, characterized in that, The grounding resistor and the output resistor have the same resistance value, and the second power transistor and the first power transistor have the same size.

6. The current detection circuit according to claim 2, characterized in that, The current compensation circuit is further configured to perform voltage-to-current conversion on the output voltage of the current detection circuit to obtain the compensation current.

7. The current detection circuit according to claim 6, characterized in that, The current compensation circuit includes a voltage-to-current conversion circuit and a current limiting circuit; The input terminal of the voltage-to-current conversion circuit is connected to the output terminal of the current detection circuit, and the output terminal of the voltage-to-current conversion circuit is grounded through the current limiting circuit. The voltage-to-current conversion circuit is configured to perform voltage-to-current conversion on the output voltage of the current detection circuit. The current limiting circuit is configured to limit the converted current to the compensation current.

8. The current detection circuit according to claim 7, characterized in that, The voltage-to-current conversion circuit includes a second operational amplifier and a third power transistor; The first end of the third power transistor is connected to the first end of the second input resistor, the second end of the third power transistor is connected to the input end of the current limiting circuit and the inverting input end of the second operational amplifier, the non-inverting input end of the second operational amplifier is connected to the output end of the current detection circuit, and the output end of the second operational amplifier is connected to the control end of the third power transistor.

9. The current detection circuit according to claim 8, characterized in that, The current limiting circuit includes a current limiting resistor, and the current limiting resistor and the output resistor have the same resistance value. The first end of the current-limiting resistor is connected to the second end of the third power transistor and the inverting input of the second operational amplifier, and the second end of the current-limiting resistor is grounded.

10. A chip, characterized in that, Includes the current detection circuit according to any one of claims 1-9.

11. An electronic device, characterized in that, Includes the chip described in claim 10.

Images