Svgs testing circuit and method

Abstract

The application relates to an SVG test circuit and method. The SVG test circuit comprises a parallel circuit, a communication circuit and a safety control circuit. The parallel circuit comprises a measured SVG and an accompanying SVG. The parallel circuit is connected with the first end of the safety control circuit. The second end of the safety control circuit is connected with a power grid side. The communication circuit is connected with the measured SVG and the accompanying SVG respectively. The measured SVG and the accompanying SVG are used for performing reactive power control according to received test signals. The communication circuit is used for transmitting a locking signal between the measured SVG and the accompanying SVG. The safety control circuit is used for turning on or turning off the parallel circuit and the power grid side according to the running state of the parallel circuit during the test process. The test circuit can ensure safety under a low SCR condition.

Description

Technical Field

[0001] This application relates to the field of SVG testing technology, and in particular to an SVG testing circuit and method. Background Technology

[0002] Static Var Generators (SVGs) are key devices for improving power quality in power grids. The full-load performance of an SVG, such as its output accuracy at rated capacity, harmonic suppression capability, and dynamic response speed, directly determines the stability of the power grid operation. Therefore, reliable and effective testing of SVGs is necessary.

[0003] In traditional technology, SVG testing requires reactive power matching the rated capacity. The testing methods mainly rely on two approaches: one is to use a large-capacity test grid to directly provide the load, but this method requires the grid short-circuit capacity to be greater than or equal to 3 times the SVG rated capacity, otherwise it will cause large fluctuations or even collapse of the grid voltage; the other is to use a resistor-inductor load cabinet to simulate the load, but the energy consumption of this method is as high as 30%-50% of the SVG rated capacity.

[0004] The aforementioned SVG testing methods all require implementation in high-capacity or high-voltage power grid scenarios. In power systems with low SCR (Short Circuit Ratio), there is a high risk of safety issues. Summary of the Invention

[0005] Therefore, it is necessary to provide an SVG test circuit and method that can ensure safety under low SCR conditions to address the above-mentioned technical problems.

[0006] In a first aspect, this application provides an SVG test circuit, including: a drag circuit, a communication circuit, and a safety control circuit;

[0007] The drag circuit includes the SVG under test and the SVG under test; the drag circuit is connected to the first terminal of the safety control circuit; the second terminal of the safety control circuit is connected to the power grid side; the communication circuit is connected to both the SVG under test and the SVG under test.

[0008] The SVG under test and the SVG under test are used for reactive power control based on the received test signals, respectively.

[0009] The communication circuit is used to transmit a blocking signal between the SVG under test and the SVG under auxiliary test; the blocking signal is generated when the power of the SVG under test or the SVG under auxiliary test is abnormal, or when the output current of the SVG under test or the SVG under auxiliary test is greater than the protection threshold.

[0010] The safety control circuit is used to connect or disconnect the electrical connection between the tow circuit and the power grid side according to the operating status of the tow circuit during the test.

[0011] In one embodiment, the protection threshold includes a first protection threshold and a second protection threshold, and the blocking signal includes a first blocking signal and a second blocking signal;

[0012] The SVG under test includes a first controller and a first power unit, and the SVG under auxiliary test includes a second controller and a second power unit; the first end of the communication circuit is connected to the first controller, and the second end of the communication circuit is connected to the second controller;

[0013] The first controller is used to generate a first blocking signal when it detects that the power of the first power unit is abnormal or the output current is greater than the first protection threshold. The communication circuit is used to transmit the first blocking signal to the second controller, so that the second controller controls the second power unit to switch to the blocking state based on the first blocking signal.

[0014] or,

[0015] The second controller is used to generate a second blocking signal when it detects an abnormal power of the second power unit or an output current greater than the second protection threshold. The communication circuit is also used to transmit the second blocking signal to the first controller, so that the first controller controls the first power unit to switch to the blocking state based on the second blocking signal.

[0016] In one embodiment, the test signal includes a first test signal and a second test signal;

[0017] The SVG test circuit also includes: a first host computer and a second host computer, wherein the first host computer is connected to the SVG under test and the second host computer is connected to the SVG under test.

[0018] The first host computer is used to generate the first test signal and send it to the SVG under test; the second host computer is used to generate the second test signal and send it to the SVG under test.

[0019] In one embodiment, the drag circuit further includes: a drag bus, a first reactor, and a second reactor;

[0020] The first end of the first reactor is connected to the SVG under test, and the second end of the first reactor is connected to the busbar; the first end of the second reactor is connected to the SVG under test, and the second end of the second reactor is connected to the busbar.

[0021] In one embodiment, the security control circuit includes: a data acquisition circuit and a security circuit;

[0022] The first terminal of the acquisition circuit is connected to the drag circuit, the second terminal of the acquisition circuit is connected to the common AC bus on the power grid side, the third terminal of the acquisition circuit is connected to the first terminal of the security circuit, the second terminal of the security circuit is connected to the power grid side, and the third terminal of the security circuit is connected to the SVG under test and the SVG under test respectively.

[0023] The acquisition circuit is used to acquire electrical signals from the drag circuit and the power grid side, and send the electrical signals to the SVG under test and the SVG under test, respectively;

[0024] The tested SVG and the accompanying SVG are also used to switch to the locked state when the electrical signal meets the locking conditions;

[0025] The security circuit is used to disconnect the drag circuit from the power grid side when the tested SVG and / or the accompanying SVG are switched to the locked state.

[0026] In one embodiment, the electrical signal includes an output current;

[0027] The acquisition circuit includes: a current transformer, the first end of which is connected to the reverse circuit, and the second end of which is connected to the safety circuit.

[0028] The current transformer is used to monitor the output current; the SVG under test and the SVG under test are also used to acquire the output current, and switch to the blocking state when the output current is greater than the preset protection threshold.

[0029] In one embodiment, the electrical signal includes a bus voltage; the acquisition circuit includes a voltage transformer.

[0030] The first end of the voltage transformer is connected to the common AC bus on the power grid side, and the second end of the voltage transformer is connected to the SVG under test and the SVG under auxiliary test respectively.

[0031] Voltage transformers are used to monitor bus voltage and transmit the bus voltage to the measured SVG and the accompanying SVG respectively;

[0032] The SVG under test and the SVG under test are also used to control the first output power of the SVG under test and the second output power of the SVG under test according to the bus voltage.

[0033] In one embodiment, the security circuit includes: a first security circuit and a second security circuit;

[0034] The first terminal of the first security circuit is connected to the third terminal of the acquisition circuit. The second terminal of the first security circuit is connected to the SVG under test and the SVG under test respectively. The third terminal of the first security circuit is connected to the common AC bus on the power grid side. The first terminal of the second security circuit is connected to the common AC bus. The second terminal of the second security circuit is connected to the power supply bus at each level on the power grid side.

[0035] The first security circuit is used to disconnect the common AC bus from the parallel circuit when the tested SVG and / or the accompanying SVG are switched to the locked state.

[0036] The second security circuit is used to turn the common AC bus and the power supply buses at each level on or off based on the output current.

[0037] In one embodiment, the power supply busbars at each level include a first power supply busbar, a second power supply busbar, and a third power supply busbar; the first security circuit includes circuit breaker Q1; and the second security circuit includes circuit breakers Q2, Q3, and Q4.

[0038] The first terminal of circuit breaker Q1 is connected to the third terminal of the acquisition circuit, and the second terminal of circuit breaker Q1 is connected to the common AC bus. Circuit breaker Q2 is located between the common AC bus and the first power supply bus. Circuit breaker Q3 is located between the first power supply bus and the second power supply bus. Circuit breaker Q4 is located between the second power supply bus and the third power supply bus.

[0039] Secondly, this application also provides an SVG testing method, which is applied to the SVG testing circuit of the first aspect, and the method includes:

[0040] The safety control circuit connects the drag circuit and the grid side to form a pre-charging circuit, so as to pre-charge the DC side capacitors of the SVG under test and the SVG under auxiliary test respectively, and disconnect the pre-charging circuit after the charging is completed.

[0041] Reactive power control is performed on the tested SVG and the accompanying SVG based on the test signal;

[0042] The operating status signals and interlocking signals of the tested SVG and the accompanying SVG are transmitted in real time using communication circuits.

[0043] The safety control circuit responds to the operating status of the towing circuit, connecting or disconnecting the towing circuit from the power grid side.

[0044] The aforementioned SVG test circuit includes a drive circuit, a communication circuit, and a safety control circuit. The drive circuit includes the SVG under test and a companion SVG. The drive circuit is connected to the first end of the safety control circuit. The second end of the safety control circuit is connected to the power grid side. The communication circuit is connected to both the SVG under test and the companion SVG. The SVG under test and the companion SVG are used to perform reactive power control based on the received test signals. The communication circuit is used to transmit a blocking signal between the SVG under test and the companion SVG. The blocking signal is generated when the power of the SVG under test or the companion SVG is abnormal, or when the output current of the SVG under test or the companion SVG exceeds the protection threshold. The safety control circuit is used to connect or disconnect the electrical connection between the drive circuit and the power grid side according to the operating status of the drive circuit during the test. Thus, this application adopts a reverse-drive circuit structure consisting of the SVG under test and the SVG under test. During the test, the SVG under test and the SVG under test can act as loads for each other, forming a self-circulation of reactive power. In other words, the grid side does not need to provide the full reactive power test capacity, but only the system operating loss (5%-10% of the rated capacity). This drastically reduces the short-circuit capacity requirement of the grid for the test circuit, thereby completely eliminating the mandatory dependence on a large-capacity test grid or a strong grid, providing a fundamental premise for safe testing in a low SCR grid environment. In addition, by utilizing the energy exchange (reverse drive) between the SVG under test and the SVG under test, the grid only needs to supplement the circuit loss, which helps to draw the required test power from the grid. The net active power received is reduced to 5%-10% of the rated capacity, significantly reducing energy consumption during testing and improving the economy and environmental friendliness of the test. Furthermore, the SVG test circuit of this application can actively control the connection between the multi-split circuit and the grid side according to the operating status of the multi-split circuit. During the test, the coupling degree between the multi-split circuit and the grid can be controlled within a safe range. In addition, the communication circuit transmits a blocking signal between the SVG under test and the SVG under auxiliary test. When either SVG experiences power abnormality or overcurrent (exceeding the protection threshold), a blocking signal can be generated and transmitted immediately to ensure that the SVG under test and the SVG under auxiliary test are synchronized and instantly enter the blocking state, cutting off the abnormal output and thus preventing the fault from spreading. Attached Figure Description

[0045] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments of this application or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0046] Figure 1 This is a schematic diagram of the module structure of an SVG test circuit in one embodiment;

[0047] Figure 2 This is a schematic diagram of the circuit structure of the drag circuit in one embodiment;

[0048] Figure 3 This is a schematic diagram of the module structure of the safety control circuit in one embodiment;

[0049] Figure 4 This is a circuit diagram of an SVG test circuit in one embodiment;

[0050] Figure 5 This is a flowchart illustrating an SVG testing method in one embodiment;

[0051] Figure 6 This is an internal structural diagram of a computer device in one embodiment.

[0052] Figure label:

[0053] 1. Support circuit; 11. SVG under test; 12. Support SVG under test; 13. Support bus; 14. First reactor; 15. Second reactor; 2. Communication circuit; 3. Safety control circuit; 31. Data acquisition circuit; 311. Current transformer; 312. Voltage transformer; 32. Security circuit; 4. Power grid side; 5. First host computer; 6. Second host computer; 7. Common AC bus; 8. First power supply bus; 9. Second power supply bus. Detailed Implementation

[0054] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0055] It should be noted that the terms "first," "second," etc., used in this application can be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish the first element from the second element. The terms "comprising" and "having," and any variations thereof, used in this application, are intended to cover non-exclusive inclusion. The term "multiple" used in this application refers to two or more. The term "and / or" used in this application refers to one of the embodiments, or any combination of multiple embodiments.

[0056] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0057] For systems with low SCR (Short Circuit Reduction), typically small-capacity distribution networks or weak grids with an SCR of 3 or less, there are issues with insufficient short-circuit capacity and poor voltage stability, making them unsuitable for directly testing the rated capacity of the SVG (Static Var Generator). Directly connecting the SVG for full-load testing will cause system voltage instability; the energy consumption of the resistive-inductive load cabinet will be excessive, and low-SCR systems cannot withstand continuous high-load impacts; furthermore, the poor voltage stability of low-SCR systems means that power imbalances during testing can easily induce short circuits, equipment overloads, and other safety accidents. Additionally, if the SVG under test and the accompanying SVG are not synchronously interlocked, and the upstream circuit breaker of the SVG operates with a separation time of approximately 100ms, overvoltage or undervoltage may occur during this period, leading to distribution network interruption.

[0058] For example, with an SCR of 3, for a 35kV / 50Mvar SVG under test and a supporting SVG, during full-load operation, the voltage fluctuation calculation process after a sudden failure of one SVG is as follows:

[0059] ,

[0060] in, It is the short-circuit capacity of the power grid, used to reflect the strength of the power grid. This is the rated capacity of the SVG. During full-load dual-drive operation, if one SVG fails, the reactive power imbalance is: Combining the voltage change ΔU formula:

[0061] ,

[0062] It is evident that the voltage change amplitude is inversely proportional to the SCR (Stable Voltage Regulator). When SCR=3, the voltage change ΔU is approximately 33%, far exceeding the ±5% to ±10% fluctuation range allowed by the power grid, which may lead to power grid outages. Therefore, there is an urgent need for an SVG (Static Var Generator) testing circuit and method that can ensure safety under low SCR conditions.

[0063] Figure 1 This paper shows a schematic diagram of the module structure of an SVG test circuit in one embodiment of this application. Figure 1Solid lines in the diagram represent power lines, while dashed lines represent communication lines.

[0064] See Figure 1 This application provides an SVG test circuit, which includes a pull-out circuit 1, a communication circuit 2, and a safety control circuit 3. The pull-out circuit 1 includes the SVG under test 11 and the SVG under test 12; the pull-out circuit 1 is connected to the first terminal of the safety control circuit 3; the second terminal of the safety control circuit 3 is connected to the power grid side 4; and the communication circuit 2 is connected to both the SVG under test 11 and the SVG under test 12.

[0065] The tested SVG11 and the accompanying SVG12 are used to perform reactive power control based on the received test signals; the communication circuit 2 is used to transmit a blocking signal between the tested SVG11 and the accompanying SVG12; the blocking signal is generated when the power of the tested SVG11 or the accompanying SVG12 is abnormal, or when the output current of the tested SVG11 or the accompanying SVG12 is greater than the protection threshold; the safety control circuit 3 is used to connect or disconnect the electrical connection between the auxiliary circuit 1 and the grid side 4 according to the operating status of the auxiliary circuit 1 during the test.

[0066] In the SVG testing process, the tested SVG11 and the accompanying SVG12 operate in a complementary mode: one operates in capacitive load simulation mode based on the received test signal, while the other operates in inductive load simulation mode, forming a reactive power reciprocal cycle, causing the tested SVG11 and the accompanying SVG12 to enter a reciprocal reciprocal mode. At this time, reactive power mainly circulates within the closed loop formed by the tested SVG11, the accompanying SVG12, and the reciprocal reciprocal circuit 1, forming a "one-intake, one-output" reciprocal reciprocal mode.

[0067] For example, the SVG11 under test is configured in capacitive reactive power output mode, outputting capacitive reactive power; while the SVG12 under test is configured in inductive reactive power output mode, used to absorb inductive reactive power of the same amplitude. Through the above configuration, a working state with opposite reactive power directions and basically equal amplitudes is formed in the drag circuit 1, thereby constructing a closed reactive power loop between the SVG11 under test and the SVG12 under test.

[0068] The tested SVG11 and the accompanying SVG12 are also used to synchronously ramp up the reactive power from 0 to 100% of the rated capacity according to the test signal. During the loading process, the absolute values ​​of the reactive power of the tested SVG11 and the accompanying SVG12 remain basically equal. The reactive power output of the tested SVG11 is almost entirely absorbed by the accompanying SVG12, and most of the reactive power circulates within the auxiliary circuit 1. Only a small amount of active power is obtained from the grid side 4 to compensate for system losses. In this way, the full-capacity reactive power output test of the tested SVG11 can be achieved under near-actual operating conditions without significantly increasing the reactive load on the grid.

[0069] The communication circuit 2 is used to transmit the blocking signals corresponding to the tested SVG11 and the accompanying SVG12. After receiving the blocking signal from the other party, the tested SVG11 or the accompanying SVG12 quickly responds to the blocking signal and blocks itself. In this way, the two SVGs stop reactive power output almost simultaneously, thereby effectively avoiding reactive power imbalance.

[0070] The safety control circuit 3 controls the connection and disconnection between the auxiliary circuit 1 and the grid side 4 during the test. Specifically, before testing the SVG11 under test, the safety control circuit 3 connects the auxiliary circuit 1 and the grid side 4, using the grid side 4 to pre-charge the SVG11 under test and the auxiliary SVG12. Both the SVG11 under test and the auxiliary SVG12 absorb a small amount of active power from the grid side 4 through their power units to slowly charge their internal DC bus capacitors until the DC voltage stabilizes and the aforementioned test process begins. This pre-charging process effectively avoids excessive inrush current generated by the DC side capacitors during operation, providing stable energy support for subsequent reactive power auxiliary operation.

[0071] In the aforementioned SVG test circuit, during SVG testing, the tested SVG11 and the accompanying SVG12 can perform reactive power self-circulation, requiring the grid side 4 to provide only 5%-10% of the rated capacity loss power. The SVG test circuit provided in this embodiment minimizes the demand on the grid side 4, eliminating reliance on a large-capacity test grid. It can achieve 100% rated capacity testing of the tested SVG11 even with low SCR. During testing, the communication circuit 2 transmits operating status and interlocking signals between the tested SVG11 and the accompanying SVG12 in real time, and the safety control circuit 3 ensures that the voltage and current surges from the grid side 4 to the auxiliary circuit 1 are strictly limited within a safe range. In case of a fault, the tested SVG11 and the accompanying SVG12 can synchronously enter the interlocking state and disconnect from the grid side 4, thereby significantly improving the safety and reliability of the tested SVG11 and the accompanying SVG12 during operation under low SCR conditions.

[0072] In an exemplary embodiment, the protection threshold includes a first protection threshold and a second protection threshold, and the blocking signal includes a first blocking signal and a second blocking signal; the SVG under test 11 includes a first controller and a first power unit, and the SVG under test 12 includes a second controller and a second power unit; the first end of the communication circuit 2 is connected to the first controller, and the second end of the communication circuit 2 is connected to the second controller.

[0073] The first controller generates a first blocking signal when it detects an abnormal power output of the first power unit or when the output current exceeds a first protection threshold. The communication circuit 2 transmits the first blocking signal to the second controller, so that the second controller controls the second power unit to switch to a blocking state based on the first blocking signal.

[0074] Alternatively, the second controller is used to generate a second blocking signal when it detects that the power of the second power unit is abnormal or the output current is greater than the second protection threshold. The communication circuit 2 is also used to transmit the second blocking signal to the first controller, so that the first controller controls the first power unit to switch to the blocking state based on the second blocking signal.

[0075] The communication circuit 2 can be an optical fiber communication link. The first end of the optical fiber communication link is connected to the optical port of the first controller, and the second end is connected to the optical port of the second controller. This allows for real-time transmission of a blocking signal between the tested SVG11 and the accompanying SVG12 to control their synchronous blocking, stopping output or absorbing reactive power. The first protection threshold and the second protection threshold can be independently set according to the respective SVG's equipment parameters and testing role. The first protection threshold and the second reporting threshold can be the same or different.

[0076] In this embodiment, the communication circuit 2 is used to transmit the operating status and lockout signal between the SVG under test 11 and the SVG under test 12 in real time. When the SVG under test 11 or the SVG under test 12 is locked out due to problems such as manual operation, power module damage, control board failure, or sensor failure, the corresponding lockout signal can be transmitted to the other SVG through the communication circuit 2 in a very short time, so that the other SVG enters the lockout state, thereby avoiding the situation of reactive power imbalance caused by a single SVG continuously outputting or absorbing reactive power.

[0077] Figure 2 A schematic diagram of the circuit structure of the drag circuit 1 in one embodiment of this application is shown. See also... Figure 2In an exemplary embodiment, the drag circuit 1 further includes: a drag bus 13, a first reactor 14, and a second reactor 15; the first end of the first reactor 14 is connected to the SVG under test 11, and the second end of the first reactor 14 is connected to the drag bus 13; the first end of the second reactor 15 is connected to the SVG under test 12, and the second end of the second reactor 15 is connected to the drag bus 13.

[0078] The first reactor 14 is connected in series between the SVG under test 11 and the supporting bus 13 to transfer reactive power between the supporting bus 13 and the SVG under test 11. The second reactor 15 is connected in series between the auxiliary SVG 12 and the supporting bus 13 to transfer reactive power between the supporting bus 13 and the auxiliary SVG 12. In the supporting mode, the reactive current output by the SVG under test 11 and the auxiliary SVG 12 must pass through the corresponding reactor before being injected into the supporting bus 13, and the absorbed reactive current also passes through the corresponding reactor before being injected into its power unit.

[0079] In some embodiments, when the tested SVG11 or the accompanying SVG12 experiences a control abnormality, instantaneous power unit imbalance, or shutdown during the towing process, the inductive reactance of the reactor can limit the rise rate of the AC side current for a short time. This provides necessary response time for the tested SVG11 and the accompanying SVG12 to switch to the locked state and for the safety control circuit 3 to disconnect the towing circuit 1 from the grid side 4, thus preventing the other SVG from being subjected to a sudden large current surge.

[0080] In this embodiment, a first reactor 14 is provided between the SVG11 under test and the busbar 13, and a second reactor 15 is provided between the SVG12 under test and the busbar 13. This buffers the current changes on the grid side 4, effectively suppresses reactive current surges caused by control response differences or transient disturbances, reduces current surges in the busbar circuit 1, and thus improves the stability and safety of the test process.

[0081] In one exemplary embodiment, the test signal includes a first test signal and a second test signal. Figure 3 As shown, the SVG test circuit also includes: a first host computer 5 and a second host computer 6. The first host computer 5 is communicatively connected to the SVG 11 under test, and the second host computer 6 is communicatively connected to the SVG 12 under test. The first host computer 5 is used to generate a first test signal and send it to the SVG 11 under test. The second host computer 6 is used to generate a second test signal and send it to the SVG 12 under test.

[0082] For example, the first host computer 5 is connected to the first controller. The first host computer 5 can generate a first test signal in response to an operator's command and send it to the first controller of the SVG11 under test. The first controller performs reactive power control on the first power unit based on the first test signal, obtains the real-time power corresponding to the SVG11 under test, and adjusts the first test signal according to the real-time power. The second host computer 6 is connected to the second controller to obtain the real-time power corresponding to the SVG12 under test and adjusts the second test signal according to the real-time power. In this way, the first host computer 5 and the second host computer 6 can ensure that the absolute values ​​of the reactive power of the SVG11 under test and the SVG12 under test remain essentially equal, allowing most of the reactive power to circulate within both, minimizing the demand on the power grid.

[0083] In an exemplary embodiment, the safety control circuit 3 includes: a data acquisition circuit 31 and a security circuit 32; the first end of the data acquisition circuit 31 is connected to the drag circuit 1, the second end of the data acquisition circuit 31 is connected to the common AC bus 7 of the power grid side 4, the third end of the data acquisition circuit 31 is connected to the first end of the security circuit 32, the second end of the security circuit 32 is connected to the power grid side 4, and the third end of the security circuit 32 is connected to the SVG under test 11 and the SVG under test 12 respectively.

[0084] The acquisition circuit 31 is used to acquire electrical signals from the towing circuit 1 and the power grid side 4, and send the electrical signals to the tested SVG 11 and the auxiliary SVG 12 respectively; the tested SVG 11 and the auxiliary SVG 12 are also used to switch to the locked state when the electrical signals meet the locking conditions; the security circuit 32 is used to disconnect the towing circuit 1 from the power grid side 4 when the tested SVG 11 and / or the auxiliary SVG 12 switch to the locked state.

[0085] In one possible implementation, such as Figure 4 As shown, the electrical signal includes the output current; the acquisition circuit 31 includes: a current transformer 311, the first end of the current transformer 311 is connected to the drag circuit 1, and the second end of the current transformer 311 is connected to the safety circuit 32; the current transformer 311 is used to monitor the output current; the measured SVG 11 and the accompanying measured SVG 12 are also used to acquire the output current, and switch to the blocking state when the output current is greater than the preset protection threshold.

[0086] The current transformer 311 can be installed between the common AC bus 7 and the parallel bus 13 of the parallel circuit 1, so that the output current can directly reflect the AC current injected into or absorbed from the common AC bus 7 by the parallel circuit 1.

[0087] For example, if the reactive power of the tested SVG11 or the accompanying SVG12 becomes unbalanced due to control abnormality, communication interruption or equipment failure, and the output current exceeds the protection threshold, the first controller or the second controller can trigger the body blocking protection based on the output current and control the first power unit or the second power unit to switch to the blocking state.

[0088] In conjunction with the aforementioned implementation method, after the tested SVG11 or the accompanying SVG12 triggers the lockout, a corresponding first lockout signal or a second lockout signal is generated and transmitted to another SVG through the communication circuit 2, so that the tested SVG11 and the accompanying SVG12 respond to the lockout synchronously.

[0089] In this embodiment, the current transformer 311 is used to monitor the operating status in real time. The tested SVG11 and the accompanying tested SVG12 can be locked in time when the output current exceeds the protection threshold, so as to realize the rapid isolation of the circuit 1 and the grid side 4, further improving the stability and safety of the circuit, avoiding damage to the grid side 4 or other power equipment, such as the risk of the distribution transformer in the power system tripping due to overcurrent or power disturbance.

[0090] In one possible implementation, the electrical signal includes the bus voltage; the acquisition circuit 31 includes a voltage transformer 312; the first terminal of the voltage transformer 312 is connected to the common AC bus 7 of the grid side 4, and the second terminal of the voltage transformer 312 is connected to the SVG under test 11 and the SVG under test 12 respectively; the voltage transformer 312 is used to monitor the bus voltage and transmit the bus voltage to the SVG under test 11 and the SVG under test 12 respectively; the SVG under test 11 and the SVG under test 12 are also used to control the first output power corresponding to the SVG under test 11 and the second output power corresponding to the SVG under test 12 according to the bus voltage. In this way, the SVG under test 11 and the SVG under test 12 can continuously adjust their respective output power according to the bus voltage during the test, ensuring that the absolute value of the reactive power of the SVG under test 11 and the SVG under test 12 always remains basically equal, so that most of the reactive power circulates within the two, minimizing the demand on the grid.

[0091] In some embodiments, the tested SVG11 and the accompanying SVG12 send the acquired output current and bus voltage to the first host computer 5 and the second host computer 6, respectively, so that the operator can record the data during the test and perform performance analysis. The reactive power balance of the dual SVG, the dynamic response characteristics during the power ramp loading process, and the stability indicators under long-term towing operation can be further calculated to improve the SVG test process.

[0092] In an exemplary embodiment, the security circuit 32 includes: a first security circuit and a second security circuit; the first terminal of the first security circuit is connected to the third terminal of the acquisition circuit 31, the second terminal of the first security circuit is connected to the SVG11 under test and the SVG12 under test respectively, the third terminal of the first security circuit is connected to the common AC bus 7 of the power grid side 4, the first terminal of the second security circuit is connected to the common AC bus 7, and the second terminal of the second security circuit is connected to the power supply buses of each level of the power grid side 4.

[0093] The first safety circuit is used to disconnect the common AC bus 7 from the parallel circuit 1 when the tested SVG11 and / or the auxiliary tested SVG12 are switched to the locked state; the second safety circuit is used to turn the common AC bus 7 on or off from the power supply bus at each level according to the output current.

[0094] The first security circuit is hardware-connected to both the tested SVG11 and the accompanying SVG12. For example, both the tested SVG11 and the accompanying SVG12 have internal interlocking output interfaces. These interlocking output interfaces are connected to the tripping control circuit of the first security circuit via hardware wiring. When at least one of the tested SVG11 and the accompanying SVG12 switches to the interlocked state, the first security circuit opens, disconnecting the common AC bus 7 from the parallel circuit 1.

[0095] In one possible implementation, the first security circuit includes a circuit breaker Q1; the first terminal of the circuit breaker Q1 is connected to the third terminal of the acquisition circuit 31, and the second terminal of the circuit breaker Q1 is connected to the common AC bus 7.

[0096] In some embodiments, circuit breaker Q1 corresponds to a first threshold current. When the output current exceeds the corresponding first threshold current In this case, circuit breaker Q1 opens, disconnecting the common AC bus 7 from the outgoing circuit 1.

[0097] In one possible implementation, the power supply busbars at each level include a first power supply busbar 8, a second power supply busbar 9, and a third power supply busbar; the second security circuit includes circuit breakers Q2, Q3, and Q4; circuit breaker Q2 is located between the common AC busbar 7 and the first power supply busbar 8, circuit breaker Q3 is located between the first power supply busbar 8 and the second power supply busbar 9, and circuit breaker Q4 is located between the second power supply busbar 9 and the third power supply busbar.

[0098] The first power supply busbar 8 is used to connect to other load circuits, the second power supply busbar 9 is used to connect to the enterprise's incoming line circuit, and the third power supply busbar is used to connect to the upstream ring main unit (not shown in the diagram). Circuit breaker Q2 corresponds to the second threshold current. Circuit breaker Q3 corresponds to the third threshold current. The fourth threshold current corresponding to circuit breaker Q4 If the output current exceeds the corresponding threshold current, the corresponding circuit breaker will open, disconnecting the common AC bus 7 from the corresponding power supply bus.

[0099] In one possible implementation, the output current and the first threshold current corresponding to circuit breaker Q1 are... The second threshold current corresponding to circuit breaker Q2 The third threshold current corresponding to circuit breaker Q3 The fourth threshold current corresponding to circuit breaker Q4 Increasing sequentially.

[0100] In some embodiments, a certain active current margin needs to be reserved to maintain module voltage stability. To compensate for line losses; under the condition of N devices operating, the line current value is The instantaneous overcurrent threshold of each circuit breaker Its output current protection threshold setting range is:

[0101] .

[0102] Response time of fast latching function of SVG4 under test and SVG5 under test This mainly includes the fiber optic communication filtering time of the communication circuit. Communication delay of each link and locking action time Etc. To ensure that the output current is effectively controlled before reaching the circuit breaker's instantaneous trip setting value, the response time of the fast blocking function is... It must be strictly less than the instantaneous tripping time of the circuit breaker, i.e. ,in, This indicates the instantaneous tripping time corresponding to circuit breaker Q1; This indicates the instantaneous tripping time corresponding to circuit breaker Q2; This indicates the instantaneous tripping time corresponding to circuit breaker Q3; This indicates the time-limited instantaneous tripping time corresponding to circuit breaker Q4.

[0103] For example, the protection time of circuit breakers Q1, Q2, Q3 and Q4 can be shown in Table 1, where the CT ratio represents the ratio between the converted currents on both sides of the current transformer.

[0104] Table 1 Protection Time of Switches and Circuit Breakers

[0105]

[0106] For example, based on the protection time of each of the above circuit breakers, the protection threshold is less than 68A, the protection time is less than 5ms, and the fiber optic blocking time is 100us.

[0107] In this embodiment, the first security circuit performs safety control on the common AC bus 7 and the parallel circuit 1, and the second security circuit performs hierarchical safety control on the power supply buses of each level on the grid side 4, thereby further reducing the impact of the test process on the grid side 4 and ensuring the safety and reliability of the test process.

[0108] In one exemplary embodiment, such as Figure 5 As shown, an SVG testing method is provided. Taking the application of this method to the SVG testing circuit in the above embodiment as an example, the method includes the following steps 502 to 508. Wherein:

[0109] Step 502: The safety control circuit 3 is used to connect the drag circuit 1 and the grid side 4 to form a pre-charging circuit, so as to pre-charge the DC side capacitors of the tested SVG11 and the auxiliary tested SVG12 respectively, and disconnect the pre-charging circuit after the charging is completed.

[0110] Step 504: Perform reactive power control on the tested SVG11 and the accompanying SVG12 based on the test signal.

[0111] Step 506: The communication circuit 2 is used to transmit the operating status and lockout signal of the tested SVG11 and the accompanying SVG12 in real time.

[0112] Step 508: The safety control circuit 3 responds to the operating status of the towing circuit 1 and connects or disconnects the towing circuit 1 from the power grid side 4.

[0113] In one possible implementation, the method further includes: using a first controller to generate a first latching signal based on the power of the first power unit, transmitting the first latching signal to a second controller via a communication circuit 2, and the second controller controlling the second power unit to switch to a latched state based on the first latching signal; or, using a second controller to generate a second latching signal based on the power of the second power unit, transmitting the second latching signal to a first controller via a communication circuit 2, and the first controller controlling the first power unit to switch to a latched state based on the second latching signal.

[0114] In one possible implementation, the method further includes: generating a first test signal using a first host computer 5 and sending it to the SVG under test 11; and generating a second test signal using a second host computer 6 and sending it to the SVG under test 12.

[0115] In one possible implementation, the method further includes: using the acquisition circuit 31 to acquire electrical signals in the towing circuit 1 and the power grid side 4, and sending the electrical signals to the tested SVG 11 and the accompanying SVG 12 respectively; the tested SVG 11 and the accompanying SVG 12 switch to the locked state when the electrical signals meet the locking conditions; and using the security circuit 32 to disconnect the towing circuit 1 from the power grid side 4 when the tested SVG 11 and / or the accompanying SVG 12 switch to the locked state.

[0116] In one possible implementation, the method further includes: monitoring the output current using a current transformer 311; the measured SVG11 and the accompanying SVG12 respectively acquire the output current, and switch to a blocking state when the output current is greater than a preset protection threshold.

[0117] In one possible implementation, the method further includes: monitoring the bus voltage using a voltage transformer 312 and transmitting the bus voltage to the measured SVG11 and the accompanying SVG12 respectively; the measured SVG11 and the accompanying SVG12 also control the first output power corresponding to the measured SVG11 and the second output power corresponding to the accompanying SVG12 according to the bus voltage respectively.

[0118] In one possible implementation, the method further includes: using a first security circuit to disconnect the common AC bus 7 from the parallel circuit 1 when the tested SVG11 and / or the accompanying SVG12 are switched to a locked state; and using a second security circuit to turn the common AC bus 7 on or off from the power supply buses at each stage according to the output current.

[0119] It should be understood that although the steps in the flowcharts of the above embodiments are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the above embodiments may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages in other steps. It is understood that the steps in different embodiments can be freely combined as needed, and all non-contradictory solutions formed by such combinations are within the scope of protection of this application.

[0120] In one exemplary embodiment, a computer device is provided, which may be a server, and its internal structure diagram may be as follows: Figure 6As shown, the computer device includes a processor, memory, input / output interfaces (I / O), and a communication interface. The processor, memory, and I / O interfaces are connected via a system bus, and the communication interface is also connected to the system bus via the I / O interfaces. The processor provides computational and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system, computer programs, and a database. The internal memory provides the environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The database stores loop current, a first output voltage, and a second output voltage. The I / O interfaces are used for exchanging information between the processor and external devices. The communication interface is used for communicating with external terminals via a network connection. When executed by the processor, the computer program implements an SVG testing method.

[0121] Those skilled in the art will understand that Figure 6 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0122] In one exemplary embodiment, a computer device is also provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps in the above-described method embodiments.

[0123] In one exemplary embodiment, a computer-readable storage medium is provided having a computer program stored thereon that, when executed by a processor, implements the steps in the above-described method embodiments.

[0124] In one exemplary embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements the steps in the above-described method embodiments.

[0125] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments of the above methods. Any references to memory, database, or other media used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, artificial intelligence (AI) processors, etc., and are not limited to these.

[0126] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0127] The above embodiments are merely illustrative of several implementation methods of this application, and their descriptions are relatively specific and detailed. However, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. An SVG test circuit, characterized by, The SVG test circuit includes: a drag circuit, a communication circuit, and a safety control circuit; The drag circuit includes a tested SVG and a companion SVG; the drag circuit is connected to the first terminal of the safety control circuit; the second terminal of the safety control circuit is connected to the power grid side; the communication circuit is connected to both the tested SVG and the companion SVG. The tested SVG and the accompanying SVG are used to perform reactive power control based on the received test signal; the communication circuit is used to transmit a blocking signal between the tested SVG and the accompanying SVG; the blocking signal is generated when the power of the tested SVG or the accompanying SVG is abnormal, or the blocking signal is generated when the output current of the tested SVG or the accompanying SVG is greater than the protection threshold. The safety control circuit is used to connect or disconnect the electrical connection between the towing circuit and the power grid side according to the operating status of the towing circuit during the test.

2. The SVG test circuit according to claim 1, characterized in that, The protection threshold includes a first protection threshold and a second protection threshold, and the blocking signal includes a first blocking signal and a second blocking signal; The SVG under test includes a first controller and a first power unit, and the SVG under test includes a second controller and a second power unit; the first terminal of the communication circuit is connected to the first controller, and the second terminal of the communication circuit is connected to the second controller; The first controller is used to generate the first blocking signal when it detects that the power of the first power unit is abnormal or the output current is greater than the first protection threshold. The communication circuit is used to transmit the first blocking signal to the second controller, so that the second controller controls the second power unit to switch to the blocking state based on the first blocking signal. or, The second controller is used to generate the second blocking signal when it detects that the power of the second power unit is abnormal or the output current is greater than the second protection threshold. The communication circuit is also used to transmit the second blocking signal to the first controller, so that the first controller controls the first power unit to switch to the blocking state based on the second blocking signal.

3. The SVG test circuit according to claim 1, characterized in that, The test signal includes a first test signal and a second test signal; The SVG test circuit further includes: a first host computer and a second host computer, wherein the first host computer is communicatively connected to the SVG under test, and the second host computer is communicatively connected to the SVG under test; The first host computer is used to generate the first test signal and send it to the SVG under test; the second host computer is used to generate the second test signal and send it to the SVG under test.

4. The SVG test circuit according to claim 1, characterized in that, The drag circuit further includes: a drag bus, a first reactor, and a second reactor; The first end of the first reactor is connected to the SVG under test, and the second end of the first reactor is connected to the busbar; the first end of the second reactor is connected to the SVG under test, and the second end of the second reactor is connected to the busbar.

5. The SVG test circuit according to claim 1, characterized in that, The security control circuit includes: a data acquisition circuit and a security circuit; The first terminal of the acquisition circuit is connected to the drag circuit, the second terminal of the acquisition circuit is connected to the common AC bus on the power grid side, the third terminal of the acquisition circuit is connected to the first terminal of the security circuit, the second terminal of the security circuit is connected to the power grid side, and the third terminal of the security circuit is connected to the SVG under test and the SVG under test respectively. The acquisition circuit is used to acquire electrical signals in the drag circuit and the power grid side, and send the electrical signals to the SVG under test and the accompanying SVG respectively; The tested SVG and the accompanying tested SVG are also respectively used to switch to the locked state when the electrical signal meets the locking condition; The security circuit is used to disconnect the drag circuit from the power grid side when the tested SVG and / or the accompanying SVG are switched to the locked state.

6. The SVG test circuit according to claim 5, characterized in that, The electrical signal includes the output current; The acquisition circuit includes: a current transformer, the first end of which is connected to the reverse circuit, and the second end of which is connected to the security circuit; The current transformer is used to monitor the output current; the measured SVG and the accompanying SVG are also used to acquire the output current, and switch to a blocking state when the output current is greater than a preset protection threshold.

7. The SVG test circuit according to claim 5, characterized in that, The electrical signal includes the bus voltage; the acquisition circuit includes a voltage transformer. The first end of the voltage transformer is connected to the common AC bus on the power grid side, and the second end of the voltage transformer is connected to the SVG under test and the SVG under test respectively. The voltage transformer is used to monitor the bus voltage and transmit the bus voltage to the measured SVG and the accompanying SVG respectively; The SVG under test and the SVG under test are also used to control the first output power of the SVG under test and the second output power of the SVG under test according to the bus voltage.

8. The SVG test circuit according to claim 5, characterized in that, The security circuit includes: a first security circuit and a second security circuit; The first terminal of the first security circuit is connected to the third terminal of the acquisition circuit, the second terminal of the first security circuit is connected to the SVG under test and the SVG under test respectively, the third terminal of the first security circuit is connected to the common AC bus on the power grid side, the first terminal of the second security circuit is connected to the common AC bus, and the second terminal of the second security circuit is connected to the power supply buses at each level on the power grid side. The first security circuit is used to disconnect the common AC bus from the parallel circuit when the tested SVG and / or the accompanying SVG is switched to the locked state; The second security circuit is used to connect or disconnect the common AC bus and the power supply buses at each level according to the output current.

9. The SVG test circuit according to claim 8, characterized in that, The power supply busbars at each level include a first power supply busbar, a second power supply busbar, and a third power supply busbar; the first security circuit includes circuit breaker Q1; the second security circuit includes circuit breakers Q2, Q3, and Q4; The first terminal of the circuit breaker Q1 is connected to the third terminal of the acquisition circuit, and the second terminal of the circuit breaker Q1 is connected to the common AC bus. The circuit breaker Q2 is located between the common AC bus and the first power supply bus, the circuit breaker Q3 is located between the first power supply bus and the second power supply bus, and the circuit breaker Q4 is located between the second power supply bus and the third power supply bus.

10. An SVG testing method, characterized in that, The SVG testing method is applied to the SVG testing circuit according to any one of claims 1-9, and the method includes: A pre-charging circuit is formed by connecting the drag circuit and the grid side using a safety control circuit to pre-charge the DC side capacitors of the SVG under test and the SVG under auxiliary test respectively, and the pre-charging circuit is disconnected after charging is completed. Reactive power control is performed on the tested SVG and the co-tested SVG based on the test signal; The operating status signals and interlocking signals of the tested SVG and the accompanying SVG are transmitted in real time using a communication circuit. The safety control circuit responds to the operating status of the towing circuit, and connects or disconnects the towing circuit from the power grid side.

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