A method and apparatus for detecting direct current series arc faults

Abstract

The present application relates to a kind of direct current series arc fault detection method and device.Load current value, load voltage value and power supply voltage value are obtained;Load voltage difference value of load voltage value and rated load voltage value and power supply voltage difference value of power supply voltage value and rated power supply voltage value are obtained;When load voltage difference value is greater than or equal to adjustable voltage difference coefficient times power supply voltage difference value, load current difference value of load current value and rated current value is obtained;The product Φ of load current difference value and the sign operation of load voltage difference value is obtained;When product Φ appears greater than 0 for a preset number of times continuously, it is determined that direct current series arc fault occurs.The present application improves the accuracy and reliability of direct current series arc fault detection through the synergistic effect of multiple sampling signals, and can timely statistical and report arc fault information;Multiple logic loop judgment can effectively distinguish direct current series fault arc and normal switch arc, improve the accuracy of detection method.

Description

Technical Field

[0001] This invention belongs to the field of safety protection technology for high voltage DC power distribution systems, specifically relating to a detection method for detecting series arc faults in high voltage DC circuits and an apparatus for implementing the method. Background Technology

[0002] With the widespread application of high-voltage direct current (HVDC) power distribution systems in new energy, data centers, rail transportation, and other fields, system voltage levels are constantly increasing, and the number of electrical devices is growing daily. DC series arcing faults, due to their high impedance, severe heat generation, and high concealment, have become one of the main causes of electrical fires. Arcing faults introduce unstable high impedance into the circuit, leading to localized overheating and potentially igniting surrounding combustibles.

[0003] Currently, most common DC series arc detection technologies are based on high-frequency sampling of current or voltage waveforms and the extraction of arc features using complex signal processing algorithms (such as wavelet transform, Fourier analysis, and artificial intelligence pattern recognition). While these methods can identify arcs to some extent, they also have significant shortcomings: First, the complex algorithms require high processing power, leading to expensive system hardware; second, the increased algorithm complexity may introduce processing delays, affecting the real-time performance of fault protection; and third, in actual operating environments, interference such as normal load switching and power fluctuations can easily be confused with the characteristics of fault arcs, leading to false alarms or missed alarms.

[0004] Therefore, there is an urgent need for a DC series arc detection scheme that has a simple detection circuit structure, clear judgment logic, low cost, and can reliably distinguish between fault arcs and normal interference. Summary of the Invention

[0005] The purpose of this invention is to overcome the aforementioned deficiencies of the prior art and provide a method and apparatus for detecting DC series arc faults. This method, through collaborative analysis of the changes and directions of load-side current, load-side voltage, and power supply-side voltage, and employing multi-level logic judgment, can achieve rapid and accurate identification of series arc faults at low cost, effectively distinguishing faults from normal operational fluctuations.

[0006] To achieve the above objectives, the first technical solution of the present invention is as follows: A method for detecting DC series arc faults, characterized in that it includes: S10: Obtain the load current value, load voltage value, and power supply voltage value; S20: Obtain the load voltage difference between the load voltage value and the rated load voltage value, and the power supply voltage difference between the power supply voltage value and the rated power supply voltage value; S30: When the load voltage difference is greater than or equal to the power supply voltage difference multiple of the adjustable voltage difference coefficient, obtain the load current difference between the load current value and the rated current value. S40: Obtain the product Φ of the load current difference and the load voltage difference after sign operation; S50: When the product Φ appears more than 0 times consecutively for a preset number of times, it is determined that a DC series arc fault has occurred.

[0007] Furthermore, the preset number of times is greater than or equal to 5.

[0008] Furthermore, the formula for the product Φ is: Φ=sgn(ΔI Load )╳ sgn(ΔU Load )， Where ΔILoad is the load current difference and ΔULoad is the load voltage difference.

[0009] Furthermore, when the load voltage difference is less than the power supply voltage difference multiple of the adjustable voltage difference coefficient, it is determined to be an output voltage fluctuation caused by a sudden change in the power supply voltage.

[0010] Furthermore, when the product Φ is less than or equal to 0, it is determined to be a load voltage and current fluctuation caused by an equivalent load change.

[0011] The second technical solution of the present invention is as follows: a DC series arc fault detection device, comprising: a load current sampling circuit, a load voltage sampling circuit, a power supply voltage sampling circuit, and a processing module; The input terminal of the load current sampling circuit is connected to the positive line of the output circuit, and the output terminal of the load current sampling circuit is connected to the processing module. The input terminal of the load voltage sampling circuit is connected to the equivalent load, and the output terminal of the load voltage sampling circuit is connected to the processing module. The input terminal of the power supply voltage sampling circuit is connected to a high-voltage power supply, and the output terminal of the power supply voltage sampling circuit is connected to the processing module. The load current sampling circuit is used to acquire the load current signal; The load voltage sampling circuit is used to acquire the load voltage signal; The power supply voltage sampling circuit is used to acquire power supply voltage signals; The processing module is used to convert the load current signal into a load current value, the load voltage signal into a load voltage value, and the power supply voltage signal into a power supply voltage value, and to execute any of the DC series arc fault detection methods described above.

[0012] Furthermore, the load current sampling circuit includes: a first open-loop current Hall effect sensor N1, a first resistor R1, a first capacitor C1, and a second operational amplifier N2; The first open-loop current Hall effect sensor N1 is mounted on the positive line of the output circuit. The output terminal of the first open-loop current Hall effect sensor N1 is connected to one end of the first resistor R1. The other end of the first resistor R1 is connected to one end of the first capacitor C1 and the positive input terminal of the second operational amplifier N2. The other end of the first capacitor C1 is grounded. The negative input terminal of the second operational amplifier N2 is connected to the output terminal of the second operational amplifier N2 and the processing module.

[0013] Furthermore, the load voltage sampling circuit includes: a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a second capacitor C2, a third capacitor C3, a third voltage isolator N3, and a fourth operational amplifier N4; One end of the second resistor R2 is connected to one end of the equivalent load, one end of the third resistor R3 is connected to the other end of the equivalent load, the other end of the second resistor R2 is connected to the other end of the third resistor R3 and one end of the fourth resistor R4, the other end of the fourth resistor R4 is connected to one end of the second capacitor C2 and the positive input terminal of the third voltage isolator N3, the other end of the second capacitor C2 is connected to one end of the third resistor R3 and the negative input terminal of the third voltage isolator N3, the negative output terminal of the third voltage isolator N3 is grounded, the positive output terminal of the third voltage isolator N3 is connected to one end of the fifth resistor R5, the other end of the fifth resistor R5 is connected to one end of the third capacitor C3 and the positive input terminal of the fourth operational amplifier N4, the other end of the third capacitor C3 is grounded, and the negative input terminal of the fourth operational amplifier N4 is connected to the output terminal of the fourth operational amplifier N4.

[0014] Furthermore, the power supply voltage sampling circuit includes: a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a fourth capacitor C4, a fifth capacitor C5, a fifth voltage isolator N5, and a sixth operational amplifier N6; One end of the sixth resistor R6 is connected to one end of the equivalent load, one end of the seventh resistor R7 is connected to the other end of the equivalent load, the other end of the sixth resistor R6 is connected to the other end of the seventh resistor R7 and one end of the eighth resistor R8, the other end of the eighth resistor R8 is connected to one end of the fourth capacitor C4 and the positive input terminal of the fifth voltage isolator N5, the other end of the fourth capacitor C4 is connected to one end of the seventh resistor R7 and the negative input terminal of the fifth voltage isolator N5, the negative output terminal of the fifth voltage isolator N5 is grounded, the positive output terminal of the fifth voltage isolator N5 is connected to one end of the ninth resistor R9, the other end of the ninth resistor R9 is connected to one end of the fifth capacitor C5 and the positive input terminal of the sixth operational amplifier N6, the other end of the fifth capacitor C5 is grounded, and the negative input terminal of the sixth operational amplifier N6 is connected to the output terminal of the sixth operational amplifier N6.

[0015] Furthermore, the processing module includes: a multi-channel ADC unit and a data processing unit; The multi-channel ADC unit is used to convert the load current signal into a load current value, the load voltage signal into a load voltage value, and the power supply voltage signal into a power supply voltage value. The data processing unit is used to execute any of the DC series arc fault detection methods described above.

[0016] The beneficial effects of this invention are: Accurate and reliable detection: By coordinating the judgment of three information sources—load voltage, current, and power supply voltage—and combining fluctuation amplitude comparison and change direction analysis, multiple criteria are constructed, which can effectively distinguish between power supply fluctuations, load abrupt changes, and real arc faults, significantly reducing the false alarm rate.

[0017] The solution is cost-effective: the detection circuit is based on conventional voltage divider, isolation, filtering, and operational amplifier follower circuits, resulting in a simple structure. The core algorithm does not require complex time-frequency transformation or large-scale data training; it only involves difference calculation, sign determination, and counting, thus placing low demands on processor performance and significantly reducing hardware and software costs.

[0018] High real-time performance and reliability: The logical judgment steps are clear, the computational load is small, and the response speed is fast. The mechanism of confirming a fault only after multiple consecutive checks avoids malfunctions caused by momentary interference, thus improving the reliability of the protection.

[0019] Easy to implement and integrate: The circuit is highly modular, the algorithm logic is clear, and it is easy to implement in the product. It can also report the fault status to the main control system through communication interfaces (such as CAN, RS485), which facilitates system-level monitoring and protection linkage. Attached Figure Description

[0020] Figure 1 This is a schematic diagram of the voltage and current acquisition circuit of the present invention.

[0021] Figure 2 This is a schematic diagram of the DC series arc fault detection circuit of the present invention.

[0022] Figure 3 This is a flowchart of the DC series arc fault detection method of the present invention. Detailed Implementation

[0023] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments. The described embodiments are merely some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0024] In the first technical solution of the present invention, Figure 1 This is a schematic diagram illustrating the specific process of a DC series arc fault detection method according to the present invention, as shown below. Figure 1 As shown, the present invention includes: S10: Obtain the load current value, load voltage value, and power supply voltage value.

[0025] The analog signal acquired by the sampling circuit is converted into a digital signal by the ADC acquisition circuit and then processed by the PLD. The PLD performs digital filtering and other processing on the data acquired by the ADC, including the load current, load voltage and power supply voltage acquisition data.

[0026] S20: Obtain the load voltage difference between the load voltage value and the rated load voltage value, and the power supply voltage difference between the power supply voltage value and the rated power supply voltage value.

[0027] PLD calculates the difference Δ between the filtered load voltage and the rated load voltage. U Load = U Load - U LoadN And the difference Δ between the filtered power supply voltage and the rated power supply voltage. U Source = U Source - U SourceN ,in, U Load This is the actual load voltage value collected. U LoadN This is the rated load voltage value. U Source This is the actual power supply voltage value collected. U SourceN This is the rated power supply voltage.

[0028] S30: When the load voltage difference is greater than or equal to the power supply voltage difference multiple of the adjustable voltage difference coefficient, obtain the load current difference between the load current value and the rated current value.

[0029] When the load voltage difference is less than the power supply voltage difference multiple of the adjustable voltage difference coefficient, it is determined to be an output voltage fluctuation caused by a sudden change in the power supply voltage.

[0030] Judgment | Δ U Load Is it less than β|Δ U Source |, where β is the adjustable pressure differential coefficient, if |Δ U Load |<β|Δ U SourceIf the output voltage fluctuation is caused by a sudden change in the power supply voltage, then it is determined to be an output voltage fluctuation caused by a sudden change in the power supply voltage.

[0031] If |Δ U Load |≥β|Δ U Source Calculate the difference Δ between the filtered load current and the rated current. I Load = I Load - I LoadN .

[0032] S40: Obtain the product Φ of the load current difference and the load voltage difference after sign operation; The formula for the product Φ is: Φ=sgn(ΔI Load )╳ sgn(ΔU Load )， Where ΔILoad is the load current difference and ΔULoad is the load voltage difference.

[0033] Calculate the product of the load current difference and the load voltage difference after sign operation: Φ = sgn(Δ I Load )╳ sgn(Δ U Load ),in, I Load This is the actual load current measurement value. I LoadN This is the rated load current.

[0034] S50: When the product Φ appears more than 0 times consecutively for a preset number of times, it is determined that a DC series arc fault has occurred.

[0035] The preset number of times is greater than or equal to 5.

[0036] When the product Φ is less than or equal to 0, it is determined to be a load voltage and current fluctuation caused by an equivalent load change.

[0037] Determine if Φ is less than or equal to 0. If Φ≤0, it is determined to be a load voltage and current fluctuation caused by a sudden change in the equivalent load. If Φ>0, the value of n is incremented by 1, and the initial value of n is 0. When Φ appears to be greater than or equal to 0 5 times in a row, i.e. n≥5, it is determined to be a DC series arc fault. Otherwise, it is determined to be a normal state.

[0038] In the second technical solution of the present invention, Figure 2 This is a schematic diagram based on the specific structure of a DC series arc fault detection device, such as... Figure 2 and Figure 3 As shown, the present invention includes: a load current sampling circuit 1, a load voltage sampling circuit 2, a power supply voltage sampling circuit 3, and a processing module; The input terminal of the load current sampling circuit 1 is connected to the positive line of the output circuit, and the output terminal of the load current sampling circuit 1 is connected to the processing module. The input terminal of the load voltage sampling circuit 2 is connected to the equivalent load, and the output terminal of the load voltage sampling circuit 2 is connected to the processing module. The input terminal of the power supply voltage sampling circuit 3 is connected to a high-voltage power supply, and the output terminal of the power supply voltage sampling circuit 3 is connected to a processing module. The load current sampling circuit 1 is used to acquire the load current signal; The load voltage sampling circuit 2 is used to acquire the load voltage signal; The power supply voltage sampling circuit 3 is used to acquire the power supply voltage signal; The processing module is used to convert the load current signal into a load current value, the load voltage signal into a load voltage value, and the power supply voltage signal into a power supply voltage value, and to execute any of the DC series arc fault detection methods described above.

[0039] The load current sampling circuit 1 includes: a first open-loop current Hall effect sensor N1, a first resistor R1, a first capacitor C1, and a second operational amplifier N2; The first open-loop current Hall effect sensor N1 is mounted on the positive line of the output circuit. The output terminal of the first open-loop current Hall effect sensor N1 is connected to one end of the first resistor R1. The other end of the first resistor R1 is connected to one end of the first capacitor C1 and the positive input terminal of the second operational amplifier N2. The other end of the first capacitor C1 is grounded. The negative input terminal of the second operational amplifier N2 is connected to the output terminal of the second operational amplifier N2 and the processing module.

[0040] The load current sampling circuit consists of a first open-loop current Hall sensor N1, a first resistor R1, a first capacitor C1, and a second operational amplifier N2. The first open-loop current Hall sensor N1 is mounted on the positive line of the output circuit. The positive terminal of the current Hall sensor output is connected to the first resistor R1, and the negative terminal is connected to digital ground. The other end of the first resistor R1 is connected to the non-inverting input pin of the second operational amplifier N2 and one end of the first capacitor C1. The other end of the first capacitor C1 is connected to digital ground. The inverting input pin of the second operational amplifier N2 is connected to its output pin. The output pin of the second operational amplifier N2 generates an analog signal for the load current sampling. I Load_AD It is also connected to the input terminal of the subsequent multi-channel high-speed ADC acquisition circuit.

[0041] The load voltage sampling circuit 2 includes: a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a second capacitor C2, a third capacitor C3, a third voltage isolator N3, and a fourth operational amplifier N4; One end of the second resistor R2 is connected to one end of the equivalent load, one end of the third resistor R3 is connected to the other end of the equivalent load, the other end of the second resistor R2 is connected to the other end of the third resistor R3 and one end of the fourth resistor R4, the other end of the fourth resistor R4 is connected to one end of the second capacitor C2 and the positive input terminal of the third voltage isolator N3, the other end of the second capacitor C2 is connected to one end of the third resistor R3 and the negative input terminal of the third voltage isolator N3, the negative output terminal of the third voltage isolator N3 is grounded, the positive output terminal of the third voltage isolator N3 is connected to one end of the fifth resistor R5, the other end of the fifth resistor R5 is connected to one end of the third capacitor C3 and the positive input terminal of the fourth operational amplifier N4, the other end of the third capacitor C3 is grounded, and the negative input terminal of the fourth operational amplifier N4 is connected to the output terminal of the fourth operational amplifier N4.

[0042] The load voltage sampling circuit consists of second resistors R2, R3, R4 and R5, second capacitors C2 and C3, third voltage isolator N3 and fourth operational amplifier N4. One end of the second resistor R2 is connected to the positive terminal of the output equivalent load, and the other end is connected to the third resistors R3 and R4; the other end of the third resistor R3 is connected to the negative terminal of the output equivalent load; the other end of the fourth resistor R4 is connected to the positive primary input terminal of the second capacitor C2 and the third voltage isolator N3; the other end of the second capacitor C2 is connected to the negative terminal of the output equivalent load; the negative primary input terminal of the third voltage isolator N3 is connected to the negative terminal of the output equivalent load; the positive secondary output terminal of the third voltage isolator N3 is connected to one end of the fifth resistor R5, and the negative secondary output terminal is connected to digital ground; the other end of the fifth resistor R5 is connected to the non-inverting input pin of the fourth operational amplifier N4 and one end of the third capacitor C3; the other end of the third capacitor C3 is connected to digital ground; the inverting input pin of the fourth operational amplifier N4 is connected to the output pin; the output pin of the fourth operational amplifier N4 generates the analog signal of the load voltage acquisition. U Load_AD It is also connected to the input terminal of the subsequent multi-channel high-speed ADC acquisition circuit.

[0043] The power supply voltage sampling circuit 3 includes: a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a fourth capacitor C4, a fifth capacitor C5, a fifth voltage isolator N5, and a sixth operational amplifier N6; One end of the sixth resistor R6 is connected to one end of the equivalent load, one end of the seventh resistor R7 is connected to the other end of the equivalent load, the other end of the sixth resistor R6 is connected to the other end of the seventh resistor R7 and one end of the eighth resistor R8, the other end of the eighth resistor R8 is connected to one end of the fourth capacitor C4 and the positive input terminal of the fifth voltage isolator N5, the other end of the fourth capacitor C4 is connected to one end of the seventh resistor R7 and the negative input terminal of the fifth voltage isolator N5, the negative output terminal of the fifth voltage isolator N5 is grounded, the positive output terminal of the fifth voltage isolator N5 is connected to one end of the ninth resistor R9, the other end of the ninth resistor R9 is connected to one end of the fifth capacitor C5 and the positive input terminal of the sixth operational amplifier N6, the other end of the fifth capacitor C5 is grounded, and the negative input terminal of the sixth operational amplifier N6 is connected to the output terminal of the sixth operational amplifier N6.

[0044] The power supply voltage sampling circuit consists of resistors R6, R7, R8, and R9, capacitors C4 and C5, a voltage isolator N5, and an operational amplifier N6. One end of resistor R6 is connected to the positive terminal of the input high-voltage power supply, and the other end is connected to resistors R6 and R7. The other end of resistor R7 is connected to the negative terminal of the input high-voltage power supply. The other end of resistor R8 is connected to capacitor C4 and the primary input positive terminal of voltage isolator N5. The other end of capacitor C4 is connected to the negative terminal of the input high-voltage power supply. The primary input negative terminal of voltage isolator N5 is connected to the negative terminal of the input high-voltage power supply. The secondary output positive terminal of voltage isolator N5 is connected to one end of resistor R9, and the secondary output negative terminal is connected to digital ground. The other end of resistor R9 is connected to the non-inverting input pin of operational amplifier N6 and one end of capacitor C5. The other end of capacitor C5 is connected to digital ground. The inverting input pin of operational amplifier N6 is connected to its output pin. The output pin of operational amplifier N6 generates the analog signal for power supply voltage acquisition. U Source_AD It is also connected to the input terminal of the subsequent multi-channel high-speed ADC acquisition circuit.

[0045] The processing module includes a multi-channel ADC unit and a data processing unit.

[0046] The multi-channel ADC unit is used to convert the load current signal into a load current value, the load voltage signal into a load voltage value, and the power supply voltage signal into a power supply voltage value. The data processing unit is used to execute any of the DC series arc fault detection methods described above.

[0047] The data processing unit is a PLD processor.

[0048] The multi-channel high-speed ADC acquisition circuit mainly consists of a multi-channel high-speed ADC chip and auxiliary circuits. The input terminal of the multi-channel high-speed ADC acquisition circuit is connected to the output terminal of the sampling circuit. The PLD circuit mainly consists of a PLD chip and auxiliary circuits. The input terminal of the PLD circuit is connected to the output terminal of the multi-channel high-speed ADC acquisition circuit. The PLD is connected to the main communication device via communication. The main device can output and display the DC series arc fault detection status, including a normal status and a status with a series arc fault.

[0049] The working principle of the detection circuit is as follows: An open-loop Hall effect sensor is placed on the positive line of the output circuit, generating an induced current that produces a voltage signal with a corresponding proportional relationship inside the sensor. This signal is filtered by an RC filter composed of a first resistor R1 and a first capacitor C1, and then by a follower amplifier N2 before entering the multi-channel high-speed ADC acquisition circuit. The output equivalent load voltage is divided by R3 in the series circuit of second resistors R2 and R3, filtered by an RC filter composed of a fourth resistor R4 and a second capacitor C2, and then enters the primary input terminal of the third voltage isolator N3. After electrical isolation by the third voltage isolator N3, the load voltage... The voltage acquisition signal, after passing through an RC filter composed of the fifth resistor R5 and the third capacitor C3, and followed by the fourth operational amplifier N4, enters the multi-channel high-speed ADC acquisition circuit. The input high-voltage power supply voltage, after being divided by R7 in the series circuit of the sixth resistor R6 and R7, and then filtered by an RC filter composed of the eighth resistor R8 and the fourth capacitor C4, enters the primary input of the fifth voltage isolator N5. After electrical isolation by the fifth voltage isolator N5, the high-voltage power supply voltage acquisition signal, after passing through an RC filter composed of the ninth resistor R9 and the fifth capacitor C5, and followed by the sixth operational amplifier N6, enters the multi-channel high-speed ADC acquisition circuit. The acquired analog signals are converted into digital signals by the ADC circuit and processed by the PLD, and the load voltage difference Δ is calculated. U Load Power supply voltage difference Δ U Source and load current difference Δ I Load In conjunction with detection methods, it is determined whether a DC series arc fault has occurred at the front end.

[0050] The detection circuit in this invention detects DC series arc faults by using Hall effect sensing of load current, load voltage, and power supply voltage fluctuations. By analyzing the magnitude and direction of load and current fluctuations, and through multiple logic loops, it can accurately and effectively detect whether a series arc fault has occurred at the front end. Through communication connection to a main communication device, the main device can output and display the DC series arc fault detection status, making it suitable for high-voltage DC power distribution safety detection and protection.

[0051] This invention improves the accuracy and reliability of DC series arc fault detection through the synergistic effect of multiple sampling signals, enabling timely statistical reporting of arc fault information; the arc detection circuit and fault arc feature extraction algorithm are more streamlined, resulting in lower overall detection cost; and multi-logic loop judgment can effectively distinguish between DC series fault arcs and normal switching arcs, improving the accuracy of the detection method.

[0052] Finally, it should be noted that the above specific embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to examples, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A method for detecting DC series arc faults, characterized in that, include: S10: Obtain the load current value, load voltage value, and power supply voltage value; S20: Obtain the load voltage difference between the load voltage value and the rated load voltage value, and the power supply voltage difference between the power supply voltage value and the rated power supply voltage value; S30: When the load voltage difference is greater than or equal to the power supply voltage difference multiple of the adjustable voltage difference coefficient, obtain the load current difference between the load current value and the rated current value. S40: Obtain the product Φ of the load current difference and the load voltage difference after sign operation; S50: When the product Φ appears more than 0 times consecutively for a preset number of times, it is determined that a DC series arc fault has occurred.

2. The DC series arc fault detection method as described in claim 1, characterized in that, The preset number of times is greater than or equal to 5.

3. The DC series arc fault detection method as described in claim 1, characterized in that, The formula for the product Φ is: Φ=sgn(ΔI Load )╳ sgn(ΔU Load )， Where ΔILoad is the load current difference and ΔULoad is the load voltage difference.

4. The DC series arc fault detection method as described in claim 1, characterized in that, When the load voltage difference is less than the power supply voltage difference multiple of the adjustable voltage difference coefficient, it is determined to be an output voltage fluctuation caused by a sudden change in the power supply voltage.

5. The DC series arc fault detection method as described in claim 1, characterized in that, When the product Φ is less than or equal to 0, it is determined to be a load voltage and current fluctuation caused by an equivalent load change.

6. A DC series arc fault detection device, characterized in that, include: Load current sampling circuit (1), load voltage sampling circuit (2), power supply voltage sampling circuit (3) and processing module; The input terminal of the load current sampling circuit (1) is connected to the positive line of the output circuit, and the output terminal of the load current sampling circuit (1) is connected to the processing module. The input terminal of the load voltage sampling circuit (2) is connected to the equivalent load, and the output terminal of the load voltage sampling circuit (2) is connected to the processing module. The input terminal of the power supply voltage sampling circuit (3) is connected to a high-voltage power supply, and the output terminal of the power supply voltage sampling circuit (3) is connected to a processing module. The load current sampling circuit (1) is used to collect the load current signal; The load voltage sampling circuit (2) is used to acquire the load voltage signal; The power supply voltage sampling circuit (3) is used to collect power supply voltage signals; The processing module is used to convert the load current signal into a load current value, the load voltage signal into a load voltage value, the power supply voltage signal into a power supply voltage value, and execute the DC series arc fault detection method according to any one of claims 1-5.

7. The DC series arc fault detection device as described in claim 6, characterized in that, The load current sampling circuit (1) includes: a first open-loop current Hall N1, a first resistor R1, a first capacitor C1, and a second operational amplifier N2; The first open-loop current Hall effect sensor N1 is mounted on the positive line of the output circuit. The output terminal of the first open-loop current Hall effect sensor N1 is connected to one end of the first resistor R1. The other end of the first resistor R1 is connected to one end of the first capacitor C1 and the positive input terminal of the second operational amplifier N2. The other end of the first capacitor C1 is grounded. The negative input terminal of the second operational amplifier N2 is connected to the output terminal of the second operational amplifier N2 and the processing module.

8. The DC series arc fault detection device as described in claim 6, characterized in that, The load voltage sampling circuit (2) includes: a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a second capacitor C2, a third capacitor C3, a third voltage isolator N3, and a fourth operational amplifier N4; One end of the second resistor R2 is connected to one end of the equivalent load, one end of the third resistor R3 is connected to the other end of the equivalent load, the other end of the second resistor R2 is connected to the other end of the third resistor R3 and one end of the fourth resistor R4, the other end of the fourth resistor R4 is connected to one end of the second capacitor C2 and the positive input terminal of the third voltage isolator N3, the other end of the second capacitor C2 is connected to one end of the third resistor R3 and the negative input terminal of the third voltage isolator N3, the negative output terminal of the third voltage isolator N3 is grounded, the positive output terminal of the third voltage isolator N3 is connected to one end of the fifth resistor R5, the other end of the fifth resistor R5 is connected to one end of the third capacitor C3 and the positive input terminal of the fourth operational amplifier N4, the other end of the third capacitor C3 is grounded, and the negative input terminal of the fourth operational amplifier N4 is connected to the output terminal of the fourth operational amplifier N4.

9. The DC series arc fault detection device as described in claim 6, characterized in that, The power supply voltage sampling circuit (3) includes: a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a fourth capacitor C4, a fifth capacitor C5, a fifth voltage isolator N5, and a sixth operational amplifier N6; One end of the sixth resistor R6 is connected to one end of the equivalent load, one end of the seventh resistor R7 is connected to the other end of the equivalent load, the other end of the sixth resistor R6 is connected to the other end of the seventh resistor R7 and one end of the eighth resistor R8, the other end of the eighth resistor R8 is connected to one end of the fourth capacitor C4 and the positive input terminal of the fifth voltage isolator N5, the other end of the fourth capacitor C4 is connected to one end of the seventh resistor R7 and the negative input terminal of the fifth voltage isolator N5, the negative output terminal of the fifth voltage isolator N5 is grounded, the positive output terminal of the fifth voltage isolator N5 is connected to one end of the ninth resistor R9, the other end of the ninth resistor R9 is connected to one end of the fifth capacitor C5 and the positive input terminal of the sixth operational amplifier N6, the other end of the fifth capacitor C5 is grounded, and the negative input terminal of the sixth operational amplifier N6 is connected to the output terminal of the sixth operational amplifier N6.

10. The DC series arc fault detection device as described in claim 6, characterized in that, The processing module includes: a multi-channel ADC unit and a data processing unit; The multi-channel ADC unit is used to convert the load current signal into a load current value, the load voltage signal into a load voltage value, and the power supply voltage signal into a power supply voltage value. The data processing unit is used to execute the DC series arc fault detection method according to any one of claims 1-5.

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