Access detection circuit of standard interface and standard interface

Abstract

The application relates to the technical field of electronic circuits, in particular to an access detection circuit of a standard interface and the standard interface. The access detection circuit comprises a pin signal end and a detection module. The pin signal end is connected with a target pin of the standard interface. When an external device is connected with the standard interface, the target pin is electrically connected with the external device and provides a pin signal to the pin signal end. The detection module is electrically connected with the pin signal end. When no pin signal is received, the detection module continuously outputs a detection signal of a first electric level to a main control chip. When a pin signal is received, the detection module outputs a detection signal of a second electric level to the main control chip. The hardware circuit of the detection module is designed independently from the software control part. When the external device is connected with the standard interface, the pin signal is detected in time, and the connection event is informed to the main control chip through the detection signal of the second electric level, so that the response speed of the system is ensured, and the user experience is optimized.

Description

Technical Field

[0001] This application relates to the field of electronic circuit technology, specifically to access detection circuits for standard interfaces and standard interfaces. Background Technology

[0002] With the standardization of universal interfaces such as HDMI and Type-C, the pin order and functions of these interfaces have fixed definitions. Circuit design must adhere to these defined pinouts and use only standard communication protocols conforming to the interface. Therefore, when an external device is plugged into a standard interface, it needs to transmit data to the host device to trigger a detection signal, informing the host device of the insertion event. This process is software-controlled. However, software control typically has a longer response time and lower stability compared to hardware control. Consequently, related technologies suffer from slow response speed and low stability when detecting external device connections using standard interfaces. Summary of the Invention

[0003] The embodiments of this application mainly address the technical problems of slow response speed and low stability of external device connection detection methods with standard interfaces.

[0004] To solve the above-mentioned technical problems, one technical solution adopted in this application is: providing an access detection circuit for a standard interface, comprising: a pin signal terminal for connecting to a target pin of the standard interface, wherein when the standard interface is not connected to an external device, the target pin remains in a floating state; when the standard interface is connected to an external device, the target pin is electrically connected to the external device and provides a pin signal to the pin signal terminal; a detection module electrically connected to the pin signal terminal, configured to continuously output a first-level detection signal to the main control chip when the pin signal is not received, so that the main control chip can identify that the standard interface is not connected to an external device; and further configured to output a second-level detection signal to the main control chip when the pin signal is received, so that the main control chip can switch from the first level to the second level according to the detection signal to identify that the standard interface is connected to an external device.

[0005] This solution connects the pin signal terminal to the target pin of the standard interface. By reusing the target pin, it achieves interface access detection. Based on the state of the target pin, it accurately determines whether an external device is connected to the standard interface. After connection, the pin signal controls the detection module to output a second-level detection signal to the main control chip. The main control chip then identifies the external device access event by switching from the first level to the second level based on the detection signal. This solution features a hardware circuit for the detection module designed independently of the software control section. When an external device connects to the standard interface, it promptly detects the pin signal and notifies the main control chip of the access event via a second-level detection signal, ensuring system response speed. Furthermore, even if abnormalities occur during software transmission, this circuit can accurately notify the main control chip independently of the software program, ensuring system stability and optimizing user experience.

[0006] To solve the above-mentioned technical problems, another technical solution adopted in the embodiments of this application is to provide a standard interface, which includes a target pin and an access detection circuit as described above.

[0007] Unlike related technologies, this application provides an access detection circuit for a standard interface and a standard interface. The access detection circuit includes a pin signal terminal and a detection module. The pin signal terminal is connected to a target pin of the standard interface. When the standard interface is not connected to an external device, the target pin remains floating. When the standard interface is connected to an external device, the target pin is electrically connected to the external device and provides a pin signal to the pin signal terminal. The detection module is electrically connected to the pin signal terminal. When no pin signal is received, it continuously outputs a first-level detection signal to the main control chip, so that the main control chip recognizes that the standard interface is not connected to an external device. When the pin signal is received, it outputs a second-level detection signal to the main control chip, so that the main control chip recognizes that the standard interface is connected to an external device by switching from the first level to the second level based on the detection signal. This solution connects the pin signal terminal to the target pin of the standard interface. By reusing the target pin, it achieves interface access detection. Based on the state of the target pin, it accurately determines whether an external device is connected to the standard interface. After connection, the pin signal controls the detection module to output a second-level detection signal to the main control chip. The main control chip then identifies the external device access event by switching from the first level to the second level based on the detection signal. This solution features a hardware circuit for the detection module designed independently of the software control section. When an external device connects to the standard interface, the pin signal is detected promptly, and the access event is communicated to the main control chip by outputting a second-level detection signal, ensuring system response speed and optimizing user experience. Attached Figure Description

[0008] One or more embodiments are illustrated by way of example with reference to the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Elements having the same reference numerals in the drawings are denoted as similar elements. Unless otherwise stated, the figures in the drawings are not to be limited by scale.

[0009] Figure 1 This is a schematic diagram of the access detection circuit for a standard interface provided in an embodiment of this application;

[0010] Figure 2 This is a schematic diagram of the circuit structure of an access detection circuit provided in an embodiment of this application;

[0011] Figure 3 This is an example diagram of a standard HDMI interface provided in an embodiment of this application;

[0012] Figure 4 This is an example diagram of a standard TYPE-C interface provided in an embodiment of this application;

[0013] Figure 5 This is a schematic diagram of an access detection circuit provided in an embodiment of this application applied to a TYPE-C interface;

[0014] Figure 6 This is a schematic diagram of another access detection circuit provided in an embodiment of this application;

[0015] Figure 7 This is a schematic diagram of the circuit structure of another access detection circuit provided in the embodiments of this application. Detailed Implementation

[0016] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0017] It should be noted that when an element is described as "connected" to another element, it can be directly connected to the other element, or there may be one or more intervening elements. The terms "first," "second," etc., used in this specification are for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0018] Unless otherwise defined, all technical and scientific terms used in this specification have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. The term "and / or" as used in this specification includes any and all combinations of one or more of the associated listed items.

[0019] In related technologies, when an external device is plugged into a target interface, the external device transmits data to the main control chip through that interface to trigger a detection signal, informing the main control chip of the insertion event. Taking a standard HDMI interface as an example, HDMI_CABLE_DET_1_IC is typically used as a detection signal to determine whether the HDMI cable is connected (i.e., whether an external device is connected to the HDMI interface). When the HDMI cable is not connected or the connection is abnormal, this signal remains at a high level. When the HDMI cable is properly connected, the external device needs to actively provide, for example, an HPD (Hot Plug Detect) signal to trigger the corresponding recognition program, controlling the detection signal to jump to a low level. This process is software-controlled, so that the system chip of the main control device can detect the detection signal jumping from the first level to the second level, thereby recognizing the external device's connection event. That is, when an external device is connected to a standard HDMI interface, the external device needs to actively provide an HPD signal to the main control chip through the standard HDMI interface and trigger the corresponding recognition program, causing the detection signal HDMI_CABLE_DET_1_IC to go low. This process is software-controlled. Generally speaking, software control has a longer response time and lower stability compared to hardware control. Therefore, in related technologies, external device connection detection methods based on standard interfaces have lower response speed and stability.

[0020] To address the aforementioned issues, this application creatively proposes a novel technical solution: a standard interface access detection circuit is designed. By reusing some fixed pins in the standard interface, a hardware circuit detects whether an external device is connected to the standard interface. The voltage of the target pin after the external device is connected triggers a detection signal to the main control chip, enabling the main control chip to recognize the external device's access event. For example, taking a standard HDMI interface, the circuit is connected to the target pin of the interface. When the external device is not connected, the target pin is left floating, the access detection circuit operates normally, and outputs a first-level detection signal, HDMI_CABLE_DET_1_IC, to the main control chip. This allows the main control chip to recognize that the external device is not connected or the connection is abnormal. When the external device is connected, the target pin provides a pin signal to the circuit. Based on this pin signal, the circuit's output provides a second-level HDMI_CABLE_DET_1_IC signal to the main control chip, enabling the main control chip to recognize the external device's access event. Based on this, the embodiments of this application can respond instantly when the target pin is connected to an external device, change the level of the detection signal, and output it to the main control chip. It does not require the external device to actively transmit signals to trigger the recognition program, resulting in faster detection speed and better stability than the software system. Moreover, this circuit is independent of the original software control part of the interface, only needs to reuse individual pins in the interface, and will not affect other functions of the standard interface.

[0021] Based on the above technical concept of this embodiment, this embodiment will be further described in conjunction with specific scenarios.

[0022] This application provides an access detection circuit for a standard interface. Please refer to... Figure 1The access detection circuit includes a pin signal terminal and a detection module. The detection module is electrically connected to the pin signal terminal, which is connected to the target pin of the standard interface. The detection module is also electrically connected to the main control chip. The pin signal terminal is indicated by a circle in the diagram. It can be understood that the target pin refers to one or more standard pins in the standard interface. When no external device is connected to the standard interface, the target pin remains floating. When an external device is connected to the standard interface, the target pin is electrically connected to the external device, meaning the path at the target pin is open, and the target pin provides a pin signal to the pin signal terminal. When the detection module does not receive a pin signal, it indicates that the target pin is floating, and it continuously outputs a first-level detection signal to the main control chip so that the main control chip recognizes that no external device is connected to the standard interface. When the detection module receives a pin signal, it indicates that the path at the target pin is open, and it outputs a second-level detection signal to the main control chip based on the pin signal, so that the main control chip switches from the first level to the second level based on the detection signal to recognize that the standard interface is connected to an external device. In this embodiment, the external device refers to a device that can be connected to the standard interface, including but not limited to various interface cables, such as HDMI cables. It should be noted that, in this embodiment, the main control chip refers to the control part of the main control device that communicates normally with the standard interface. The standard interface can communicate normally with the main control chip, including transmitting data signals, control signals, or address signals, etc. In this scenario, the standard interface can be part of the main control device entity or an independent interface electrically connected to the main control device.

[0023] This solution sets the pin signal terminal to connect to the target pin of the standard interface. By reusing the target pin, it realizes the access detection of the interface. Based on the status of the target pin, it accurately obtains whether the standard interface is connected to an external device. Based on the pin signal after access, it controls the detection module to output a second-level detection signal to the main control chip. The main control chip then jumps from the first level to the second level based on the detection signal to identify the access event of the external device, ensuring the system's response speed and optimizing the user experience.

[0024] In this embodiment, the target pin can be the GND pin of a standard interface. When an external device is connected to the standard interface, the pin signal is the GND pin signal, typically a reference ground or standard ground voltage signal, such as 0V. The first level is high and the second level is low. The main control chip identifies the external device connected to the standard interface based on the low-level detection signal. Based on this, please combine... Figure 2The aforementioned detection module may include a first voltage divider unit 111 and a first current limiting unit 112. As shown in the figure, the first end of the first current limiting unit 112 is connected to a pin signal terminal, which is represented by a circle in the figure; the second end of the first current limiting unit 112 is connected to the main control chip (not shown in the figure); the first end of the first voltage divider unit 111 is used to connect to the power supply, which is represented by VCC in the figure; the second end of the first voltage divider unit 111 is grounded, i.e., GND in the figure; the third end of the first voltage divider unit 111 is connected to the first end of the first current limiting unit 112.

[0025] When no pin signal is received, the first voltage divider unit 111 continuously outputs a first-level detection signal in conjunction with the power supply VCC, and provides the first-level detection signal to the main control chip through the first current limiting unit 112. When a pin signal is received, the first voltage divider unit 111 pulls down the first terminal of the first current limiting unit 112, so that the first current limiting unit 112 provides a second-level detection signal to the main control chip. This scheme determines the connection of external devices by detecting the level change of the GND pin of the standard interface, and the GND pin is usually present in most standard interfaces, ensuring circuit compatibility. At the same time, using it as a detection point can ensure that there is always a stable reference level change when an external device is connected, ensuring the reliability of the detection. Specifically, when no pin signal is received, a stable first-level detection signal is provided by the first voltage divider unit 111 in conjunction with the power supply VCC; when a pin signal is received, the first voltage divider unit 111 can quickly respond to the pin signal and trigger the first current limiting unit to output a second-level detection signal by pulling down the voltage. This allows the main control chip to jump from the first level to the second level based on the detection signal to identify the standard interface for connecting to external devices, thereby ensuring the sensitivity and accuracy of the detection.

[0026] The standard interface in this application embodiment can be an HDMI interface. Please refer to... Figure 3 , Figure 3 An example pinout of a standard HDMI interface is shown. This embodiment uses a standard HDMI interface as an example for illustration. As shown in the figure, for a standard HDMI interface, the target pin can be pin 11, the GND pin. In this embodiment, the voltage at this pin is used as the pin signal, illustrated in the figure as HDMI_CABLE_DET_1. Combined with... Figure 2 Specifically, the first voltage divider unit 111 includes resistors R1 and R3, and the first current limiting unit 112 includes resistor R2. The first end of resistor R2 is connected to the pin signal terminal, and the second end of resistor R2 is connected to the main control chip. The first end of resistor R1 is connected to the power supply, shown as VCC in the diagram, and the second end of resistor R1 is connected to the first end of resistor R3. The second end of resistor R3 is grounded, and the second end of resistor R1 is connected to the first end of resistor R2.

[0027] When no external device is connected to the standard interface, the target pin ( Figure 3 Pin 11) is left floating, meaning the signal pin is left floating. The voltage of the power supply VCC is divided by resistors R1 and R3, and then supplied to the main control chip via resistor R2 as a first-level detection signal, i.e., a high-level detection signal. Figure 2 The diagram is illustrated as HDMI_CABLE_DET_1_IC. When an external device is connected to the standard interface, the pin signal terminal is connected to pin 11 (GND pin), providing a pin signal to the detection module. The pin signal is the GND voltage at pin 11, typically 0V. This pin signal grounds the power supply VCC through resistor R1, pulling down the first end of resistor R2 to provide a second-level detection signal to the main control chip, i.e., a low-level detection signal. The main control chip recognizes the external device connection event based on the high-to-low transition of the detection signal and performs the corresponding response operation. In this solution, the resistance values ​​of resistors R1 and R3 can be used to determine the voltage at the voltage divider point, clamping the detection signal voltage in the floating state of the target pin to a high level to ensure circuit stability. Resistor R2 is also used to protect the target pin, absorbing static electricity and high-voltage pulses to prevent overcurrent damage to the standard interface. Moreover, the circuit is built with fewer components, resulting in a significant cost advantage.

[0028] In some embodiments, the detection module further includes a filtering unit. Please refer to... Figure 2 The filter units shown in the diagram are 113a and 113b. As illustrated, filter units 113a and 113b include capacitors C1 and C2. The first terminal of capacitor C1 is connected to the first terminal of resistor R3, and the second terminal of capacitor C1 is connected to the second terminal of resistor R3. The first terminal of capacitor C2 is connected to the second terminal of resistor R2, and the second terminal of capacitor C2 is grounded. These capacitors C1 and C2 provide hardware filtering for the detection module, reducing key bounce and high-frequency signal interference, and ensuring the stability and accuracy of the detection signal.

[0029] In some embodiments, please combine Figure 2 The aforementioned detection module also includes a protection unit 114. As shown in the figure, the protection unit 114 includes a TVS diode D1. The first terminal of the TVS diode D1 is connected to the first terminal of the resistor R3, and the second terminal of the TVS diode D1 is connected to the second terminal of the resistor R3. The TVS diode D1 can absorb and suppress transient overvoltages in the circuit, providing overvoltage, electromagnetic pulse, and electrostatic discharge protection, enhancing the circuit's resistance to transient interference, and improving the circuit's safety and reliability.

[0030] The standard interface in this application embodiment can also be a TYPE-C interface. Please refer to... Figure 4 , Figure 4An example pinout of a standard Type-C interface is shown. This embodiment uses the standard Type-C interface as an example for illustration. As shown in the figure, for a standard Type-C interface, the target pin can be pin A1 and / or pin B1, or the GND pin. The voltage at pin A1 and / or pin B1 serves as the pin signal, illustrated in the figure as TYPE_C_DET_C1. Combined with... Figure 5 When no external device is connected to the standard interface, the target pin ( Figure 4 Pins A1 and / or B1 are left floating, meaning the signal terminals are left unconnected. The voltage from the power supply VCC is divided by resistors R1 and R3, and then supplied to the main control chip via resistor R2 as a first-level detection signal, i.e., a high-level detection signal. Figure 5 This is illustrated as TYPE_C_DET_SEL_C1. When an external device is connected via the standard interface, the pin signal terminal is connected to pin A1 and / or pin B1 (GND pin), providing a pin signal to the detection module. This pin signal grounds the power supply VCC through resistor R1, pulls down the first end of resistor R2, and provides a second-level detection signal, i.e., a low-level detection signal, to the main control chip. The main control chip recognizes the external device connection event based on the detection signal transitioning from high to low, and thus performs the corresponding response operation. It is understood that the standard HDMI interface and standard TYPE-C interface in the above embodiments are only examples of standard interfaces and are not limitations thereof. This solution can be applied to various standard interfaces that include the target pin.

[0031] In some embodiments, the target pin can also be the VCC pin of a standard interface. In this case, when an external device is connected to the standard interface, the pin signal is the VCC pin signal, which is typically the voltage signal of the external device's power supply, such as 3.3V. The first level is high and the second level is low. The main control chip recognizes that an external device is connected to the standard interface based on the low-level detection signal. Based on this, please combine... Figure 6 The aforementioned detection module may include a second voltage divider unit 121 and a first switching unit 122. As shown in the figure, the first end of the second voltage divider unit 121 is connected to the pin signal terminal, which is represented by a circle in the figure; the second end of the second voltage divider unit 121 is grounded, i.e., GND in the figure; the third end of the second voltage divider unit 121 is connected to the control terminal of the first switching unit 122, and the first end of the first switching unit 122 is used to connect to the power supply, which is represented by VCC in the figure; the second end of the first switching unit 122 is connected to the second end of the second voltage divider unit 121, and the third end of the first switching unit 122 is connected to the main control chip (not shown in the figure).

[0032] When no pin signal is received, no current flows through the second voltage divider unit 121, and the first switching unit 122 is not conducting. This, combined with the power supply VCC, provides a high-level detection signal to the main control chip. When a pin signal is received, the second voltage divider unit 121 connects to the external device through the target pin (VCC pin), providing a conduction signal to the first switching unit 122 to turn it on. The first switching unit 122 then grounds the power supply VCC, providing a low-level detection signal to the main control chip. This solution determines the connection of an external device by detecting changes in the level of the standard interface VCC pin. The VCC pin is typically a common power supply pin found in most standard interfaces, ensuring circuit compatibility. Furthermore, the conduction state of the VCC pin directly changes the voltage of the pin signal, facilitating a rapid circuit response. This allows the main control chip to identify the standard interface connection of an external device based on the detection signal transitioning from low to high, thus ensuring the sensitivity and accuracy of the detection.

[0033] For specific details, please refer to... Figure 6 The second voltage divider unit 121 includes resistors R4 and R5, and the first switching unit 122 includes resistor R6 and switching transistor Q1. The first end of resistor R4 is connected to the pin signal terminal, and the second end of resistor R4 is connected to the first end of resistor R5, with the second end of resistor R5 grounded. The first end of resistor R6 is connected to the power supply VCC, and the second end of resistor R6 is connected to the main control chip. The first end of switching transistor Q1 is connected to the second end of resistor R6, and the second end of switching transistor Q1 is connected to the second end of resistor R5. The control terminal of switching transistor Q1 is connected to the second end of resistor R4. When an external device is connected, the voltage at the pin signal terminal is pulled high, controlling the switching transistor Q1 to conduct through resistors R4 and R5. Resistor R6 grounds the power supply VCC, stopping the provision of a high-level detection signal and switching to a low-level detection signal, allowing the main control chip to recognize the external device connection event based on the high-to-low transition detection signal. In this circuit, resistors R4 and R5 are used to divide the external device's VCC voltage, thereby controlling the conduction of the switching transistor Q1. The resistance values ​​can be set according to the external device's VCC voltage, so that the voltage after voltage division meets the conduction voltage of the switching transistor Q1. This circuit structure is simple, easy to build, and has obvious cost advantages.

[0034] In some embodiments, the main control chip identifies an external device connected via a standard interface based on a high-level detection signal. In this case, the target pin can be the GND pin of the standard interface, with a first low level and a second high level. Based on this, please combine... Figure 7 The aforementioned detection module includes a second current limiting unit 131 and a second switching unit 132. For example... Figure 7As shown, the first end of the second current limiting unit 131 is connected to the pin signal terminal, which is represented by a circle in the figure; the second end of the second current limiting unit 131 is connected to the control terminal of the second switching unit 132; the first end of the second switching unit 132 is connected to the power supply VCC; the second end of the second switching unit 132 is grounded, i.e., GND in the figure; the third end of the second switching unit 132 is connected to the main control chip (not shown in the figure).

[0035] When no pin signal is received, the second switching unit 132 remains in the off state and outputs a low-level detection signal to the main control chip. When a pin signal is received, the second current limiting unit 131 provides a conduction signal to the second switching unit 132, which then conducts and outputs a high-level detection signal to the main control chip in conjunction with the power supply VCC. Therefore, this solution is also applicable to scenarios where the main control chip identifies access events based on a low-level to high-level detection signal. Utilizing the GND pin of the standard interface, the detection signal is triggered to transition from low to high when an external device is connected. In this circuit, the second current limiting unit 131 can quickly respond to pin signals and provide overcurrent protection. By controlling the on / off state of the second switching unit 132, it accurately outputs a first-level or second-level detection signal, thereby ensuring the accuracy of the detection.

[0036] For specific details, please refer to... Figure 7 The second current limiting unit 131 includes a resistor R7, and the second switching unit 132 includes resistors R8, R9, and R10, and a switching transistor Q2. The first end of resistor R7 is connected to the target pin, and the second end of resistor R7 is connected to the control terminal of switching transistor Q2. The first end of resistor R8 is connected to the power supply VCC, and the second end of resistor R8 is connected to the control terminal of switching transistor Q2. The first end of switching transistor Q2 is connected to the power supply VCC through resistor R9, and the second end of switching transistor Q2 is connected to the main control chip. The second end of switching transistor Q2 is also grounded through resistor R10. In this embodiment, switching transistor Q2 can be a PMOS transistor. When no external device is connected, switching transistor Q1 is in the off state, and the detection signal is low. When an external device is connected, the voltage at the pin signal terminal is pulled low, controlling switching transistor Q2 to conduct. The power supply VCC provides a high-level detection signal to the main control chip through resistor R9, so that the main control chip can identify the external device connection event based on the detection signal transitioning from low to high. Among them, resistor R7 provides current limiting protection when external devices are connected and controls the switching transistor Q2 to conduct, so that resistor R8 can provide a high-level detection signal in conjunction with the power supply. At this time, resistor R9 can divide the power supply voltage in conjunction with resistor R8, and supports adjusting the resistance value to adjust the second level detection signal, ensuring the stability of the circuit.

[0037] This application provides a standard interface including target pins and an access detection circuit as described above. The above product possesses the corresponding circuit module and beneficial effects of the access detection circuit. Technical details not described in detail in this embodiment can be found in the access detection circuit of the standard interface provided in this application.

[0038] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and not to limit them; under the concept of this application, the technical features of the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations of different aspects of this application as described above, which are not provided in detail for the sake of brevity; although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A standard interface access detection circuit, characterized in that, include: The pin signal terminal is used to connect to the target pin of the standard interface. When the standard interface is not connected to an external device, the target pin remains in a floating state. When the standard interface is connected to an external device, the target pin is electrically connected to the external device and provides a pin signal to the pin signal terminal. The detection module is electrically connected to the pin signal terminal and is used to continuously output a first-level detection signal to the main control chip when the pin signal is not received, so that the main control chip can identify that the standard interface is not connected to an external device; it is also used to output a second-level detection signal to the main control chip when the pin signal is received, so that the main control chip can switch from the first level to the second level according to the detection signal to identify that the standard interface is connected to an external device.

2. The access detection circuit according to claim 1, characterized in that, The target pin is the GND pin of the standard interface. The first level is high level and the second level is low level. The main control chip recognizes that the standard interface is connected to an external device based on the low level detection signal.

3. The access detection circuit according to claim 2, characterized in that, The detection module includes a first voltage divider unit and a first current limiting unit. The first end of the first current limiting unit is connected to the pin signal terminal, the second end of the first current limiting unit is connected to the main control chip, the first end of the first voltage divider unit is used to connect to the power supply, the second end of the first voltage divider unit is grounded, and the third end of the first voltage divider unit is connected to the first end of the first current limiting unit. The first voltage divider unit is used to continuously output a first-level detection signal in conjunction with the power supply when the pin signal is not received, and to provide the first-level detection signal to the main control chip through the first current limiting unit; The first voltage divider unit is also used to pull down the first terminal of the first current limiting unit when the pin signal is received, so that the first current limiting unit provides a second level detection signal to the main control chip.

4. The access detection circuit according to claim 3, characterized in that, The first voltage divider unit includes resistors R1 and R3, and the first current limiting unit includes resistor R2; The first end of resistor R2 is connected to the pin signal terminal, the second end of resistor R2 is connected to the main control chip, the first end of resistor R1 is connected to the power supply, the second end of resistor R1 is connected to the first end of resistor R3, the second end of resistor R3 is grounded, and the second end of resistor R1 is connected to the first end of resistor R2.

5. The access detection circuit according to claim 4, characterized in that, The detection module also includes a filtering unit, which includes capacitor C1 and capacitor C2. The first terminal of capacitor C1 is connected to the first terminal of resistor R3, the second terminal of capacitor C1 is connected to the second terminal of resistor R3, the first terminal of capacitor C2 is connected to the second terminal of resistor R2, and the second terminal of capacitor C2 is grounded.

6. The access detection circuit according to claim 5, characterized in that, The detection module also includes a protection unit, which includes a TVS diode D1. The first end of the TVS diode D1 is connected to the first end of the resistor R3, and the second end of the TVS diode D1 is connected to the second end of the resistor R3.

7. The access detection circuit according to claim 1, characterized in that, The target pin is the VCC pin of the standard interface. The first level is high level and the second level is low level. The main control chip recognizes that the standard interface is connected to an external device based on the low level detection signal.

8. The access detection circuit according to claim 7, characterized in that, The detection module includes a second voltage divider unit and a first switching unit. The first end of the second voltage divider unit is connected to the pin signal terminal, the second end of the second voltage divider unit is grounded, and the third end of the second voltage divider unit is connected to the control terminal of the first switching unit. The first end of the first switching unit is used to connect to the power supply, the second end of the first switching unit is connected to the second end of the second voltage divider unit, and the third end of the first switching unit is connected to the main control chip. The second voltage divider unit is used to provide a conduction signal to the first switching unit when the pin signal is received, so as to turn on the first switching unit; The first switching unit is used to provide a first-level detection signal to the main control chip in conjunction with the power supply when it is not turned on; The first switching unit is also used to provide a second-level detection signal to the main control chip when it is turned on.

9. The access detection circuit according to claim 8, characterized in that, The second voltage divider unit includes resistors R4 and R5, and the first switching unit includes resistor R6 and switching transistor Q1; The first end of resistor R4 is connected to the pin signal terminal, the second end of resistor R4 is connected to the first end of resistor R5, the second end of resistor R5 is grounded, the first end of resistor R6 is connected to the power supply, the second end of resistor R6 is connected to the main control chip, the first end of switch Q1 is connected to the second end of resistor R6, the second end of switch Q1 is connected to the second end of resistor R5, and the control terminal of switch Q1 is connected to the second end of resistor R4.

10. The access detection circuit according to claim 1, characterized in that, The target pin is the GND pin of the standard interface. The first level is low and the second level is high. The main control chip recognizes that the standard interface is connected to an external device based on the high-level detection signal.

11. The access detection circuit according to claim 10, characterized in that, The detection module includes a second current limiting unit and a second switching unit. The first end of the second current limiting unit is connected to the pin signal terminal, the second end of the second current limiting unit is connected to the control terminal of the second switching unit, the first end of the second switching unit is used to connect to the power supply, the second end of the second switching unit is grounded, and the third end of the second switching unit is connected to the main control chip. The second current limiting unit is used to provide a conduction signal to the second switching unit when the pin signal is received, so as to turn on the second switching unit; The second switching unit is used to maintain an open state when the conduction signal is not received, so as to provide a first-level detection signal to the main control chip; The second switching unit is also used to turn on when the turn-on signal is received, and output a second-level detection signal to the main control chip in conjunction with the power supply.

12. The access detection circuit according to claim 11, characterized in that, The second current limiting unit includes resistor R7, and the second switching unit includes resistors R8, R9, and R10 and switching transistor Q2; The first end of resistor R7 is connected to the pin signal terminal, the second end of resistor R7 is connected to the control terminal of switch Q2, the first end of resistor R8 is connected to the power supply, the second end of resistor R8 is connected to the control terminal of switch Q2, the first end of switch Q2 is connected to the power supply through resistor R9, the second end of switch Q2 is connected to the main control chip, and the second end of switch Q2 is also grounded through resistor R10.

13. A standard interface, characterized in that, The standard interface includes: a target pin, and an access detection circuit as described in any one of claims 1-12.

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