Large model training method and device based on PCB placement guidance, and storage medium

Abstract

The application discloses a large model training method and device based on PCB placement guide and a storage medium, comprising the following steps: extracting a reference guide constraint graph from expert placement data to construct a supervised training sample; performing first-stage supervised training on a basic large model through the supervised training sample to obtain a first-stage model; inputting circuit design data and design rule information into the first-stage model to generate multiple candidate guide constraint graphs, and driving a placement executor based on the candidate guide constraint graphs to obtain a placement result; performing in-group relative sorting on the candidate guide constraint graphs according to corresponding evaluation results, performing regression verification and quality access control on the first-stage model after parameter updating under the constraint of a preset updating amplitude according to the in-group sorting result, and outputting a field-specific model or a parameter adapter. Through two-stage training and in-group sorting, the model considers engineering preferences and physical legality, thereby suppressing training overfitting and oscillation, and achieving the technical effect of stable convergence.

Description

Technical Field

[0001] This application relates to the field of physical design and artificial intelligence model training, and in particular to a large model training method, device and storage medium based on PCB placement guidance. Background Technology

[0002] In printed circuit board (PCB) electronic design automation, the rationality of automated component placement directly impacts routing and product performance. To improve the engineering usability of automated placement, some solutions attempt to use generative models (such as deep neural networks) to directly learn and output component placement coordinates from design data. Theoretically, these methods can capture potential layout patterns from historical design data, reducing manual intervention.

[0003] However, in practical applications, directly outputting coordinates from the generative model faces significant manufacturability issues: the coordinates generated by the model often violate physical constraints, such as device out-of-bounds movement, overlapping, and illegal orientation, making the results unusable for subsequent routing or manufacturing. This is because the generative model struggles to ensure that hard constraints such as board outline, no-hook zones, and rotational permissions are met while outputting coordinates, and it fails to adequately reflect multi-dimensional and difficult-to-quantify preferences from engineering experience (such as signal link compactness and power loop integrity).

[0004] Furthermore, when evaluating the quality of candidate results generated by the model, the absolute scoring method is easily affected by differences in plate size, index scale, and evaluation noise, leading to instability in the model training process and difficulty in converging to a stable state that meets engineering requirements. Therefore, how to ensure that the generated model stably outputs results that conform to engineering preferences and meet manufacturability constraints in automatic placement tasks has become a pressing technical challenge in this field.

[0005] The above content is only used to help understand the technical solution of this application and does not represent an admission that the above content is prior art. Summary of the Invention

[0006] The main purpose of this application is to provide a large model training method, device and storage medium based on PCB placement guidance, which aims to solve the technical problem that it is difficult to balance the manufacturability of existing model generation results and training stability.

[0007] To achieve the above objectives, this application proposes a large model training method based on PCB placement guidance, the method comprising: A reference guidance constraint graph is extracted from the expert placement data, and supervised training samples are constructed based on the reference guidance constraint graph. The first-stage supervised training of the basic large model is performed using the supervised training samples to obtain the first-stage model; Circuit design data and design rule information are input into the first-stage model to generate multiple candidate guiding constraint maps. Based on these candidate guiding constraint maps, actuators are placed to obtain the desired results. Figure 1 One-to-one placement result; Based on the evaluation results corresponding to the placement results, the candidate guiding constraint graphs are sorted relative within the group, and based on the sorting results within the group, the parameters of the first stage model are updated under the preset update magnitude constraint. Regression validation and quality gate control are performed on the updated first-stage model, and the output is a domain-specific model or parameter adapter.

[0008] In one embodiment, the step of extracting a reference guidance constraint graph from expert placement data includes: The coordinate and orientation information between devices or modules in the expert placement data is analyzed. The relative position, relative distance and / or relative orientation between each pair of coordinates and orientation information are calculated in the analysis results. The relative placement relationship is obtained based on the calculation results. The placement guidance relationship is assigned a guidance importance weight based on the strength of engineering preference. The placement guidance relationship and the guidance importance weight are mapped to a preset graph structure to generate a reference guidance constraint graph. The reference guidance constraint graph is a graph structure data whose edge attributes include the guidance importance weight, and the reference guidance constraint graph uses devices or modules as nodes and the relative placement guidance relationship as edges.

[0009] In one embodiment, the step of performing a first-stage supervised training on the base large model using the supervised training samples to obtain a first-stage model includes: The supervised training samples are input into the base large model to obtain the prediction guidance constraint graph; The structural similarity metric between the predicted guidance constraint graph and the reference guidance constraint graph is calculated using a graph feature extraction strategy or a graph representation learning strategy. The first-stage model is obtained by constructing a joint loss function using the structural similarity metric and a preset auxiliary training signal, and updating the basic large model parameters based on the joint loss function.

[0010] In one embodiment, the step of inputting circuit design data and design rule information into the first-stage model to generate multiple candidate guiding constraint diagrams includes: The same set of circuit design data and design rule information are input into the first stage model for decoding. During the decoding phase, the random sampling strategy or temperature parameters of the model in the first phase are adjusted. Based on the adjustment results, multiple candidate guiding constraint graphs are output, and there are differences in topology or attribute weights among the multiple candidate guiding constraint graphs.

[0011] In one embodiment, the step of relative ranking the candidate guiding constraint graphs within a group based on the evaluation results corresponding to the placement results includes: For the candidate set corresponding to the same supervised training sample, the automatic evaluation index corresponding to each candidate guided constraint graph is normalized. Based on the comprehensive performance of each candidate guided constraint graph in multiple evaluation dimensions in the normalization process, a total order relation or partial order relation is established within the candidate set. The total order relation or partial order relation is used as the relative order within the group.

[0012] In one embodiment, the step of updating the parameters of the first-stage model based on the group ranking results and under a preset update magnitude constraint includes: A preference loss function is constructed based on the ranking results of the relative ranking within the group. The preference loss function increases the probability of generating the candidate guiding constraint graph for candidates ranked higher and decreases the probability of generating the candidate guiding constraint graph for candidates ranked lower. Calculate the distribution difference between the first-stage model and the preset reference model, and add the distribution difference as a regularization term to the preference loss function. Constrain the parameter change magnitude of the first-stage model in a single update through joint optimization.

[0013] In one embodiment, the step of performing regression validation and quality gate control on the updated first-stage model and outputting a domain-specific model or parameter adapter includes: The updated first-stage model is inferred on the solidified regression benchmark set, and a regression validation guidance constraint graph is generated based on the inference results. Based on the regression verification guided constraint graph, the placement executor is driven to obtain the regression verification placement result. The quality parameter set of the regression verification placement result is calculated, and the quality parameter set includes the placement success rate, violation rate and key indicator distribution fluctuation. The set of quality parameters is compared with preset quality judgment conditions. Based on the comparison results, it is determined whether the regression verification and quality gate are passed. Based on the comparison results, a domain-specific model or parameter adapter is output.

[0014] In one embodiment, after performing regression validation and quality gate control on the updated first-stage model and outputting a domain-specific model or parameter adapter, the method further includes: Periodically collect newly added expert placement samples, and construct incremental supervised training samples based on the newly added expert placement samples; The domain-specific model or parameter adapter is retrained based on the incremental supervised training samples to obtain an updated domain-specific model. The updated domain-specific model is compared and validated with the original domain-specific model on a fixed regression benchmark set. After successful validation, the updated domain-specific model is released.

[0015] Furthermore, to achieve the above objectives, this application also proposes a large model training device based on PCB placement guidance, the device comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, the computer program being configured to implement the steps of the large model training method based on PCB placement guidance as described above.

[0016] In addition, to achieve the above objectives, this application also proposes a storage medium, which is a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, it implements the steps of the large model training method based on PCB placement guidance as described above.

[0017] One or more technical solutions proposed in this application have at least the following technical effects: The technical solution of this application involves extracting a reference guiding constraint map from expert placement data, constructing supervised training samples based on the reference guiding constraint map, performing a first-stage supervised training on a basic large model using the supervised training samples to obtain a first-stage model, inputting circuit design data and design rule information into the first-stage model to generate multiple candidate guiding constraint maps, and driving placement actuators based on the candidate guiding constraint maps to obtain a model consistent with the candidate guiding constraints. Figure 1 A corresponding placement result is obtained; the candidate guiding constraint graph is sorted relative within the group according to the evaluation result corresponding to the placement result, and the parameters of the first stage model are updated according to the sorting result within the group under the preset update magnitude constraint; regression verification and quality gate control are performed on the updated first stage model, and a domain-specific model or parameter adapter is output.

[0018] This application addresses the core pain points of existing methods that directly generate coordinates, leading to difficulties in reflecting engineering preferences and unstable training. It achieves explicit modeling of engineering preferences and stable control of the training process through a decoupled architecture of "guided constraint graph generation + two-stage training." Specifically, the method first extracts a reference guided constraint graph containing relative placement relationships and importance weights from expert placement data to construct structured supervised training samples, providing the model with a learnable engineering preference benchmark. Through the first stage of supervised training, the basic large model acquires the baseline ability to generate usable guided constraint graphs. In the second stage of preference alignment training, multiple candidate guided constraint graphs are generated and used to drive the placement executor to obtain placement results. Relative ranking within groups is performed based on automatic evaluation metrics to avoid scale inconsistencies caused by absolute scoring. Model parameters are updated based on the ranking results, and update magnitude constraints are applied to ensure training stability. Finally, through regression validation and quality gating, a deployable domain-specific model is output. Through these technical means, this application significantly improves training stability while ensuring the executable and traceable generation of the guided graph, and provides an effective technical solution to the technical challenges of difficult alignment of engineering preferences and unstable training processes in existing technologies. Attached Figure Description

[0019] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0020] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a flowchart illustrating the first embodiment of the large model training method based on PCB placement guidance in this application; Figure 2 This is a detailed process diagram based on step S20 in the first embodiment; Figure 3 This is a detailed schematic diagram of step S30 in the first embodiment; Figure 4 This is a detailed schematic diagram of step S40 in the first embodiment; Figure 5 This is a detailed schematic diagram of step S60 in the first embodiment; Figure 6 This is a schematic diagram of another detailed process based on step S60 in the first embodiment; Figure 7 This is a detailed schematic diagram of step S70 in the first embodiment; Figure 8 This is a flowchart illustrating the second embodiment of the large model training method based on PCB placement guidance in this application; Figure 9 This is a schematic diagram of the device structure of the hardware operating environment involved in the large model training method based on PCB placement guidance in the embodiments of this application.

[0022] The purpose, features, and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0023] It should be understood that the specific embodiments described herein are merely illustrative of the technical solutions of this application and are not intended to limit this application.

[0024] In related technologies, large model training based on PCB placement guidance mainly follows two technical paths, but each has its inherent defects and it is difficult to meet the dual requirements of generation quality and training stability.

[0025] Generally, direct coordinate generation schemes based on deep reinforcement learning are used, which place components one by one on the PCB board by constructing a Markov decision process. These methods can achieve automated placement to a certain extent and output the final component coordinates. However, these methods directly optimize numerical objectives (such as trace length and crowding), making it difficult to stably reflect engineers' preferences for functional partitioning, link accessibility, and power supply compactness. Furthermore, the reinforcement learning exploration process lacks explicit modeling of manufacturability constraints, leading to unmanufacturable problems such as out-of-bounds errors, overlaps, and illegal orientations in the generated results. Practical applications show that these methods have difficulty converging and produce highly volatile results when facing complex engineering constraints, making it difficult to meet the stability requirements of engineering deployment.

[0026] Alternatively, a serialized coordinate prediction scheme based on a multimodal large model could be introduced. This involves constructing training samples of "current state - next action" to allow the model to learn the mapping relationship from layout state to coordinates. While such schemes can achieve good prediction accuracy on specific datasets, their deployment still has significant limitations: directly outputting device coordinates requires the model to learn both layout logic and precise numerical mapping simultaneously, making training difficult; using absolute coordinates as supervision signals makes them susceptible to differences in board size and coordinate scale, leading to training instability; and the lack of an intermediate representation verification mechanism for the generated results makes it difficult to guarantee the traceability and executability of the generated results. When facing PCB designs of different board types and sizes in practical applications, the model's generalization ability decreases, resulting in the common technical problem of existing methods struggling to balance generation quality and training stability.

[0027] A comprehensive analysis reveals that the core dilemma faced by both approaches lies in the fact that while reinforcement learning-based solutions can achieve automation, they struggle to reflect engineering preferences, while coordinate prediction-based solutions, despite incorporating large models, suffer from poor training stability. Both methods fail to achieve a balance between high-quality generation and stable training. More importantly, existing solutions generally employ an "end-to-end" coordinate generation logic, lacking verifiable intermediate representation steps. This makes it particularly problematic when facing complex engineering constraints, as the manufacturability of the generated results and their alignment with engineering preferences are difficult to guarantee.

[0028] Based on the aforementioned shortcomings of related technologies, this application proposes a large-scale model training method based on PCB placement guidance. This method addresses the core pain points of existing methods that directly generate coordinates, leading to difficulty in reflecting engineering preferences and unstable training. It achieves explicit modeling of engineering preferences and stability control of the training process through a decoupled architecture of "guided constraint graph generation + two-stage training." Specifically, the method first extracts a reference guided constraint graph containing relative placement relationships and importance weights from expert placement data to construct structured supervised training samples, providing the model with a learnable engineering preference benchmark. Through the first stage of supervised training, the basic large-scale model acquires the baseline ability to generate usable guided constraint graphs. In the second stage of preference alignment training, multiple candidate guided constraint graphs are generated and used to drive the placement executor to obtain placement results. Relative ranking within groups is performed based on automatic evaluation metrics to avoid scale inconsistencies caused by absolute scoring. Model parameters are updated based on the intra-group ranking results, and update magnitude constraints are applied to ensure training stability. Finally, through regression validation and quality gating control, a deployable domain-specific model or parameter adapter is output. Through the above-mentioned technical means, this application significantly improves training stability while ensuring that the generated guidance graph is executable and traceable, and provides an effective technical solution to the technical problem that it is difficult to balance the manufacturability of the generated results and the training stability in the prior art.

[0029] To better understand the technical solution of this application, a detailed description will be provided below in conjunction with the accompanying drawings and specific implementation methods.

[0030] Based on this, embodiments of this application provide a large model training method based on PCB placement guidance, referring to... Figure 1 , Figure 1 This is a flowchart illustrating the first embodiment of the large model training method based on PCB placement guidance according to this application. In this embodiment, the large model training method based on PCB placement guidance includes steps S10 to S70: Step S10: Obtain circuit design data, design rule information, and expert placement data; In this embodiment, three types of basic data are first required, which constitute the input foundation of the entire two-stage training method. Circuit design data includes schematic diagram information and netlist information. The schematic diagram describes the electrical connections between components, while the netlist records the pin definitions and network connection attributes of each component. Design rule information includes board outline dimensions, keep-out area ranges, the allowed rotation angles for components, and safety spacing requirements between different nets. Expert placement data comes from historical project files, which record the layout results completed by experienced engineers in past projects, including component coordinates, rotation angles, and their respective board layers.

[0031] In the specific implementation process, the first step is to establish a data acquisition interface. This involves parsing industry standard files in IPC-2581 or ODB++ format to extract the three types of data from files exported by EDA tools. For circuit design data, the system traverses each electrical network in the netlist, recording the network name, the list of pins it contains, and the component identifiers to which the pins belong. For design rule information, the system reads the coordinate point sequence of the board outline, identifies the polygonal areas where components are prohibited from being placed, and extracts the package library information for each component, including package dimensions, pad positions, and allowed rotation angles. For expert placement data, the system parses the component instance information in the layout file to obtain the center point coordinates, rotation angle, and board layer of each component.

[0032] After data extraction, the system associates and stores the three types of data, forming structured data records. Each data record uses circuit design data as the primary key, linking it to corresponding design rule information and expert placement data. Simultaneously, the system categorizes and labels the data based on characteristics such as board size, number of components, and network complexity, generating version identifiers. This step lays the data foundation for subsequent construction of supervised training samples, ensuring the traceability of training data and the standardization of version management.

[0033] Step S20: Extract the reference guidance constraint graph from the expert placement data, and construct a supervised training sample by combining the circuit design data and design rule information; Reference guiding constraint graphs are extracted from expert placement data and combined with circuit design data and design rule information to construct supervised training samples. A guiding constraint graph is a structured intermediate representation used to describe the relative placement relationships between components and the strength of engineering preferences. It does not directly provide component coordinates but instead offers verifiable placement guidance information.

[0034] In the specific implementation process, the first step is to analyze the data placed by experts to identify the spatial relationships between components. The system traverses the set of already laid-out components, and for each pair of components with electrical connections, calculates their relative orientation, including the direction angle of the line connecting their center points, the Euclidean distance, and the relative orientation angle. The relative orientation is represented in vector form. For example, component B is located 30 degrees east of north relative to component A, at a distance of 5 millimeters, and the orientation of component B is rotated 90 degrees relative to the orientation of component A.

[0035] Next, the system assigns importance weights to these relative placement relationships based on engineering experience. The importance weights reflect the preference for specific placement relationships in engineering practice. For example, inductors and capacitors in a power supply circuit are required to be placed as close as possible, so the importance weight for this placement relationship is set to a high value; for resistors and capacitors in a general signal network, the importance weight is set to a medium value; and for components with only weak electrical connections, the importance weight is set to a low value. The configuration of importance weights can refer to statistical patterns in historical expert samples, or can be predefined by senior engineers according to design specifications.

[0036] After extracting the relative placement relationships and configuring the weights, the system maps this information to a preset graph structure. The reference guidance constraint graph is expressed as a directed or undirected graph. The nodes of the graph represent components or functional modules, and the edges represent relative placement guidance relationships. Each edge has an importance weight attribute. Node attributes include component type, package size, and pin information, while edge attributes include relative orientation vectors and importance weights. Through the above processing, the original expert placement data is transformed into a structured reference guidance constraint graph, which fully preserves the engineering intent and preference information in the expert layout.

[0037] Finally, the system combines the reference guidance constraint graph with the acquired circuit design data and design rule information to form supervised training samples. Each supervised training sample contains input data and output data. The input data includes circuit design data and design rule information, while the output data is the reference guidance constraint graph. After format verification and cleaning / filtering, these samples are divided into training, validation, and test sets according to a certain ratio to provide supervision signals for subsequent model training.

[0038] Step S30: Perform first-stage supervised training on the basic large model based on the supervised training samples to obtain the first-stage model; The first stage of supervised specialized training is performed on the base large model based on supervised training samples. The aim is to enable the base large model to generate a baseline capable of generating usable guided constraint graphs. The base large model is a pre-trained language model with multimodal understanding capabilities, such as Qwen2.5-VL-7B or a similar architecture. These models have strong representation capabilities in natural language understanding and image understanding.

[0039] In the specific implementation process, the supervised training samples first need to be converted into an input format acceptable to the model. The netlist information in the circuit design data is serialized into text descriptions, grouped by network name, and listing the component pins contained in each network. Component information is also serialized into text descriptions, including the type, package, and number of pins for each component. The board outline dimensions and forbidden zone ranges in the design rule information are converted into a sequence of coordinate points. These text descriptions are then converted into token sequences by a tokenizer before being input into the model.

[0040] The forward propagation process of the model maps the input circuit design data and design rule information into a predictive guidance constraint graph. The predictive guidance constraint graph is also output in graph structure, containing node representations and edge representations. Node representations correspond to the embedding vector of each component, and edge representations correspond to the possible placement guidance relationships between components and their attributes.

[0041] To measure the difference between the predicted guiding constraint graph and the reference guiding constraint graph, the system introduces a structural similarity metric. The structural similarity metric is calculated based on graph feature extraction methods. It can use graph kernel functions to calculate the similarity between two graphs, or it can use graph neural networks to map the graph structure into fixed-dimensional vectors and then calculate the cosine similarity between the vectors. The structural similarity metric evaluates the closeness of the predicted results to the supervised target from two dimensions: topological structure and attribute distribution.

[0042] In addition to structural similarity metrics, the system also incorporates auxiliary training signals obtained through automatic evaluation. These auxiliary training signals generate temporary placement results by inputting the predicted guided constraint graph into the placement executor, calculating metrics such as line length trends, network crossover degree, and hard constraint violation rate, and converting these metrics into loss values. The auxiliary training signals guide the model to focus on the executability of the generated guided graph, rather than merely mimicking the surface structure of the reference graph.

[0043] A joint loss function is formed by weighting structural similarity metrics and auxiliary training signals. The gradient is calculated using backpropagation to update the model parameters. The training process employs mini-batch stochastic gradient descent, continuing for multiple epochs until the loss function converges. After training, the first-stage model possesses the basic ability to generate reasonable guiding constraint graphs from circuit design data and design rule information, and can output placement guidance information that satisfies basic physical constraints.

[0044] Compared to methods that directly predict the absolute coordinates of components, this embodiment constructs a reference guiding constraint graph as a supervision signal, achieving a structured translation of expert experience. Specifically, the coordinate distribution of the model output from direct coordinate supervision has a significantly lower degree of consistency with the expert layout and cannot explain the engineering basis of the layout decisions; while the relative orientation relationships of the model output from guiding constraint graph supervision are highly consistent with the graph structure of the expert layout. More importantly, this intermediate representation makes the model output interpretable, allowing engineers to understand "why inductors and capacitors need to be close" based on the edge weight attributes, providing an operational basis for subsequent manual intervention and model debugging.

[0045] Step S40: Input the circuit design data and design rule information into the first stage model to generate multiple candidate guiding constraint diagrams, and drive the placement actuators based on the multiple candidate guiding constraint diagrams to obtain multiple placement results; The circuit design data and design rule information are input into the first-stage model to generate multiple candidate guiding constraint maps. Based on these candidate guiding constraint maps, the placement actuators are driven to obtain multiple placement results. The core of this step is to leverage the diversity of model generation to produce different styles of guiding schemes, and to verify the physical feasibility of these guiding schemes through the placement actuators.

[0046] In the implementation process, the same circuit design data and design rule information need to be input into the first-stage model multiple times. Each time, the diversity of the output is controlled by adjusting the random sampling strategy or temperature parameter in the model decoding stage. The temperature parameter controls the smoothness of the output probability distribution; higher temperature values ​​result in a more uniform probability distribution and increased diversity of sampling results, while lower temperature values ​​result in a sharper probability distribution and more concentrated sampling results in high-probability regions. Random sampling strategies include top-k sampling and top-p sampling. Top-k sampling samples only from the k tokens with the highest probabilities, while top-p sampling samples from the set of tokens with a cumulative probability of p.

[0047] Through multiple samplings, the system obtains multiple candidate boot constraint maps. These candidate boot constraint maps differ in topology and attribute weights. For example, some candidate maps tend to cluster strongly correlated components, some emphasize the linearity of signal flow, and others prioritize the compactness of power supply loops. This diversity of candidate maps reflects the trade-offs between different engineering preferences, providing a rich selection space for subsequent preference alignment.

[0048] After generating candidate guiding constraint maps, the system inputs each candidate map into the placement actuator. The placement actuator is an algorithm module that converts the guiding constraint map into specific layout coordinates. It receives the relative placement relationships in the guiding constraint map as soft constraints, and combines them with hard constraints such as board outlines and forbidden zones to determine the final coordinates and orientation of each component by solving an optimization problem. The output of the placement actuator includes a list of components, the center point coordinates of each component, its rotation angle, and the board layer to which it belongs.

[0049] For multiple candidate guidance constraint maps corresponding to the same training input, the placement executor outputs multiple placement results. These placement results exhibit different layout styles due to the differences in the guidance constraint maps; some layouts are compact and dense, some are regular and orderly, and some prioritize the linearity of critical links. Multiple placement results together constitute a candidate set, providing a basis for subsequent automatic evaluation and intra-group relative ranking. This step realizes the transformation from abstract guidance maps to specific layout coordinates, turning guidance constraint maps that were originally not directly comparable into placement results that can be quantified and evaluated.

[0050] Compared to solutions that directly output a single coordinate result, this embodiment achieves decoupling between diverse layout exploration and physical feasibility by combining multiple candidate guided constraint maps with an actuator placement mechanism. Direct coordinate solutions cannot flexibly adapt to different engineering preferences (such as prioritizing compactness or signal flow), and the output coordinates may violate hard constraints such as no-layout zones. In contrast, this solution generates multiple candidate maps by adjusting temperature parameters, which, after conversion by the actuator placement, ensures a very high compliance rate with hard constraints. Furthermore, it provides 3-5 different feasible layout styles for the same test case, allowing engineers to flexibly choose according to project priorities, significantly improving the coverage of the design space.

[0051] Step S50: Automatically evaluate the multiple placement results to obtain multiple automatic evaluation indicators; Multiple placement results are automatically evaluated to obtain several automatic evaluation metrics. The purpose of automatic evaluation is to quantitatively assess the quality of different placement results, providing a basis for subsequent relative ranking within groups. The evaluation metrics cover multiple dimensions of layout quality, including electrical performance, manufacturability, and engineering preferences.

[0052] In the specific implementation process, the first step is to define a set of evaluation metrics. The line length trend metric measures the friendliness of the layout to subsequent routing. The calculation method is to traverse all electrical networks, construct a minimum spanning tree for the component pins in each network, and calculate the sum of the edge lengths of the minimum spanning tree. The smaller the total line length, the more beneficial the layout is for shortening routing length. The network intersection or congestion trend metric assesses the uniformity of space utilization in the layout area. The calculation method is to divide the area into grids, calculate the component density in each grid, and calculate the standard deviation of the density. The smaller the standard deviation, the more uniform the layout and the lower the congestion risk. Hard constraint violation statistics include whether components exceed the board frame boundary, whether they overlap with no-route areas, whether they overlap with other components, and whether the rotation angle is within the allowable range. These violations are counted individually or weighted by severity.

[0053] In addition to the basic metrics mentioned above, the system can optionally introduce post-route evaluation metrics. Post-route evaluation requires calling the autorouter to perform actual routing based on the placement results, and to count the total actual trace length, number of vias, and number of unrouted networks after routing is completed. Post-route evaluation better reflects the impact of layout quality on final manufacturability, but it has a higher computational cost and can be selectively enabled according to actual needs.

[0054] During the evaluation process, the system iterates through the multiple placement results generated in step S40, calculating the aforementioned metrics for each result sequentially. For the line length trend metric, the system needs to parse the netlist information, identify the pins contained in each electrical network, and calculate the minimum spanning tree edge length of the network based on the pin coordinates. For the network intersection trend metric, the system needs to divide the PCB board surface into a uniform grid, count the number of components falling into each grid, and calculate the statistical distribution of the grid density. For hard constraint violation statistics, the system needs to perform geometric collision detection to determine whether there is overlap between components, whether components are inside the board outline, and whether they intersect with no-load areas.

[0055] After evaluating all placement results, the system outputs multiple automatic evaluation metric vectors, each corresponding to a placement result and including dimensions such as line length trend value, congestion trend value, and violation count. These evaluation metrics provide a quantitative basis for subsequent intra-group relative ranking, enabling the executability of different guided constraint graphs to be compared on the same scale.

[0056] Step S60: Based on the automatic evaluation index, the candidate guidance constraint maps are sorted relative within the group, and the parameters of the first stage model are updated according to the sorting results, and an update magnitude constraint is applied during the parameter update process. Multiple candidate guiding constraint graphs are ranked relative within their respective groups based on automatic evaluation metrics. The parameters of the first-stage model are then updated according to the ranking results, with update magnitude constraints applied during the parameter update process. The core of this step lies in optimizing model parameters through relative comparison rather than absolute scoring, effectively avoiding inconsistencies in metric scales caused by different plate sizes.

[0057] In the specific implementation process, the evaluation metrics within the candidate set corresponding to the same training input first need to be normalized. The purpose of normalization is to eliminate the differences in dimensions between different metrics and the differences in absolute values ​​caused by different board sizes. Taking the line length trend metric as an example, the absolute value of the line length of a large PCB board is necessarily greater than that of a small PCB board. However, the relative ranking within a group focuses on the relative merits of different candidates under the same design. Therefore, min-max normalization can be used to map the metric value to the interval between 0 and 1, or z-score normalization can be used to calculate the relative position of the metric value within the group.

[0058] After normalization, the system establishes total or partial order relationships within the candidate set based on the comprehensive performance across multiple evaluation dimensions. The comprehensive performance can be calculated using a weighted summation method, assigning weights to different indicators according to engineering preferences; for example, a weight of 0.3 for line length trend indicators, 0.2 for congestion trend indicators, and 0.5 for hard constraint violations. The weighted summation yields a comprehensive score for each candidate, and a total order relationship is established based on these scores. Alternatively, a Pareto dominance relationship can be used to establish a partial order relationship; a dominance relationship is formed if one candidate is not inferior to another candidate in all indicators and is strictly superior in at least one indicator.

[0059] After obtaining the relative ranking results within the group, the system constructs a preference loss function. The goal of the preference loss function is to increase the generation probability of guided constraint graphs for higher-ranked candidates and decrease the generation probability of guided constraint graphs for lower-ranked candidates. Specifically, a pairwise ranking loss can be used: for a higher-ranked candidate A and a lower-ranked candidate B, the difference between the probability of generating A and the probability of generating B is calculated, and the model is optimized by maximizing this difference. Alternatively, a list-based ranking loss can be used to directly optimize the ranking quality of the entire candidate list.

[0060] During parameter updates, the system introduces an update magnitude constraint mechanism. This constraint is implemented using a reference model. Before starting the second phase of training, the current first-phase model is saved as the reference model. During each parameter update, the distribution difference between the current model and the reference model is calculated, for example, the KL divergence of the output probability distributions of the two models. This distribution difference is added as a regularization term to the preference loss function, ensuring that parameter updates improve preferences without deviating too far from the reference model. The update magnitude constraint effectively prevents model distribution drift, maintains the model's basic generative capabilities, and steadily guides the model towards engineering preferences. Through multiple iterations, the model gradually learns to generate guiding constraint graphs that better align with engineering preferences.

[0061] Compared to directly using absolute values ​​of metrics such as line length and congestion as supervisory signals (absolute scoring training), the "intra-group relative ranking" strategy effectively solves the problems of inconsistent metric scales and difficulties in quantifying preferences. Experimental comparisons show that the model trained with absolute scoring is dominated by large-size PCB samples in its loss value, leading to a significant decrease in layout quality for small-size boards. In contrast, the preference loss based on intra-group relative ranking, focusing on the relative merits of candidate solutions under the same design, naturally eliminates the influence of board size. Furthermore, in engineering preference compliance tests, the layout generated by this approach shows a significantly higher similarity to the results manually adjusted by experts compared to the absolute scoring scheme, demonstrating that relative ranking better aligns with the selection logic in actual engineering.

[0062] Furthermore, compared to the unconstrained model fine-tuning scheme, the "update magnitude constraint" (referencing the KL divergence regularization of the model) introduced in this embodiment effectively prevents distribution drift of the model in the second-stage optimization. A control experiment was set up: one group was not subject to any constraints during the second-stage optimization, while the other group was constrained according to this scheme. The results show that after continuous optimization, the effective proportion of the guided constraint graph generated by the unconstrained group in the first stage model significantly decreased, exhibiting severe catastrophic forgetting; while the constrained model, while achieving a significant improvement in preference indicators, maintained a stable effective proportion of the generated graph, verifying the balancing role of the update magnitude constraint in maintaining basic generation capabilities and alignment engineering preferences.

[0063] Step S70: Perform regression verification and quality gate on the updated first-stage model, and output a domain-specific model or parameter adapter based on the execution results.

[0064] In this embodiment, regression validation and quality gating are performed on the updated first-stage model, and a deployable domain-specific model or parameter adapter is output based on the execution results. This step is the final stage of the training process, ensuring the quality controllability and engineering usability of the released model, and avoiding unforeseen performance degradation caused by model updates.

[0065] In the specific implementation process, the first step is to construct a fixed regression benchmark set. This set selects representative PCB design samples, covering typical scenarios with different board sizes, component counts, and network complexities. Each benchmark sample contains complete circuit design data, design rule information, and corresponding expert placement data. The regression benchmark set is independent of the training and validation sets and is used to objectively evaluate the changing trends of model performance.

[0066] During regression validation, the system infers the updated model on the fixed regression benchmark set, generating a guided constraint graph for each benchmark sample, and then drives the placement executor to obtain the placement result. For each benchmark sample, the placement success rate, violation rate, and key indicator distribution fluctuation are calculated. The placement success rate represents the proportion of times the model can successfully generate a valid guided constraint graph; the violation rate represents the number of times the design rules are violated in the generated placement result; and the key indicator distribution fluctuation is used to evaluate the stability of the model output, such as the standard deviation of the placement results obtained from multiple inferences on the long-term trend indicator.

[0067] The quality gate assessment is based on preset threshold conditions. The placement success rate must be greater than or equal to 95%, the violation rate must be less than 0.5 times per 100 devices, and the fluctuation of key indicators must be controlled within 5%. When the regression validation results simultaneously meet the above conditions, the quality gate is passed, and the release of a new model version is allowed. If the regression validation results fail the quality gate, the system triggers a rollback mechanism, discarding the model parameters obtained from this training and reverting to the previous stable version. Simultaneously, the problematic samples and validation results from this training are recorded for subsequent analysis and improvement.

[0068] For models that pass the quality gate, the system outputs different product formats based on deployment requirements. If the deployment environment allows loading the complete model, the system outputs a domain-specific model with all weight parameters. If the deployment environment has storage limitations, the system outputs a parameter adapter, saving only the variations relative to the base model, such as LoRA adapter weights. Parameter adapters can be used in conjunction with the base model to significantly reduce deployment size.

[0069] After the model is output, the system records the model version, data version, rule version, and the associated information of the evaluation results, forming a complete version release record. These records facilitate subsequent auditing and traceability, and allow for accurate rollback to a specific version when problems are discovered, supporting version management and continuous iteration requirements for enterprise-level deployments.

[0070] Furthermore, you can also view Figure 2 , Figure 2 This is a detailed process diagram based on step S20 in the first embodiment. Figure 2The step of extracting the reference guidance constraint graph from the expert placement data includes S21-22: Step S21: Analyze the relative placement relationship between devices or modules in the expert placement data, and extract the placement guidance relationship from the analysis result. The placement guidance relationship includes at least one of relative orientation, relative distance or relative direction. Step S22: Configure guidance importance weights for the placement guidance relationship based on the engineering preference intensity, and map the placement guidance relationship and the guidance importance weights to a preset graph structure to generate a reference guidance constraint graph. The reference guidance constraint graph includes node attributes, edge attributes, and importance labels.

[0071] This embodiment is a specific implementation of extracting reference-guided constraint diagrams from expert placement data. This process transforms implicit engineering experience and layout preferences into explicit, structured graphical representations.

[0072] First, the system analyzes the relative placement relationships between components or modules in the expert placement data. During implementation, the system traverses the completed PCB design file, identifying all placed component instances. For each pair of electrically connected components, the system calculates their spatial relative parameters. Relative orientation is obtained by calculating the direction angle of the line connecting the center points of the two components. The direction angle is based on the PCB coordinate system and is usually expressed in degrees; for example, component A is at a 45-degree angle relative to component B. Relative distance is obtained by calculating the Euclidean distance between the center points of the two components, with the distance value expressed in millimeters or mils, reflecting the actual spacing between the two components on the board. Relative orientation is obtained by comparing the rotation angles of the two components. If component A has a rotation angle of 0 degrees and component B has a rotation angle of 90 degrees, the relative orientation is 90 degrees. These relative placement parameters reflect the spatial organization logic followed by the engineer during the placement process, such as placing strongly related components close together and maintaining a consistent orientation.

[0073] In addition to component pairs that are electrically connected, the system can also optionally analyze component pairs that are not directly electrically connected but have functional relationships. For example, components belonging to the same functional module may not be directly connected by the network but need to be placed together. The system identifies such relationships based on the module identifier and extracts the relative placement relationship parameters.

[0074] The system assigns importance weights to placement relationships based on engineering preference strength. Engineering preference strength reflects the criticality of a specific placement relationship in actual design, and the weight allocation is determined based on a combination of factors. The system first statistically analyzes the frequency of the same type of placement relationship in historical expert samples. Higher frequency indicates that the placement relationship is more commonly used by engineers, thus assigning it a higher importance weight. For example, in a large number of power supply design samples, inductors and capacitors are always placed adjacent to each other; this placement relationship has a high frequency statistical value, and the system assigns it an importance weight of 0.9. For resistor-capacitor pairs in general signal networks, the placement relationship has some flexibility, with a medium frequency statistical value, and the system assigns an importance weight of 0.6. For components with only weak electrical connections, the placement relationship varies greatly, with a low frequency statistical value, and the system assigns an importance weight of 0.3.

[0075] In addition to frequency statistics, the system also refers to the mandatory requirements and recommended clauses in the design rule manual. If the design rules explicitly stipulate that a certain type of component must meet specific spacing or orientation requirements, the system assigns a mandatory high weight to the corresponding placement relationship, such as 0.99 or 1.0. Recommended clauses in the design rules are assigned a medium to high weight.

[0076] After weight configuration, the system maps placement guidance relationships and guidance importance weights to a preset graph structure. The preset graph structure can be either directed or undirected. Nodes represent components or functional modules, with attributes including component type identifier, package size, pin count, and the functional module they belong to. Edges represent placement guidance relationships between components, with attributes including relative orientation vector, relative distance value, relative orientation angle, and guidance importance weight. Importance weights are attached to edges as labels, for example, floating-point numbers between 0 and 1. Through this mapping, the original expert placement data is transformed into a structured reference guidance constraint graph. This graph fully preserves the spatial organization logic and engineering preference strength in the expert placement, providing high-quality labeled data for subsequent supervised training.

[0077] You can also view Figure 3 , Figure 3 This is a detailed process diagram based on step S30 in the first embodiment. Figure 3 The step of performing first-stage supervised training on the basic large model based on the supervised training samples to obtain the first-stage model includes S31~34: Step S31: Input the supervised training samples into the basic large model to obtain the prediction guidance constraint graph; Step S32: Calculate the structural similarity measure between the predicted guidance constraint graph and the reference guidance constraint graph using graph feature extraction or graph representation learning strategies; Step S33: Construct a joint loss function using the structural similarity metric and the preset auxiliary training signal, and update the basic large model parameters based on the joint loss function.

[0078] This embodiment is a specific implementation of the first stage of supervised training. This process enables the basic large model to generate reference guiding constraint graphs through supervised learning.

[0079] Supervised training samples are input into the base model to obtain the prediction guidance constraint graph. In practice, the supervised training samples include circuit design data, design rule information, and the corresponding reference guidance constraint graph. The netlist information in the circuit design data is serialized into natural language descriptions, listing the component pins of each network according to network groups; for example, network VCC includes pin 1 of component A, pin 3 of component B, and pin 5 of component C. Component information is also serialized, listing the type, package, number of pins, and functional attributes of each component. The board outline dimensions, forbidden zone coordinates, and allowed rotation angle set in the design rule information are also converted into text descriptions. These text descriptions are converted into token sequences by the tokenizer of the base model and input into the encoder part of the model.

[0080] The basic model employs a Transformer architecture. The encoder converts the input token sequence into a high-dimensional hidden layer representation, and the decoder progressively generates the output sequence based on this hidden layer representation. The output sequence is encoded into a graph structure according to a predefined format. First, a list of nodes is output, with each node corresponding to a component and including its index and attributes. Then, a list of edges is output, with each edge corresponding to a pair of component placement guidance relationships, including the source node index, target node index, and edge attributes. The relative orientation and relative distance in the edge attributes are output numerically, while the importance weights are output as floating-point numbers between 0 and 1. During the generation process, the model utilizes a self-attention mechanism to capture long-range dependencies between components, ensuring that the output guidance constraint graph maintains consistency and rationality in its overall structure.

[0081] The structural similarity metric between the predicted guiding constraint graph and the reference guiding constraint graph is calculated using graph feature extraction or graph representation learning strategies. Graph feature extraction methods first map both graphs into feature vectors, then calculate the similarity between the vectors. Specifically, the system uses a graph kernel function to calculate the similarity between the two graphs. The graph kernel function calculates similarity by comparing the structures of all possible subgraphs in the two graphs. Subgraphs can be paths, trees, or any connected subgraphs. The output value of the graph kernel function is between 0 and 1; the closer the value is to 1, the more similar the structures of the two graphs. Graph representation learning methods use graph neural networks to aggregate neighborhood information for each node to generate graph-level embedding vectors. For example, a graph isomorphic network (GIN) or a graph attention network (GAT) can be used. The predicted guiding constraint graph and the reference guiding constraint graph are input into the graph neural network to obtain two fixed-dimensional graph embedding vectors. Then, the cosine similarity between the two vectors is calculated as the structural similarity metric. The structural similarity metric compares not only the topological similarity between the two graphs but also the similarity of edge attributes, such as the consistency of relative orientation vectors and the closeness of importance weights.

[0082] A joint loss function is constructed using structural similarity metrics and pre-set auxiliary training signals, and the parameters of the base model are updated based on this joint loss function. The pre-set auxiliary training signals originate from the automatic evaluation module. The system inputs the predicted guided constraint graph into the placement executor to generate temporary placement results. For these temporary placement results, line length trend indices, network crossover indices, and hard constraint violation statistics are calculated. The line length trend index calculates the total side length by constructing the minimum spanning tree of the network; a smaller side length indicates a more favorable layout for subsequent routing. The network crossover indices are calculated by dividing the grid and statistically analyzing the standard deviation of the density distribution. Hard constraint violation statistics include component overlap counts, boundary crossing counts, and illegal rotation angle counts. These indices are transformed to form auxiliary loss values; a smaller auxiliary loss value indicates better executability of the predicted guided constraint graph.

[0083] The joint loss function is a weighted combination of structural similarity loss and auxiliary loss. The structural similarity loss is defined as 1 minus the structural similarity metric, which encourages the model to generate predicted graphs that are structurally similar to the reference graph. The auxiliary loss encourages the model to generate predicted graphs with good executability. The weights of the two losses are dynamically adjusted based on performance on the validation set. For example, initially, the structural similarity loss weight is 0.7 and the auxiliary loss weight is 0.3. As training progresses, the structural similarity loss weight is gradually reduced to 0.5, while the auxiliary loss weight is increased to 0.5, allowing the model to gradually improve the executability of the generated results while mimicking expert samples.

[0084] Based on the joint loss function, the system calculates gradients and updates the parameters of the base model using the backpropagation algorithm. The update process employs the AdamW optimizer with a learning rate of 5e-5 and a batch size of 8. Training lasts for multiple epochs. After each epoch, structural similarity and auxiliary metrics are evaluated on the validation set. Training stops when the joint loss on the validation set no longer decreases for three consecutive epochs, and the first-stage model parameters are saved. Through this first-stage training, the model learns to generate guided constraint graphs that are structurally and attribute-similar to expert samples from circuit design data and design rule information, laying a solid foundation for the second-stage preference alignment training.

[0085] You can also view Figure 4 , Figure 4 This is a detailed process diagram based on step S40 in the first embodiment. Figure 4 The step of inputting the circuit design data and design rule information into the first-stage model to generate multiple candidate guiding constraint diagrams includes S41-44: Step S41: Input the circuit design data and design rule information of the same PCB into the first stage model, and perform decoding operation through the first stage model; Step S42: In the decoding stage, adjust the random sampling strategy or temperature parameter of the model in the first stage. Step S43: Output multiple candidate guiding constraint graphs based on the adjustment results. There are differences in topological structure or attribute weights among the multiple candidate guiding constraint graphs.

[0086] This embodiment is a specific implementation of generating multiple candidate guidance constraint graphs in step S40. This process generates diverse guidance schemes by controlling the randomness of the model decoding stage, providing a rich set of candidates for subsequent intra-group relative ranking.

[0087] The circuit design data and design rule information of the same PCB are input into the first-stage model and decoded through the first-stage model. In the specific implementation process, the circuit design data and design rule information obtained in step S10 are first serialized. The netlist information in the circuit design data is converted into a structured text description, listing the component pin identifiers contained in each net in order of grouping by net name. For example, net VCC connects to pin 1 of element A, pin 3 of element B, and pin 5 of element C, and net GND connects to pin 2 of element A, pin 4 of element B, and pin 6 of element C. The component information is also converted into a text description, listing the type, package size, number of pins, and functional attributes of each component. The board outline dimensions in the design rule information are described in the form of a coordinate point sequence, the forbidden zone is described in the form of polygon vertex coordinates, and the set of allowed rotation angles is described in the form of an angle value list.

[0088] After serialization, the system inputs the aforementioned text description into the encoder of the first-stage model. The encoder consists of multiple stacked Transformer modules, each containing a self-attention mechanism and a feedforward neural network. The self-attention mechanism enables the model to capture dependencies between different positions in the input sequence. For example, different pin information of the same component in the netlist can be correlated, and board outline information and component size information can be spatially correlated. The encoder output is a sequence of hidden layer representation vectors corresponding to the input sequence, with each token position corresponding to a high-dimensional vector. These vectors carry the semantic and structural information of the input data.

[0089] The decoding operation generates output content step by step based on the hidden layer representation sequence output by the encoder. The decoder also adopts a Transformer structure, generating an output token at each step. The decoding process starts with a special start symbol and predicts the next most likely token based on the generated token sequence and the hidden layer representation output by the encoder. When generating the bootstrap constraint graph, the decoder first outputs node information, including the number of nodes, the type label of each node, and attribute values; then it outputs edge information, including the number of edges, the node index connected by each edge, and the attribute values ​​of the edges, such as relative orientation angle, relative distance value, and importance weight. The decoder continues to generate until it outputs a special end symbol, completing the generation of a candidate bootstrap constraint graph.

[0090] During the decoding phase, the random sampling strategy or temperature parameter of the first-stage model is adjusted. The random sampling strategy and temperature parameter are key factors in controlling the diversity of the generated results. By adjusting these parameters, the model output can exhibit diverse characteristics while maintaining basic rationality.

[0091] The temperature parameter affects the probability distribution of the model's output. During each decoding step, the model calculates the probability of all possible tokens. These raw probabilities are normalized using the softmax function to form a probability distribution. The temperature parameter adjusts the logits before the softmax calculation; specifically, the formula is p_i equals the softmax function applied to logits_i divided by the temperature parameter T. When the temperature parameter T is set to a higher value, such as 1.5, the probability distribution becomes smoother, giving tokens with lower probabilities a relatively higher sampling opportunity, increasing the diversity of the generated results. When the temperature parameter T is set to a lower value, such as 0.5, the probability distribution becomes sharper, highlighting the advantage of high-probability tokens, and the generated results are more inclined towards the choices the model deems most likely. The system uses different temperature parameter values ​​in multiple generation processes; for example, the first generation uses a temperature of 0.8, the second uses 1.2, and the third uses 1.5, thus obtaining diverse output results.

[0092] Random sampling strategies include top-k sampling and top-p sampling. Top-k sampling retains only the k tokens with the highest probabilities at each step, resets the probabilities of other tokens to zero, re-normalizes them, and then randomly samples from these k tokens. A smaller k value results in a more concentrated sampling result with lower diversity; a larger k value results in a more dispersed sampling result with higher diversity. Top-p sampling, also known as kernel sampling, selects the smallest set of tokens whose cumulative probability reaches a threshold p at each step, re-normalizes the probabilities of these tokens, and then randomly samples. A p value closer to 1.0 results in higher sampling diversity; a smaller p value results in sampling concentrated in high-probability regions. The system can combine different sampling strategies and parameter values. For example, top-k sampling with k=50 can be used for some designs, while top-p sampling with p=0.9 can be used for other designs, further increasing the diversity of the generated results by switching strategies.

[0093] Based on the adjustment results, multiple candidate guided constraint maps are output, which differ in topological structure or attribute weights. The system repeatedly performs decoding operations on the same input data, using different temperature parameters or sampling strategies each time, resulting in multiple output results. These output results constitute a set of candidate guided constraint maps.

[0094] The differences in topology are reflected in the existence of edges. In some candidate graphs, the system may consider a strong association between component A and component B and generate a connecting edge; in other candidate graphs, the system may consider the association between component A and component C to be more important and generate a connecting edge; in still other candidate graphs, the system may generate two edges, AB and AC, but assign them different importance weights. These differences in topology reflect the model's different understandings of the strength of the association between components and demonstrate the possibility of different layout styles.

[0095] The differences in attribute weights are reflected in the numerical values ​​of edge attributes. In some candidate graphs, the system might assign an importance weight of 0.9 to edge AB, indicating a strong emphasis on placing these two components adjacent to each other; in other candidate graphs, the system might assign an importance weight of 0.6 to the same edge AB, indicating that some degree of placement freedom is allowed. The predicted values ​​for relative orientation and relative distance may also differ; some candidate graphs tend to arrange components in a straight line, while others tend to arrange them in an L-shape or a ring.

[0096] These diverse candidate guidance constraint maps collectively form a candidate set. The system associates and stores each candidate map with its corresponding decoding parameter settings, recording the temperature values ​​and sampling strategies used during generation, facilitating subsequent analysis of the impact of different parameters on the generation results. After processing in steps S41 to S43, the system obtains multiple candidate guidance constraint maps with varying styles but all maintaining basic rationality. These candidate maps transform the input placement actuator into placement results, providing a rich selection space for subsequent automatic evaluation and relative ranking within groups.

[0097] You can also view Figure 5 , Figure 5 This is a detailed process diagram based on step S60 in the first embodiment. Figure 5 The step of ranking multiple candidate guidance constraint maps within a group according to the automatic evaluation index includes S61~S63: Step S61: Within the candidate set corresponding to the same training sample, normalize the automatic evaluation index of each candidate set. Step S62: Based on the comprehensive performance of each candidate guided constraint graph in the normalization processing result based on multiple evaluation dimensions, establish a total order relation or partial order relation within the candidate set; Step S63: The total order relation or partial order relation is used as the relative order within the group.

[0098] In this embodiment, the specific implementation of relative ranking of candidate guiding constraint graphs within a group based on automatic evaluation indicators is described. This process transforms multi-dimensional evaluation results into comparable ranking relationships through normalization and comprehensive performance evaluation.

[0099] Within the candidate set corresponding to the same training sample, the automatic evaluation metrics for each candidate are normalized. In the specific implementation, the system first obtains multiple automatic evaluation metrics calculated in step S50. Each candidate corresponds to a metric vector, containing multiple dimensions such as line length trend value, network crossover or congestion trend value, and hard constraint violation statistics. The line length trend value is in millimeters, and its magnitude is directly affected by the PCB board size; the absolute value of the line length on a large PCB board can reach hundreds of millimeters, while on a small PCB board it may only be tens of millimeters. The network crossover trend value is also affected by the board size and the number of components; the absolute values ​​between different designs lack direct comparability. Hard constraint violation statistics are in units of frequency, and the statistical results are also related to the design complexity.

[0100] To address the aforementioned scale differences, the system performs normalization within the same candidate set. For the line length trend index, the system identifies the minimum and maximum line length values ​​Lmin and Lmax in the candidate set. For each candidate's line length value L, the system calculates the normalized result L minus Lmin divided by Lmax minus Lmin, mapping the normalized line length index to the 0-1 range. A smaller value indicates a better line length trend. For the network crossover trend index, the system similarly identifies the minimum and maximum values ​​Cmin and Cmax within the set. For each candidate's crossover value C, the system calculates the normalized result C minus Cmin divided by Cmax minus Cmin. A smaller normalized value indicates better layout uniformity. For hard constraint violation statistics, the system performs weighted processing based on the violation type before normalization. For example, severe violations such as device overlap are weighted at 3, while general violations such as poor rotation angles are weighted at 1. The weighted sum is used to obtain the violation score, which is then normalized using min-max normalization.

[0101] Normalization eliminates absolute scale differences between different designs, allowing metrics within the same candidate set to be compared under a unified dimension. This intra-group normalization mechanism ensures that subsequent ranking is unaffected by board size and the number of components, focusing only on the relative merits of different candidates within the same design.

[0102] Based on the comprehensive performance of each candidate guided constraint graph in the normalized processing results across multiple evaluation dimensions, a total order or partial order relation is established within the candidate set. The system first needs to determine the calculation method for the comprehensive performance of multiple evaluation dimensions. A weighted summation method can be used to merge multi-dimensional indicators into a single comprehensive score. Weight allocation reflects the priority of engineering preferences; for example, hard constraint violations are the most to be avoided and are assigned a weight of 0.6, line length trends are the optimization objective and are assigned a weight of 0.3, and network cross-trends are an auxiliary reference and are assigned a weight of 0.1. The comprehensive score of each candidate is equal to the sum of the products of the normalized indicators of each dimension and their corresponding weights; a lower comprehensive score indicates a higher candidate quality.

[0103] Based on the comprehensive score, a total order relation can be established within the candidate set, sorting all candidates in ascending order of their comprehensive scores. The candidate with the lowest score is ranked first, indicating the best candidate, while the candidate with the highest score is ranked last, indicating the worst candidate. The total order relation provides a clear ranking basis for the subsequent construction of the preference loss function and can be directly used to calculate the pairwise ranking loss.

[0104] Besides total order relations, the system can also establish partial order relations. Partial order relations are based on the Pareto dominance concept. A dominance relationship exists if one candidate is not inferior to another candidate in all evaluation dimensions and is strictly superior in at least one dimension. For example, if candidate A's line length metric of 0.2 is superior to candidate B's 0.3, its crossover metric of 0.4 is also superior to candidate B's 0.5, and its violation metric of 0.1 is the same as candidate B's 0.1, then candidate A dominates candidate B. Partial order relations do not require all candidates to be comparable; they only retain explicit dominance relationships, and candidates that do not dominate each other are considered incomparable. Partial order relations are more in line with the essence of multi-objective optimization and avoid the subjectivity introduced by weight allocation.

[0105] The total or partial order relation is used as the output of the intra-group relative ranking. The system stores the ranking results in association with the candidate guiding constraint graph, with each candidate recording its ranking position within the set or the candidate list it governs. The intra-group relative ranking results provide a supervision signal for the subsequent construction of the preference loss function. Candidates ranked higher are considered positive samples, and candidates ranked lower are considered negative samples. The model needs to learn to increase the probability of generating positive samples while decreasing the probability of generating negative samples. This ranking mechanism based on intra-group comparison avoids the scale inconsistency problem caused by absolute scoring, enabling the model to share learned preference knowledge across different designs.

[0106] You can also view Figure 6 , Figure 6 This is a schematic diagram of another detailed process based on step S60 in the first embodiment. Figure 6 The steps of updating the parameters of the first-stage model according to the sorting results and applying update magnitude constraints during the parameter update process include S64~S65: Step S64: Construct a preference loss function based on the ranking result of the relative ranking within the group. The preference loss function increases the generation probability of candidate guided constraint graphs with higher ranking and decreases the generation probability of candidate guided constraint graphs with lower ranking. Step S65: Calculate the distribution difference between the first stage model and the preset reference model, and add the distribution difference as a regularization term to the preference loss function to constrain the parameter change magnitude of the first stage model in a single update through joint optimization.

[0107] In this embodiment, the specific implementation of updating the parameters of the first-stage model and applying update magnitude constraints based on the ranking results is achieved through the preference loss function and regularization constraints to achieve stable optimization of the model towards engineering preferences.

[0108] A preference loss function is constructed based on the ranking results of the relative ranking within the group. This preference loss function increases the generation probability of candidate guided constraint graphs with higher rankings and decreases the generation probability of candidate guided constraint graphs with lower rankings. In the specific implementation process, the system first obtains the relative ranking results of the group output in step S63. For total order relations, a clear ranking list can be obtained, and for partial order relations, a list of dominant pairs can be obtained.

[0109] When constructing the preference loss function based on total order relations, the system employs list ranking loss, such as the ListNet loss function. For a set containing K candidates, the model calculates the generation probability for each candidate. The generation probability is obtained by the model's cumulative log probability of the candidate output sequence during decoding. The list ranking loss calculates the difference between the candidate ranking predicted by the model and the target ranking, optimizing the model's output probability distribution to align with the target ranking. In specific implementation, the system converts the target ranking into a probability distribution, assigning the highest probability to the first-ranked candidate and the lowest probability to the last-ranked candidate, with probability values ​​decaying exponentially according to ranking. The list ranking loss uses cross-entropy to make the model's predicted probability distribution approximate the target probability distribution.

[0110] When constructing the preference loss function based on partial order relations, the system employs pairwise ranking loss. For each dominance pair where candidate i dominates candidate j, the system calculates the generation probability pi of candidate i and the generation probability pj of candidate j. The pairwise ranking loss is defined as a negative logarithmic function acting on a sigmoid function acting on pi minus pj, aiming to maximize the difference between pi and pj to make the model tend to generate candidates of higher quality. The system iterates through the cumulative loss values ​​of all dominance pairs to obtain the overall pairwise ranking loss.

[0111] The optimization direction of the preference loss function is to increase the probability of generating high-quality candidates and decrease the probability of generating low-quality candidates. This ranking-based optimization method guides the model to learn engineering preferences, causing the model to gradually tend to generate guiding constraint graphs that perform better in automatic evaluation.

[0112] The distributional difference between the first-stage model and the preset reference model is calculated, and this difference is added as a regularization term to the preference loss function. Joint optimization constrains the parameter change magnitude of the first-stage model in a single update. The preset reference model is a copy of the first-stage model saved before the start of the second-stage training, and its parameters are frozen during training.

[0113] The distribution difference can be calculated using KL divergence or JS divergence. The system inputs the same input to both the current model and the reference model, obtaining the probability distributions output by the two models. For each decoding step in generating the guided constraint graph, the model outputs a token probability distribution. KL divergence is used to calculate the difference between the two probability distributions, and the total distribution difference is obtained by summing the KL divergences over all decoding steps. A larger distribution difference indicates a greater deviation of the current model from the reference model.

[0114] The distribution difference is added as a regularization term to the preference loss function to form a joint loss function. The joint loss function equals the preference loss plus λ multiplied by the distribution difference, where λ is the regularization strength coefficient, typically set between 0.1 and 0.5. Joint optimization simultaneously optimizes the preference objective and the regularization objective through backpropagation, ensuring that the model improves preferences without deviating too far from the reference model.

[0115] This update magnitude constraint mechanism plays several important roles. First, it prevents model distribution drift, avoiding the loss of the basic generative capabilities learned in the first stage while pursuing preferences. Second, it improves training stability; the limited parameter change magnitude in a single update makes the loss function descent process smoother. Finally, it supports continuous learning, allowing the model to steadily optimize towards the preferred direction over multiple iterations, gradually accumulating improvements without drastic oscillations.

[0116] Through the above processing, the system completed the core parameter update stage of the second phase of preference alignment training. The updated model, while maintaining its basic generation capabilities, gradually learns a guided constraint graph generation strategy that is more in line with engineering preferences.

[0117] You can also view Figure 7 , Figure 7 This is a detailed process diagram based on step S70 in the first embodiment. Figure 7 The steps for performing regression validation and quality gates on the updated first-stage model, and outputting a domain-specific model or parameter adapter based on the execution results, include S71~73: Step S71: Perform inference on the fixed regression benchmark set using the updated first-stage model, and generate a regression verification guidance constraint graph based on the inference results; Step S72: Based on the regression verification guidance constraint graph, drive the placement executor to obtain the regression verification placement result, and calculate the quality parameter set of the regression verification placement result. The quality parameter set includes the placement success rate, violation rate, and key indicator distribution fluctuation. Step S73: The judgment result of the set of quality parameters and the preset quality judgment conditions is taken as the execution result.

[0118] In this embodiment, regression verification and quality gates are performed on the updated first-stage model, and the specific implementation of the domain-specific model or parameter adapter is output based on the execution results. This process ensures the quality controllability and engineering usability of the released model through the verification of the solidified benchmark set.

[0119] The updated first-stage model is inferred on the solidified regression benchmark set, and a regression validation guidance constraint graph is generated based on the inference results. The solidified regression benchmark set is a validation dataset independently constructed during the data acquisition phase in step S10. This set is completely isolated from the training and validation sets and is used to objectively evaluate the changing trends of model performance. The construction of the solidified regression benchmark set follows strict selection criteria, selecting representative PCB design samples covering different board sizes from micro-modules to large backplanes, different numbers of components from dozens to thousands, and different network complexities from simple power networks to high-speed signal networks. Each benchmark sample contains complete circuit design data, design rule information, and corresponding expert placement data. This data remains unchanged throughout the entire lifecycle of model training, ensuring the comparability of regression validation results.

[0120] In the specific implementation process, the system loads the updated first-stage model parameters and sequentially inputs the circuit design data and design rule information from the solidified regression benchmark set into the model. The model performs forward inference and outputs a corresponding guiding constraint graph for each benchmark sample. The inference process is similar to the generation process in step S40, but to ensure the determinism of the results, the regression verification uses fixed decoding parameters, typically setting the temperature parameter to a low value such as 0.6 and employing a greedy sampling strategy to make the model output the most deterministic result. For each benchmark sample, the system records the regression verification guiding constraint graph generated by the model, including a list of nodes, a list of edges, and attribute values ​​for each edge, such as relative orientation, relative distance, and importance weight. These regression verification guiding constraint graphs will be used for subsequent actuator placement and mass parameter calculation.

[0121] The system uses a regression verification guided constraint graph to drive the placement actuator, obtaining regression verification placement results. It then calculates a set of quality parameters for these results, including placement success rate, violation rate, and key indicator distribution fluctuations. The system inputs each regression verification guided constraint graph generated in step S71 into the placement actuator. Based on the relative placement relationships and importance weights in the guided constraint graphs, and combined with hard constraints such as board frame dimensions and no-fit zones, the placement actuator solves for the final coordinates and rotation angle of each component. The output of the placement actuator is the regression verification placement result, including the center point coordinates, rotation angle, and board layer of each component.

[0122] After all benchmark samples have been placed, the system begins calculating the quality parameter set. The placement success rate reflects the proportion of models that can successfully generate valid guided constraint maps. The statistical method involves iterating through all benchmark samples, recording the number of samples where the model successfully outputs guided constraint maps that meet the format requirements and the placement executor can successfully solve for valid coordinates, and dividing this number by the total number of benchmark samples to obtain the placement success rate. A placement success rate lower than the expected value indicates that the model has problems with generating or generating unsolvable guided maps.

[0123] The violation rate reflects the degree to which the placement result violates design rules. The statistical method involves performing a geometric check on the placement result of each benchmark sample, detecting whether components exceed board boundaries, overlap with no-fly zones, overlap with other components, and whether rotation angles are within allowable ranges. Each violation is recorded as a violation event. The violation rate is obtained by dividing the total number of violation events across all samples by the total number of components in all samples. The violation rate is typically expressed as the number of violations per 100 components. A lower violation rate indicates better manufacturability of the generated result.

[0124] The distribution volatility of key metrics is used to evaluate the stability of the model output. The statistical method involves running inference multiple times on the same baseline sample to obtain multiple placement results, calculating the standard deviation of the line length trend metric, the standard deviation of the network crossover trend metric, and the degree of difference in the importance weight distribution. Smaller distribution volatility indicates more stable model output, which is crucial for engineering deployment, as an unstable model can lead to unpredictable design results. The system also calculates the coefficient of variation of key metrics across different baseline samples to evaluate the model's generalization stability across different design types.

[0125] The system uses the results of comparing the set of quality parameters with preset quality judgment conditions as the execution result. The preset quality judgment conditions are thresholds set based on engineering experience, including a placement success rate of no less than 98%, a violation rate of no more than 0.2% per 100 components, and key indicator distribution fluctuations controlled within 5%. The system compares the calculated actual set of quality parameters with these thresholds one by one, and determines that the quality gate has been passed when all indicators meet the conditions.

[0126] If the evaluation result is satisfactory, the system executes the model release process, converting the updated first-stage model into a deployable format. The output format is selected based on the resource constraints of the deployment environment. For resource-sufficient servers, a domain-specific model with all weight parameters is output; for resource-constrained edge devices, a parameter adapter, such as a LoRA adapter, is output. The adapter only stores the changes relative to the base model, reducing its size to less than one percent of the original. If the evaluation result is unsatisfactory, the system triggers a rollback mechanism, discarding the model parameters obtained from this training and reverting to the previous stable version. Simultaneously, the system records the specific problem samples and indicator data from this regression validation, generating a quality report for the R&D team to analyze and improve. Through this process, the system ensures that every released model version undergoes rigorous quality verification, providing a reliable guarantee for engineering deployment.

[0127] Furthermore, you can also view Figure 8 , Figure 8 This is a flowchart illustrating the second embodiment of the large model training method based on PCB placement guidance according to this application. In this embodiment, after performing regression verification and quality gating on the updated first-stage model and outputting a domain-specific model or parameter adapter based on the execution results, steps S80-100 are further included: Step S80: Periodically collect newly added expert placement samples, and construct incremental supervised training samples based on the newly added expert placement samples; Step S90: Retrain the domain-specific model or parameter adapter based on the incremental supervised training samples, and obtain the updated first-stage model based on the training results; Step S100: Compare and verify the updated first-stage model with the original first-stage model on the fixed regression benchmark set, and release the updated first-stage model after successful verification.

[0128] In this embodiment, the specific implementation of continuous iterative updates to the published model is achieved through periodic collection of new samples, incremental retraining, and version comparison verification, thereby realizing continuous optimization and version management of the model.

[0129] The system periodically collects newly added expert placement samples and constructs incremental supervised training samples based on these samples. In practice, the system establishes a data synchronization interface with the EDA toolchain and automatically scans the company's internal PCB design database at preset time intervals, such as weekly or monthly, to identify newly completed layout design projects since the previous period. For each new project, the system reads its circuit design data, design rule information, and expert placement data, executing the same data processing flow. The system parses the component placement relationships in the newly added expert placement data, extracting information such as relative orientation, relative distance, and relative direction. It assigns guiding importance weights to these placement relationships and then maps the placement relationships and weights to a preset graph structure, generating a reference guiding constraint graph corresponding to the new samples.

[0130] The construction of incremental supervised training samples needs to consider changes in sample distribution. The distribution of board size, component type, and network complexity of newly added samples is statistically analyzed and compared with the distribution of the historical training set. If the new samples introduce new board types, such as flexible boards or rigid-flex boards, or new component types, such as novel packaged high-frequency devices, the system specially labels these samples to ensure they receive appropriate attention in subsequent training. The system also performs similarity analysis between the new samples and historical samples to avoid training bias caused by excessive repetition of samples. After the analysis, the system merges the new samples with the selected historical samples to construct a new incremental supervised training dataset. This dataset contains both newly added engineering experience and retains the foundation of historical knowledge, providing data support for continuous model optimization.

[0131] The domain-specific model or parameter adapter is retrained based on incremental supervised training samples, and the updated first-stage model is obtained based on the training results. The retraining process needs to balance the learning of new knowledge with the retention of old knowledge to prevent catastrophic forgetting.

[0132] In the specific implementation process, the system loads the full weights or parameter adapter of the output domain-specific model. If a parameter adapter is deployed, the system first combines the adapter weights with the base model to reconstruct the complete domain-specific model. Retraining adopts a two-stage strategy consistent with the initial training. In the first stage of supervised training, the system inputs incremental supervised training samples into the model, calculates the structural similarity metric between the predicted guided constraint graph and the reference guided constraint graph, constructs a joint loss function by combining automatic evaluation auxiliary signals, and updates the model parameters through backpropagation. The learning rate is set to one-tenth of the initial training learning rate, allowing the model to adapt to new samples at a slower pace and avoiding drastic changes to existing knowledge.

[0133] In the second stage of preference alignment training, the system generates multiple candidate guidance constraint maps based on the updated first-stage model. These maps drive the placement executor to obtain placement results, which are then automatically evaluated and ranked within groups. Based on the ranking results, the model parameters are updated, and update magnitude constraints are applied. Update magnitude constraints are particularly important in this stage because the goal of incremental training is to absorb new knowledge while maintaining existing capabilities. Excessive update magnitude can lead to a decline in model performance on historical samples. The system employs a reference model regularization mechanism, using the pre-update model as a reference model and calculating distribution differences as a regularization term to limit the update magnitude.

[0134] The retraining process lasts for multiple epochs. After each epoch, the system evaluates the model performance on a validation set, which contains a mixture of historical and new samples. Training stops when the model's performance improvement on new samples plateaus and there is no significant decline in performance on historical samples, and the updated first-stage model is saved.

[0135] The updated first-stage model is compared and validated against the original first-stage model on a fixed regression benchmark set. Once validation is successful, the updated first-stage model is released. The fixed regression benchmark set is consistent with the set used to ensure that performance comparisons between different versions have the same baseline.

[0136] In practice, the system runs the inference of the pre-update and post-update models on the fixed regression benchmark set in parallel. For each benchmark sample, the two models generate regression validation guidance constraint graphs to drive the placement executor to obtain placement results, and calculate the placement success rate, violation rate, and key indicator distribution fluctuations. The system compares the quality parameter sets of the two models to evaluate the update effect from multiple dimensions.

[0137] Positive optimization metrics include the improvement in placement success rate, the decrease in violation rate, and the improvement in key performance indicators. If the updated model has a higher placement success rate than the original model, a lower violation rate, and improvements in both line length trend and network crossover trend indicators, it is considered a positive optimization. Non-degradation metrics require that the updated model is not significantly worse than the original model in key performance indicators; even without significant improvement, there should be no regression. The allowable degradation tolerance is typically set to within one percent; for example, an increase in the violation rate from 0.2 to 0.21 is still acceptable, but an increase above 0.25 is considered degradation.

[0138] The comparative validation also includes stability assessment. The system runs both models multiple times on the same baseline sample, calculates the volatility of the output results, and ensures that the stability of the updated model is no less than that of the unupdated model. If the updated model exhibits higher volatility on some samples, even if the average metric improves, it may affect deployment decisions.

[0139] Successful validation requires both positive optimization or non-deterioration conditions and stability conditions to be met simultaneously. When these conditions are met, the system marks the updated first-stage model as a candidate release version and executes the version release process. The release process includes generating a model version identifier, recording the data version used for training, training parameters, regression validation results, and a comparison report with the previous version. This information is stored in the model version management library, linked to the design data version and rule version, forming a complete and traceable record.

[0140] When validation fails, the system analyzes the reason for the failure. If the updated model's performance degrades on a specific type of sample, it may be due to overfitting caused by a bias in the distribution of the newly added samples; if stability decreases, it may be due to parameter oscillation caused by an excessively high learning rate. Based on the analysis results, the system adjusts its incremental training strategy, such as adjusting the learning rate, increasing regularization strength, or optimizing sample weights, in preparation for the next round of incremental training. Failed model versions are not released, and the system continues to provide services using the current stable version.

[0141] Through the above processing, the system achieves continuous iterative optimization of the model in an engineering environment. Periodic collection of new expert samples allows the model to absorb the latest engineering practice experience, while the incremental retraining mechanism adapts to changes in design trends while maintaining historical knowledge. Comparative verification ensures that each update undergoes rigorous quality checks. This continuous iteration mechanism supports the orderly evolution of model versions, providing a complete technical solution for the long-term maintenance and optimization of enterprise-level AI systems.

[0142] It should be noted that the above examples are only for understanding this application and do not constitute a limitation on the large model training method based on PCB placement guidance in this application. Any simple modifications based on this technical concept are within the protection scope of this application.

[0143] This application provides a large model training device based on PCB placement guidance. The large model training device based on PCB placement guidance includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the large model training method based on PCB placement guidance in the above embodiment 1.

[0144] The following is for reference. Figure 9This diagram illustrates a structural schematic suitable for implementing a PCB placement-guided large model training device according to embodiments of this application. The PCB placement-guided large model training device in embodiments of this application may include, but is not limited to, mobile terminals such as mobile phones, laptops, digital broadcast receivers, PDAs (Personal Digital Assistants), PADs (Portable Application Description), etc., and fixed terminals such as digital TVs, desktop computers, etc. Figure 9 The large model training device based on PCB placement guidance shown is merely an example and should not impose any limitations on the functionality and scope of use of the embodiments of this application.

[0145] like Figure 9 As shown, the PCB placement-guided large model training device may include a processing unit 1001 (e.g., a central processing unit, a graphics processing unit, etc.), which can perform various appropriate actions and processes according to a program stored in read-only memory (ROM) 1002 or a program loaded from storage device 1003 into random access memory (RAM) 1004. The RAM 1004 also stores various programs and data required for the operation of the PCB placement-guided large model training device. The processing unit 1001, ROM 1002, and RAM 1004 are interconnected via a bus 1005. An input / output (I / O) interface 1006 is also connected to the bus. Typically, the following can be connected to I / O interface 1006: input devices 1007 including, for example, touchscreens, touchpads, keyboards, mice, image sensors, microphones, accelerometers, gyroscopes, etc.; output devices 1008 including, for example, liquid crystal displays (LCDs), speakers, vibrators, etc.; storage devices 1003 including, for example, magnetic tapes, hard disks, etc.; and communication devices 1009. Communication device 1009 allows the PCB-placement-guided large model training device to wirelessly or wiredly communicate with other devices to exchange data. Although various PCB-placement-guided large model training devices are shown in the figures, it should be understood that implementation or possession of all of them is not required. More or fewer may be implemented alternatively.

[0146] Specifically, according to the embodiments disclosed in this application, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments disclosed in this application include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via a communication device, or installed from storage device 1003, or installed from ROM 1002. When the computer program is executed by processing device 1001, it performs the functions defined in the methods of the embodiments disclosed in this application.

[0147] The PCB placement-guided large model training device provided in this application, employing the PCB placement-guided large model training method described in the above embodiments, can solve the technical problem of existing technologies struggling to stably generate high-quality PCB placement guides that meet engineering preferences. Compared with the prior art, the beneficial effects of the PCB placement-guided large model training device provided in this application are the same as those of the PCB placement-guided large model training method described in the above embodiments, and other technical features of this PCB placement-guided large model training device are the same as those disclosed in the previous embodiment method, and will not be repeated here.

[0148] It should be understood that the various parts disclosed in this application can be implemented using hardware, software, firmware, or a combination thereof. In the description of the above embodiments, specific features, structures, materials, or characteristics can be combined in any suitable manner in one or more embodiments or examples.

[0149] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

[0150] This application provides a storage medium, which is a computer-readable storage medium having computer-readable program instructions (i.e., a computer program) stored thereon, which are used to execute the large model training method based on PCB placement guidance in the above embodiments.

[0151] The computer-readable storage medium provided in this application may be, for example, a USB flash drive, but is not limited to electrical, magnetic, optical, electromagnetic, infrared, or semiconductor devices, or any combination thereof. More specific examples of computer-readable storage media may include, but are not limited to: electrical connections with one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof. In this embodiment, the computer-readable storage medium may be any tangible medium containing or storing a program that can be executed by instructions, used by a device, or used in conjunction with it. The program code contained on the computer-readable storage medium may be transmitted using any suitable medium, including but not limited to: wires, optical cables, RF (Radio Frequency), etc., or any suitable combination thereof.

[0152] The aforementioned computer-readable storage medium may be included in a large model training device guided by PCB placement; or it may exist independently and not be assembled into a large model training device guided by PCB placement.

[0153] The aforementioned computer-readable storage medium carries one or more programs. When the aforementioned one or more programs are executed by a PCB placement-guided large model training device, the PCB placement-guided large model training device implements the technical content of the PCB placement-guided large model training method embodiment shown above.

[0154] Computer program code for performing the operations of this application can be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, and C++, and conventional procedural programming languages ​​such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a Local Area Network (LAN) or a Wide Area Network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0155] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of methods and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented using dedicated hardware-based implementations that perform the specified functions or operations, or can be implemented using a combination of dedicated hardware and computer instructions.

[0156] The modules described in the embodiments of this application can be implemented in software or hardware. The names of the modules do not necessarily limit the functionality of the unit itself.

[0157] The readable storage medium provided in this application is a computer-readable storage medium that stores computer-readable program instructions (i.e., a computer program) for executing the above-described large model training method based on PCB placement guidance. This solves the technical problem of existing technologies struggling to stably generate high-quality PCB placement guidance that meets engineering preferences. Compared with existing technologies, the beneficial effects of the computer-readable storage medium provided in this application are the same as those of the large model training method based on PCB placement guidance provided in the above embodiments, and will not be elaborated upon here.

Claims

1. A large model training method based on PCB placement guidance, characterized in that, The large model training method based on PCB placement guidance includes the following steps: A reference guidance constraint graph is extracted from the expert placement data, and supervised training samples are constructed based on the reference guidance constraint graph. The first-stage supervised training of the basic large model is performed using the supervised training samples to obtain the first-stage model; The circuit design data and design rule information are input into the first stage model to generate multiple candidate guiding constraint diagrams. The placement actuators are driven based on the candidate guiding constraint diagrams to obtain placement results that correspond one-to-one with the candidate guiding constraint diagrams. Based on the evaluation results corresponding to the placement results, the candidate guiding constraint graphs are sorted relative within the group, and based on the sorting results within the group, the parameters of the first stage model are updated under the preset update magnitude constraint. Regression validation and quality gate control are performed on the updated first-stage model, and the output is a domain-specific model or parameter adapter.

2. The large model training method based on PCB placement guidance as described in claim 1, characterized in that, The steps for extracting the reference guided constraint graph from expert placement data include: The coordinate and orientation information between devices or modules in the expert placement data is analyzed. The relative position, relative distance and / or relative orientation between each pair of coordinates and orientation information are calculated in the analysis results. The relative placement relationship is obtained based on the calculation results. The placement guidance relationship is assigned a guidance importance weight based on the strength of engineering preference. The placement guidance relationship and the guidance importance weight are mapped to a preset graph structure to generate a reference guidance constraint graph. The reference guidance constraint graph is a graph structure data whose edge attributes include the guidance importance weight, and the reference guidance constraint graph uses devices or modules as nodes and the relative placement guidance relationship as edges.

3. The large model training method based on PCB placement guidance as described in claim 1, characterized in that, The step of performing first-stage supervised training on the basic large model using the supervised training samples to obtain the first-stage model includes: The supervised training samples are input into the base large model to obtain the prediction guidance constraint graph; The structural similarity metric between the predicted guidance constraint graph and the reference guidance constraint graph is calculated using a graph feature extraction strategy or a graph representation learning strategy. The first-stage model is obtained by constructing a joint loss function using the structural similarity metric and a preset auxiliary training signal, and updating the basic large model parameters based on the joint loss function.

4. The large model training method based on PCB placement guidance as described in claim 1, characterized in that, The steps of inputting circuit design data and design rule information into the first-stage model to generate multiple candidate guiding constraint diagrams include: The same set of circuit design data and design rule information are input into the first stage model for decoding. During the decoding phase, the random sampling strategy or temperature parameters of the model in the first phase are adjusted. Based on the adjustment results, multiple candidate guiding constraint graphs are output, and there are differences in topology or attribute weights among the multiple candidate guiding constraint graphs.

5. The large model training method based on PCB placement guidance as described in claim 1, characterized in that, The step of relative ranking the candidate guiding constraint graphs within a group based on the evaluation results corresponding to the placement results includes: For the candidate set corresponding to the same supervised training sample, the automatic evaluation index corresponding to each candidate guided constraint graph is normalized. Based on the comprehensive performance of each candidate guided constraint graph in multiple evaluation dimensions in the normalization process results, a total order relation or partial order relation is established within the candidate set. The total order relation or partial order relation is used as the relative order within the group.

6. The large model training method based on PCB placement guidance as described in claim 1, characterized in that, Based on the group ranking results, and under a preset update magnitude constraint, the steps for updating the parameters of the first-stage model include: A preference loss function is constructed based on the ranking results of the relative ranking within the group. The preference loss function increases the probability of generating the candidate guiding constraint graph for candidates ranked higher and decreases the probability of generating the candidate guiding constraint graph for candidates ranked lower. Calculate the distribution difference between the first-stage model and the preset reference model, and add the distribution difference as a regularization term to the preference loss function. Constrain the parameter change magnitude of the first-stage model in a single update through joint optimization.

7. The large model training method based on PCB placement guidance as described in claim 1, characterized in that, The steps for performing regression validation and quality gate control on the updated first-stage model, and outputting a domain-specific model or parameter adapter, include: The updated first-stage model is inferred on the solidified regression benchmark set, and a regression validation guidance constraint graph is generated based on the inference results. Based on the regression verification guided constraint graph, the placement executor is driven to obtain the regression verification placement result. The quality parameter set of the regression verification placement result is calculated, and the quality parameter set includes the placement success rate, violation rate and key indicator distribution fluctuation. The set of quality parameters is compared with preset quality judgment conditions. Based on the comparison results, it is determined whether the regression verification and quality gate are passed. Based on the comparison results, a domain-specific model or parameter adapter is output.

8. The large model training method based on PCB placement guidance as described in claim 1, characterized in that, After performing regression validation and quality gate control on the updated first-stage model, and outputting a domain-specific model or parameter adapter, the process also includes: Periodically collect newly added expert placement samples, and construct incremental supervised training samples based on the newly added expert placement samples; The domain-specific model or parameter adapter is retrained based on the incremental supervised training samples to obtain an updated domain-specific model. The updated domain-specific model is compared and validated with the original domain-specific model on a fixed regression benchmark set. After successful validation, the updated domain-specific model is released.

9. A large model training device based on PCB placement guidance, characterized in that, The large model training device based on PCB placement guidance stores a computer program, which, when executed by a processor, implements the large model training method based on PCB placement guidance as described in any one of claims 1-8.

10. A storage medium, characterized in that, The storage medium stores a computer program, which, when executed by a processor, implements the large model training method based on PCB placement guidance as described in any one of claims 1-8.

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