Neural spike detection method and apparatus

Abstract

The application discloses a kind of nerve spike detection method and device, belong to brain-computer interface and neural signal processing technical field.To solve the problem of high memory occupation, poor threshold robustness, fixed point soft and hard consistency in prior art, the application updates center estimation state by symbol step mode sample by sample, and calculates the absolute deviation of current sample relative to center to update scale estimation state, dynamically generates adaptive threshold based on center and scale, and outputs spike event by threshold crossing determination.The application adopts sample-by-sample pipelining processing architecture, all modules are implemented by fixed-point operation, and the update order, rounding and overflow strategy are uniformly constrained.The application is used for implantable or wearable neural signal acquisition device, has constant-level memory occupation, adaptive noise tracking, soft and hardware consistent cycle by cycle, low power consumption and low latency, and can be applied to brain-computer interface.

Description

Technical Field

[0001] This invention relates to the field of brain nerve signal processing technology, specifically to a method and device for detecting neural spikes. Background Technology

[0002] Brain-computer interface (BCI) technology provides core technical support for neuroscience research and the diagnosis and treatment of nervous system diseases by establishing a direct information interaction pathway between brain tissue and external devices. In the neural signal processing chain, accurately identifying the spike signals generated by neuronal firing from raw recordings is a crucial preliminary step for subsequent neural decoding and control command generation. With the development of high-density neural probe technology, modern neural recording systems have achieved simultaneous acquisition of hundreds or even thousands of channels. This massive amount of raw data poses severe challenges to system transmission bandwidth, storage, and power consumption. To meet the stringent constraints of real-time performance, miniaturization, and low power consumption in implantable devices, on-chip online spike detection at the acquisition front end has become a core and essential technical path for compressing wireless data transmission volume, reducing system power consumption, and achieving low-latency closed-loop neural modulation.

[0003] Existing on-chip online spike detection technologies can be divided into two categories: the first category is an integrated spike detection and sorting solution, and the second category is a low-power threshold / energy-type detection solution for independent deployment.

[0004] The first type of integrated on-chip system solution is designed around a complete neural signal processing chain, simultaneously integrating detection, feature extraction, and clustering modules. It can complete the entire processing flow from raw signals to neuron classification results on-chip. For example, existing technology 1: Y. Han et al., “L-Sort: On-Chip Spike Sorting With EfficientMedian-of-Median Detection and Localization-Based Clustering,” IEEE OpenJournal of Circuits and Systems, 2025. It uses median approximation and incremental median calculation to achieve robust spike detection, combined with spatially localized clustering algorithms to reduce waveform buffering overhead. However, this type of solution has inherent drawbacks: its overall processing chain is long, the parameters between modules are highly coupled, the detection module cannot be independently tailored and deployed, and it is difficult to adapt to lightweight implantation scenarios that only require spike detection. Furthermore, to achieve robust threshold calculation, its detection module still needs to maintain a sliding window of a certain length for each channel to perform median statistics, resulting in a linear increase in memory usage with the number of channels, facing a fundamental implementation bottleneck in scenarios pursuing extremely low state quantities and memory usage.

[0005] The second type of low-power threshold / energy-type online detection solution takes peak event detection as its core function. The module is lightweight and has low hardware overhead, and can be flexibly integrated into various implantable neural signal acquisition front-ends.

[0006] Firstly, threshold-based detection uses an adaptive amplitude threshold calculated from signal statistics as the core criterion for judgment.

[0007] For example, prior art 2: Patent CN113057656B, a method, device, and system for online detection of brain nerve spike potential signals based on adaptive threshold. It calculates the standard deviation as a noise band threshold by screening test samples and constructs an adaptive threshold by combining it with the weighted sum of squares of historical signals, which improves detection accuracy to some extent. However, its calculation process involves squaring operations and weight accumulation, resulting in high complexity. Furthermore, it relies on the periodic updating and batch storage of test samples, making it impossible to achieve real-time threshold updates for each sample, thus exhibiting adaptive lag.

[0008] For example, prior art 3: Patent WO2019209185A1, a brain-computer interface signal processing system and a method for system execution. While determining the center threshold by constructing a histogram distribution of sample values ​​eliminates the need for a sliding window buffer, it requires maintaining a count array covering the entire dynamic range of the signal. The storage overhead increases exponentially with the data bit width, making it difficult to meet the area and power consumption constraints of high-channel-count implantable chips. Therefore, existing threshold-based solutions either rely on historical windows or large-capacity counting states, making it difficult to achieve threshold calculation under extremely low memory constraints.

[0009] Secondly, energy-based detection is designed with the enhancement of peak features of nonlinear energy operators as its core, and improves the distinction between peaks and background noise through signal transformation.

[0010] For example, existing technology 4: G. Saggese & AGM Strollo, “Low-Power Energy-BasedSpike Detector ASIC for Implantable Multichannel BMIs,” Electronics 2022, enhances the peak signal-to-noise ratio by using absolute difference operators and amplitude slope operators, and completes threshold estimation with three-point centering. The hardware implementation efficiency is relatively high, but its noise estimation uses fixed window mean statistics, which is sensitive to outliers, and the window storage requirements limit its expansion under extremely low resource conditions.

[0011] The second type of approach suffers from common drawbacks: its threshold calculation results heavily depend on parameters such as the amplitude distribution of the samples and the length of the statistical window. When sudden artifacts, non-Gaussian noise, or dynamic range expansion occur in the signal, the stability of the threshold calculation is severely affected, resulting in insufficient robustness. To maintain detection performance, multiple state parameters typically need to be maintained, and detection performance is deeply coupled with these parameters. Parameters must be manually reconfigured for different channels, different neuron firing characteristics, or different noise environments, leading to extremely poor engineering reusability and cross-scenario adaptability. This fails to meet the requirements of high-density, multi-channel implantable devices for parameter-tuning-free applications.

[0012] Furthermore, even though some of the aforementioned existing technologies (existing technologies 3 and 4) provide basic ideas for fixed-point implementation, none of them have made unified and clear constraints on key details such as the single-cycle update order, rounding strategy, and overflow handling rules in fixed-point arithmetic. This results in the inability to achieve precise cycle-by-cycle alignment between the software solution and the hardware Register Transfer Level (RTL) description, leading to fixed-point software and hardware consistency issues. The cost of cross-platform porting, joint debugging, and functional verification of the software solution is high, and there is a risk of inconsistency between the software and hardware implementation results, which seriously restricts the engineering implementation and large-scale reuse of the technology.

[0013] Based on the analysis of the existing technologies above, the inventors believe that how to achieve robust adaptive threshold online spike detection with extremely low storage overhead is a key technological direction that should be developed in this field. Summary of the Invention

[0014] To alleviate or partially alleviate the above-mentioned technical problems, the solution of the present invention is as follows:

[0015] On one hand, this invention discloses a method for detecting neural spikes, comprising:

[0016] We define and continuously update a central estimation state and a scale estimation state; where,

[0017] The center estimation state update method is as follows: compare the current sample with the previous center estimation state, and based on the comparison result, perform incrementing, decrementing or keeping constant according to a preset fixed step size to obtain the updated center estimation state;

[0018] The scaling estimation state update method is as follows: calculate the absolute deviation between the current sample and the updated center estimation state, and perform an exponential moving average operation on the absolute deviation to obtain the updated scaling estimation state;

[0019] An adaptive threshold is generated based on the updated center estimation state and the updated scale estimation state; a threshold crossing determination is performed on the current sample based on the adaptive threshold and the state of the previous sample, and a spike event is output when a threshold crossing is determined.

[0020] In one type of embodiment, an input preprocessing step is also included:

[0021] The original acquired neural signal sampling data is subjected to fixed-point processing to obtain fixed-point samples that conform to the bit width rule;

[0022] The fixed-point processing includes: converting the neural signal sampling data into signed numbers by zero-point bias correction, multiplying the data by a gain coefficient for amplitude scaling, and saturating and truncating to the target bit width.

[0023] In one embodiment, a high-pass filtering preprocessing is performed on the current sample before performing the center estimation state update to suppress low-frequency baseline drift components in the neural signal.

[0024] In one embodiment, the high-pass filtering preprocessing uses a second-order biquadratic infinite impulse response high-pass filter to filter the current sample;

[0025] The coefficients of the high-pass filter are configurable fixed-point quantization parameters. The filter's internal state register uses an extended bit width to retain intermediate calculation precision. The filter's input and output data have the same bit width as the fixed-point sample after fixed-point quantization.

[0026] In one embodiment, the exponential moving average calculation formula for the absolute deviation is as follows:

[0027] A[n]=(1-α) A[n-1]+ α d[n];

[0028] Where n is the sampling period number, A[n] is the updated scale estimation state, A[n-1] is the previous scale estimation state, d[n] is the absolute deviation of the current sampling period, and α is the preset fixed-point learning rate coefficient.

[0029] In one type of embodiment, a refractory period control step is also included:

[0030] Before performing a threshold crossing judgment, first check whether the current state is in a refractory period.

[0031] If the event is in the refractory period, skip the threshold crossing judgment and do not output the spike event.

[0032] If not in the refractory period, a threshold crossing judgment is performed. After a spike event is output, the refractory period counter is started, and new spike event outputs are prohibited within a preset configurable number of sampling periods.

[0033] In one embodiment, a peak search step is also included:

[0034] When a threshold crossing is detected, a local extremum is searched within a search window of a preset length starting from the trigger time, and the magnitude of the local extremum and its index offset relative to the trigger time are output.

[0035] The search rule for local extrema is determined based on a preset peak detection mode: when configured as a positive peak detection mode only, the local extrema within the search window is the maximum value; when configured as a negative peak detection mode only, the local extrema within the search window is the minimum value; when configured as a simultaneous positive and negative peak detection mode, the maximum or minimum value within the search window corresponds to the direction in which the current threshold is crossed.

[0036] During the peak search step, extreme value tracking is completed by maintaining only two registers: the current extreme value and the corresponding index.

[0037] In one embodiment, generating the adaptive threshold specifically includes:

[0038] Using the updated center estimation state as the reference center, the updated scale estimation state is multiplied by a threshold multiplier to generate a positive threshold and / or a negative threshold.

[0039] In one type of embodiment, the center estimation state update, scale estimation state update, threshold generation, and threshold crossing determination are all executed using globally unified fixed-point operation rules. The unified fixed-point operation rules include at least the state variable bit width, multiplication-addition rounding strategy, overflow handling strategy, and execution order constraints within a single sampling period.

[0040] On the other hand, this invention discloses a neural spike detection device, which is based on fixed-point arithmetic and adopts a sample-by-sample pipelined processing architecture, including a core processing link. The core processing link consists of a cascaded input fixed-point estimation module, an online center estimation module, a scale estimation module, a threshold calculation module, and a threshold crossing determination module.

[0041] The input localization module is used to perform localization processing on the original acquired neural signal sampling data and output fixed-point samples that conform to the preset bit width rules.

[0042] The online center estimation module is used to continuously update the center estimation state by comparing the current sample with the previous center estimation state and, based on the comparison result, performing incrementing, decrementing or keeping constant steps according to a preset fixed step size to obtain the updated center estimation state.

[0043] The scaling estimation module is used to continuously update the scaling estimation state, calculate the absolute deviation between the current sample and the updated center estimation state, and perform an exponential moving average operation on the absolute deviation to obtain the updated scaling estimation state.

[0044] The threshold calculation module is used to generate an adaptive threshold based on the updated center estimation state and the updated scale estimation state.

[0045] The threshold crossing determination module is used to perform threshold crossing determination on the current sample based on the adaptive threshold and the state of the previous sample, and output a spike event when a threshold crossing is determined to occur; and...

[0046] The execution order of the aforementioned modules within a single sampling period is consistent with the cascading order.

[0047] In one embodiment, the online center estimation module, scale estimation module, threshold calculation module, and threshold crossing determination module are all implemented using fixed-point arithmetic, and the bit width of the state variables, the rounding strategy of multiplication and addition operations, the overflow handling strategy, and the module update order within a single sampling period of all modules are uniformly constrained.

[0048] In one type of embodiment, it further includes:

[0049] A high-pass filter module is cascaded between the input fixed-point module and the online center estimation module, and a refractory period control module is cascaded at the output of the threshold crossing determination module;

[0050] The high-pass filtering module is used to perform high-pass filtering preprocessing on fixed-point samples to suppress low-frequency baseline drift components in neural signals.

[0051] The refractory period control module is used to start the refractory period count after a spike event is output, and to prohibit the output of new spike events within a preset period.

[0052] In one type of embodiment, it further includes:

[0053] The peak search module is used to search for local extreme values ​​within a preset search window and output the corresponding amplitude and index offset when the threshold crossing determination module determines that a threshold crossing has occurred.

[0054] On the other hand, this invention discloses a brain-computer interface neural signal processing chip, which integrates the neural spike detection device described in the previous claim:

[0055] The brain-computer interface neural signal processing chip is an implantable chip that supports parallel time-division multiplexing of multi-channel neural signals. Each channel independently maintains registers corresponding to the center estimation state, scale estimation state, and refractory period state.

[0056] On the other hand, the present invention also discloses an implantable neural signal acquisition system, comprising a neural electrode array, an analog front-end circuit, a brain-computer interface neural signal processing chip as described above, and a transmission module connected in sequence.

[0057] The neural electrode array is used to collect neural electrical signals from intracranial neurons;

[0058] The analog front-end circuit is used to amplify, filter and convert neural electrical signals into analog and digital signals, and output neural signal sampling data to the brain-computer interface neural signal processing chip.

[0059] The brain-computer interface neural signal processing chip is used to perform neural spike detection and output spike events to the transmission module;

[0060] The transmission module is used to transmit peak events to external devices.

[0061] On the other hand, the present invention also discloses a brain-computer interface closed-loop neuromodulation device, comprising an implantable neural signal acquisition system, a modulation decision module, and a neural stimulation module as described above, which are cascaded in sequence.

[0062] The implantable neural signal acquisition system is used to acquire neural signals and output peak events to the regulation decision module;

[0063] The control decision module is used to generate neural control instructions based on the characteristics of peak events.

[0064] The neural stimulation module is used to output electrical, optical, or magnetic stimulation signals to the target brain region according to the neural modulation instructions, thereby achieving closed-loop neural modulation.

[0065] The technical solution of this invention has one or more of the following beneficial technical effects:

[0066] (1) The center estimated state is updated sample by sample through symbolic stepping. There is no need to store historical sample windows or histogram count arrays. Only constant-level state variables need to be maintained, achieving O(1) level memory usage. The memory overhead does not increase linearly with the number of channels or exponentially with the data bit width.

[0067] (2) The background baseline of the tracking signal is estimated online by center estimation, and the noise scale is estimated in real time by combining absolute deviation exponential moving average, and an adaptive threshold is dynamically generated. Center estimation is not sensitive to peak outliers and can automatically track baseline drift, thus achieving adaptive robust detection.

[0068] (3) It adopts a sample-by-sample pipeline processing architecture, which eliminates the need for batch data waiting. The entire link status update and detection judgment are completed within each sampling cycle. The detection results can be output within the current cycle or within a predictable fixed delay, and it has stable real-time response capability.

[0069] (4) Key parameters such as high-pass filter coefficients, center estimation step size, noise scale learning rate, threshold multiple, refractory period length, and peak search window can all be configured. The peak search module can be trimmed or enabled according to application requirements to flexibly adapt to different sampling rates and signal scenarios.

[0070] Furthermore, other beneficial effects of the present invention will be mentioned in the specific embodiments. Attached Figure Description

[0071] Figure 1 This is a schematic diagram of the overall process of an embodiment of the present invention;

[0072] Figure 2 This is a processing timing diagram within a single sampling period according to an embodiment of the present invention;

[0073] Figure 3 This is a hardware implementation module framework diagram of an embodiment of the present invention;

[0074] Figure 4 This is a schematic diagram of the interface of a detection device according to an embodiment of the present invention. Detailed Implementation

[0075] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0076] To facilitate a clear description of the technical solutions in the embodiments of the present invention, the terms "first" and "second" are used to distinguish identical or similar items with essentially the same function and effect. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order.

[0077] The term "center estimation state" refers to the core state variable, denoted as m[n] (where n is the current sampling period), which is maintained in real-time through a sample-by-sample update mechanism using symbolic stepping. It is used to track the center trend of the neural signal background baseline. It only requires maintaining a single constant-level state register, eliminating the need to store historical sample sliding windows or histogram count arrays. Updated periodically using a fixed-step sign comparison rule, it is insensitive to spikes and outliers, and can automatically track baseline drift. It serves as the reference center for noise scale calculation and adaptive threshold generation in this invention, and is also the core foundation for achieving extremely low memory usage and robust spike detection.

[0078] The "center" mentioned in this invention is an incremental approximation of the trend of the baseline center of the neural signal background, rather than a calculation of the statistical mean or precise median of the signal.

[0079] The term "cascaded sequentially" refers to a logical order that can be defined in an information processing flow. Several modules form upstream and downstream processing sequences according to this logical order. These modules are located at different positions in the upstream and downstream. This does not exclude the possibility that other modules may be added between different modules to obtain further technical effects, so that there may actually be other modules between the original two modules in the language description sequence.

[0080] The term "scale estimation state" refers to the core state variable, denoted as A[n] (where n is the current sampling period), which is recursively updated sample by sample using the exponential moving average (EMA) of absolute deviation in this invention to characterize the fluctuation level of background noise in neural signals in real time. Based on the synchronously updated central estimation state, it only needs to maintain the scale estimation state register of the previous period to complete the update, without requiring historical sample caching, and can be adjusted in real time according to the dynamic changes in background noise. It is the core basis for generating the adaptive threshold in this invention, and its core function is to achieve fully online robust spike detection without manual parameter tuning, balancing detection sensitivity and anti-interference.

[0081] The term "adaptive threshold" refers to a detection threshold that is dynamically generated according to preset rules and adjusted in real time according to the signal background and noise level during neural spike detection. This threshold uses the real-time updated center estimation state as the signal baseline reference and the real-time updated scale estimation state as the noise fluctuation measure. The adaptive threshold does not require manual preset and can automatically adapt to baseline drift and changes in noise intensity. It is used to distinguish neuronal firing spikes in neural signals from background noise, thereby achieving robust detection of spike signals.

[0082] The term "background baseline" refers to the level of background activity in a neural signal, excluding spike components. It reflects the local central tendency of the signal and serves as the reference zero point for the neural signal. The background baseline is mainly composed of the weak synchronous electrical activity of distant neurons, the steady-state component of local field potentials, and electrode polarization potentials. Its amplitude is gentle, and its fluctuation range is much smaller than that of spike signals. It is the core reference benchmark for distinguishing spike signals from background noise. In this invention, the background baseline specifically refers to the central level of the signal at the time without spikes. It is the target physical quantity to be tracked in the central estimation state. Its components include low-frequency local field potentials and non-spike noise. The spike signal is essentially a short-duration, high-amplitude pulse superimposed on the background baseline. Only by accurately tracking the background baseline can we avoid missed and false spike detections caused by reference offset.

[0083] The term "baseline drift" refers to a slow, non-periodic, low-frequency shift of the background baseline over time, a common interference in implanted neural signal acquisition scenarios. In this invention, baseline drift is a non-ideal signal characteristic that the invention aims to automatically adapt to. The center estimation state can be automatically adjusted according to the slow changes in the background baseline through a symbolic step update mechanism.

[0084] The term "fixed-point software-hardware consistency" refers to the characteristic that the software scheme and the hardware register transfer level description achieve precise bit-level alignment in each sampling cycle. In this invention, by making unified and clear constraints on key engineering details such as the bit width and sign rules of state variables, the rounding strategy for multiplication and addition operations, the overflow handling strategy, the module update order, and the timing boundaries of trigger judgment, it is ensured that the reference model built based on the high-level language and the RTL model implemented based on the hardware description language can be compared cycle by cycle in each clock cycle, thereby achieving fixed-point software-hardware consistency.

[0085] This invention discloses a method for detecting neural spikes, which is mainly applied to the neural signal processing chip of implantable brain-computer interface. It can also be adapted to other real-time event monitoring scenarios of physiological signals. The following section uses the implantable neurophysiological acquisition scenario as an example to illustrate the technical solution of this invention.

[0086] Preferably, the neural spike detection method is an online detection method.

[0087] This invention adopts a sample-by-sample pipelined processing architecture, without sliding window caching or batch data waiting. It can complete the state update and peak detection and determination of the entire link within a single sampling period. The overall processing link includes an input fixed-point module, a high-pass preprocessing module, an online center estimation module, a scale estimation module, a threshold calculation module, a threshold crossing determination and refractory period module, and an optional peak search module. All modules are implemented using fixed-point arithmetic, and the order of operation updates within a single sampling period is fixed, ensuring the consistency of cycle-by-cycle output between the software solution and the hardware register transfer level (RTL) implementation.

[0088] Figure 1 This is a schematic diagram of the overall process of an embodiment of the present invention. As shown in the figure, the input is neural signal sampling data (e.g., the sampling data input after the original sampling signal collected by neural electrodes or sensors is converted into a digital-to-analog converter). After being converted into a unified fixed-point format by the input fixed-point conversion module, it enters the high-pass preprocessing module to suppress low-frequency drift. Then, it passes through the online center estimation module and the scale estimation module in sequence to update the center estimation state and scale estimation state variables in real time. Then, the threshold calculation module generates an adaptive threshold (positive / negative threshold). Finally, the threshold crossing judgment and refractory period module outputs the spike event. According to the application requirements, an optional peak search module can be triggered to output the peak amplitude and peak index of the spike. Each module is cascaded in a sample-stream manner, completing a complete detection and processing flow in each sampling cycle. The whole adopts an online update architecture without windows and without waiting for batch data, which can be directly mapped to the chip-level register transfer level implementation, adapting to the low memory, low power consumption, and low latency processing requirements of implantable brain-computer interfaces.

[0089] The input signal first enters the input fixed-point formatting module, which converts the neural signal sampling data into a unified fixed-point format data, serving as input data for subsequent modules to ensure the accuracy and range of subsequent multiplication and addition operations are controllable. Specifically, if the original neural signal sampling data is an unsigned ADC code, the input fixed-point formatting module first performs zero-point bias correction, converting the unsigned value into a zero-centered signed fixed-point number by subtracting a preset bias value. Optionally, this module can also adjust the data by left-shifting gain according to the system's dynamic range requirements and perform saturation truncation on values ​​exceeding the preset bit width range to prevent operational overflow. The sample data after fixed-point formatting has a unified bit width and numerical range. For ease of description, the fixed-point format data obtained after processing the neural signal sampling data by the input fixed-point formatting module will be referred to as a sample in the following text.

[0090] The fixed-point quantized samples are fed into the high-pass preprocessing module. This module employs a configurable second-order biquad infinite impulse response (BIIR) high-pass filter to suppress low-frequency drift components in the signal and improve the stability of subsequent estimations. The coefficients of the high-pass filter undergo fixed-point quantization, and the filter's internal state register uses a wider bit width to preserve intermediate calculation accuracy and prevent overflow, while the input and output data maintain the same bit width as the fixed-point quantization module. The filter coefficients support parameter configuration to adapt to application scenarios with different sampling rates and signal characteristics.

[0091] The online center estimation module is used to track the center estimation of the background baseline of the neural signal sample by sample, that is, to continuously update the center estimation state, providing a stable benchmark for subsequent noise level estimation. It is the core foundation for the invention to achieve extremely low memory usage. It completely abandons the center calculation methods of sliding window, sorting operation and histogram statistics in the prior art, and adopts a sample-by-sample update mechanism based on symbol stepping.

[0092] In the specific implementation process, let the current sampling period be n; the current sample after high-pass preprocessing be x[n]; and the center estimation state after the current sampling period update be denoted as m[n] (a state variable maintained by the online center estimation module), whose physical meaning is the center estimation of the signal background baseline at the current moment. To facilitate the description of the update process, m[n-1] is used to represent the previous center estimation state, that is, the center estimation state before the current period update, or the center estimation state at the end of the previous sampling period. This state variable is updated using a symbolic step method, with a preset fixed update step size of η, where the step size η is a configurable fixed-point parameter used to control the convergence speed and tracking stability of the center estimation. The update rules are as follows:

[0093] In each sampling period, the current sample x[n] is compared with the previous (before update) center estimation state m[n-1]. If x[n] is greater than m[n-1], the center estimation state increases by a fixed step size η; if x[n] is less than m[n-1], the center estimation state decreases by a fixed step size η; if x[n] is equal to m[n-1], the center estimation state remains unchanged, thus obtaining the center estimation state m[n] for the current sampling period. This update method does not require storing any historical sample windows and can track the signal center trend using only a constant-level state variable. It is also naturally insensitive to outliers and spikes. In other words, the impact of a single large-amplitude spike on the center estimation state is limited to a single fixed step size, thereby reducing the instantaneous disturbance of outliers to the center estimation. Simultaneously, this state variable can automatically track the signal baseline drift without additional processing.

[0094] Then, the scaling module calculates the absolute deviation of the current sample relative to the updated center estimation state: d[n] = |x[n] - m[n]|. Subsequently, an exponential moving average (EMA) operation is performed on this absolute deviation to update the scaling estimation state A[n]: A[n] = (1-α)A[n-1] + αd[n]; where α is a configurable fixed-point learning rate coefficient that controls the scaling estimation's response speed to noise changes. The exponential moving average only needs to store the previous scaling estimation state A[n-1] to achieve real-time estimation of signal fluctuation levels. When background noise increases, d[n] systematically increases, and A[n] rises accordingly; conversely, when noise decreases, A[n] decreases accordingly, thus achieving adaptive thresholding for noise adaptive tracking. The entire scaling estimation process also requires no window storage, forming a low-memory recursive estimation structure together with the online center estimation module.

[0095] After updating the center estimation state and scale estimation state, the threshold calculation module is entered. This module uses the updated center estimation state m[n] as the reference center, multiplies the updated scale estimation state A[n] by a configurable k, and performs necessary scale transformations to generate an adaptive dynamic detection threshold. k is a configurable threshold multiplier coefficient used to adjust the detection sensitivity. During the threshold calculation process, necessary scale transformations can be performed according to the signal statistical characteristics. For example, for Gaussian background noise, the Gaussian distribution correction coefficient, which converts the absolute deviation of the center to the standard deviation, can be directly integrated into the threshold multiplier coefficient k without adding an extra computation link, thus maintaining a minimal computational structure while ensuring the statistical rationality of the threshold. The threshold calculation is implemented using fixed-point multiplication and shift operations to ensure that the numerical range is controllable and compatible with the accuracy of the preceding and following modules. For bipolar detection scenarios of neural spikes, positive and negative thresholds are determined separately, and threshold crossing judgments are performed accordingly. For application scenarios that only need to detect a single polarity spike, the threshold calculation link corresponding to the polarity can be tailored and enabled (e.g., only positive or negative spikes are detected).

[0096] Since the center estimation state can track the baseline drift of the signal cycle by cycle, and the scale estimation state changes in real time with the background noise level, the resulting adaptive threshold can simultaneously adapt to the signal baseline drift and noise fluctuations, and has the adaptive tracking capability for all time periods. It can stably adapt to the changes in neural signal characteristics of different acquisition channels and different time periods without any manual parameter tuning operations for each channel.

[0097] In the threshold crossing determination and refractory period module, a threshold crossing is determined by comparing the positional relationship between the current sample and the sample from the previous sampling period relative to the current adaptive threshold. The determination logic is as follows: if the sample from the previous sampling period is located on one side of the adaptive threshold, and the current sample crosses to the other side of the adaptive threshold, i.e., the detection signal crosses the positive threshold from bottom to top (positive spike) or crosses the negative threshold from top to bottom (negative spike), then a threshold crossing event is considered to have occurred and is marked as a spike signal. To prevent multiple false triggers of the same spike waveform due to local oscillations, the module has a built-in refractory period counter: after each event is detected, the refractory period counter is started, and the counter is set at a preset N... ref New event output is prohibited within each sampling period. Refractory period length N ref It can be configured according to the refractory period physiological characteristics of the target neuron. This mechanism can be implemented with only a counter and simple comparison logic.

[0098] To further output peak waveform features for subsequent classification or compressed transmission, the system can be configured with a peak search module as an optional extension. This module does not require caching the complete peak waveform; it can output the core amplitude features of the peak through only a fixed-length local scan, which is convenient for subsequent classification or feature extraction.

[0099] When the threshold crossing judgment module generates a valid detection event, the peak search module searches for local extrema within a fixed-length window L after the event trigger point. The search window L starts from the event trigger point and scans a preset number of samples backward, recording the maximum or minimum value within the window (specifically configured according to the detection polarity) and its index offset relative to the event point.

[0100] In one embodiment, the present invention supports three configurable peak detection modes: positive peak detection only, negative peak detection only, and simultaneous detection of positive and negative peaks. The peak search module automatically matches the corresponding extreme value search rules according to the system's preset detection modes, without modifying the core computation chain, and can flexibly adapt to the discharge polarity characteristics of neurons in different brain regions. The extreme value search rules are as follows: when configured in the positive peak detection only mode, the local extreme value within the search window is the maximum value; when configured in the negative peak detection only mode, the local extreme value within the search window is the minimum value; when configured in the simultaneous positive and negative peak detection mode, the maximum or minimum value within the search window corresponds to the direction in which the current threshold is crossed. For application scenarios that only require detection of a single polarity of peak, the threshold calculation and peak search chain for the other polarity can be disabled, further reducing hardware overhead.

[0101] The peak search module only needs two registers to maintain the current extreme value and the corresponding index respectively. It does not need to store the complete peak waveform. It can output the peak amplitude and time index information within an acceptable fixed delay. The processing delay is determined by the search window length L and can be precisely controlled according to the system-level timing budget. At the same time, it can be enabled or disabled according to hardware resource constraints and application requirements without affecting the normal operation of the core detection link.

[0102] All of the above modules are executed in a strict update order within each sampling period to ensure that the software scheme and the hardware register transfer level description are precisely aligned cycle by cycle. Figure 2 This is a processing timing diagram within a single sampling period according to an embodiment of the present invention. As shown in the figure, with the sampling period as the smallest execution unit, it is horizontally divided into five functional domains: sampling period, detection core, refractory period state, peak search module, and output interface; vertically, it represents the fixed execution timing flow within a single sampling period. All computational and decision steps are executed in a top-down order, and the conditional branches adopt hardware-implementable binary-choice decision logic. In the figure, "alt" represents the conditional branch selection structure in the hardware description language and timing flowchart, i.e., binary-choice multiplexing logic, corresponding to execution branches under different preconditions.

[0103] In one embodiment, at the beginning of each sampling period, the sampling period domain synchronously inputs the neural signal sample of the current moment into the detection core domain, and sequentially performs center estimation update, absolute deviation calculation, scale estimation state update, and threshold calculation. This process is not affected by the subsequent branch decision results, is fully executed in each sampling period, and only requires the maintenance of a constant-level state register, without any historical sample sliding window buffer.

[0104] After the adaptive threshold is generated, a refractory period status check is performed: if the current sampling period is in the unfinished refractory period state, the threshold crossing trigger judgment for this period is skipped directly, and only the period update of the refractory period counter is performed; if the current sampling period is in the finished refractory period state, the threshold crossing judgment is performed, and the peak event is judged by comparing the positional relationship between the current sample and the sample of the previous sampling period relative to the current adaptive threshold; if no valid threshold crossing is detected, no detection result is output for this period, and the cycle ends; if a valid threshold crossing is detected, the hardware-level refractory period mechanism is immediately activated to prohibit the triggering of new peak events within the preset sampling period, thereby suppressing repeated false detections caused by local oscillation of the same peak at the circuit level.

[0105] After a valid spike event is triggered, the threshold spanning the timestamp, i.e., the triggering time of the spike event, is directly output through the output interface field. This process involves no additional processing delay or caching overhead, fully meeting the low-latency processing requirements of closed-loop brain-computer interfaces. In one embodiment, a peak search module is simultaneously started. At the spike triggering time, a search window of preset length is opened. During the continuous sampling period of the window, the extreme amplitude of the spike and its corresponding timestamp are continuously tracked and recorded. At the end of the sampling period of the search window, the peak timestamp and peak amplitude are sequentially output through the output interface field. This mode only requires maintaining two registers to complete extreme value tracking, without caching the complete spike waveform, providing feature support for subsequent processing within a predictable fixed delay.

[0106] At the end of each sampling period, the refractory period state domain will perform a periodic update operation of the counter. If it is within the refractory period, the counter will be decremented. If it is not within the refractory period, the counter will remain in a zero state to prepare for the processing completion state of the next sampling period, forming a complete timing closed loop.

[0107] In one embodiment, to achieve end-to-end fixed-point hardware and software consistency, this invention imposes explicit constraints on the fixed-point implementation details of each module. All constraints are maintained uniformly throughout the system. Specifically, these constraints include: all state variables, including center estimation state and scale estimation state, specify bit width and sign rules; the rounding strategy after multiplication and addition operations is uniformly one of rounding or truncation, maintaining consistency throughout the entire link; overflow handling uniformly adopts one of saturation handling or wraparound handling to avoid numerical deviations caused by inconsistent processing methods in different modules; the update order of each module is defined according to the timing diagram; the timing boundaries of trigger judgment and refractory period counting, the start and end definitions of the amplitude search window, and the output time are all explicitly fixed. Through these constraints, the software reference model built based on a high-level language and the RTL model implemented based on a hardware description language can be precisely compared at the bit level in each clock cycle.

[0108] Figure 3 This is a hardware implementation module framework diagram of an embodiment of the present invention. As shown in the figure, all core states of the present invention include only a center estimation register, a scale estimation register, a previous sample buffer, a refractory period counter, and several state registers for the high-pass filter. The total number of these states is constant and does not expand with the increase of the number of channels, achieving constant-level memory usage. For multi-channel application scenarios, a time-slicing multiplexing method can be adopted to share each operation module among different channels in a time-sharing manner. Only a small number of state registers need to be maintained independently for each channel. The overall resource overhead is linearly related to the number of channels, while the storage overhead of each channel remains constant.

[0109] Specifically, the input sampled data stream first enters the input fixed-point conversion module, which converts it into a unified fixed-point format. Subsequently, the data stream sequentially passes through an optional high-pass preprocessing module, an absolute value deviation calculation module, and an exponential moving average update module, respectively updating the center estimation state and the scale estimation state. Among them, the state register A is used to maintain the scale estimation state A[n-1] of the previous sampling period, which, together with the current absolute deviation, participates in the exponential moving average calculation to obtain the updated scale estimation state A[n].

[0110] In the threshold generation chain, the threshold calculation module receives the updated center estimation state and the updated scale estimation state, and generates an adaptive threshold. The cross-threshold detection module is responsible for reading the sample state cached in the previous sampling period of the same channel (cached by the status register x_prev), comparing the positional relationship between the current sample and the sample in the previous sampling period relative to the adaptive threshold, to determine whether a threshold crossing has occurred. Here, x_prev represents the sample value of the previous sampling period. When the cross-threshold detection determines a valid spike event, the refractory period control module is activated, and its state is recorded by the status register (refractory period determination). New event output is prohibited within a preset number of sampling periods, and a spike event flag is output through the event output interface.

[0111] In addition, the system can optionally integrate a peak search module. When enabled, this module tracks local extrema within a preset window after a peak is triggered, and finally outputs the peak amplitude and its index offset relative to the trigger time through the amplitude and index output interface. Figure 4 This is a schematic diagram of the interface of a detection device according to an embodiment of the present invention. As shown in the figure, the left side is the input interface, used to receive the raw sampled data stream (e.g., 10-bit wide ADC sampled data) output by the front-end neural acquisition analog-to-digital converter. The sampled data is continuously input cycle by cycle based on the system sampling clock. The middle part is the online peak detection core, which integrates functional modules such as fixed-point preprocessing, online baseline and noise estimation, adaptive threshold generation, threshold crossing judgment and refractory period control, and optional peak search. The right side is divided into two independent output interfaces, corresponding to two configurable working modes: the first group is the event output interface, which outputs the threshold crossing timestamp, corresponding to the basic lightweight working mode; the second group is the peak output interface, which includes two output ports: the true peak value and the true peak value timestamp, corresponding to the extended working mode with the peak search module enabled.

[0112] This invention achieves adaptive threshold spike detection with constant-level memory usage through a recursive combination of online center estimation and absolute deviation exponential moving average. It simultaneously possesses adaptive noise tracking capability and robustness to outliers with extremely low resource overhead. Its explicit fixed-point implementation constraints ensure cycle-by-cycle consistency between the software solution and hardware implementation, significantly reducing engineering verification and cross-platform portability costs. The technical solution of this invention is applicable to various implantable or wearable neural signal acquisition devices, especially suitable for on-chip online processing scenarios with high channel counts and limited resources.

[0113] Corresponding to the neural spike detection methods disclosed in the above embodiments, the present invention also provides a neural spike detection device. This device is based on fixed-point arithmetic and employs a sample-by-sample pipelined processing architecture, including a core processing chain. The core processing chain sequentially cascades an input fixed-point estimation module, an online center estimation module, a scale estimation module, a threshold calculation module, and a threshold crossing determination module.

[0114] The input localization module performs localization processing on the original acquired neural signal sampling data, outputting fixed-point samples that conform to (preset or non-preset) bit-width rules. The online center estimation module continuously updates the center estimation state by comparing the current sample with the previous center estimation state and, based on the comparison result, incrementing, decrementing, or keeping constant according to a preset fixed step size to obtain the updated center estimation state. The scale estimation module continuously updates the scale estimation state by calculating the absolute deviation between the current sample and the updated center estimation state and performing an exponential moving average operation on the absolute deviation to obtain the updated scale estimation state. The threshold calculation module generates an adaptive threshold based on the updated center estimation state and the updated scale estimation state. The threshold crossing judgment module performs threshold crossing judgment on the current sample based on the adaptive threshold and the state of the previous sampled sample, and outputs a spike event when a threshold crossing occurs. The execution order of each module within a single sampling period is consistent with the cascading order.

[0115] Furthermore, the input fixed-point module is compatible with raw neural signal sampling data input from multiple sources with different bit widths, supports unsigned ADC sampling data conversion with common bit widths such as 10-bit and 16-bit, and uniformly maps all input data to Q15 fixed-point format to unify the numerical range and precision benchmark of the entire chain operation, avoid numerical overflow during subsequent multiplication and addition operations, and ensure the consistency of operation when different front-end acquisition devices are connected.

[0116] In a further embodiment, the device further includes: a high-pass filter module cascaded between the input fixed-point estimation module and the online center estimation module, and a refractory period control module cascaded at the output of the threshold crossing determination module. The high-pass filter module is used to perform high-pass filtering preprocessing on the fixed-point samples to suppress low-frequency baseline drift components in the neural signal; the refractory period control module is used to start refractory period counting after a spike event is output, and to prohibit the output of new spike events within a preset period.

[0117] In another embodiment, the device further includes a peak search module, which searches for local extrema within a preset search window and outputs the corresponding amplitude and index offset when the threshold crossing determination module determines that a threshold crossing has occurred.

[0118] This invention also provides a brain-computer interface neural signal processing chip, which integrates the aforementioned neural spike detection device. The chip is an implantable chip that supports parallel time-division multiplexing of multi-channel neural signals, with each channel independently maintaining registers for corresponding center estimation state, scale estimation state, and refractory period state.

[0119] This invention also provides an implantable neural signal acquisition system, comprising a neural electrode array, an analog front-end circuit, a brain-computer interface neural signal processing chip, and a transmission module connected in sequence. The neural electrode array is used to acquire neural electrical signals from intracranial neurons; the analog front-end circuit amplifies, filters, and performs analog-to-digital conversion on the neural electrical signals, outputting the neural signal sampling data to the brain-computer interface neural signal processing chip; the brain-computer interface neural signal processing chip performs neural spike detection, outputting spike events to the transmission module; and the transmission module transmits the spike events to an external device.

[0120] This invention also provides a brain-computer interface closed-loop neuromodulation device, comprising the aforementioned implantable neural signal acquisition system, modulation decision module, and neural stimulation module, which are cascaded together. The implantable neural signal acquisition system acquires neural signals and outputs peak events to the modulation decision module; the modulation decision module generates neuromodulation instructions based on the characteristics of the peak events; and the neural stimulation module outputs electrical, optical, or magnetic stimulation signals to the target brain region according to the neuromodulation instructions, thereby achieving closed-loop neuromodulation.

[0121] All core states of this invention consist of only constant-level state registers, and the total number of states does not expand with the increase of the number of channels. There is no need to configure a historical sample sliding window cache or histogram counting array. For high-density multi-channel neural signal acquisition scenarios, the computing module can be shared by time-slicing multiplexing. Only a dedicated constant-level state register group needs to be maintained for each channel. The overall resource overhead is linearly related to the number of channels. It can be flexibly adapted to various hardware implementation carriers such as implantable brain-computer interface dedicated integrated circuits, field-programmable gate arrays, and system-on-a-chip.

[0122] To better illustrate the present invention, numerous specific details have been provided in the detailed embodiments described above. Those skilled in the art should understand that the present invention can be practiced even without certain specific details. In some instances, methods, means, components, and circuits well known to those skilled in the art have not been described in detail in order to highlight the main points of the present invention.

[0123] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A method for detecting neural spikes, characterized in that, include: We define and continuously update a central estimation state and a scale estimation state; where, The center estimation state update method is as follows: compare the current sample with the previous center estimation state, and based on the comparison result, perform incrementing, decrementing or keeping constant according to a preset fixed step size to obtain the updated center estimation state; The scaling estimation state update method is as follows: calculate the absolute deviation between the current sample and the updated center estimation state, and perform an exponential moving average operation on the absolute deviation to obtain the updated scaling estimation state; An adaptive threshold is generated based on the updated center estimation state and the updated scale estimation state; At least using the adaptive threshold, it is determined whether to output a spike event.

2. The neural spike detection method according to claim 1, characterized in that, include: Based on the adaptive threshold and the state of the previous sample, a threshold crossing determination is performed on the current sample, and a spike event is output when a threshold crossing is determined.

3. The neural spike detection method according to claim 2, characterized in that, It also includes input preprocessing steps: The original acquired neural signal sampling data is subjected to fixed-point processing to obtain fixed-point samples that conform to the bit width rule; The fixed-point processing includes: converting the neural signal sampling data into signed numbers by zero-point bias correction, multiplying the data by a gain coefficient for amplitude scaling, and saturating and truncating to the target bit width.

4. The neural spike detection method according to claim 2, characterized in that: Before performing the center-estimated state update, a high-pass filter preprocessing is also performed on the current sample to suppress low-frequency baseline drift components in the neural signal.

5. The neural spike detection method according to claim 4, characterized in that: The high-pass filtering preprocessing uses a second-order double quadratic infinite impulse response high-pass filter to filter the current sample. The coefficients of the high-pass filter are configurable fixed-point quantization parameters. The filter's internal state register uses an extended bit width to retain intermediate calculation precision. The filter's input and output data have the same bit width as the fixed-point sample after fixed-point quantization.

6. The neural spike detection method according to claim 2, characterized in that, It also includes refractory period control steps: Before performing a threshold crossing judgment, first check whether the current state is in a refractory period. If the event is in the refractory period, skip the threshold crossing judgment and do not output the spike event. If not in the refractory period, a threshold crossing judgment is performed. After a spike event is output, the refractory period counter is started, and new spike event outputs are prohibited within a preset configurable number of sampling periods.

7. The neural spike detection method according to claim 2, characterized in that, It also includes a peak search step: When a threshold crossing is detected, a local extremum is searched within a search window of a preset length starting from the trigger time, and the magnitude of the local extremum and its index offset relative to the trigger time are output. The search rule for local extrema is determined based on a preset peak detection mode: when configured as a positive peak detection mode only, the local extrema within the search window is the maximum value; when configured as a negative peak detection mode only, the local extrema within the search window is the minimum value; when configured as a simultaneous positive and negative peak detection mode, the maximum or minimum value within the search window corresponds to the direction in which the current threshold is crossed. During the peak search step, extreme value tracking is completed by maintaining only two registers: the current extreme value and the corresponding index.

8. A neural spike detection device, characterized in that, Based on fixed-point arithmetic, it adopts a sample-by-sample pipelined processing architecture, including a core processing chain. The core processing chain consists of a cascaded input fixed-point estimation module, an online center estimation module, a scale estimation module, a threshold calculation module, and a threshold crossing determination module. The input localization module is used to perform localization processing on the original acquired neural signal sampling data and output fixed-point samples that conform to the preset bit width rules. The online center estimation module is used to continuously update the center estimation state by comparing the current sample with the previous center estimation state and, based on the comparison result, performing incrementing, decrementing or keeping constant steps according to a preset fixed step size to obtain the updated center estimation state. The scaling estimation module is used to continuously update the scaling estimation state, calculate the absolute deviation between the current sample and the updated center estimation state, and perform an exponential moving average operation on the absolute deviation to obtain the updated scaling estimation state. The threshold calculation module is used to generate an adaptive threshold based on the updated center estimation state and the updated scale estimation state. The threshold crossing determination module is used to perform threshold crossing determination on the current sample based on the adaptive threshold and the state of the previous sample, and output a spike event when a threshold crossing is determined to occur; and... The execution order of the aforementioned modules within a single sampling period is consistent with the cascading order.

9. The neural spike detection device according to claim 8, characterized in that: The online center estimation module, scale estimation module, threshold calculation module, and threshold crossing determination module are all implemented using fixed-point arithmetic, and the bit width of the state variables, the rounding strategy of multiplication and addition operations, the overflow handling strategy, and the module update order within a single sampling period of all modules are uniformly constrained.

10. The neural spike detection device according to claim 8, characterized in that, Also includes: A high-pass filter module is cascaded between the input fixed-point module and the online center estimation module, and a refractory period control module is cascaded at the output of the threshold crossing determination module; The high-pass filtering module is used to perform high-pass filtering preprocessing on fixed-point samples to suppress low-frequency baseline drift components in neural signals. The refractory period control module is used to start the refractory period count after a spike event is output, and to prohibit the output of new spike events within a preset period.

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