A fast algorithm for parasitic capacitance extraction of large scale integrated circuits

Abstract

This invention relates to the field of capacitance calculation technology and discloses a fast algorithm for extracting parasitic capacitance in large-scale integrated circuits. This method combines the method of moments (MoM), a fast multipole algorithm for layered dielectrics, and overlapping region decomposition preprocessing techniques to construct a complete parasitic capacitance extraction solution. By directly introducing the Green's function for the layered dielectric, the numerical solution strictly satisfies the electric field transport conditions at the dielectric interface, and the electrostatic problem in the layered dielectric is transformed into boundary integral equations defined on the interconnect surface. Subsequently, the MoM is used to discretize these boundary integral equations, resulting in a large-scale dense system of linear algebraic equations. To improve solution efficiency, an efficient preprocessing strategy based on overlapping region decomposition is further designed, and combined with the matrix-free minimum residual iteration method and the layered fast multipole algorithm, achieving efficient solution with low computational and storage overhead.

Description

Technical Field

[0001] This invention relates to the field of capacitance calculation technology, and more particularly to accurate capacitance calculation on integrated circuits. Background Technology

[0002] After layout design, a typical integrated circuit design requires parasitic parameter extraction to calculate the electromagnetic effects between interconnects, such as capacitance, resistance, and inductance, to ensure more accurate simulation results in subsequent circuit simulations. With increasing operating frequencies and advancements in semiconductor technology, the differences between microwave integrated circuits and general-purpose large-scale integrated circuits are becoming increasingly smaller, making parasitic parameter extraction crucial in both industrial design fields. Many current integrated circuits operate at frequencies reaching hundreds of GHz. The combined effect of parasitic capacitance and inductance can generate a so-called "ringing" phenomenon in interconnects. This means that signals oscillate during interconnect transmission due to reflections and other factors, specifically fluctuating around the target value instead of smoothly reaching high or low levels, which severely affects signal integrity. Furthermore, the interaction between interconnects and surrounding layered dielectrics, as well as between interconnects themselves, introduces noise into the signal. In the frequency domain, parasitic inductance and capacitance effects in interconnects can produce resonance peaks in the frequency response.

[0003] In summary, as the operating frequency increases, parasitic effects have a greater impact on power consumption and signal integrity, and their calculations have become extremely complex with the development of deep submicron design technology and advanced packaging technology. Summary of the Invention

[0004] This invention provides a fast algorithm for extracting parasitic capacitance in large-scale integrated circuits, to solve the problem that existing three-dimensional integrated circuits cannot effectively and accurately calculate parasitic capacitance.

[0005] To achieve the above objectives, the present invention employs the following technical solution:

[0006] This invention provides a fast algorithm for extracting parasitic capacitance in large-scale integrated circuits, comprising the following steps: Step 1: Construct a three-dimensional model of the interconnect conductor based on the integrated circuit, and construct the boundary integral equation about the surface charge density of the conductor using the layered dielectric Green's function based on the three-dimensional model of the interconnect conductor; The three-dimensional model of the interconnect conductor is composed of interconnect lines in the integrated circuit. Some interconnect lines can pass through several layers of dielectric in the integrated circuit. The three-dimensional model of the interconnect conductor is a three-dimensional model of multiple dielectric layers.

[0007] Step 2: Discretize the surface of the conductor in the 3D model of the interconnected conductor using a non-uniform mesh. Based on the discrete mesh, use the collocation method to transform the boundary integral equation into a system of linear equations consisting of a fixed coefficient matrix, an unknown charge density vector, and a right-hand side vector of the potential. Step 3: Set the excitation conditions for a single conductor, and construct the right-hand vector of the potential under the current excitation conditions. Solve the linear equation system using the matrix-free minimum residual iteration method. The product of the fixed coefficient matrix of each iteration and the unknown charge density vector of the current iteration step in the matrix-free minimum residual iteration method is calculated using the hierarchical fast multipole algorithm to obtain the charge density vector on all boundary units under the current excitation conditions. Step 4: Based on the charge density vectors on all boundary elements under the current excitation conditions, and combined with the attribution relationship between the boundary elements and the original conductor, perform surface integration on the charge density of all boundary elements of a single conductor, calculate the charge of the single conductor, and obtain the corresponding capacitance matrix vector. Step 5: Repeat steps 3 to 4 until you obtain the single column vectors of the capacitance matrix corresponding to all conductors on the integrated circuit, and construct the capacitance matrix of the entire integrated circuit based on the single column vectors of the capacitance matrix.

[0008] Through the above design, by transforming the parasitic capacitance extraction problem into a boundary integral equation and discretizing it using the method of moments, and combining matrix-free iterative solution with hierarchical fast multi-stage algorithm acceleration, the overall computational complexity and storage overhead are reduced to O(N), which can efficiently handle the parasitic capacitance extraction problem of VLSI.

[0009] Furthermore, step 2 includes: In the three-dimensional model of interconnected conductors, all conductor surfaces are grouped according to their dielectric layers to obtain the boundary surfaces in each layer. The boundary surfaces in each layer are geometrically discretized using triangular elements. During the function discretization process, constant elements are used as basis functions, and the collocation method with the center point of the element is used as the collocation point to form a linear system of equations consisting of a fixed coefficient matrix, an unknown charge density vector, and a right-hand side vector of the potential.

[0010] Through the above design, by discretizing according to the dielectric layer, the influence of the difference in dielectric constant of different dielectric layers on the electric field distribution can be accurately handled; the constant element collocation method simplifies the numerical integration calculation and improves the discretization efficiency.

[0011] Furthermore, in step 3, the multiplication integral is decomposed into free field contribution and induced field contribution; The contribution of the free field is calculated using the classical fast multipole algorithm; The contribution of the induced field is calculated using a hierarchical fast multipole algorithm. The hierarchical fast multipole algorithm decomposes the contribution of the induced field into several induced field components, and calculates several induced field components by multipole expansion and local expansion based on the mirror coordinates of the collocation points in the collocation method.

[0012] Through the above design, by decomposing matrix-vector multiplication into contributions from the free field and the induced field, the free field adopts the classical fast multipole algorithm to maintain efficient computation, and the induced field adopts the layered fast multipole algorithm based on mirror coordinates, thus realizing O(N) computation of the induced field contribution in the layered medium, overcoming the problem of low efficiency in the existing technology when dealing with multilayer structures.

[0013] Furthermore, the calculation of several induced field components based on the mirror coordinates of the collocation points in the collocation method for multi-pole expansion and local expansion includes: setting corresponding mirror coordinates according to the coordinates of the collocation points used in the collocation method, wherein the mirror coordinates include the equivalent polarization coordinates of the source point and the equivalent action coordinates of the field point; For each induced field component, a fast multipole algorithm is constructed to calculate the required field point tree and source point tree based on the corresponding mirror coordinates. For each induced field component, a calculation process is adopted that involves traversing the source point tree upwards and the field point tree downwards. The far-field effect between the source point and the field point is calculated using a far-field approximation.

[0014] The above design efficiently utilizes the aggregation and dispersion process of the tree structure to achieve rapid calculation of the induced field components.

[0015] Furthermore, the far-field approximation calculation is derived from the expression of the induced field components in the Fourier spectrum space and its Taylor expansion, and the expansion order is dynamically adjusted according to a preset error threshold.

[0016] Through the above design, the far-field approximation order can be dynamically adjusted according to the error threshold, thereby optimizing computational efficiency while ensuring computational accuracy.

[0017] Furthermore, in the hierarchical fast multipole algorithm, the conversion between the coefficients of the multipole expansion and the coefficients of the local expansion is performed using the following formula: ; ; in, Indicates the first local expansion coefficient; Indicates the second local expansion coefficient; Indicates the first multipole expansion coefficient; Indicates the second multipole expansion coefficient; The first index represents the multipole expansion coefficient; The second index represents the multipole expansion coefficient; Indicates the first index of the partial expansion; The second index indicates a partial expansion; Represents the first normalization coefficient. ; This represents the second normalization coefficient. ; Represents the transformation coefficients of spherical harmonic functions; This represents the scaling factor in the fast multipole algorithm; Represents an integral operator containing Bessel functions; Indicates the center coordinates of the field point box; Indicates the center coordinates of the source box; This represents the generalized reflection and transmission coefficients of the spectral domain Green's function in a layered medium.

[0018] The above design provides an explicit conversion formula from multipole expansion coefficients to local expansion coefficients, transforming the far-field effect of the induced field in the layered medium into an algebraic operation that can be calculated efficiently and with high precision, thus avoiding the high computational cost of directly calculating a large number of unbounded integrals.

[0019] Furthermore, an overlapping domain decomposition preprocessing method based on field point trees and source point trees is adopted to reduce the number of iterations of the linear equation system. The preprocessing includes: restricting the electrostatic field calculation problem in the layered medium to each layer, forming the electrostatic field calculation problem of the uniform medium in each layer, dividing it into local subproblems with overlapping regions, constructing a block diagonal precondition matrix, and using it to solve the linear algebraic equation system.

[0020] Through the above design, the condition number of the linear equation system obtained by discretizing the boundary integral equation is effectively reduced by the overlapping domain decomposition preprocessing, which greatly reduces the number of iterations required for iterative solution.

[0021] Furthermore, the basis for dividing local subproblems is as follows: the region containing the configuration points of each leaf node and its neighboring nodes in the field point tree and source point tree generated by the fast multi-pole algorithm is defined as a subproblem definition region.

[0022] The above design utilizes the existing tree structure of the fast multi-level algorithm to divide the problem into sub-problems, eliminating the need for additional computational overhead and improving the overall solution efficiency.

[0023] Furthermore, the minimum residual iteration method is a generalized minimum residual method.

[0024] Through the above design, the generalized minimum residual method is applicable to solving asymmetric linear equation systems, is convergent and stable, and matches the asymmetric coefficient matrix obtained by the boundary element method, which can effectively guarantee the convergence and stability of the iterative solution.

[0025] Furthermore, it is applicable to multilayer dielectric structures containing metal vias, allowing the conductor surface to span multiple dielectric layers.

[0026] The above design supports complex structures spanning multiple dielectric layers on the conductor surface, and can handle three-dimensional interconnect structures such as metal vias commonly used in integrated circuit design. This expands the engineering applicability of the algorithm and meets the design requirements of advanced packaging and three-dimensional integrated circuits.

[0027] Beneficial effects: This invention provides a fast algorithm for extracting parasitic capacitance in large-scale integrated circuits (LSI). By transforming the LSI parasitic capacitance extraction problem into a boundary integral equation based on the Green's function of a layered dielectric, the three-dimensional problem of solving the field is reduced to a two-dimensional problem on the interconnect surface, significantly reducing the computational scale. The coefficient matrix formed after discretization using the method of moments is only related to the geometric structure and dielectric layering, and is a fixed coefficient matrix. By sequentially setting the excitation conditions on different conductors to construct the right-hand side vector of the potential, a solution mode with multiple right-hand side terms corresponding to the same coefficient matrix is ​​realized, avoiding the computational overhead of repeated discretization.

[0028] In the matrix-free minimum residual iterative solution process, the product of the fixed coefficient matrix in each iteration and the unknown charge density vector of the current iteration step is accelerated by the layered medium fast multipole algorithm, reducing the computational complexity from that of traditional methods. Down to Storage overhead has also decreased Finally, by performing area integration on the charge density vectors obtained under various excitation conditions, a complete capacitance matrix is ​​efficiently constructed. While maintaining precise satisfaction of the layered dielectric interface conditions, both computational and storage efficiency are optimized, enabling the extraction of parasitic capacitances from VLSI circuits containing hundreds of dielectric layers and tens of millions of unknowns. Attached Figure Description

[0029] Figure 1 This is a flowchart of a fast algorithm for extracting parasitic capacitances of large-scale integrated circuits according to an embodiment of the present invention. Detailed Implementation

[0030] The technical solution of the present invention will be clearly and completely described below. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0031] Unless otherwise defined, the technical or scientific terms used in this invention shall have the ordinary meaning understood by one of ordinary skill in the art to which this invention pertains. The terms "first," "second," and similar terms used in this invention do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms "an" or "a" and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms "connected" or "linked" and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up," "down," "left," "right," etc., are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship also changes accordingly.

[0032] Please see Figure 1 This application provides a fast algorithm for extracting parasitic capacitance in large-scale integrated circuits, comprising the following steps: Step 1: Construct a 3D model of the interconnect conductor based on the integrated circuit, and use the layered dielectric Green's function based on the 3D model of the interconnect conductor. Construct boundary integral equations for the surface charge density of the conductor; After constructing a three-dimensional model of the interconnect conductor based on the integrated circuit, and based on the relationship between the capacitance matrix, potential, and charge of the interconnect line, it is assumed that the integrated circuit has a total of A series of interconnecting conductors, the surfaces of which are respectively denoted as... The medium is divided into Layer, number The spatial region corresponding to the layer is: ; in, Indicates the dielectric layer in which the conductor is located; Indicates the field point; Indicates the first l The z-coordinate of the layer interface; Indicates the location of each medium layer interface; Then it means the first l -1 layer interface coordinate.

[0033] The problem of integrated capacitor extraction is reduced to an electrostatic field equation in a layered medium with a given potential sphere on the surface of the interconnect and the charge distribution on the surface of the interconnect. The surface charge density on the conductor surface is derived using the Green's function in the layered medium, thus obtaining the boundary integral equation: ; in, The dielectric constant function represents the segmentation constant. Indicates the first The dielectric constant of the layer; This represents a given electric potential on the conductor surface, which is a known boundary condition. express The first interconnect conductor One conductor; Indicates that the conductor surface is located at the first Part of the layer; This represents the surface charge density to be determined on the conductor's surface; This represents the area element at the source point; Indicates the first The surface of a conductor; The Green's function is specifically expressed as follows: ; in, Indicates field point The media layer number it is located in; Represents the source point The media layer number it is located in Represents the Green's function in free space. Indicates the components of the induced field; Step 2: Discretize the surface of the conductor in the 3D model of the interconnected conductor using a non-uniform mesh. Based on the discrete mesh, use the collocation method to transform the boundary integral equation into a system of linear equations consisting of a fixed coefficient matrix, an unknown charge density vector, and a right-hand side vector of the potential. For the three-dimensional model of interconnected conductors, all conductor surfaces are arranged according to their dielectric layers. Grouping is performed to obtain the boundary surfaces in each layer. ; In this embodiment, the boundary surfaces in each layer are geometrically discretized using triangular units. In other embodiments, quadrilaterals or other polygons can also be used to discretize the boundary surfaces. After geometric discretization using triangular elements, the following is obtained: Each boundary element uses constant elements as basis functions, and in each triangular element... The surface charge density at the general's position is approximately constant. With the unit center point For the location points, the boundary integral equations are discretized into a system of linear equations: ; in, This represents the vector formed by the unknown charge densities on all boundary units; The right-hand vector related to the conductor's potential; express The fixed coefficient matrix has the following elements: ; For self-acting within the same unit The singular integral is calculated using the following analytical formula: ; in, This represents the distance from the center of the triangular unit to each side; Indicates the distance from the center of the triangle to the th Distance between the edges; and These represent the two included angles of the triangular unit.

[0034] Step 3: Set the excitation conditions for a single conductor and construct the right-hand vector of the potential under the current excitation conditions. Solve the linear equation system using the matrix-free minimum residual iteration method. The product of the fixed coefficient matrix of each iteration and the unknown charge density vector of the current iteration step is calculated using the hierarchical fast multipole algorithm to obtain the charge density vector on all boundary elements under the current excitation conditions. Specifically, the excitation condition involves setting the potential of a single conductor to a preset value. In this embodiment, the potential of the first conductor is set to a preset value. The potential of the conductor is The potential of other conductors is , Construct the right-hand vector under the current excitation condition respectively. ; Solving the system of linear equations using the matrix-free minimum residual iteration method (generalized minimum residual method) During the iteration process, each iteration requires calculating the product of the fixed coefficient matrix and the charge density vector of the current iteration step. This calculation is accelerated using a hierarchical medium fast multi-pole algorithm, eliminating the need to explicitly store the coefficient matrix. After convergence, the charge density vector on all boundary elements under the current excitation condition is obtained. ; The hierarchical fast multi-pole algorithm specifically includes: The integral solution of the fixed coefficient matrix of each iteration and the unknown charge density vector of the current iteration step in the matrix-free minimum residual iteration method is the free field contribution and the induced field contribution. The contribution of the free field is calculated using the classic fast multipole algorithm, specifically through octree space partitioning, multipole expansion and local expansion, which is the existing technology and will not be elaborated on here. The contribution of the induced field is calculated using a hierarchical fast multipole algorithm, which decomposes the induced field contribution into four induced field components, expressed by the following formula: ; in, , , as well as These represent the four components of the induced field in different propagation directions.

[0035] Set the corresponding mirror coordinates according to the coordinates of the collocation points used in the collocation method. The mirror coordinates include the equivalent polarization coordinates of the source point and the equivalent action coordinates of the field point. Here, the equivalent polarization coordinates of the source point are specifically defined as follows:

[0036]

[0037] in, An equivalent polarization coordinate representing the source point; Represents the source point About the interface The mirror coordinates are defined as follows: ; This represents another equivalent polarization coordinate of the source point; Represents the source point About the interface The mirror coordinates are defined as follows: .

[0038] The specific definition of the equivalent action coordinates of the field point is as follows:

[0039]

[0040]

[0041]

[0042] in, , , , These represent the equivalent action coordinates of a field point; Indicates field point About the interface The mirror coordinates are defined as follows: ; Indicates field point About the interface The mirror coordinates are defined as follows: .

[0043] For each induced field component, the field point tree and source point tree required for calculation by the fast multipole algorithm are constructed based on the corresponding mirror coordinates. For the construction of the field point tree and source point tree, an octree structure is used to recursively divide the space. Each leaf node contains a certain number of source points or long points. The height of the tree is determined according to the problem size, so that the number of particles in each leaf node remains constant. For each induced field component, a calculation process is adopted that involves traversing the source point tree upwards and the field point tree downwards. The far-field effect between the source point and the field point is calculated using a far-field approximation. The far-field approximation is derived from the expression of the induced field components in the Fourier spectrum space and their Taylor expansion. The expansion order is dynamically adjusted according to the preset error threshold. In the fast multipole algorithm for layered media, the conversion between the coefficients of the multipole expansion and the coefficients of the local expansion is performed using the following formula: ; ; in, Indicates the first local expansion coefficient; Indicates the second local expansion coefficient; Indicates the first multipole expansion coefficient; Indicates the second multipole expansion coefficient; The first index represents the multipole expansion coefficient; The second index represents the multipole expansion coefficient; Indicates the first index of the partial expansion; The second index indicates a partial expansion; Represents the first normalization coefficient. ; This represents the second normalization coefficient. ; Represents the transformation coefficients of spherical harmonic functions; This represents the scaling factor in the fast multipole algorithm; Represents an integral operator containing Bessel functions; Indicates the center coordinates of the field point box; Indicates the center coordinates of the source box; This represents the generalized reflection and transmission coefficients of the spectral domain Green's function in a layered medium. An overlapping domain decomposition preprocessing method based on field point tree and source point tree is adopted to reduce the number of iterations of linear equation system. The preprocessing includes: restricting the electrostatic field calculation problem in layered medium to each layer, forming the electrostatic field calculation problem of uniform medium in each layer, dividing it into local subproblems with overlapping regions, constructing block diagonal precondition matrix, and using it to solve linear algebra equation system. The basis for dividing local subproblems is: the region containing the configuration points of each leaf node and its neighboring nodes in the field point tree and source point tree generated by the fast multi-pole algorithm is divided into a subproblem definition region; The minimum residual iteration method is a generalized minimum residual method.

[0044] Suitable for multilayer dielectric structures containing metal vias, allowing conductor surfaces to span multiple dielectric layers.

[0045] Step 4: Based on the charge density vectors on all boundary elements under the current excitation conditions, and combined with the attribution relationship between the boundary elements and the original conductor, perform surface integration on the charge density of all boundary elements of a single conductor, calculate the charge of the single conductor, and obtain the corresponding capacitance matrix vector. Based on the association between boundary elements and the original conductor during non-uniform mesh discretization in step 2, the first... The charge of a conductor is obtained by integrating the surface integral of the charge density over all boundary units of the conductor: ; in, Indicates the charge carried by the conductor; This represents the charge density on all boundary elements under the current excitation condition; This represents the charge density of the triangular element under the current excitation condition; Represents triangular unit The area; Step 5: Repeat steps 3 to 4 until you obtain the single column vectors of the capacitance matrix corresponding to all conductors on the integrated circuit, and construct the capacitance matrix of the entire integrated circuit based on the single column vectors of the capacitance matrix.

[0046] right Repeat steps 3 and 4 for all conductors to obtain the single-column vector of the capacitance matrix corresponding to each conductor, and combine them to form the complete capacitance matrix. Capacitor matrix.

[0047] The preferred embodiments of the present invention have been described in detail above. It should be understood that those skilled in the art can make numerous modifications and variations based on the concept of the present invention without creative effort. Therefore, all technical solutions that can be obtained by those skilled in the art based on the concept of the present invention through logical analysis, reasoning, or limited experimentation on the basis of existing technology should be within the scope of protection defined by the claims.

Claims

1. A fast algorithm for extracting parasitic capacitance in large-scale integrated circuits, characterized in that, Includes the following steps: Step 1: Construct a three-dimensional model of the interconnect conductor based on the integrated circuit, and construct the boundary integral equation about the surface charge density of the conductor using the layered dielectric Green's function based on the three-dimensional model of the interconnect conductor; Step 2: Discretize the surface of the conductor in the 3D model of the interconnected conductor using a non-uniform mesh. Based on the discrete mesh, use the collocation method to transform the boundary integral equation into a system of linear equations consisting of a fixed coefficient matrix, an unknown charge density vector, and a right-hand side vector of the potential. Step 3: Set the excitation conditions for a single conductor, and construct the right-hand vector of the potential under the current excitation conditions. Solve the linear equation system using the matrix-free minimum residual iteration method. The product of the fixed coefficient matrix of each iteration and the unknown charge density vector of the current iteration step in the matrix-free minimum residual iteration method is calculated using the hierarchical fast multipole algorithm to obtain the charge density vector on all boundary units under the current excitation conditions. Step 4: Based on the charge density vectors on all boundary elements under the current excitation conditions, and combined with the attribution relationship between the boundary elements and the original conductor, perform surface integration on the charge density of all boundary elements of a single conductor, calculate the charge of the single conductor, and obtain the corresponding capacitance matrix vector. Step 5: Repeat steps 3 to 4 until the column vectors of the capacitance matrix corresponding to all conductors on the integrated circuit are obtained, and construct the capacitance matrix of the entire integrated circuit interconnect conductors based on the column vectors of the capacitance matrix.

2. The fast algorithm for extracting parasitic capacitance of large-scale integrated circuits according to claim 1, characterized in that, Step 2 includes: In the three-dimensional model of interconnected conductors, all conductor surfaces are grouped according to their dielectric layers to obtain the boundary surfaces in each layer. The boundary surfaces in each layer are geometrically discretized using triangular elements. During the function discretization process, constant elements are used as basis functions, and the collocation method with the center point of the element is used as the collocation point to form a linear system of equations consisting of a fixed coefficient matrix, an unknown charge density vector, and a right-hand side vector of the potential.

3. The fast algorithm for extracting parasitic capacitances of large-scale integrated circuits according to claim 2, characterized in that, In step 3, the multiplication integral is decomposed into the free field contribution and the induced field contribution; The contribution of the free field is calculated using the classical fast multipole algorithm; The contribution of the induced field is calculated using a hierarchical fast multipole algorithm. The hierarchical fast multipole algorithm decomposes the contribution of the induced field into several induced field components, and calculates several induced field components by multipole expansion and local expansion based on the mirror coordinates of the collocation points in the collocation method.

4. The fast algorithm for extracting parasitic capacitance of large-scale integrated circuits according to claim 3, characterized in that, The calculation of several induced field components based on the mirror coordinates of the collocation points in the collocation method for multi-pole expansion and local expansion includes: setting corresponding mirror coordinates according to the coordinates of the collocation points used in the collocation method, wherein the mirror coordinates include the equivalent polarization coordinates of the source point and the equivalent action coordinates of the field point; For each induced field component, a fast multipole algorithm is constructed to calculate the required field point tree and source point tree based on the corresponding mirror coordinates. For each induced field component, a calculation process is adopted that involves traversing the source point tree upwards and the field point tree downwards. The far-field effect between the source point and the field point is calculated using a far-field approximation.

5. The fast algorithm for extracting parasitic capacitances of large-scale integrated circuits according to claim 4, characterized in that, The far-field approximation calculation is derived from the expression of the induced field component in the Fourier spectrum space and its Taylor expansion, and the expansion order is dynamically adjusted according to a preset error threshold.

6. The fast algorithm for extracting parasitic capacitances of large-scale integrated circuits according to claim 3, characterized in that, In the hierarchical fast multipole algorithm, the conversion between the coefficients of the multipole expansion and the coefficients of the local expansion is performed using the following formula: ； ； in, Indicates the first local expansion coefficient; Indicates the second local expansion coefficient; Indicates the first multipole expansion coefficient; Indicates the second multipole expansion coefficient; The first index represents the multipole expansion coefficient; The second index represents the multipole expansion coefficient; Indicates the first index of the partial expansion; The second index indicates a partial expansion; Represents the first normalization coefficient. ; This represents the second normalization coefficient. ; Represents the transformation coefficients of spherical harmonic functions; This represents the scaling factor in the fast multipole algorithm; Represents an integral operator containing Bessel functions; Indicates the center coordinates of the field point box; Indicates the center coordinates of the source box; This represents the generalized reflection and transmission coefficients of the spectral domain Green's function in a layered medium.

7. The fast algorithm for extracting parasitic capacitances of large-scale integrated circuits according to claim 1, characterized in that, An overlapping domain decomposition preprocessing method based on field point trees and source point trees is adopted to reduce the number of iterations of linear equations. The preprocessing includes: restricting the electrostatic field calculation problem in the layered medium to each layer, forming the electrostatic field calculation problem of the uniform medium in each layer, dividing it into local subproblems with overlapping regions, constructing a block diagonal precondition matrix, and using it to solve the linear algebraic equations.

8. The fast algorithm for extracting parasitic capacitance of large-scale integrated circuits according to claim 7, characterized in that, The basis for dividing local subproblems is: the region containing the configuration points of each leaf node and its neighboring nodes in the field point tree and source point tree generated by the fast multi-pole algorithm is defined as a subproblem definition region.

9. The fast algorithm for extracting parasitic capacitances of large-scale integrated circuits according to claim 1, characterized in that, The minimum residual iteration method is a generalized minimum residual method.

10. The fast algorithm for extracting parasitic capacitances of large-scale integrated circuits according to claim 1, characterized in that, Suitable for multilayer dielectric structures containing metal vias, allowing conductor surfaces to span multiple dielectric layers.

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