A USB3.0 signal isolation circuit, electronic equipment and signal isolation method

Abstract

This application discloses a USB 3.0 signal isolation circuit, electronic device, and signal isolation method, relating to the field of electronic communication technology. The USB 3.0 signal isolation circuit connects the host side and the device side. By configuring a first signal driver conditioner, a second signal driver conditioner, a first high-frequency isolation transformer, and a second high-frequency isolation transformer, a bidirectional high-speed signal isolation channel is constructed. Signal conditioning, such as pre-emphasis, equalization, or gain adjustment, is performed on the high-speed differential signal. Simultaneously, electrical isolation is achieved using the high-frequency isolation transformer, overcoming the limitations of traditional solutions in terms of signal integrity, bandwidth, and transmission delay. Therefore, high-speed reliable data transmission between the host side and the device side is realized, while ensuring electrical safety, effectively suppressing common-mode interference, and improving system stability and anti-interference capability.

Description

Technical Field

[0001] This application relates to the field of electronic communication technology, and in particular to a USB 3.0 signal isolation circuit, electronic device, and signal isolation method. Background Technology

[0002] The continuous evolution of Universal Serial Bus (USB) interface technology, especially the widespread application of the USB 3.0 standard, has significantly increased data transfer rates to the 5Gbps level, enabling its deep deployment in key areas such as industrial automation control systems, medical diagnostic equipment, precision test and measurement instruments, and high-voltage power monitoring devices. These high-speed transmission scenarios place stringent requirements on signal integrity and electromagnetic compatibility; issues such as signal waveform distortion, jitter accumulation, and noise interference directly impact system reliability.

[0003] In practical engineering applications, scenarios such as communication links between industrial fieldbuses and host computers, interfaces between medical equipment and external data acquisition units, and connection channels between high-voltage power devices and low-voltage control modules commonly encounter ground potential fluctuations, strong electromagnetic interference, and potential high-voltage breakdown risks. Electrical isolation is essential to ensure operator safety, protect sensitive electronic components, and maintain stable system operation. Electrical isolation effectively blocks ground loop currents, suppresses common-mode noise propagation, and prevents the diffusion of high-voltage fault energy to the low-voltage side.

[0004] However, existing isolation technologies primarily focus on processing USB 2.0 and lower-speed signals. The bandwidth characteristics and response speed of their core components, such as optocouplers or low-frequency magnetic isolators, cannot match the high-frequency characteristics of USB 3.0 signals. The rapid rise time and abundant high-frequency components of USB 3.0 signals lead to significant signal attenuation, transmission delay mismatch, and eye diagram closure during traditional isolation processes, resulting in increased bit error rates and communication link interruptions. Furthermore, existing solutions struggle to balance impedance matching accuracy and insertion loss control when achieving operating bandwidths above 5GHz, causing severe signal integrity degradation. These technical bottlenecks significantly hinder the widespread adoption of USB 3.0 interfaces in industrial, medical, and high-reliability scenarios requiring electrical isolation. Summary of the Invention

[0005] The purpose of this application is to provide a USB 3.0 signal isolation circuit, device, equipment, medium, and mobile carrier, which effectively solves the problems of attenuation and distortion of USB 3.0 high-speed signals during the isolation process, and ensures signal integrity and communication reliability.

[0006] To achieve the above objectives, this application provides the following solution: In one aspect, this application provides a USB 3.0 signal isolation circuit connected between a host side and a device side, comprising: a first signal driver conditioner, a second signal driver conditioner, a first high-frequency isolation transformer, and a second high-frequency isolation transformer; the first signal driver conditioner includes a first signal transmitting end and a first signal receiving end; the second signal driver conditioner includes a second signal transmitting end and a second signal receiving end; the input end of the first signal transmitting end is used to connect to a USB 3.0 differential signal pair transmitted on the host side; the output end of the first signal transmitting end is connected to the primary side of the first high-frequency isolation transformer via a first DC blocking capacitor bank, wherein the first DC blocking capacitor bank consists of two DC blocking capacitors, which are respectively connected in series on the two signal lines of the USB 3.0 differential signal pair; the secondary side of the first high-frequency isolation transformer is connected to the input end of the second signal receiving end; the output end of the second signal receiving end is connected to the USB 3.0 on the device side via the second DC blocking capacitor bank to receive differential signal pairs, wherein the second DC blocking capacitor bank consists of two DC blocking capacitors, which are respectively connected in series on the two signal lines of the differential signal pair; thereby forming a signal isolation circuit from the host side to the device side. The system comprises: a first signal isolation channel on the device side; an input terminal of the second signal transmitting terminal for connecting to a USB 3.0 differential signal pair on the device side; an output terminal of the second signal transmitting terminal connected to the primary side of the second high-frequency isolation transformer via a third DC blocking capacitor bank, wherein the third DC blocking capacitor bank consists of two DC blocking capacitors connected in series on the two signal lines of the USB 3.0 differential signal pair; a secondary side of the second high-frequency isolation transformer connected to the input terminal of the first signal receiving terminal; an output terminal of the first signal receiving terminal connected to a USB 3.0 on the host side via a fourth DC blocking capacitor bank to receive differential signal pairs, wherein the fourth DC blocking capacitor bank consists of two DC blocking capacitors connected in series on the two signal lines of the differential signal pair; thereby forming a second signal isolation channel from the device side to the host side; a first signal driving conditioner and a second signal driving conditioner for performing at least one of pre-emphasis, equalization, or gain adjustment on the passing high-speed differential signal; and a first high-frequency isolation transformer and a second high-frequency isolation transformer for achieving electrical isolation in the first signal isolation channel and the second signal isolation channel, respectively.

[0007] Optionally, it also includes a first bias resistor network and a second bias resistor network; The first bias resistor network is connected between the first DC blocking capacitor bank and the primary side of the first high-frequency isolation transformer; The second bias resistor network is connected between the third DC blocking capacitor bank and the primary side of the second high-frequency isolation transformer; The first bias resistor network and the second bias resistor network are used to provide a DC operating point for the corresponding high-frequency isolation transformer.

[0008] Optionally, both the first signal driver conditioner and the second signal driver conditioner are provided with two sets of external configuration pins; The USB 3.0 signal isolation circuit also includes two sets of configuration resistors; The two sets of configuration resistors can be selectively soldered between the corresponding external configuration pins and the power supply voltage terminal or the ground terminal to form different soldering combinations; Different soldering combinations are used to set at least one of the operating parameters of the corresponding signal drive conditioner, such as pre-emphasis level, equalization level, or output gain amplitude.

[0009] Optionally, the turns ratio of the primary winding to the secondary winding of the first high-frequency isolation transformer is 1:1; The turns ratio of the primary winding to the secondary winding of the second high-frequency isolation transformer is 1:1; The operating bandwidth of both the first high-frequency isolation transformer and the second high-frequency isolation transformer is not less than 5GHz.

[0010] Optionally, it also includes a first power supply decoupling circuit and a second power supply decoupling circuit; The first power decoupling circuit is connected in parallel between the power input pin of the first signal driver conditioner and ground. The second power supply decoupling circuit is connected in parallel between the power input pin of the second signal driver conditioner and ground; The first power decoupling circuit and the second power decoupling circuit are used to filter out high-frequency noise on the power network.

[0011] Optionally, both the first power supply decoupling circuit and the second power supply decoupling circuit are composed of multiple capacitors of different capacitance values ​​connected in parallel.

[0012] Optionally, it also includes an isolated power supply module; The isolated power supply module includes a first isolated power supply output terminal, a second isolated power supply output terminal, and a primary-side power input terminal for connecting to an external power supply. The first isolated power supply output terminal is used to supply power to the first signal drive conditioner and the host-side circuit; The second isolated power supply output is used to supply power to the second signal drive conditioner and the device-side circuit; The first isolation power supply output terminal and the second isolation power supply output terminal are electrically isolated.

[0013] Optionally, the first signal isolation channel and the second signal isolation channel, along with all their components, are integrated and packaged within a single physical module. The physical module is equipped with a host-side USB 3.0 standard interface and a device-side USB 3.0 standard interface.

[0014] Secondly, this application provides an electronic device that includes the USB 3.0 signal isolation circuit described in any one of the first aspects above.

[0015] Thirdly, this application provides a signal isolation method applied to the USB 3.0 signal isolation circuit described in any one of the first aspects above, comprising: Constructing the first signal isolation channel from the host side to the device side includes: The transmission function of the first signal driver conditioner is used to pre-emphasize the differential signal transmitted from the host side of USB 3.0. The pre-emphasized signal is coupled to the first high-frequency isolation transformer through the first DC blocking capacitor bank. After electrical isolation transmission through the first high-frequency isolation transformer, it is transmitted to the second signal drive conditioner. Using the receiving function of the second signal drive conditioner, the attenuated signal received from the first high-frequency isolation transformer is equalized and the gain is restored, and then output to the equipment side through the second DC blocking capacitor bank; Constructing a second signal isolation channel from the device side to the host side includes: The transmission function of the second signal driver conditioner is used to pre-emphasize the differential signal transmitted from the USB 3.0 device side; The pre-emphasized signal is coupled to the second high-frequency isolation transformer through the third DC blocking capacitor bank. After electrical isolation transmission through the second high-frequency isolation transformer, it is transmitted to the first signal drive conditioner. Using the receiving function of the first signal-driven conditioner, the attenuated signal received from the second high-frequency isolation transformer is subjected to equalization and gain restoration processing, and then output to the host side through the fourth DC blocking capacitor bank.

[0016] According to the specific embodiments provided in this application, the following technical effects are disclosed: This application provides a USB 3.0 signal isolation circuit, electronic device, and signal isolation method. It involves configuring a first signal driver conditioner, a second signal driver conditioner, a first high-frequency isolation transformer, and a second high-frequency isolation transformer. The first signal driver conditioner includes a first signal transmitting end and a first signal receiving end. The second signal driver conditioner includes a second signal transmitting end and a second signal receiving end. The input end of the first signal transmitting end is used to connect to a USB 3.0 transmit differential signal pair on the host side. The output end of the first signal transmitting end is connected to the primary side of the first high-frequency isolation transformer via a first DC blocking capacitor bank. The secondary side of the first high-frequency isolation transformer is connected to the input end of the second signal receiving end via a second DC blocking capacitor bank. The output end of the second signal receiving end is used to connect to a USB 3.0 receive differential signal pair on the device side. This forms a first signal isolation channel from the host side to the device side. The input terminal of the second signal transmitter is used to connect to the USB 3.0 differential signal pair on the device side; the output terminal of the second signal transmitter is connected to the primary side of the second high-frequency isolation transformer via a third DC blocking capacitor bank; the secondary side of the second high-frequency isolation transformer is connected to the input terminal of the first signal receiver via a fourth DC blocking capacitor bank; the output terminal of the first signal receiver is used to connect to the USB 3.0 differential signal pair on the host side; thus forming a second signal isolation channel from the device side to the host side. The first and second signal driver conditioners are used to perform at least one of the following signal conditioning operations on the passing high-speed differential signal: pre-emphasis, equalization, or gain adjustment; the first and second high-frequency isolation transformers are used to achieve electrical isolation in the first and second signal isolation channels, respectively. This application constructs a bidirectional high-speed signal isolation channel by integrating a signal driver conditioner and a high-frequency isolation transformer, which can effectively address the electrical isolation requirements of USB 3.0 high-speed signals in complex application scenarios such as industrial control and medical equipment, overcoming the limitations of traditional solutions in terms of signal integrity, bandwidth, and transmission delay. This enables high-speed and reliable data transmission between the host and device sides, while ensuring electrical safety, effectively suppressing common-mode interference, and improving the system's stability and anti-interference capabilities. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of the structure of a USB 3.0 signal isolation circuit provided in an embodiment of this application; Figure 2A schematic diagram of the structure of a USB 3.0 signal isolation circuit provided in another embodiment of this application; Figure 3 A schematic diagram of the structure of a USB 3.0 signal isolation circuit provided in another embodiment of this application; Figure 4 A schematic diagram of the configuration resistor provided in an embodiment of this application; Figure 5 A schematic diagram illustrating the process of constructing a first signal isolation channel provided in an embodiment of this application; Figure 6 This is a schematic diagram illustrating the process of constructing a second signal isolation channel, provided in an embodiment of this application. Detailed Implementation

[0019] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0020] Traditional USB isolation solutions primarily target low-speed or full-speed signals of USB 2.0 and below. However, for high-speed interfaces like USB 3.0 and above, the high signal frequency and fast rise time impose stringent requirements on the bandwidth, transmission delay, and signal integrity of the isolation devices, leading to significant implementation difficulties and high costs. This makes it challenging to meet the electrical isolation requirements for high-speed data transmission in fields such as industrial control and medical equipment. To address this, this application proposes a USB 3.0 signal isolation circuit connected between the host and device sides. By configuring a first signal driver conditioner, a second signal driver conditioner, a first high-frequency isolation transformer, and a second high-frequency isolation transformer, a bidirectional high-speed signal isolation channel is constructed. The circuit performs signal conditioning such as pre-emphasis, equalization, or gain adjustment on the high-speed differential signal, while simultaneously utilizing the high-frequency isolation transformer to achieve electrical isolation, effectively solving the problem of high-speed USB signal isolation.

[0021] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0022] In one exemplary embodiment, such as Figure 1As shown, a USB 3.0 signal isolation circuit is provided. This circuit connects the host side and the device side. The host side typically refers to the master device in USB communication, such as a personal computer, industrial control computer, or host computer, which is responsible for initiating and controlling data transmission. The device side typically refers to the slave device in USB communication, such as a peripheral device, sensor, medical instrument, or lower-level machine, which responds to requests from the host side and exchanges data.

[0023] The USB 3.0 signal isolation circuit includes: A first signal driver conditioner 110, a second signal driver conditioner 120, a first high-frequency isolation transformer 130, and a second high-frequency isolation transformer 140 are defined. The first signal driver conditioner 110 includes a first signal transmitting end and a first signal receiving end. The second signal driver conditioner 120 includes a second signal transmitting end and a second signal receiving end. The input end 111 of the first signal transmitting end is used to connect to a USB 3.0 differential signal pair on the host side. The output end 112 of the first signal transmitting end is connected to the primary side of the first high-frequency isolation transformer 130 via a first DC blocking capacitor bank. The DC blocking capacitor bank consists of two DC blocking capacitors (C17 and C19), which are connected in series on the two signal lines of the USB 3.0 differential signal pair. The secondary side of the first high-frequency isolation transformer 130 is connected to the input terminal 123 of the second signal receiver. The output terminal 124 of the second signal receiver is connected to the USB 3.0 on the device side via the second DC blocking capacitor bank to receive the differential signal pair. The second DC blocking capacitor bank consists of two DC blocking capacitors (C18 and C20), which are connected in series on the two signal lines of the differential signal pair. This forms a first signal isolation channel from the host side to the device side.

[0024] The input terminal 121 of the second signal transmitter is used to connect to the USB 3.0 differential signal pair on the device side; the output terminal 122 of the second signal transmitter is connected to the primary side of the second high-frequency isolation transformer 140 via a third DC blocking capacitor bank, wherein the third DC blocking capacitor bank consists of two DC blocking capacitors (C22 and C24), which are connected in series on the two signal lines of the USB 3.0 differential signal pair; the secondary side of the second high-frequency isolation transformer 140 is connected to the input terminal 113 of the first signal receiver; the output terminal 114 of the first signal receiver is connected to the USB 3.0 differential signal pair on the host side via a fourth DC blocking capacitor bank. B3.0 receives differential signal pairs, wherein the fourth DC blocking capacitor group consists of two DC blocking capacitors (C21 and C23), which are connected in series on the two signal lines of the differential signal pair, thereby forming a second signal isolation channel from the device side to the host side; the first signal drive conditioner 110 and the second signal drive conditioner 120 are used to perform at least one of the following signal conditioning on the passing high-speed differential signal: pre-emphasis, equalization, or gain adjustment; the first high-frequency isolation transformer 130 and the second high-frequency isolation transformer 140 are used to achieve electrical isolation in the first signal isolation channel and the second signal isolation channel, respectively.

[0025] Among them, the signal driver conditioner is an integrated circuit used in high-speed signal transmission paths. Its main function is to perform pre-emphasis, equalization or gain adjustment on the signal to compensate for transmission line loss, improve signal integrity, and ensure that the signal can still be correctly received after long-distance or high-speed transmission.

[0026] A high-frequency isolation transformer is a device that uses the principle of electromagnetic induction to achieve signal transmission and electrical isolation. Its characteristics include the ability to transmit high-frequency signals while providing high-voltage insulation between the primary and secondary sides, effectively blocking DC and low-frequency AC, and preventing electrical noise and ground loops.

[0027] A DC blocking capacitor is a capacitor connected in series in the signal path. Its function is to block the DC component and allow only the AC signal to pass through. It is often used in high-speed differential signal transmission to ensure that the DC bias of the signal is independent of the isolation transformer.

[0028] A differential signal pair refers to a pair of signals with opposite phases and equal amplitudes transmitted through two signal lines. By detecting the difference between the two signals at the receiving end, common-mode noise can be effectively suppressed, and the anti-interference capability and transmission distance of the signal can be improved.

[0029] A signal isolation path refers to a complete path in a USB 3.0 signal isolation circuit used to achieve data signal transmission and electrical isolation in a specific direction (e.g., from the host side to the device side, or from the device side to the host side).

[0030] Pre-emphasis is a processing technique that appropriately enhances high-frequency components at the signal transmitting end to compensate for the attenuation of high-frequency signals by the transmission line, thereby obtaining a clearer signal waveform at the receiving end.

[0031] Equalization is a processing technique used at the signal receiver to compensate for the frequency response of a signal, aiming to offset the frequency-dependent losses caused by the transmission line and restore the original waveform of the signal.

[0032] Gain adjustment refers to amplifying or attenuating the amplitude of a signal to ensure that the signal maintains a suitable level during transmission and meets the input requirements of the receiving end.

[0033] Electrical isolation refers to establishing electrical insulation between two circuits, so that there is no direct current path between them, thereby preventing voltage, current or noise from being transmitted from one circuit to another. It is often used to protect equipment and personnel safety.

[0034] Specifically, the core of the USB 3.0 signal isolation circuit provided in this application embodiment lies in constructing a bidirectional high-speed signal isolation channel and effectively conditioning high-speed differential signals. This circuit includes a first signal driver conditioner 110, a second signal driver conditioner 120, a first high-frequency isolation transformer 130, and a second high-frequency isolation transformer 140. The first signal driver conditioner 110 is configured to include a first signal transmitting end and a first signal receiving end, while the second signal driver conditioner 120 includes a second signal transmitting end and a second signal receiving end. These components, through a specific connection method, jointly achieve high-speed data transmission and electrical isolation between the host side and the device side.

[0035] The first signal isolation channel from the host side to the device side is constructed as follows: The differential signal pair transmitted by the USB 3.0 on the host side is connected to the input terminal 111 of the first signal transmitter. The output terminal 112 of the first signal transmitter is further connected to the primary side of the first high-frequency isolation transformer 130 through the first DC blocking capacitor bank. Subsequently, the secondary side of the first high-frequency isolation transformer 130 is connected to the input terminal 123 of the second signal receiver. Finally, the output terminal 124 of the second signal receiver is connected to the USB 3.0 on the device side through the second DC blocking capacitor bank to receive the differential signal pair. Through this path, unidirectional high-speed data transmission from the host side to the device side is achieved, and electrical isolation is completed in the process. For example, in practical applications, the first and second DC blocking capacitor banks can be surface-mount ceramic capacitors, whose capacitance values ​​are selected to effectively block DC components while presenting low impedance to high-speed AC signals.

[0036] The second signal isolation channel from the device side to the host side is constructed as follows: The differential signal pair transmitted by the USB 3.0 on the device side is connected to the input terminal 121 of the second signal transmitter. The output terminal 122 of the second signal transmitter is further connected to the primary side of the second high-frequency isolation transformer 140 through a third DC blocking capacitor bank. Subsequently, the secondary side of the second high-frequency isolation transformer 140 is connected to the input terminal 113 of the first signal receiver. Finally, the output terminal 114 of the first signal receiver is connected to the USB 3.0 on the host side through a fourth DC blocking capacitor bank to receive the differential signal pair. This forms another unidirectional high-speed data transmission path from the device side to the host side, also achieving electrical isolation. For example, the selection of the third and fourth DC blocking capacitor banks is similar to that of the first and second DC blocking capacitor banks, ensuring DC isolation and AC coupling of the signals.

[0037] In terms of signal conditioning, the first signal-driven conditioner 110 and the second signal-driven conditioner 120 are designed to perform at least one of pre-emphasis, equalization, or gain adjustment on the high-speed differential signal passing through them. Specifically, these conditioners may have built-in fixed signal processing logic, such as a default pre-emphasis curve preset inside the chip to compensate for high-frequency losses at a specific transmission line length. Alternatively, they may provide a fixed gain amplification to ensure that the signal retains sufficient amplitude after attenuation by an isolation transformer.

[0038] Regarding the implementation of electrical isolation, the first high-frequency isolation transformer 130 and the second high-frequency isolation transformer 140 play a core role in the first signal isolation channel and the second signal isolation channel, respectively. These transformers provide high-voltage insulation between the primary and secondary sides through magnetic coupling, effectively blocking the propagation of ground loop current and common-mode noise. For example, these high-frequency isolation transformers can be pulse transformers with high insulation withstand voltage and wide bandwidth response characteristics to meet the high-speed transmission requirements of USB 3.0 signals.

[0039] This application presents a USB 3.0 signal isolation circuit that integrates a signal driver conditioner and a high-frequency isolation transformer to construct a bidirectional high-speed signal isolation channel. This solution effectively addresses the electrical isolation requirements of high-speed USB 3.0 signals in complex applications such as industrial control and medical equipment, overcoming the limitations of traditional solutions in terms of signal integrity, bandwidth, and transmission delay. Consequently, it achieves high-speed, reliable data transmission between the host and device sides while ensuring electrical safety, effectively suppressing common-mode interference, and improving system stability and anti-interference capabilities.

[0040] In an exemplary embodiment, such as Figure 2 As shown, the USB 3.0 signal isolation circuit may also include a first bias resistor network 210 and a second bias resistor network 220.

[0041] The first bias resistor network 210 is connected between the first DC blocking capacitor group and the primary side of the first high-frequency isolation transformer 130; the second bias resistor network 220 is connected between the third DC blocking capacitor group and the primary side of the second high-frequency isolation transformer 140; the first bias resistor network 210 and the second bias resistor network 220 are used to provide the DC operating point for the corresponding high-frequency isolation transformers.

[0042] Specifically, the first bias resistor network 210 is composed of one or more resistive elements, and its main function is to provide a stable DC voltage or current to a specific device in the circuit to set its static operating point. In this embodiment, the first bias resistor network 210 is connected between the first DC blocking capacitor bank and the primary winding of the first high-frequency isolation transformer 130. This means that the network and the primary winding of the first high-frequency isolation transformer 130 form a DC loop, thereby providing a stable DC bias potential to the primary winding of the first high-frequency isolation transformer 130 while the first DC blocking capacitor bank blocks the DC component from the first signal transmitting end. For example, the first bias resistor network 210 can be composed of two resistors (R1 and R2) forming a voltage divider connected between the power supply voltage and ground, with its voltage division point connected to the center tap or one end of the primary winding of the first high-frequency isolation transformer 130 to provide the required DC operating point. Similarly, the second bias resistor network 220 can also consist of two resistors (R11 and R12) forming a voltage divider connected between the third DC blocking capacitor bank and the primary side of the second high-frequency isolation transformer 140, providing a DC operating point for the second high-frequency isolation transformer 140. In this way, it is ensured that the high-frequency isolation transformer can operate in the linear region when processing high-speed USB 3.0 differential signals, avoiding magnetic saturation, thereby reducing signal distortion and improving the reliability and integrity of signal transmission.

[0043] By introducing the first bias resistor network 210 and the second bias resistor network 220 through the above technical solution, a stable DC operating point is provided for the primary windings of the first high-frequency isolation transformer 130 and the second high-frequency isolation transformer 140. This allows the magnetic core of the high-frequency isolation transformer to always operate in the linear region when transmitting high-speed USB 3.0 differential signals, effectively avoiding magnetic saturation. Magnetic saturation is one of the main causes of signal nonlinear distortion and transmission performance degradation. By providing precise DC bias, the transformer can maintain its excellent frequency response characteristics, ensuring that the waveform integrity, amplitude, and phase information of the signal are effectively maintained when passing through the isolation channel, thereby significantly improving the signal transmission quality and reliability of the entire USB 3.0 signal isolation circuit. In addition, a stable DC operating point also helps to optimize the impedance matching of the transformer, further reducing signal reflection and loss.

[0044] In an exemplary embodiment, such as Figure 3 and Figure 4 As shown, both the first signal driver conditioner 110 and the second signal driver conditioner 120 are provided with two sets of external configuration pins.

[0045] The USB 3.0 signal isolation circuit also includes two sets of configuration resistors; the two sets of configuration resistors can be selectively soldered between the corresponding external configuration pin and the power supply voltage terminal or the ground terminal to form different soldering combinations; different soldering combinations are used to set at least one of the operating parameters of the corresponding signal drive conditioner, such as the pre-emphasis level, equalization level or output gain amplitude.

[0046] Specifically, both the first signal driver conditioner 110 and the second signal driver conditioner 120 are provided with two sets of external configuration pins. These external configuration pins are physical interfaces integrated on the signal driver conditioner chip, and their function is to receive configuration information from external circuits. These pins are designed as digital input pins or analog input pins. By detecting the voltage level or resistance value on the pins, the signal driver conditioner can identify and adjust its internal operating mode or parameter settings. For example, these pins can be used as general-purpose input / output pins, selecting a preset signal conditioning mode through different combinations of high and low levels; or they can be connected to the internal resistor divider network of the chip, changing the voltage division ratio through an externally connected resistor, thereby achieving fine adjustment of analog parameters.

[0047] For example, the two sets of external configuration pins of the first signal driver conditioner 110 are (HGND-A1, VDD33-A1, OS-A1, DE-A1, EQ-A1, DNC-A1) and (VDD33-A2, OS-A2, DE-A2, EQ-A2, DNC-A2); the two sets of external configuration pins of the second signal driver conditioner 120 are (HGND-B1, VDD33-B1, OS-B1, DE-B1, EQ-B1, DNC-B1) and (VDD33-B2, OS-B2, DE-B2, EQ-B2, DNC-B2).

[0048] In order to achieve flexible parameter configuration, Figure 4 As shown, the USB 3.0 signal isolation circuit also includes two sets of configuration resistors. These configuration resistors are electronic components with specific resistance values ​​that work in conjunction with external configuration pins to construct different resistor networks. These resistors can be standardized surface-mount resistors, whose resistance accuracy and temperature stability must meet the design requirements of high-speed signal circuits. By selecting resistors with different resistance values, or by combining different numbers of resistors, a variety of configuration inputs can be provided to the signal driver conditioner.

[0049] Two sets of configuration resistors can be selectively soldered between corresponding external configuration pins and power supply voltage terminals or ground terminals to form different soldering combinations. "Selective soldering" here means that during the manufacturing or assembly of the circuit board, one or two sets of configuration resistors can be flexibly connected to specific external configuration pins according to actual application requirements (for example, the configuration resistor combination of R14 and R19 is the same as OS-A1; similarly, other configuration resistors are connected in the same way, and will not be elaborated further here). These resistors can be connected to power supply voltage terminals (e.g., VCC or VDD) to provide a high level or a specific bias voltage to the pin; they can also be connected to ground (GND) to provide a low level or a different bias. Different soldering combinations, such as one pin being connected to a high level and another to a low level, or one pin being connected to power through a specific resistor and another to ground through a different resistor, will create unique electrical states. These electrical states will be recognized by the internal circuitry of the signal-driven conditioner as different configuration commands. This soldering method is typically achieved by pre-reserving pads on the printed circuit board (PCB) and selectively filling or leaving resistors unused as needed, thereby enabling parameter customization at the hardware level.

[0050] These different soldering combinations are used to set at least one operating parameter of the corresponding signal driver conditioner, including pre-emphasis level, equalization level, or output gain amplitude. The signal driver conditioner typically contains programmable digital or analog circuitry that adjusts its operating parameters based on the state of external configuration pins. For example, when an external configuration pin is connected via a specific resistor combination, the internal circuitry recognizes this combination and selects preset pre-emphasis filter parameters, equalizer gain curves, or output driver gain coefficients accordingly. The pre-emphasis level determines the degree of boosting of the high-frequency components of the signal to compensate for high-frequency losses in the transmission line; the equalization level determines the receiver's ability to compensate for signal attenuation to restore signal integrity; and the output gain amplitude controls the overall output strength of the signal. In this way, the signal conditioning effect can be optimized according to the actual signal transmission environment (such as cable length, different impedance matching, etc.), ensuring the integrity and reliability of the USB 3.0 signal after isolated transmission.

[0051] Through the above technical solution, this application provides external configuration pins on the first signal driver conditioner 110 and the second signal driver conditioner 120, and in conjunction with multiple selectively solderable configuration resistors, enabling the USB 3.0 signal isolation circuit to flexibly adjust key operating parameters such as the pre-emphasis level, equalization level, or output gain amplitude of the signal driver conditioner according to actual application scenarios. This configurability overcomes the performance limitations of fixed parameter solutions in different transmission environments, allowing the circuit to adapt to a wider range of cable lengths, PCB trace characteristics, and differences in host / device interfaces. By optimizing signal conditioning parameters, losses and distortions generated during signal transmission and isolation can be effectively compensated, significantly improving signal integrity and reducing the bit error rate, thereby ensuring the stability and reliability of USB 3.0 high-speed data transmission and greatly enhancing the circuit's versatility and applicability.

[0052] In an exemplary embodiment, the turns ratio of the primary winding to the secondary winding of the first high-frequency isolation transformer 130 is 1:1; the turns ratio of the primary winding to the secondary winding of the second high-frequency isolation transformer 140 is 1:1; and the operating bandwidth of both the first high-frequency isolation transformer 130 and the second high-frequency isolation transformer 140 is not less than 5GHz.

[0053] Specifically, the turns ratio refers to the ratio of the number of turns in the primary winding to the number of turns in the secondary winding of a transformer. In high-speed differential signal transmission applications, the turns ratio of the primary to secondary windings of both the first high-frequency isolation transformer 130 and the second high-frequency isolation transformer 140 is set to 1:1. This aims to ensure that the voltage and current amplitudes of the signal are maintained to the greatest extent possible when passing through the transformer, and theoretically, they will not change. This is crucial for maintaining differential impedance matching in the USB 3.0 signal transmission path, as the USB 3.0 standard typically requires a differential impedance of 90 ohms. A precise 1:1 turns ratio design effectively reduces signal reflection and insertion loss caused by impedance mismatch, thereby ensuring signal integrity. Achieving a 1:1 turns ratio is typically accomplished through precise control of the number of windings in the transformer manufacturing process.

[0054] Meanwhile, the operating bandwidth refers to the frequency range within which the transformer can effectively transmit signals. USB 3.0 signals have data transfer rates up to 5Gbps, and their baseband signal spectrum contains abundant high-frequency components. To ensure these high-speed signals can pass through the isolation transformer without loss, the transformer must have a sufficiently wide operating bandwidth to cover the main frequency components of the signal. Designing the operating bandwidth of both the first high-frequency isolation transformer 130 and the second high-frequency isolation transformer 140 to be no less than 5GHz means that the transformer can effectively transmit the fundamental frequency of the USB 3.0 signal and its important harmonic components, avoiding signal attenuation, phase distortion, or inter-symbol interference due to insufficient bandwidth. Achieving broadband characteristics requires selecting core materials with low-loss characteristics and employing optimized winding structures (e.g., dual-wire parallel winding, multi-layer winding, etc.) to reduce parasitic capacitance and inductance, thereby expanding the frequency response range of the transformer.

[0055] By setting the turns ratio of the primary winding to the secondary winding of both the first high-frequency isolation transformer 130 and the second high-frequency isolation transformer 140 to 1:1 and ensuring that their operating bandwidth is not less than 5GHz, the problem of signal attenuation, distortion, and insufficient bandwidth that may occur during the isolated transmission of high-speed signals can be effectively solved. Specifically, the 1:1 turns ratio helps maintain impedance matching of the signal path, minimizes signal reflection and insertion loss, and thus maintains the original amplitude and waveform of the signal. At the same time, the operating bandwidth of not less than 5GHz ensures that the high-frequency components of the USB 3.0 signal can be fully transmitted, avoiding signal distortion and inter-symbol interference caused by bandwidth limitations. In view of this, combined with the pre-emphasis, equalization, or gain adjustment of the signal by the first signal driver conditioner 110 and the second signal driver conditioner 120, the USB 3.0 signal isolation circuit of this application can ensure high-speed, high-reliability USB 3.0 data transmission with excellent signal integrity between the host side and the device side, and can effectively isolate electrical noise even at a rate of 5Gbps, ensuring communication quality.

[0056] In an exemplary embodiment, the USB 3.0 signal isolation circuit may further include a first power decoupling circuit and a second power decoupling circuit. The first power decoupling circuit is connected in parallel between the power input pin of the first signal driver conditioner 110 and ground; the second power decoupling circuit is connected in parallel between the power input pin of the second signal driver conditioner 120 and ground; the first and second power decoupling circuits are used to filter out high-frequency noise on the power network.

[0057] For example, such as Figure 3As shown, the first power decoupling circuit includes a first sub-decoupling circuit 150 and a second sub-decoupling circuit 160, which are connected in parallel between the power input pin of the first signal driver conditioner 110 and ground, respectively; the second power decoupling circuit includes a third sub-decoupling circuit 170 and a fourth sub-decoupling circuit 180, which are connected in parallel between the power input pin of the second signal driver conditioner 120 and ground.

[0058] Specifically, a power decoupling circuit is a circuit structure specifically designed to suppress noise on power lines. Its core function is to provide a low-impedance bypass path for transient currents by connecting one or more energy storage elements (typically capacitors) in parallel between the power input and ground. This effectively absorbs or bypasses high-frequency noise and transient voltage fluctuations on the power lines, ensuring a stable and clean DC power supply to the connected load circuit. Connecting the first and second power decoupling circuits in parallel between the power input pins of the first signal driver conditioner 110 and the second signal driver conditioner 120 and ground, respectively, places the decoupling circuits close to the signal driver conditioners requiring stable power. This close proximity minimizes parasitic inductance and resistance on the power lines, significantly improving decoupling effectiveness. Its main function is to provide a localized and highly stable power environment for the signal driver conditioners, effectively isolating noise from the power network and providing a rapid response to the transient currents required by the signal driver conditioners during high-speed operation to meet their dynamic power consumption demands. Filtering high-frequency noise on the power network involves using the low-pass filtering characteristics of power decoupling circuits to attenuate or eliminate interference signals with frequencies above a specific threshold on the power lines. This high-frequency noise may originate from the switching actions of the power module, the transient currents of rapid switching in digital circuits, or external electromagnetic interference. Effectively filtering this noise is crucial for ensuring the performance of the signal-driven conditioner when processing high-speed differential signals in USB 3.0. It prevents noise from coupling through the power lines into sensitive analog or digital circuits, thereby avoiding signal distortion, increased jitter, or a higher bit error rate.

[0059] By employing the aforementioned technical solution, a first power decoupling circuit and a second power decoupling circuit are respectively provided between the power input pins of the first signal driver conditioner 110 and the second signal driver conditioner 120 and ground. This application can effectively filter out high-frequency noise on the power network. These power decoupling circuits provide a clean and stable power environment for the signal driver conditioners, significantly reducing the interference of power noise on the high-speed differential signal processing. Given the extremely high requirements for signal integrity of USB 3.0 signals, the suppression of power noise is crucial to ensuring that the signal driver conditioners can accurately perform signal conditioning functions such as pre-emphasis, equalization, or gain adjustment. By providing a stable power supply, the signal driver conditioners can operate more reliably, thereby ensuring the transmission quality of high-speed differential signals in the first and second signal isolation channels and the overall stability of the system, effectively avoiding signal errors and performance degradation caused by power noise.

[0060] Optionally, both the first power supply decoupling circuit and the second power supply decoupling circuit are composed of at least two capacitors with different capacitance values ​​connected in parallel.

[0061] Specifically, this configuration refers to connecting two or more capacitors with different capacitance values ​​in parallel. Each capacitor has its specific self-resonant frequency (SRF), at which its impedance reaches its minimum and the decoupling effect is optimal. By connecting multiple capacitors with different capacitance values ​​in parallel, for example, a larger capacitance capacitor (such as a microfarad) is used to filter out lower frequency noise, while one or more smaller capacitance capacitors (such as nanofarads or picofarads) are used to filter out higher frequency noise. This combination can effectively widen the effective frequency range of the power supply decoupling circuit, providing a low-impedance path over a wider frequency range, thereby more comprehensively suppressing power supply noise. In practical applications, these parallel capacitors are typically ceramic capacitors and are positioned as close as possible to the power input pins of the first signal driver conditioner 110 and the second signal driver conditioner 120 to minimize the effects of parasitic inductance and ensure high-frequency decoupling performance.

[0062] Through the above technical solutions, the first and second power supply decoupling circuits can provide a power bypass path with low impedance characteristics over a wide frequency range. Since the frequency components of high-speed USB 3.0 signals are very rich, noise on the power network may also be distributed over a wide frequency range. Using multiple capacitors of different capacitance values ​​in parallel ensures that various types of power supply noise from low to high frequencies can be effectively filtered out, providing a cleaner and more stable power environment for the first signal driver conditioner 110 and the second signal driver conditioner 120. This is crucial for the first and second signal driver conditioners 110 and 120 to perform high-precision signal conditioning operations such as pre-emphasis, equalization, or gain adjustment, significantly reducing the interference of power supply noise on high-speed differential signals, thereby improving signal integrity, reducing the bit error rate, and ultimately enhancing the performance and reliability of the entire USB 3.0 signal isolation circuit.

[0063] Optionally, it also includes an isolated power supply module; the isolated power supply module includes a first isolated power supply output terminal, a second isolated power supply output terminal, and a primary-side power input terminal for connecting to an external power supply; the first isolated power supply output terminal is used to supply power to the first signal driver conditioner 110 and the host-side circuit; the second isolated power supply output terminal is used to supply power to the second signal driver conditioner 120 and the device-side circuit; the first isolated power supply output terminal and the second isolated power supply output terminal are electrically isolated.

[0064] Specifically, the isolated power supply module includes a first isolated power output terminal, a second isolated power output terminal, and a primary-side power input terminal for connecting to an external power supply. These are the key interfaces of the isolated power supply module. The primary-side power input terminal is the power supply entry point for the entire isolated power supply module and is typically connected to the system's main power supply, such as a 5V or 12V DC power supply. The first and second isolated power output terminals are interfaces that provide independent power to different electrically isolated areas after isolation and conversion. These output terminals can output different voltage levels (e.g., 3.3V, 5V) and current capabilities according to the needs of the powered circuits, and usually integrate voltage regulation circuits to ensure the stability and purity of the output voltage.

[0065] The first isolated power output terminal is used to power the first signal driver conditioner 110 and the host-side circuitry. This output terminal is specifically designed to power the host-side components in the USB 3.0 signal isolation circuitry. This includes the first signal driver conditioner 110, as well as other auxiliary circuitry on the host side that may need to work in conjunction with this isolation circuitry. The first isolated power output terminal is connected via appropriate power lines to the power input pins of the first signal driver conditioner 110 and the power inputs of the relevant host-side circuitry. To ensure power quality, decoupling capacitors and voltage regulators are typically placed near these connection points.

[0066] Simultaneously, the second isolated power supply output is used to power the second signal driver conditioner 120 and device-side circuitry. This output is similar to the first isolated power supply output, but it powers components located on the device side of the USB 3.0 signal isolation circuit. This includes the second signal driver conditioner 120, and other auxiliary circuitry on the device side that may need to work in conjunction with this isolation circuit. The second isolated power supply output is connected via appropriate power lines to the power input pins of the second signal driver conditioner 120 and the power inputs of the relevant device-side circuitry. Similarly, to ensure the stability and purity of the power supply, appropriate decoupling capacitors and voltage regulators are also configured.

[0067] Crucially, the first and second isolated power supply outputs maintain electrical isolation. This is a core characteristic of the isolated power supply module, ensuring no direct conductive connection exists between the power domains on the host side and the device side. This electrical isolation is achieved through an isolation transformer within the isolated power supply module. The isolation transformer typically has independent primary and secondary windings, which are physically isolated from each other using insulating materials (such as enameled wire insulation, insulating tape, and isolation grooves), thus forming a high-impedance electrical path.

[0068] Through the above technical solution, this application effectively solves the problem that the electrical isolation integrity may be compromised when powering the signal driver conditioner and the host-side and device-side circuits in a USB 3.0 signal isolation circuit. Specifically, the isolation power module provides independent and electrically isolated power supplies to the first signal driver conditioner 110 and the host-side circuit, and the second signal driver conditioner 120 and the device-side circuit, respectively, through its first and second isolation power output terminals. Since the first and second isolation power output terminals are electrically isolated from each other, this ensures that no conductive path is formed between the power grounds of the host side and the device side, even when powering the circuits on both sides, thus maintaining the electrical isolation barrier of the entire USB 3.0 signal isolation circuit. This design not only ensures reliable electrical isolation of high-speed differential signals when passing through the first high-frequency isolation transformer 130 and the second high-frequency isolation transformer 140, but also avoids noise interference introduced by power supply common ground or ground loop effects, significantly improving the stability and anti-interference capability of signal transmission. Especially in industrial and medical application environments with large potential differences or common-mode noise, its safety and reliability are greatly enhanced.

[0069] Optionally, the first signal isolation channel and the second signal isolation channel, along with all their components, are integrated and packaged within a physical module; this physical module is equipped with a host-side USB 3.0 standard interface and a device-side USB 3.0 standard interface.

[0070] Specifically, integration within a single physical module means that all critical functional units of the USB 3.0 signal isolation circuitry, including the first signal driver conditioner 110, the second signal driver conditioner 120, the first high-frequency isolation transformer 130, the second high-frequency isolation transformer 140, and related DC blocking capacitors, bias resistor networks, configuration resistors, power decoupling circuits, and isolation power modules, are integrated into a single physical package. This integration can be achieved in various ways, such as mounting all components on a compact printed circuit board (PCB) and then encapsulating the PCB along with its components in a custom-designed housing to form a single module. The packaging material can be plastic, metal, or composite material, designed to provide mechanical protection, electromagnetic shielding, and heat dissipation. This integrated design helps reduce the physical size of the circuitry, optimize internal connections, and improve overall structural strength and environmental adaptability.

[0071] This physical module features both a host-side USB 3.0 standard interface and a device-side USB 3.0 standard interface, meaning it provides standard USB 3.0 compliant connectivity externally. The host-side USB 3.0 interface connects to the USB 3.0 port of a host device (such as a computer), while the device-side USB 3.0 interface connects to USB 3.0 peripherals (such as hard drives and cameras). These interfaces are typically standard USB Type-A, Type-B, or Type-C connectors, directly integrated into the physical module's housing and connected to corresponding signal paths in the isolation circuitry via internal circuitry. This design allows the physical module to easily integrate into the existing USB 3.0 ecosystem like a plug-and-play USB device, without requiring additional adapters or complex installation steps.

[0072] By integrating all components of the USB 3.0 signal isolation circuit into a single physical module and providing a standard USB 3.0 interface, the aforementioned technical solution significantly addresses the issues of large size, complex wiring, and poor signal integrity associated with discrete component deployment. Specifically, this integrated design drastically reduces the physical size of the entire isolation solution, making it easier to deploy in space-constrained applications. Simultaneously, the tight integration of all components significantly shortens the internal signal path, effectively reducing parasitic inductance and capacitance effects, minimizing attenuation and distortion of high-speed USB 3.0 signals during transmission, and significantly improving signal integrity and electromagnetic compatibility (EMC) performance. Furthermore, by directly providing both host-side and device-side standard USB 3.0 interfaces on the physical module, users can achieve plug-and-play functionality, greatly simplifying installation and usage, and improving system reliability and ease of use. This integrated packaging ensures that core components such as the first signal driver conditioner 110, the second signal driver conditioner 120, the first high-frequency isolation transformer 130, and the second high-frequency isolation transformer 140 work together in an optimal environment, thereby achieving electrical isolation while ensuring the stability and high performance of USB 3.0 high-speed data transmission.

[0073] Based on the same inventive concept, this application provides an electronic device that includes a USB 3.0 signal isolation circuit as described in any of the above embodiments.

[0074] By integrating the aforementioned USB 3.0 signal isolation circuit, this electronic device effectively achieves electrical isolation of high-speed USB 3.0 signals, solving the problems of insufficient bandwidth, poor signal integrity, and high cost in traditional USB 3.0 applications, thereby improving the reliability of data transmission and the security of the system.

[0075] Based on the same inventive concept, this application provides a signal isolation method that is applied to the USB 3.0 signal isolation circuit provided in any of the above embodiments.

[0076] like Figure 5 As shown, a first signal isolation channel is constructed from the host side to the device side, including: S101. Using the transmission function of the first signal drive conditioner, pre-emphasize the differential signal transmitted from the USB 3.0 host side. S102. The pre-emphasized signal is coupled and transmitted through a first high-frequency isolation transformer to achieve electrical isolation; S103. Using the receiving function of the second signal driving conditioner, the attenuated signal received from the first high-frequency isolation transformer is equalized and the gain is restored, and then output to the equipment side. like Figure 6As shown, a second signal isolation channel is constructed from the device side to the host side, including: S111. Using the transmission function of the second signal driving conditioner, pre-emphasize the differential signal transmitted from the USB 3.0 device side. S112. The pre-emphasized signal is coupled and transmitted through a second high-frequency isolation transformer to achieve electrical isolation; S113. Using the receiving function of the first signal driving conditioner, the attenuated signal received from the second high-frequency isolation transformer is equalized and the gain is restored, and then output to the host side.

[0077] Specifically, the method includes constructing a first signal isolation channel from the host side to the device side: First, using the transmitting function of the first signal driver conditioner 110, the differential signal transmitted from the USB 3.0 side is pre-emphasized to enhance the high-frequency components and compensate for transmission line losses; Second, the pre-emphasized signal is coupled and transmitted through the first high-frequency isolation transformer 130, and a high-voltage insulation barrier is established between the primary and secondary sides using the principle of magnetic induction to achieve electrical isolation and block ground loop current; Finally, using the receiving function of the second signal driver conditioner 120, the attenuated signal received from the first high-frequency isolation transformer 130 is equalized and the gain is restored to restore the signal waveform integrity and output to the device side through the second DC blocking capacitor bank. Based on this, a second signal isolation channel from the device side to the host side is further constructed: using the transmitting function of the second signal driver conditioner 120, the differential signal transmitted from the USB 3.0 side of the device side is pre-emphasized; the pre-emphasized signal is coupled and transmitted through the second high-frequency isolation transformer 140 to achieve electrical isolation between the primary and secondary sides; then, using the receiving function of the first signal driver conditioner 110, the attenuated signal received from the second high-frequency isolation transformer 140 is equalized and the gain is restored, and then output to the host side through the fourth DC blocking capacitor bank.

[0078] The above technical solution not only achieves the complete construction of a bidirectional high-speed data transmission path, but also effectively offsets the signal attenuation introduced by the high-frequency isolation transformer through the dynamic compensation mechanism of the signal-driven conditioner, ensuring reliable communication of the USB 3.0 interface at the theoretical rate of 5Gbps. This method significantly improves signal integrity, suppresses common-mode interference, and meets the stringent requirements for electrical safety and anti-interference capabilities in industrial and medical environments, providing an efficient and feasible technical path for high-speed USB signal isolation.

[0079] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0080] This document uses specific examples to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the methods and core ideas of this application. Furthermore, those skilled in the art will recognize that, based on the ideas of this application, there will be changes in the specific implementation methods and application scope. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A USB 3.0 signal isolation circuit, connected between the host side and the device side, characterized in that, include: A first signal drive conditioner, a second signal drive conditioner, a first high-frequency isolation transformer, and a second high-frequency isolation transformer; The first signal drive conditioner includes a first signal transmitting end and a first signal receiving end; The second signal drive conditioner includes a second signal transmitting end and a second signal receiving end; The input terminal of the first signal transmitting end is used to connect to the USB 3.0 differential signal pair on the host side; The output terminal of the first signal transmitting end is connected to the primary side of the first high-frequency isolation transformer via the first DC blocking capacitor group, wherein the first DC blocking capacitor group consists of two DC blocking capacitors, which are respectively connected in series on the two signal lines of the USB3.0 differential signal pair transmission. The secondary side of the first high-frequency isolation transformer is connected to the input terminal of the second signal receiver; The output of the second signal receiving terminal is connected to the USB 3.0 on the device side via the second DC blocking capacitor bank to receive differential signal pairs. The second DC blocking capacitor bank consists of two DC blocking capacitors, which are connected in series on the two signal lines of the differential signal pairs. This forms the first signal isolation channel from the host side to the device side; The input terminal of the second signal transmitting end is used to connect to the USB 3.0 differential signal pair on the device side; The output of the second signal transmitting end is connected to the primary side of the second high-frequency isolation transformer via the third DC blocking capacitor group, wherein the third DC blocking capacitor group consists of two DC blocking capacitors, which are respectively connected in series on the two signal lines of the USB3.0 differential signal pair transmission. The secondary side of the second high-frequency isolation transformer is connected to the input terminal of the first signal receiver; The output of the first signal receiving terminal is connected to the USB 3.0 on the host side via the fourth DC blocking capacitor group to receive differential signal pairs. The fourth DC blocking capacitor group consists of two DC blocking capacitors, which are connected in series on the two signal lines of the differential signal pairs. This forms a second signal isolation channel from the device side to the host side; The first signal driving conditioner and the second signal driving conditioner are used to perform at least one of the following signal conditioning on the passing high-speed differential signal: pre-emphasis, equalization, or gain adjustment; The first high-frequency isolation transformer and the second high-frequency isolation transformer are used to achieve electrical isolation in the first signal isolation channel and the second signal isolation channel, respectively.

2. The USB 3.0 signal isolation circuit according to claim 1, characterized in that, It also includes a first bias resistor network and a second bias resistor network; The first bias resistor network is connected between the first DC blocking capacitor bank and the primary side of the first high-frequency isolation transformer; The second bias resistor network is connected between the third DC blocking capacitor bank and the primary side of the second high-frequency isolation transformer; The first bias resistor network and the second bias resistor network are used to provide a DC operating point for the corresponding high-frequency isolation transformer.

3. The USB 3.0 signal isolation circuit according to claim 1, characterized in that, Both the first signal driver conditioner and the second signal driver conditioner are provided with two sets of external configuration pins; The USB 3.0 signal isolation circuit also includes two sets of configuration resistors; The two sets of configuration resistors can be selectively soldered between the corresponding external configuration pins and the power supply voltage terminal or the ground terminal to form different soldering combinations; Different soldering combinations are used to set at least one of the operating parameters of the corresponding signal drive conditioner, such as pre-emphasis level, equalization level, or output gain amplitude.

4. The USB 3.0 signal isolation circuit according to claim 1, characterized in that, The turns ratio of the primary winding to the secondary winding of the first high-frequency isolation transformer is 1:1; The turns ratio of the primary winding to the secondary winding of the second high-frequency isolation transformer is 1:1; The operating bandwidth of both the first high-frequency isolation transformer and the second high-frequency isolation transformer is not less than 5GHz.

5. The USB 3.0 signal isolation circuit according to claim 1, characterized in that, It also includes a first power supply decoupling circuit and a second power supply decoupling circuit; The first power decoupling circuit is connected in parallel between the power input pin of the first signal driver conditioner and ground. The second power supply decoupling circuit is connected in parallel between the power input pin of the second signal driver conditioner and ground; The first power decoupling circuit and the second power decoupling circuit are used to filter out high-frequency noise on the power network.

6. The USB 3.0 signal isolation circuit according to claim 5, characterized in that, Both the first power supply decoupling circuit and the second power supply decoupling circuit are composed of at least two capacitors with different capacitance values ​​connected in parallel.

7. The USB 3.0 signal isolation circuit according to claim 1, characterized in that, It also includes an isolated power supply module; The isolated power supply module includes a first isolated power supply output terminal, a second isolated power supply output terminal, and a primary-side power input terminal for connecting to an external power supply. The first isolated power supply output terminal is used to supply power to the first signal drive conditioner and the host-side circuit; The second isolated power supply output is used to supply power to the second signal drive conditioner and the device-side circuit; The first isolation power supply output terminal and the second isolation power supply output terminal are electrically isolated.

8. The USB 3.0 signal isolation circuit according to any one of claims 1 to 7, characterized in that, The first signal isolation channel and the second signal isolation channel, along with all their components, are integrated and packaged within a single physical module. The physical module is equipped with a host-side USB 3.0 standard interface and a device-side USB 3.0 standard interface.

9. An electronic device, characterized in that, It includes a USB 3.0 signal isolation circuit as described in any one of claims 1 to 8.

10. A signal isolation method, applied to a USB 3.0 signal isolation circuit as described in any one of claims 1 to 8, characterized in that, include: Constructing the first signal isolation channel from the host side to the device side includes: The transmission function of the first signal driver conditioner is used to pre-emphasize the differential signal transmitted from the host side of USB 3.

0. The pre-emphasized signal is coupled to the first high-frequency isolation transformer through the first DC blocking capacitor bank. After electrical isolation transmission through the first high-frequency isolation transformer, it is transmitted to the second signal drive conditioner. Using the receiving function of the second signal drive conditioner, the attenuated signal received from the first high-frequency isolation transformer is equalized and the gain is restored, and then output to the equipment side through the second DC blocking capacitor bank; Constructing a second signal isolation channel from the device side to the host side includes: The transmission function of the second signal driver conditioner is used to pre-emphasize the differential signal transmitted from the USB 3.0 device side; The pre-emphasized signal is coupled to the second high-frequency isolation transformer through the third DC blocking capacitor bank. After electrical isolation transmission through the second high-frequency isolation transformer, it is transmitted to the first signal drive conditioner. Using the receiving function of the first signal-driven conditioner, the attenuated signal received from the second high-frequency isolation transformer is subjected to equalization and gain restoration processing, and then output to the host side through the fourth DC blocking capacitor bank.

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