A method for preparing a low surface defect epitaxial wafer on a high COP silicon single crystal substrate

Abstract

This invention relates to a method for preparing low-surface-defect epitaxial wafers on high-COP silicon single-crystal substrates, comprising the following steps: S1, substrate preparation: selecting a high-COP silicon single-crystal substrate; S2, single-sided polishing: polishing the high-COP silicon single-crystal substrate using conventional single-sided polishing equipment to remove the mechanical damage layer on the substrate surface and obtain a preliminarily planarized surface; S3, improved polishing and cleaning process; S4, epitaxial growth of qualified substrate: performing epitaxial growth on the qualified substrate to prepare a low-surface-defect epitaxial wafer. This invention improves the polishing and cleaning processes, thoroughly removing residues within COP voids and suppressing the generation of epitaxial stacking faults, thereby achieving the preparation of high-quality, low-surface-defect epitaxial wafers.

Description

Technical Field

[0001] This invention relates to the field of silicon wafer manufacturing technology, and more specifically to a method for preparing low-surface-defect epitaxial wafers on high-COP silicon single-crystal substrates. Background Technology

[0002] During the high-speed growth of CZ silicon single crystals, vacancies within the crystal easily accumulate and aggregate into tiny primary defects during subsequent cooling. These defects are called Crystal Originated Particles (COPs). COPs mainly manifest as tiny voids inside or beneath the surface of the crystal; they are extremely stubborn and harmful "primary" defects in silicon wafers.

[0003] In standard silicon wafer processing (such as etching with SC1 alkaline solution in a standard cleaning solution), COP exhibits a typical anisotropic etching morphology after etching on the silicon wafer. Since the {111} facet etches the slowest, these facets are exposed, forming an optical reflection characteristic resembling four-lobed leaves. These defects form inverted quadrangular pyramidal micro-pits on specific crystal orientations (such as the {111} facet), and their shape and density directly reflect the characteristics of COP. Because COP is located within the crystal and is extremely small, existing particle detection methods struggle to effectively distinguish COP from impurities. This characteristic makes it difficult to accurately assess the cleanliness of the silicon substrate using conventional methods before epitaxial growth, lacking effective pretreatment detection criteria.

[0004] When using substrates containing high-density COPs for epitaxial growth, the porous structure within the COPs makes it difficult to completely remove the tiny organic matter, oxides, and residual abrasive particles adhering to the inner walls of the cavities during the cleaning process. These residues can become contributing factors in subsequent epitaxial layers, leading to fatal defects such as stacking faults, severely affecting the quality of the epitaxial wafer and the performance of subsequent devices.

[0005] For silicon substrates after single-sided polishing, existing technologies generally employ a process of "SC1 cleaning → pure water cleaning → HF cleaning → pure water cleaning → IPA drying". However, this process is designed for silicon wafers with no or low COP and is difficult to adapt to high COP substrates. Specifically, this manifests in the following ways: 1. Insufficient cleaning penetration: The internal structure of COP cavities is narrow and irregular, forming a complex channel structure. The strong alkaline polishing slurry and SC1 cleaning slurry in existing processes have difficulty penetrating into the COP, making it difficult to remove the tiny organic matter, oxides, and residual abrasive particles adhering to the interior. 2. Risk of defect space expansion: Strong alkaline polishing slurries can selectively corrode the inner wall of the COP, expanding the defect space and further increasing the possibility of impurity residue.

[0006] Therefore, how to overcome the limitations of existing processes, solve the problem of insufficient penetration during the cleaning process of high COP density silicon wafers, and establish effective detection methods to achieve high-quality epitaxial growth has become a core industry challenge restricting the efficient utilization of high-speed CZ silicon single crystal substrates. Summary of the Invention

[0007] The technical problem to be solved by the present invention is to provide a method for preparing low surface defect epitaxial wafers on high COP silicon single crystal substrates, by improving polishing and cleaning processes, thoroughly removing residues in COP voids, suppressing the generation of epitaxial stacking faults, and realizing the preparation of high-quality, low surface defect epitaxial wafers.

[0008] The technical solution adopted by this invention to solve its technical problem is: to provide a method for preparing a low-surface-defect epitaxial wafer on a high-COP silicon single-crystal substrate, comprising the following steps: S1. Substrate preparation: Select a high COP silicon single crystal substrate; S2. Single-sided polishing: The high COP silicon single crystal substrate is polished using conventional single-sided polishing equipment to remove the mechanical damage layer on the substrate surface and obtain a preliminary planarized surface. S3, Improved Polishing and Cleaning Process: S3.1 Fine polishing treatment: The substrate after single-sided polishing is finely polished using a low-abrasive-concentration and weakly alkaline polishing slurry. The polishing pressure is controlled at 0.08~0.12MPa and the polishing speed is 30~80r / min. S3.2 Cleaning with weakly alkaline SC1 cleaning solution: A weakly alkaline SC1 cleaning solution combined with megasonic cleaning is used to remove residual impurities from the polishing process. Specifically, the weakly alkaline SC1 cleaning solution is a diluted aqueous solution with an ammonium hydroxide concentration below 0.021 wt%, or a diluted aqueous solution containing equal low concentrations of ammonium hydroxide and hydrogen peroxide. The cleaning temperature is 35~45℃, the megasonic power is 60~100W, and the cleaning time is 3~8 minutes. Megasonic cleaning has three unique advantages in cleaning residues inside COP cavities: "precise penetration, powerful peeling, and non-damaging." Compared to traditional ultrasonic or chemical cleaning, megasonic cleaning can penetrate deep into the micro-geometric structure inside the COP, specifically removing stubborn contaminants. S3.3 Alternating Cleaning: Perform ozone water cleaning and hydrofluoric acid cleaning in sequence. This process can be repeated one or more times. The ozone concentration for ozone water cleaning is 5~20mg / L, the cleaning time is 1~5min, and the cleaning temperature is 25~35℃. The hydrofluoric acid concentration for hydrofluoric acid cleaning is 0.5~5wt%, the cleaning time is 30~180s, and the cleaning temperature is room temperature. S3.4 Spin-drying process: The substrate after alternating cleaning is spin-dried at high speed with a rotation speed of 1000~6000 r / min and a spin-drying time of 30~120s. S3.5 Inspection and Cleaning: Extract silicon wafers treated as described above and sequentially perform COP morphology testing, epitaxial growth, and particle testing. If the number of particles per square centimeter on the surface of the silicon wafer after epitaxial growth exceeds the specified number and is circularly distributed, substrates from the same batch that have undergone the same polishing and cleaning process should return to steps S3.2-S3.4 for repeated cleaning until the inspection is qualified. The carbon and oxygen residue content in the COP of qualified silicon substrate wafers is less than 0.5 wt%. S4. Epitaxial growth of qualified substrates: Epitaxial growth is carried out on qualified substrates to prepare low surface defect epitaxial wafers, with no more than 3 stacking faults after epitaxy.

[0009] As a supplement to the technical solution described in this invention, in step S3.1, the abrasive in the low abrasive concentration polishing slurry is colloidal silica, the abrasive solid content is 0.5-5%, the pH value of the polishing slurry is 9-10, and the flow rate of the polishing slurry is 100-1000 mL / min.

[0010] As a supplement to the technical solution described in this invention, in step S3.2, if the weakly alkaline SC1 cleaning solution is a diluted aqueous solution containing ammonium hydroxide and hydrogen peroxide, the ammonium hydroxide content is 0.2~1.3 wt% and the hydrogen peroxide content is 0.8~2.2 wt%.

[0011] As a supplement to the technical solution described in this invention, in step S3.4, during the spin-drying process, the substrate rotation speed is gradually increased from 1000 r / min to the set rotation speed to avoid secondary contamination caused by liquid splashing.

[0012] As a supplement to the technical solution described in this invention, in step S3.5, the COP morphology test is performed using an electron beam wafer defect re-inspection system (eDR).

[0013] As a supplement to the technical solution described in this invention, in step S3.5, the particle test is performed using a surface particle scanner.

[0014] As a supplement to the technical solution described in this invention, in step S1, the size of the high COP silicon single crystal substrate is 150mm, 200mm or 300mm.

[0015] As a supplement to the technical solution described in this invention, when the size of the high COP silicon single crystal substrate is 300mm, the COP defect density of the 300mm substrate is 4000~12000 at a 26nm detection scale; when the size of the high COP silicon single crystal substrate is 200mm, the COP defect density of the 200mm substrate is 200~1000 at a 65nm detection scale; when the size of the high COP silicon single crystal substrate is 150mm, the COP defect density of the 150mm substrate is 100~800 at a 100nm detection scale.

[0016] As a supplement to the technical solution described in this invention, when the size of the high COP silicon single crystal substrate is 300mm, the specified quantity in S3.5 is 40ea; when the size of the high COP silicon single crystal substrate is 200mm, the specified quantity in S3.5 is 30ea; and when the size of the high COP silicon single crystal substrate is 150mm, the specified quantity in S3.5 is 20ea.

[0017] As a supplement to the technical solution described in this invention, the pH value of the weakly alkaline SC1 cleaning solution is controlled between 9 and 10.

[0018] Beneficial effects: This invention relates to a method for preparing low-surface-defect epitaxial wafers on high-COP silicon single-crystal substrates, which has the following advantages: A combined process of low-abrasive, weakly alkaline polishing, weakly alkaline SC1, megasonic cleaning, and alternating cleaning with ozone water and hydrofluoric acid achieves thorough cleaning and low impurity residue. Low-abrasive polishing aims to reduce the volume expansion of single-crystal primary defects like COP while removing thickness. In traditional processes, after single-sided polishing and planarization, COP is corroded into pits by strong alkaline solutions. These pits quickly appear under strong alkaline conditions, and residual impurities generated during single-sided polishing remain within them. Therefore, the traditional strong alkaline polishing slurry and No. 1 solution are reduced to weakly alkaline polishing slurry and No. 1 solution. This optimization reduces the selective corrosion of COP in an alkaline environment after single-sided polishing, thereby reducing the space for impurity residue and fundamentally optimizing the cleaning effect after polishing. After this treatment, the internal morphology and boundaries of the COP are clear, effectively preventing the residue of LLS in the COP after single-sided polishing. For high COP substrates, the existing "HF cleaning-IPA drying" step is replaced with "alternating cleaning with ozone water and hydrofluoric acid-spin drying". The strong oxidizing property of ozone water is used to effectively oxidize the organic matter and impurities in the COP voids, and then the generated oxides and natural oxide layers are removed by HF cleaning. This alternating cleaning method can perform a deeper and more thorough cleaning of the COP voids and remove the inducing source of epitaxial stacking faults. The weakly alkaline system avoids excessive corrosion of the COP structure, the cavitation effect of megasonic waves solves the problem of COP void penetration, and the strong oxidizing properties of ozone and the oxide removal capacity of hydrofluoric acid form a synergistic effect to eliminate the inducing source of epitaxial stacking faults. By forming a closed-loop quality control system through inspection and re-washing steps, the cleaning effect of each batch of substrates can be monitored in real time, greatly improving the cleaning pass rate. Comparative experiments have confirmed that epitaxial wafers prepared on high-COP substrates treated by the method of this invention exhibit significantly reduced defect density in surface defect scanning tests. In particular, stacking fault defects caused by COP are no longer observed, demonstrating the effectiveness and reliability of this method in preparing high-quality epitaxial wafers on high-COP substrates. Attached Figure Description

[0019] Figure 1 This is a step diagram of the present invention; Figure 2 This is a diagram showing the surface particle situation after substrate epitaxy using a traditional cleaning process. Figure 3 This is a diagram showing the surface particle situation after substrate epitaxy is performed using the cleaning process of the present invention. Figure 4 This is a morphological characterization diagram of impurities in COP after using traditional cleaning processes; Figure 5 This is a morphological characterization diagram of impurities in the COP after the cleaning process of this invention. Detailed Implementation

[0020] The present invention will be further illustrated below with reference to specific embodiments. It should be understood that these embodiments are for illustrative purposes only and are not intended to limit the scope of the invention. Furthermore, it should be understood that after reading the teachings of this invention, those skilled in the art can make various alterations or modifications to the invention, and these equivalent forms also fall within the scope defined by the appended claims.

[0021] Embodiments of the present invention relate to a method for preparing low-surface-defect epitaxial wafers on high-COP silicon single-crystal substrates, such as... Figure 1-5 As shown, improved polishing and cleaning processes thoroughly remove residues from COP cavities, suppress epitaxial stacking faults, and achieve the fabrication of high-quality epitaxial wafers with low surface defects.

[0022] Example 1: A method for preparing low-surface-defect epitaxial wafers on high-COP silicon single-crystal substrates includes the following steps: S1. Substrate preparation: Select a high-COP silicon single crystal substrate, the size of which is 300mm. S2. Single-sided polishing: The high COP silicon single crystal substrate is polished using conventional single-sided polishing equipment to remove the mechanical damage layer on the substrate surface and obtain a preliminary planarized surface. S3, Improved Polishing and Cleaning Process: S3.1 Fine polishing treatment: The substrate after single-sided polishing is finely polished using a low-abrasive-concentration and weakly alkaline polishing slurry. The polishing pressure is controlled at 0.08~0.12MPa and the polishing speed is 60~80r / min. S3.2 Cleaning with weakly alkaline SC1 cleaning solution: A combination of weakly alkaline SC1 cleaning solution and megasonic cleaning is used to remove residual impurities from the polishing process. Specifically, the weakly alkaline SC1 cleaning solution is a diluted aqueous solution with an ammonium hydroxide concentration below 0.021 wt%, or a diluted aqueous solution containing equal low concentrations of ammonium hydroxide and hydrogen peroxide. The cleaning temperature is 40℃, the megasonic power is 80W, and the cleaning time is 4 minutes. Megasonic cleaning offers three unique advantages in cleaning residues inside COP cavities: precise penetration, powerful stripping, and non-damaging. Compared to traditional ultrasonic or chemical cleaning, megasonic cleaning can penetrate deep into the micro-geometric structure inside the COP, specifically removing stubborn contaminants. S3.3 Alternating Cleaning: Perform ozone water cleaning and hydrofluoric acid cleaning in sequence. This process can be repeated one or more times. The ozone concentration for ozone water cleaning is 5~20mg / L, the cleaning time is 1min, and the cleaning temperature is 25~35℃. The hydrofluoric acid concentration for hydrofluoric acid cleaning is 0.5~5wt%, the cleaning time is 40s, and the cleaning temperature is room temperature. S3.4 Spin-drying process: The substrate after alternating cleaning is spin-dried at high speed with a rotation speed of 3000~6000 r / min and a spin-drying time of 60s. S3.5 Inspection and Cleaning: Extract silicon wafers processed as described above and use an electron beam wafer defect re-inspection system (eDR) to test the morphology within the COP, observing the surface smoothness and crystal structure clarity. Then, perform epitaxial growth verification. Particle testing is conducted using a surface particle scanner. If the number of particles per square centimeter on the surface of the silicon wafer after epitaxial growth exceeds the specified number and is circularly distributed, it indicates that there are still many residual impurities inside the COP. Substrates from the same batch that have undergone the same polishing and cleaning process need to be returned to steps S3.2-S3.4 for repeated cleaning until the inspection is qualified. The carbon and oxygen element residue content in the COP of qualified silicon substrate wafers is less than 0.5 wt%. S4. Epitaxial growth of qualified substrates: Epitaxial growth is carried out on qualified substrates to prepare low surface defect epitaxial wafers, with no more than 3 stacking faults after epitaxy.

[0023] The high COP substrate refers to a substrate whose surface COP density, within a predetermined range, is significantly higher than that of a conventional polished substrate when subjected to specific detection conditions (such as scanning with a laser scattering surface defect detector in DWO mode of SP3 / SP5).

[0024] In step S3.1, the abrasive in the low abrasive concentration polishing slurry is colloidal silica with a solid content of 2%, the pH value of the polishing slurry is 9.5, and the flow rate of the polishing slurry is 450~500mL / min.

[0025] In step S3.2, if the weakly alkaline SC1 cleaning solution is a diluted aqueous solution containing ammonium hydroxide and hydrogen peroxide, the ammonium hydroxide is 0.5 wt% and the hydrogen peroxide is 1.2 wt%.

[0026] In step S3.4, during the spin-drying process, the substrate rotation speed is gradually increased from 1000 r / min to the set speed to avoid secondary contamination caused by liquid splashing.

[0027] The pH value of the weakly alkaline SC1 cleaning solution is controlled at 9.5.

[0028] Example 2: A method for preparing low-surface-defect epitaxial wafers on high-COP silicon single-crystal substrates includes the following steps: S1. Substrate preparation: Select a high-COP silicon single crystal substrate, the size of which is 200mm. S2. Single-sided polishing: The high COP silicon single crystal substrate is polished using conventional single-sided polishing equipment to remove the mechanical damage layer on the substrate surface and obtain a preliminary planarized surface. S3, Improved Polishing and Cleaning Process: S3.1 Fine polishing treatment: The substrate after single-sided polishing is finely polished using a low-abrasive-concentration and weakly alkaline polishing slurry. The polishing pressure is controlled at 0.08~0.12MPa and the polishing speed is 60~80r / min. S3.2 Cleaning with weakly alkaline SC1 cleaning solution: Weakly alkaline SC1 cleaning solution is used in combination with megasonic cleaning to remove residual impurities from fine polishing; the weakly alkaline SC1 cleaning solution is specifically a diluted aqueous solution with an ammonium hydroxide concentration of less than 0.021 wt%, or a diluted aqueous solution containing an equal low concentration of ammonium hydroxide and hydrogen peroxide, the cleaning temperature is 40℃, the megasonic power is 80W, and the cleaning time is 4min; S3.3 Alternating Cleaning: Perform ozone water cleaning and hydrofluoric acid cleaning in sequence. This process can be repeated one or more times. The ozone concentration for ozone water cleaning is 5~20mg / L, the cleaning time is 1min, and the cleaning temperature is 25~35℃. The hydrofluoric acid concentration for hydrofluoric acid cleaning is 0.5~5wt%, the cleaning time is 40s, and the cleaning temperature is room temperature. S3.4 Spin-drying process: The substrate after alternating cleaning is spin-dried at high speed with a rotation speed of 3000~6000 r / min and a spin-drying time of 60s. S3.5 Inspection and Cleaning: Extract silicon wafers processed as described above and use an electron beam wafer defect re-inspection system (eDR) to test the morphology within the COP, observe the surface smoothness and crystal structure clarity within the COP, and then perform epitaxial growth verification. Particle testing is performed using a surface particle scanner. If the number of particles on the surface of the silicon wafer after epitaxial growth exceeds the specified number and is circularly distributed, it indicates that there are still many residual impurities inside the COP. Substrates from the same batch that have undergone the same polishing and cleaning process need to be returned to steps S3.2-S3.4 for repeated cleaning until the inspection is qualified. The carbon and oxygen element residue content of qualified silicon wafers is less than 0.5 wt%. S4. Epitaxial growth of qualified substrates: Epitaxial growth is carried out on qualified substrates to prepare low surface defect epitaxial wafers, with no more than 3 stacking faults after epitaxy.

[0029] The high COP substrate refers to a substrate whose surface COP density, within a predetermined range, is significantly higher than that of a conventional polished substrate when subjected to specific detection conditions (such as scanning with a laser scattering surface defect detector in DWO mode of SP1 / SP2).

[0030] In step S3.1, the abrasive in the low abrasive concentration polishing slurry is colloidal silica with a solid content of 1.8%, a pH value of 9.2, and a flow rate of 950~1000 mL / min.

[0031] In step S3.2, if the weakly alkaline SC1 cleaning solution is a diluted aqueous solution containing ammonium hydroxide and hydrogen peroxide, the ammonium hydroxide is 0.45 wt% and the hydrogen peroxide is 1.1 wt%.

[0032] In step S3.4, during the spin-drying process, the substrate rotation speed is gradually increased from 1000 r / min to the set speed to avoid secondary contamination caused by liquid splashing.

[0033] The pH value of the weakly alkaline SC1 cleaning solution is controlled at 9.2.

[0034] Example 3: A method for preparing low-surface-defect epitaxial wafers on high-COP silicon single-crystal substrates includes the following steps: S1. Substrate preparation: Select a high-COP silicon single crystal substrate, the size of which is 150mm. S2. Single-sided polishing: The high COP silicon single crystal substrate is polished using conventional single-sided polishing equipment to remove the mechanical damage layer on the substrate surface and obtain a preliminary planarized surface. S3, Improved Polishing and Cleaning Process: S3.1 Fine polishing treatment: The substrate after single-sided polishing is finely polished using a low-abrasive-concentration and weakly alkaline polishing slurry. The polishing pressure is controlled at 0.08~0.12MPa and the polishing speed is 60~80r / min. S3.2 Cleaning with weakly alkaline SC1 cleaning solution: Weakly alkaline SC1 cleaning solution is used in combination with megasonic cleaning to remove residual impurities from fine polishing; the weakly alkaline SC1 cleaning solution is specifically a diluted aqueous solution with an ammonium hydroxide concentration of less than 0.021 wt%, or a diluted aqueous solution containing an equal low concentration of ammonium hydroxide and hydrogen peroxide, the cleaning temperature is 40℃, the megasonic power is 80W, and the cleaning time is 4min; S3.3 Alternating Cleaning: Perform ozone water cleaning and hydrofluoric acid cleaning in sequence. This process can be repeated one or more times. The ozone concentration for ozone water cleaning is 5~20mg / L, the cleaning time is 1min, and the cleaning temperature is 25~35℃. The hydrofluoric acid concentration for hydrofluoric acid cleaning is 0.5~5wt%, the cleaning time is 40s, and the cleaning temperature is room temperature. S3.4 Spin-drying process: The substrate after alternating cleaning is spin-dried at high speed with a rotation speed of 3000~6000 r / min and a spin-drying time of 60s. S3.5 Inspection and Cleaning: Extract silicon wafers processed as described above and use an electron beam wafer defect re-inspection system (eDR) to test the morphology within the COP, observe the surface smoothness and crystal structure clarity within the COP, and then perform epitaxial growth verification. Particle testing is performed using a surface particle scanner. If the number of particles on the surface of the silicon wafer after epitaxial growth exceeds the specified number and is circularly distributed, it indicates that there are still many residual impurities inside the COP. Substrates from the same batch that have undergone the same polishing and cleaning process need to be returned to steps S3.2-S3.4 for repeated cleaning until the inspection is qualified. The carbon and oxygen element residue content of qualified silicon wafers is less than 0.5 wt%. S4. Epitaxial growth of qualified substrates: Epitaxial growth is carried out on qualified substrates to prepare low surface defect epitaxial wafers, with no more than 3 stacking faults after epitaxy.

[0035] The high COP substrate refers to a substrate whose surface COP density, within a predetermined range, is significantly higher than that of a conventional polished substrate when subjected to specific detection conditions (such as scanning with a laser scattering surface defect detector in DWO mode of SP1 / SP2).

[0036] In step S3.1, the abrasive in the low abrasive concentration polishing slurry is colloidal silica with a solid content of 1.8%, a pH value of 9.6, and a flow rate of 100~500mL / min.

[0037] In step S3.2, if the weakly alkaline SC1 cleaning solution is a diluted aqueous solution containing ammonium hydroxide and hydrogen peroxide, the ammonium hydroxide is 0.55 wt% and the hydrogen peroxide is 1.3 wt%.

[0038] In step S3.4, during the spin-drying process, the substrate rotation speed is gradually increased from 1000 r / min to the set speed to avoid secondary contamination caused by liquid splashing.

[0039] The pH value of the weakly alkaline SC1 cleaning solution is controlled at 9.6.

[0040] In the above embodiments one to three, when the size of the high COP silicon single crystal substrate is 300mm, the COP defect density of the 300mm substrate is 4000~12000 at a detection scale of 26nm; when the size of the high COP silicon single crystal substrate is 200mm, the COP defect density of the 200mm substrate is 200~1000 at a detection scale of 65nm; when the size of the high COP silicon single crystal substrate is 150mm, the COP defect density of the 150mm substrate is 100~800 at a detection scale of 100nm.

[0041] In the above embodiments one to three, when the size of the high COP silicon single crystal substrate is 300 mm, the specified quantity in S3.5 is 40ea; when the size of the high COP silicon single crystal substrate is 200 mm, the specified quantity in S3.5 is 30ea; and when the size of the high COP silicon single crystal substrate is 150 mm, the specified quantity in S3.5 is 20ea.

[0042] The present invention also conducted comparative experiments to verify the effectiveness of the method, as detailed below: 1. Substrate preparation: Select two 300mm silicon single crystal substrates from the same ingot with adjacent markings, namely substrate A and substrate B. The COP level of both substrates is about 6500 at a 26nm detection size, and the initial state is the same. 2. Comparative cleaning: Comparative example: After single-sided polishing, substrate A was cleaned using existing traditional cleaning processes, specifically the steps of cleaning with No. 1 solution → HF cleaning → rinsing with pure water → IPA steam drying. This invention: After single-sided polishing of substrate B, the improved single-sided polishing and cleaning process of this invention is adopted: fine polishing with low abrasive concentration and weak alkaline polishing liquid → weak alkaline SC1 cleaning liquid combined with megasonic cleaning → alternating cleaning with ozone water and hydrofluoric acid → high-speed rotation and spin drying. 3. Testing after polishing and cleaning: Perform eDR testing on the internal morphology of COP and compare it to see if the crystal structure of COP is clear; 4. Epitaxial growth: Place substrate A and substrate B on the graphite base of the same epitaxial furnace, introduce trichlorosilane as the silicon source, and grow an intrinsic silicon epitaxial layer with a thickness of about 10 μm at a rate of 2 μm / min. 5. Detection and Results: The epitaxial wafer prepared from substrate A by conventional cleaning process has a large number of stacking fault defects caused by COP on its surface; the substrate B prepared by the process of this invention has a smooth COP inner surface, and the epitaxial wafer prepared from it has a smooth COP inner surface, with extremely low defect density after epitaxy, and no derived stacking fault defects were observed.

[0043] Substrate A (conventional process) has a C content of 0.82%, an O content of 0.75%, and 200 epitaxial stacking faults in its COP; Substrate B (this invention) has a C content of 0.21%, an O content of 0.10%, and 3 epitaxial stacking faults in its COP.

[0044] In summary, this invention, by combining a specific cleaning process with an epitaxial growth process, successfully achieves the goal of preparing high-quality epitaxial wafers with low surface defects on high-COP silicon single-crystal substrates, effectively solving an industry problem.

[0045] Different cleaning processes are used to determine whether a substrate is qualified by comparing internal impurities and carbon and oxygen content.

[0046] Mechanism of action of weakly alkaline SC1 cleaning solution on COP voids: Problems with conventional SC1 (strongly alkaline): Conventional SC1 (typically pH > 10.5) can cause excessive etching inside COP cavities. The tiny geometry inside COP cavities (similar to a "maze") is easily over-etched in a strongly alkaline environment, increasing the size of the pits and leaving impurities inside the cavities.

[0047] The optimization principle of weakly alkaline SC1 lies in controlling the corrosion rate: by controlling the pH value at 9-10 (weakly alkaline), the concentration of hydroxide ions is significantly reduced, and the OH- ions in weakly alkaline SC1 (pH 9-10) are reduced. - At concentrations 1-2 orders of magnitude lower than traditional strongly alkaline systems, the hydroxylation reaction of silicon atoms (Si + 2OH-) can be suppressed.- → SiO2 2- (+ H2↑), thus inhibiting corrosion of the COP cavity walls. This avoids the residue of impurities caused by over-etching of the COP after single-sided polishing and planarization. Traditional strong alkaline SC1 cleaning solution can expand the cavity area, thereby increasing the residue of impurities. Moreover, its cleaning ability for high COP substrates is insufficient, resulting in impurities not being washed away and remaining inside the cavities. Particle detection cannot identify these impurities, ultimately leading to the generation of epitaxial stacking faults.

[0048] Megasonic-assisted cleaning: By combining megasonic cleaning with a high-frequency sound pressure gradient of over 1 MHz, the SC1 cleaning solution effectively penetrates into the labyrinthine geometry inside the COP cavities, achieving thorough removal of deep-seated residual impurities. Compared to traditional ultrasound, megasonic cleaning can generate nanoscale cavitation effects, avoiding physical damage to the silicon wafer surface.

[0049] Combined with megasonic penetration: In a weakly alkaline environment, SC1 combines with megasonic waves, utilizing a high-frequency (>1 MHz) sound pressure gradient to penetrate the cleaning solution into the tiny pits, achieving "non-erosive penetration cleaning." This solves the problem of "hidden contamination" caused by the difficulty of traditional cleaning solutions penetrating into the COP cavities.

[0050] In the description of this invention, it should be understood that the orientation or positional relationship indicated by directional terms such as "front, back, up, down, left, right", "horizontal, vertical, horizontal" and "top, bottom" is generally based on the orientation or positional relationship shown in the accompanying drawings, and is only for the convenience of describing this invention and simplifying the description. Unless otherwise stated, these directional terms do not indicate or imply that the device or element referred to must have a specific orientation or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on the scope of protection of this invention; the directional terms "inner" and "outer" refer to the inner and outer contours relative to the outline of each component itself.

[0051] For ease of description, spatial relative terms such as "above," "on top of," "on the upper surface of," "above," etc., are used herein to describe the spatial positional relationship of a device or feature as shown in the figures to other devices or features. It should be understood that spatial relative terms are intended to encompass different orientations in use or operation beyond the orientation of the device as described in the figures. For example, if the device in the figures were inverted, a device described as "above" or "on top of" other devices or structures would subsequently be positioned as "below" or "under" other devices or structures. Thus, the exemplary term "above" can include both "above" and "below." The device may also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatial relative descriptions used herein will be interpreted accordingly.

[0052] Furthermore, it should be noted that the use of terms such as "first" and "second" to define components is merely for the purpose of distinguishing the corresponding components. Unless otherwise stated, the above terms have no special meaning and therefore should not be construed as limiting the scope of protection of this invention.

[0053] The above provides a detailed description of a method for preparing low-surface-defect epitaxial wafers on high-COP silicon single-crystal substrates. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A method for preparing low-surface-defect epitaxial wafers on high-COP silicon single-crystal substrates, characterized in that: The following steps are included: S1. Substrate preparation: Select a high COP silicon single crystal substrate; S2. Single-sided polishing: The high COP silicon single crystal substrate is polished using conventional single-sided polishing equipment to remove the mechanical damage layer on the substrate surface and obtain a preliminary planarized surface. S3, Improved Polishing and Cleaning Process: S3.1 Fine polishing treatment: The substrate after single-sided polishing is finely polished using a low-abrasive-concentration and weakly alkaline polishing slurry. The polishing pressure is controlled at 0.08~0.12MPa and the polishing speed is 30~80r / min. S3.2 Cleaning with weakly alkaline SC1 cleaning solution: Weakly alkaline SC1 cleaning solution is used in combination with megasonic cleaning to remove residual impurities from fine polishing; the weakly alkaline SC1 cleaning solution is specifically a diluted aqueous solution with an ammonium hydroxide concentration of less than 0.021 wt%, or a diluted aqueous solution containing an equal low concentration of ammonium hydroxide and hydrogen peroxide, the cleaning temperature is 35~45℃, the megasonic power is 60~100W, and the cleaning time is 3~8min; S3.3 Alternating Cleaning: Perform ozone water cleaning and hydrofluoric acid cleaning in sequence. This process can be repeated one or more times. The ozone concentration for ozone water cleaning is 5~20mg / L, the cleaning time is 1~5min, and the cleaning temperature is 25~35℃. The hydrofluoric acid concentration for hydrofluoric acid cleaning is 0.5~5wt%, the cleaning time is 30~180s, and the cleaning temperature is room temperature. S3.4 Spin-drying process: The substrate after alternating cleaning is spin-dried at high speed with a rotation speed of 1000~6000 r / min and a spin-drying time of 30~120s. S3.5 Inspection and Cleaning: Extract silicon wafers treated as described above and sequentially perform COP morphology testing, epitaxial growth, and particle testing. If the number of particles per square centimeter on the surface of the silicon wafer after epitaxial growth exceeds the specified number and is circularly distributed, substrates from the same batch that have undergone the same polishing and cleaning process should return to steps S3.2-S3.4 for repeated cleaning until the inspection is qualified. The carbon and oxygen residue content in the COP of qualified silicon substrate wafers is less than 0.5 wt%. S4. Epitaxial growth of qualified substrates: Epitaxial growth is carried out on qualified substrates to prepare low surface defect epitaxial wafers, with no more than 3 stacking faults after epitaxy.

2. The method for preparing a low-surface-defect epitaxial wafer on a high-COP silicon single-crystal substrate according to claim 1, characterized in that: In step S3.1, the abrasive in the low abrasive concentration polishing slurry is colloidal silica, the abrasive solid content is 0.5-5%, the pH value of the polishing slurry is 9-10, and the flow rate of the polishing slurry is 100-1000 mL / min.

3. The method for preparing a low-surface-defect epitaxial wafer on a high-COP silicon single-crystal substrate according to claim 1, characterized in that: In step S3.2, if the weakly alkaline SC1 cleaning solution is a diluted aqueous solution containing ammonium hydroxide and hydrogen peroxide, the ammonium hydroxide content is 0.2~1.3 wt% and the hydrogen peroxide content is 0.8~2.2 wt%.

4. The method for preparing a low-surface-defect epitaxial wafer on a high-COP silicon single-crystal substrate according to claim 1, characterized in that: In step S3.4, during the spin-drying process, the substrate rotation speed is gradually increased from 1000 r / min to the set rotation speed.

5. The method for preparing a low-surface-defect epitaxial wafer on a high-COP silicon single-crystal substrate according to claim 1, characterized in that: In step S3.5, the COP morphology test is performed using an electron beam wafer defect re-inspection system.

6. The method for preparing a low-surface-defect epitaxial wafer on a high-COP silicon single-crystal substrate according to claim 1, characterized in that: In step S3.5, the particle test is performed using a surface particle scanner.

7. The method for preparing a low-surface-defect epitaxial wafer on a high-COP silicon single-crystal substrate according to claim 1, characterized in that: In step S1, the size of the high COP silicon single crystal substrate is 150mm, 200mm, or 300mm.

8. The method for preparing a low-surface-defect epitaxial wafer on a high-COP silicon single-crystal substrate according to claim 7, characterized in that: When the size of the high COP silicon single crystal substrate is 300mm, the COP defect density of the 300mm substrate is 4000~12000 at a detection scale of 26nm; when the size of the high COP silicon single crystal substrate is 200mm, the COP defect density of the 200mm substrate is 200~1000 at a detection scale of 65nm; when the size of the high COP silicon single crystal substrate is 150mm, the COP defect density of the 150mm substrate is 100~800 at a detection scale of 100nm.

9. A method for preparing a low-surface-defect epitaxial wafer on a high-COP silicon single-crystal substrate according to claim 7, characterized in that: When the size of the high COP silicon single crystal substrate is 300 mm, the specified quantity in S3.5 is 40ea; when the size of the high COP silicon single crystal substrate is 200 mm, the specified quantity in S3.5 is 30ea; when the size of the high COP silicon single crystal substrate is 150 mm, the specified quantity in S3.5 is 20ea.

10. The method for preparing a low-surface-defect epitaxial wafer on a high-COP silicon single-crystal substrate according to claim 1, characterized in that: The pH value of the weakly alkaline SC1 cleaning solution is controlled between 9 and 10.

Images