A multi-level interleaved parallel buck active rectifier magnetically coupled wireless power transfer system
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- NANTONG UNIV
- Filing Date
- 2026-03-27
- Publication Date
- 2026-06-26
Smart Images

Figure CN122292707A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of power converters, and more particularly to a magnetically coupled wireless power transmission system using a multi-level interleaved parallel Buck active rectifier. Background Technology
[0002] To address concerns about the range and charging time of electric vehicles, fast charging capability has become a top priority for battery and electric vehicle manufacturers. Fast charging technology can effectively increase a battery's state of charge (SOC) in a short time by increasing the charging current in constant current charging mode and the charging power in constant power charging mode. However, for low-voltage lithium batteries used in light electric vehicles such as autonomous robots, industrial robots, electric skateboards, and electric bicycles, excessively high charging current and power result in very low battery equivalent resistance during the initial charging phase.
[0003] In recent years, magnetically coupled wireless power transfer (IPT) technology, with its advantages of flexibility, convenience, safety, reliability, and ease of maintenance, is expected to replace traditional plug-and-play wired charging technology in the future, becoming the mainstream charging method for energy storage components in mobile electronic devices such as mobile phones, electric vehicles, and implantable medical devices. However, as a typical resonant converter, IPT systems using passive rectifiers can only achieve high transmission efficiency under specific optimal load resistances. Replacing the passive rectifier with an active rectifier with input impedance regulation can avoid additional DC-DC converters, thereby effectively reducing the number of power conversion stages in the IPT system. Traditional active rectifier topologies have limited input impedance regulation capabilities, making it difficult to achieve impedance matching across the entire charging range in low-load resistance charging scenarios such as constant-power fast charging of low-voltage lithium batteries. In addition, existing topologies suffer from high switching voltage stress and large output ripple. Therefore, there is an urgent need for a new type of active rectifier topology with a wider impedance conversion ratio range, lower voltage stress, and higher conversion efficiency. Summary of the Invention
[0004] Purpose of the invention: The purpose of this invention is to provide a multi-level interleaved parallel Buck active rectifier magnetically coupled wireless power transfer system.
[0005] Technical solution: This invention includes an input power supply V in Transmitter-side inverter S p1 -S p4 Transmitter-side compensation circuit, transmitting coil L p Receiver coil L s The receiver-side compensation circuit and the receiver-side multi-level interleaved parallel Buck active rectifier; the input power supply V in With the transmitter-side inverter S p1 -S p4 The input port is connected to the transmitter-side inverter S.p1 -S p4 The midpoints of the two bridge arms are connected to the input terminal of the transmitter-side compensation circuit, and the output terminal of the transmitter-side compensation circuit is connected to the transmitter coil L. p Connection, transmitting coil L p and receiving coil L s There is magnetic coupling between them, and the receiving coil L s The input terminal of the receiving-side compensation circuit is connected to the receiving-side compensation coil. One end of the output terminal of the receiving-side compensation coil is connected to the AC port of the receiving-side multi-level interleaved parallel Buck active rectifier. The DC side of the rectifier is connected to the load.
[0006] Furthermore, the multi-level interleaved parallel Buck active rectifier includes multiple switched capacitor multi-level units and interleaved parallel Buck converters, with each bridge arm including multiple switching transistors S. a1 -S a5 S b1 -S b5 Flying capacitor C a and C b Interleaved parallel Buck inductors L a and L b .
[0007] Furthermore, the multi-level interleaved parallel Buck active rectifier charge balancing switch causes the flying capacitor C to... a An automatic charge balancing path is achieved during the energy transfer process of the Buck converter.
[0008] Furthermore, the multi-level interleaved parallel Buck active rectifier includes bridge arm A and bridge arm B, with bridge arm B integrating the switching transistor S in a completely symmetrical manner. b1 To S b5 Flying capacitor C b and inductor L b .
[0009] Furthermore, the switching transistor S in bridge arm A a1 S a2 S a3 S a5 With flying capacitor C a Together, they constitute the bridge arm switched capacitor multilevel unit; the switching transistor S a4 With inductor L a For the Buck converter unit of bridge arm A, the input is coupled to the output node of the multilevel unit, and controlled by S a1 and S a3 The duty cycle is used to chop and filter multi-level voltages.
[0010] Furthermore, the output terminals of bridge arm A and bridge arm B are connected in parallel and connected to the load together. By fixing the phase shift angle of the drive signal in the two bridge arms to π, the two-phase Buck converters can be operated in alternating parallel mode.
[0011] Furthermore, the switching transistor S a1 and S b1 Duty cycle D1 and S a3 and S b3 The duty cycle D2 is used to adjust the voltage gain.
[0012] Furthermore, the multi-level interleaved parallel Buck active rectifier adopts a simplified segmented modulation method, with a fixed duty cycle D1 or D2 value in each segment, and the other duty cycle is variable, in order to balance performance and stress.
[0013] Furthermore, the multi-level interleaved parallel Buck active rectifier employs an optimal phase angle control strategy.
[0014] Furthermore, the optimal phase angle control strategy includes dynamically adjusting the phase angle φ between the input voltage and current of the active rectifier. s This allows the system's equivalent input resistance to automatically track the optimal efficiency resistance, eliminating the need for real-time communication between the transmitting and receiving sides. Once other parameters in the wireless power transfer system are determined, the optimal phase angle φ is also determined. s_opt With output power P o related.
[0015] Beneficial effects: Compared with the prior art, the present invention has the following significant advantages: It integrates multi-level and variable-level active rectifier technology on the basis of active rectifier, and integrates the interleaved parallel Buck topology with the switched capacitor topology. Compared with the traditional method, it achieves full-range impedance matching under low switching device voltage stress, and at the same time, the interleaved parallel connection reduces the output current ripple. Attached Figure Description
[0016] Figure 1 Circuit diagram of an IPT system using multi-level interleaved parallel Buck active rectifiers;
[0017] Figure 2 This is the fundamental decoupling equivalent circuit for an IPT system using multi-level interleaved parallel Buck active rectifiers;
[0018] Figure 3 The main waveforms of a parallel Buck active rectifier with interleaved levels;
[0019] Figure 4 A diagram showing ten operating modes of a multi-level interleaved parallel Buck active rectifier;
[0020] Figure 5The voltage gain of the level-interleaved parallel Buck active rectifier;
[0021] Figure 6 The impedance conversion ratio of a multi-level interleaved parallel Buck active rectifier;
[0022] Figure 7 This is a schematic diagram of the voltage gain of a multi-level interleaved parallel Buck active rectifier employing a segmented modulation strategy.
[0023] Figure 8 A comparison of the maximum voltage stress of MOSFETs in multi-level interleaved parallel Buck active rectifiers and cascaded Buck active rectifiers;
[0024] Figure 9 Steady-state waveforms at the start and end of the constant power charging mode;
[0025] Figure 10 The steady-state waveforms at the beginning and end of the constant voltage charging mode. Detailed Implementation
[0026] The technical solution of the present invention will be further described below with reference to the accompanying drawings.
[0027] The magnetically coupled wireless power transfer system using a multi-level interleaved parallel Buck active rectifier described in this invention achieves full-range impedance matching under low switching device voltage stress, while the interleaved parallel connection reduces output current ripple. The multi-level interleaved parallel Buck active rectifier IPT system consists of an input power supply V... in Transmitter-side inverter S p1 -S p4 Transmitter-side compensation circuit, transmitting coil L p Receiver coil L s It consists of a receiver-side compensation circuit and a receiver-side multi-level interleaved parallel Buck active rectifier. The input power supply V... in With the transmitter-side inverter S p1 -S p4 The input port is connected to the transmitter-side inverter S. p1 -S p4 The midpoints of the two bridge arms are connected to the input terminal of the transmitter-side compensation circuit, and the output terminal of the transmitter-side compensation circuit is connected to the transmitter coil L. p Connection, transmitting coil L p and receiving coil L s There is magnetic coupling between them, and the receiving coil L s The input terminal of the receiving-side compensation circuit is connected to the receiving-side compensation coil. One end of the output terminal of the receiving-side compensation coil is connected to the AC port of the receiving-side multi-level interleaved parallel Buck active rectifier. The DC side of the rectifier is connected to the load.
[0028] The multi-level interleaved parallel Buck converter of this invention consists of two switched-capacitor multi-level units and an interleaved parallel Buck converter. Each bridge arm consists of five switching transistors (S... a1 -S a5 S b1 -S b5 ), flying capacitor (C) a and C b ) and interleaved parallel Buck inductors (L a and L b It consists of ( ). Taking bridge arm A as an example, the switching transistor S a1 S a2 S a3 S a5 With flying capacitor C a Together, they constitute the bridge arm switched capacitor multilevel unit. Switch S a4 With inductor L a The Buck converter unit that constitutes this bridge arm has its input directly coupled to the output node of the aforementioned multilevel unit, and is controlled by S. a1 and S a3 The duty cycle is used to chop and filter multi-level voltages, ultimately transferring energy to the load; in this structure, the introduction of a charge balancing switch enables the flying capacitor C... a An automatic charge-balancing path is achieved during energy transfer in the Buck converter. The bridge arm B integrates the switching transistor S in a completely symmetrical manner. b1 To S b5 Flying capacitor C b and inductor L b The output terminals of bridge arm A and bridge arm B are connected in parallel and connected to the load together. By fixing the phase shift angle of the drive signal in the two bridge arms to π, the two-phase Buck converters can be operated in alternating parallel mode.
[0029] The modulation phase shift angle of bridge arms A and B is fixed at π, the AC voltage is a five-level waveform, and the two-phase Buck converters operate in alternating parallel configuration. The ripple of the two-phase inductor current cancels each other out at the output, thus significantly reducing the total output current ripple. This can be achieved by controlling the switching transistor S. a1 and S b1 Duty cycles D1 and S a3 and S b3 The voltage gain is adjusted by the duty cycle D2. Since the impedance conversion ratio and reactance conversion ratio of the multi-level interleaved parallel Buck active rectifier are proportional to the square of the voltage gain, the impedance conversion ratio range [0, +∞) can be adjusted by adjusting the duty cycles D1 and D2.
[0030] A simplified segmented modulation method for multi-level interleaved parallel Buck active rectifiers achieves voltage gain control through three-segment duty cycle adjustment. In each segment, either duty cycle D1 or D2 is fixed, while the third duty cycle is variable to balance performance and stress. This segmented design ensures full coverage of impedance conversion ratios from zero to infinity, while segmented duty cycle control reduces device voltage stress, simplifies the control algorithm, and avoids complex calculations.
[0031] The optimal phase angle control strategy for multi-level interleaved parallel Buck active rectifiers includes: after other parameters in the IPT system are determined, the optimal phase angle φ is determined. s_opt Only with output power P o This can be achieved by dynamically adjusting the phase angle φ between the input voltage and current of the active rectifier. s This allows the system's equivalent input resistance to automatically track the optimal efficiency resistance, ensuring zero-voltage switching (ZVS) of all switching devices without requiring real-time communication between the transmitter and receiver, thus reducing switching losses. This control strategy is applicable to various modes, including constant power charging and constant voltage charging.
[0032] 1. Working principle of multi-level interleaved parallel Buck active rectifier;
[0033] like Figure 1 The diagram shown is an IPT system circuit diagram of the multi-level interleaved parallel Buck active rectifier described in this invention. Figure 2 The diagram shows the fundamental frequency decoupling equivalent circuit of an IPT system using a multi-level interleaved parallel Buck active rectifier.
[0034] To simplify the analysis of a multi-level interleaved parallel Buck active rectifier, assume that the flying capacitor C a C b and bus capacitor C bus Large enough to guarantee voltage V a V b and V bus It has a small voltage ripple, switch S a5 and S b5 The conduction time is much longer than the RC constant of a switched capacitor circuit.
[0035] The magnetic coupler has primary-side self-inductance L p Secondary side self-sensing L s And the mutual inductance M, the coupling coefficient of the coil is defined as:
[0036]
[0037] C p and C s The compensation capacitors R for the primary and secondary coils are respectively. pand R s These represent the losses of the primary and secondary coils, respectively. The high-frequency inverter with PSM modulation on the transmitting side generates an AC voltage u. p The resonant frequencies of both the transmitting and receiving resonant cavities are set to the system's switching frequency. The expression for this is:
[0038]
[0039] Since the current in the inductor is continuous, the bus voltage V bus It can be calculated as:
[0040]
[0041] like Figure 3 The diagram shows the main waveforms of a multilevel interleaved parallel Buck active rectifier.
[0042] Since the two inductors have the same inductance value L b At the same time, current balance is achieved between the two inductors, so the two inductors have the same average current I. o / 2 Taking bridge arm A when D1+D2≤1 as an example, according to the MOSFET's on-state, there is the following within half a switching cycle: Figure 4 The ten patterns shown.
[0043] like Figure 4 (a) Mode I (t0~t1): Before this mode begins, S a2 and S a4 It has already been turned on. At time t0, S a2 When turned off, the resonant current on the receiving side can be considered a constant value during the subsequent dead time.
[0044] like Figure 4 (b) Mode II (t1~t2): At time t1, switch S a1 On. During this time interval, the receiving side resonant current is relative to the flying capacitor C. a During charging, the terminal voltage u A equals V a =V o / D2.
[0045] like Figure 4 (c) Mode III (t2~t3): At time t2, switch S a4 Turn off, and at the same time, the inductor current i La Reaching its trough value I L_Valley Switch S in this dead zone interval a3 The ZVS currents are is and i La difference.
[0046] like Figure 4 (d) Mode IV (t3~t4): At time t3, switch Sa3 is turned on. The voltage across inductor La becomes V. bus -V o At the same time, the inductor current flows at a slope (V bus -Vo) / Lb rises linearly. In this mode, the terminal voltage u A equals V a +V bus =2V o / D2.
[0047] like Figure 4 (e) shows mode V (t4~t5): at time t4, switch S a2 Turn off, and at the same time, the inductor current i La Reaching its peak I L_peak .
[0048] like Figure 4 (f) shows mode VI (t5~t6): at time t5, switch S a4 The circuit is turned on. The voltage across inductor La becomes -Vo, and the inductor current decreases linearly with a slope of -Vo / Lb. In this mode, the terminal voltage u... A equals V a =Vo / D2.
[0049] like Figure 4 (g) Mode VII (t6~t7): At time t6, switch S a1 Turn off.
[0050] like Figure 4 (h) shows mode VIII (t7~t8): at time t7, switch S a2 Conduction. Due to S a2 and S a4 Simultaneous conduction, therefore, the terminal voltage u in this time interval A It equals zero.
[0051] like Figure 4 (i) Mode IX (t8~t9): At time t8, switch S a5 On. In this mode, the flying capacitor C a and bus capacitor C bus The charge balancing current between them will flow through switch S a5 and S a4 To balance voltage V a and V bus It is worth mentioning that in switch S a4 After the switch S is turned on a5 Drain-source voltage V dsIt becomes V a -V bus Due to the flying capacitor voltage V a and bus capacitor voltage V bus The change within a switching cycle is very small, therefore, at switch S a5 When it is turned on, its V ds If it can be approximated to zero, then switch S a5 This allows for approximate ZVS conduction. It's important to note that when the capacitor C... a and C bus The decrease leads to a smaller voltage V a and V bus When there is a large change within a switching cycle, approximate ZVS conduction cannot be achieved. In this mode, the terminal voltage u A It has remained at zero.
[0052] like Figure 4 (j) shows the pattern X (t9~t) 10 At time t9, switch S a5 Shutdown. This mode is the same as mode VIII, except that at the end of this mode, a new switching cycle begins.
[0053] By performing Fourier analysis on the input voltage of a multi-level interleaved parallel Buck active rectifier, its DC component V can be calculated. dc The effective value of the fundamental component U is zero. s for:
[0054]
[0055] In the formula, D1 is S a1 and S b1 Duty cycle, D2 is S a3 and S b3 Duty cycle.
[0056] The voltage gain of the so-called interleaved parallel Buck active rectifier is G. v_mibar for:
[0057]
[0058] like Figure 5 The figure shows the voltage gain G. v_mibar As can be seen from the trends of duty cycles D1 and D2, once the duty cycle D1 is determined, the voltage gain G... v_mibar It increases as the duty cycle D2 decreases. However, once the duty cycle D2 is fixed, the voltage gain G... v_mibarThe impedance ratio first increases and then decreases with increasing duty cycle D1, reaching its maximum at D1=0.5. Therefore, a multi-level interleaved parallel Buck active rectifier can theoretically achieve a voltage gain from zero to positive infinity. Neglecting rectifier operating losses, the impedance transformation ratio of the multi-level interleaved parallel Buck active rectifier can be considered as:
[0059]
[0060] It can be seen from the formula that the impedance conversion ratio and reactance conversion ratio of the multi-level interleaved parallel Buck active rectifier are both proportional to the square of the voltage gain. Therefore, this invention can adjust the impedance conversion ratio by adjusting the duty cycle D1D2 of the switching transistor, since the voltage gain G v_mibar The range is from zero to positive infinity. Therefore, the theoretical resistance conversion ratio and reactance conversion ratio of the proposed multi-level interleaved parallel Buck active rectifier are [0,+∞) and (-∞,+∞), respectively. Figure 6 It shows the impedance transformation ratio as a function of G. v_mibar and phase angle φ s The changing trend.
[0061] 2. Multi-level interleaved parallel Buck active rectifier IPT system simplifies segmented modulation strategy;
[0062] To minimize MOSFET voltage stress and avoid large charge-balance current, this section proposes a segmented modulation strategy for multi-level interleaved parallel Buck active rectifiers. Based on the proposed segmented modulation strategy, the voltage gain G... v_mibar It is divided into three parts.
[0063] Segment I: Set D1=0, and control the voltage gain G by adjusting D2∈[1,0.5]. v_mibar ∈[0,1.8];
[0064] Segment II: Set D2=0.5, and control the voltage gain G by adjusting D1∈[0,0.5]. v_mibar ∈[1.8,3.6];
[0065] Segment III: Set D1=0.5, and control the voltage gain G by adjusting D2∈[0,0.5]. v_mibar ∈[3.6,+∞).
[0066] For ease of control, a virtual duty cycle D is used to unify duty cycles D1 and D2. The relationship between duty cycles D1, D2, and D is as follows:
[0067]
[0068]
[0069] like Figure 7 The figure shows a schematic diagram of the voltage gain of a multi-level interleaved parallel Buck active rectifier using a segmented modulation strategy. The voltage gain G can be obtained from the figure. v_mibar It increases monotonically with the duty cycle D.
[0070] like Figure 8 The diagram shows a comparison of the maximum voltage stress on the MOSFETs of a multi-level interleaved parallel Buck active rectifier and a cascaded Buck active rectifier. It can be seen that, when the voltage gain is the same, the MOSFET voltage stress in the multi-level interleaved parallel Buck active rectifier is much lower than that in the cascaded Buck active rectifier.
[0071] 3. Optimal phase angle control strategy for multi-level interleaved parallel Buck active rectifier IPT system;
[0072] To achieve optimal efficiency impedance matching in the SS resonant network, the switching S... a1 -S a4 and S b1 -S b4 To achieve ZVS conduction and eliminate real-time communication between the receiver and transmitter, this invention employs an optimal phase angle control strategy. The output power is P. o The optimal phase angle φ of a single-stage Buck active rectifier with optimal efficiency resistors in an IPT system is obtained. s_opt It can be deduced as:
[0073]
[0074] Mode China V in R is the DC input voltage on the transmitting side. s R is the equivalent series resistance of the secondary coil. p ω0 is the equivalent series resistance of the primary coil, ω0 is the system angular frequency, M is the mutual inductance of the magnetic coupler, and P is the equivalent series resistance of the primary coil. o This is the system output frequency. Therefore, once other parameters in the IPT system are determined, the optimal phase angle φ is... s_opt Only with output power P o This is relevant, therefore it can be achieved by sampling P in real time. _o Calculate φ s_opt It can achieve maximum tracking efficiency without relying on the original edge information for dynamic adjustment.
[0075] The input impedance angle φ of the system resonant cavity p The input current i of the resonant cavity is defined as p The phase angle of the lagging input voltage, which is related to the phase angle φ sSimilarly, since the phase shift angle α of the primary-side inverter is equal to π, the condition for the MOSFET of the primary-side inverter to achieve ZVS conduction is φ. p =φ s ≥0. Therefore, the secondary phase angle φ of a multi-level interleaved parallel Buck active rectifier can be obtained. s A value greater than zero enables all MOSFETs in the primary-side full-bridge inverter to achieve ZVS conduction. An IPT system employing optimal phase angle control of multi-level interleaved parallel Buck active rectifiers can achieve ZVS conduction of all MOSFETs except the charge balancing switch throughout the entire constant power charging range, with a maximum transmission efficiency of 95.2%.
[0076] 4. Verification of the effectiveness of the new rectifier;
[0077] To verify the effectiveness of the proposed multi-level interleaved parallel Buck active rectifier (IPT) system, a prototype was built using a 7S24V / 20Ah lithium iron phosphate battery for charging. Table 1 lists the detailed parameters of the experimental prototype, and Table 2 lists the detailed parameters of the magnetic coupler.
[0078] Table 1. Parameters of the experimental prototype system using a multi-level interleaved parallel Buck active rectifier (IPT) system.
[0079] logo parameter Value logo parameter Value <![CDATA[V in ]]> Input voltage 80 V <![CDATA[f s ]]> Operating frequency 85kHz <![CDATA[P o_cp ]]> Constant power mode output power 350W <![CDATA[V o_cv ]]> Constant voltage mode output voltage 25.5V <![CDATA[L p ]]> Primary coil self-inductance 161.421 μH <![CDATA[L s ]]> Secondary coil self-inductance 161.117 μH <![CDATA[C p ]]> Primary-side compensation capacitor 21.792 nF <![CDATA[C s ]]> Secondary side compensation capacitor 21.746 nF <![CDATA[R p ]]> Primary coil ESR 173.02 mΩ <![CDATA[R s ]]> Secondary coil ESR 174.47 mΩ <![CDATA[L a ]]> Bridge arm A inductor 8 μH <![CDATA[L b ]]> Bridge arm B inductor 8 μH <![CDATA[C a ]]> Bridge arm A flying capacitor 96.8 μF <![CDATA[C b ]]> Bridge arm B flying capacitor 96.8 μF <![CDATA[C bus ]]> bus capacitor 96.8 μF <![CDATA[C o ]]> Output capacitor 792 μF k Coupling coefficient 0.2
[0080] Table 2 Magnetic Coupler Parameters
[0081] logo parameter Value logo parameter Value <![CDATA[D p ]]> outer diameter of primary coil 240 mm <![CDATA[D s ]]> outer diameter of secondary coil 240 mm <![CDATA[N p ]]> Number of turns of the primary coil 32 <![CDATA[N s ]]> Number of turns of secondary coil 32 δ Transmission distance 84m (k=0.2) d wire specifications 0.1mm×300 (Leds wire)
[0082] Both the transmitting and receiving sides of this experimental prototype are controlled by a TMS320F28335 DSP. The MOSFETs in the inverter and the active rectifier on the receiving side are both BSC0802LSATMA1. All waveforms of the prototype were recorded using a Tektronix PO024 oscilloscope, and the power and efficiency were recorded using a YOKOGAWA WT085E high-precision power analyzer.
[0083] like Figure 9 The left half of the diagram shows the transmitter-side current i during the start and end phases of constant power charging. p Voltage u p Receiver side current i s and voltage u s The steady-state waveform; as follows: Figure 9 As shown in (a), 9(b), 9(c) and 9(d).
[0084] As shown in the figure, the battery's equivalent resistance is relatively small in the initial stage. The system adjusts the duty cycle D and phase angle φ. sAchieve impedance matching. The drain-source voltage V of the switching transistor. ds The waveforms demonstrate zero-voltage switching (ZVS) characteristics, validating the effectiveness of the soft-switching design. Power transfer efficiency reaches 92.5%.
[0085] During the final stage, the battery voltage rises to 25.5V. The system increases the voltage gain by increasing the duty cycle D to ensure stable power. The switching transistor drive signal and drain-source voltage V... ds The waveforms confirm that all MOSFETs achieve ZVS conduction. The system efficiency rises to 93.7%, demonstrating the effectiveness of the optimal phase angle control strategy in constant power charging throughout the entire process.
[0086] like Figure 10 The figure shows the emitter-side current i during the start and end phases of constant voltage charging. p Voltage u p Receiver side current i s and voltage u s The steady-state waveform. As follows: Figure 10 As shown in (a), 10 (b), 10 (c) and 10 (d).
[0087] In the initial stage of constant voltage mode, the system reduces φ s Reactive power is reduced, but hard switching of some transistors leads to a slight decrease in efficiency (approximately 90%). Inductor current i L1 and i L2 The symmetry is well maintained, and the output current ripple is controlled.
[0088] In the final stage, the system efficiency drops to 84%, but since the transmitted energy accounts for less than 15% of the total energy at this point, the impact is manageable. The waveform oscillation originates from the change in the damping characteristics of the resonant network under the minimum duty cycle, but the system still maintains voltage stability through closed-loop control.
[0089] Waveform analysis of constant power and constant voltage charging modes shows that the proposed active rectifier topology and optimal phase angle control strategy can effectively adapt to load changes and achieve efficient and stable wireless charging throughout the entire process.
Claims
1. A multi-level interleaved parallel Buck active rectifier magnetically coupled wireless power transfer system, characterized in that: Including input power supply V in Transmitter-side inverter S p1 -S p4 Transmitter-side compensation circuit, transmitting coil L p Receiver coil L s The receiver-side compensation circuit and the receiver-side multi-level interleaved parallel Buck active rectifier; the input power supply V in With the transmitter-side inverter S p1 -S p4 The input port is connected to the transmitter-side inverter S. p1 -S p4 The midpoints of the two bridge arms are connected to the input terminal of the transmitter-side compensation circuit, and the output terminal of the transmitter-side compensation circuit is connected to the transmitter coil L. p Connection, transmitting coil L p and receiving coil L s There is magnetic coupling between them, and the receiving coil L s The input terminal of the receiving-side compensation circuit is connected to the receiving-side compensation coil. One end of the output terminal of the receiving-side compensation coil is connected to the AC port of the receiving-side multi-level interleaved parallel Buck active rectifier. The DC side of the rectifier is connected to the load.
2. The multi-level interleaved parallel Buck active rectifier magnetically coupled wireless power transfer system according to claim 1, characterized in that: The multilevel interleaved parallel Buck active rectifier includes multiple switched capacitor multilevel units and interleaved parallel Buck converters, with each bridge arm including multiple switching transistors S. a1 -S a5 S b1 -S b5 Flying capacitor C a and C b Interleaved parallel Buck inductors L a and L b .
3. The multi-level interleaved parallel Buck active rectifier magnetically coupled wireless power transfer system according to claim 1, characterized in that: The charge balancing switch in the multi-level interleaved parallel Buck active rectifier enables the flying capacitor C to... a An automatic charge balancing path is achieved during the energy transfer process of the Buck converter.
4. The multi-level interleaved parallel Buck active rectifier magnetically coupled wireless power transfer system according to claim 1, characterized in that: The multi-level interleaved parallel Buck active rectifier includes bridge arm A and bridge arm B, with bridge arm B integrating the switching transistor S in a completely symmetrical manner. b1 To S b5 Flying capacitor C b and inductor L b .
5. The multi-level interleaved parallel Buck active rectifier magnetically coupled wireless power transfer system according to claim 4, characterized in that: The switching transistor S in bridge arm A a1 S a2 S a3 S a5 With flying capacitor C a Together, they constitute the bridge arm switched capacitor multilevel unit; the switching transistor S a4 With inductor L a For the Buck converter unit of bridge arm A, the input is coupled to the output node of the multilevel unit, and controlled by S a1 and S a3 The duty cycle is used to chop and filter multi-level voltages.
6. The multi-level interleaved parallel Buck active rectifier magnetically coupled wireless power transfer system according to claim 4, characterized in that: The output terminals of bridge arm A and bridge arm B are connected in parallel and are connected to the load together. The phase shift angle of the drive signal in the two bridge arms is fixed at π to realize the interleaved parallel operation of the two-phase Buck converter.
7. The multi-level interleaved parallel Buck active rectifier magnetically coupled wireless power transfer system according to claim 2, characterized in that: The switching transistor S a1 and S b1 Duty cycle D1 and S a3 and S b3 The duty cycle D2 is used to adjust the voltage gain.
8. The multi-level interleaved parallel Buck active rectifier magnetically coupled wireless power transfer system according to claim 1, characterized in that: The multi-level interleaved parallel Buck active rectifier adopts a simplified segmented modulation method, with a fixed duty cycle D1 or D2 value in each segment, and the other duty cycle is variable, in order to balance performance and stress.
9. The multi-level interleaved parallel Buck active rectifier magnetically coupled wireless power transfer system according to claim 1, characterized in that: The multi-level interleaved parallel Buck active rectifier employs an optimal phase angle control strategy.
10. The multi-level interleaved parallel Buck active rectifier magnetically coupled wireless power transfer system according to claim 9, characterized in that: The optimal phase angle control strategy includes dynamically adjusting the phase angle φ between the input voltage and current of the active rectifier. s This allows the system's equivalent input resistance to automatically track the optimal efficiency resistance, eliminating the need for real-time communication between the transmitting and receiving sides. Once other parameters in the wireless power transfer system are determined, the optimal phase angle φ is also determined. s_opt With output power P o related.