High-coupling multi-motor vector control method and system, motor and storage medium

Abstract

This invention relates to the field of motor control technology, specifically to a highly coupled multi-channel motor vector control method, system, motor, and storage medium. The method includes the following steps: acquiring a programmable logic device (PLD) resource extension unit, configuring a time base module, an FSMC interface module, a PWM control module, and an encoder reading module. This invention, by embedding a PLD resource extension unit within a single-processor architecture, utilizes the parallel characteristics of programmable logic hardware to synchronously expand PWM output channels and encoder reading channels. This allows a single processor, which was originally limited by microcontroller hardware resources to support only a limited number of control channels, to now simultaneously run multiple complete field-oriented control functions. This overcomes the existing bias regarding the number of control channels per single processor, providing a hardware implementation path for multi-motor cooperative control without adding an additional processor chip.

Description

Technical Field

[0001] This invention relates to the field of motor control technology, specifically to a highly coupled multi-channel motor vector control method, system, motor, and storage medium. Background Technology

[0002] The high-performance operation of permanent magnet synchronous motors and brushless DC motors relies on the precise decoupling of stator current using field-oriented control technology. Field-oriented control decomposes the stator current into control quantities aligned with the rotor magnetic field direction through coordinate transformation, thereby achieving independent adjustment of the motor's magnetic flux and electromagnetic torque. In a typical field-oriented control architecture, the core components must be completed sequentially, including synchronous acquisition of stator phase current, real-time detection of rotor position information, Clark coordinate transformation, Park coordinate transformation, proportional-integral current loop regulation, inverse Park coordinate transformation, SVPWM space vector modulation, and PWM drive signal output from the three-phase power inverter.

[0003] Each of the above-mentioned stages places high demands on the processor's hardware resources: the PWM output channel requires multiple complementary timer units, encoder reading requires a dedicated quadrature decoding interface or a high-speed synchronous serial communication interface, and stator current acquisition requires the synchronous sampling and holding capability of a multi-channel analog-to-digital converter. Under a single-chip processor architecture, these hardware resources are typically insufficient to simultaneously support parallel computation of multiple complete field-oriented control circuits. When the application scenario requires simultaneous control of four or more motors, existing single-processor solutions often can only barely meet the requirements by reducing the control frequency or simplifying the control algorithm, severely limiting system performance.

[0004] A common approach is to add an extra processor chip to achieve coordinated control of the various motors through data communication between processors. However, cross-chip data interaction introduces coupling delays, which can significantly degrade the performance of multi-motor synchronous control in severe cases. Another approach is to use a high-end multi-core processor with more abundant resources. Although a single chip can support more control channels, the chip cost increases significantly, and competition for shared resources between multiple cores can also affect real-time control performance. Therefore, the problem addressed in this invention is: how to achieve high-performance coordinated control of multiple motors under limited hardware resource constraints. Summary of the Invention

[0005] This disclosure presents a highly coupled multi-channel motor vector control method, system, motor, and storage medium, with the aim of overcoming at least one of the defects existing in the prior art.

[0006] To achieve the above objectives, the technical solution disclosed in this invention is as follows: According to one aspect of this disclosure, a highly coupled multi-channel motor vector control method is provided, comprising the following steps: S1. Obtain the programmable logic device resource expansion unit, configure the time base module, FSMC interface module, PWM control module and encoder reading module. The time base module is used to generate clock signals for each module. The FSMC interface module is used to realize data interaction with the microcontroller. The PWM control module is used to generate multiple PWM drive signals. The encoder reading module is used to collect multiple rotor position angle data. S2. The microcontroller ADC collects the phase current of multiple motors and synchronously samples the stator current of each phase of multiple motors in a synchronous triggering manner. Based on the synchronously sampled phase current data, the multi-channel vector control program is executed. Each FOC function instance runs in parallel with time-division multiplexing on a single processor core. Each FOC function includes a Clark transformation module, a Park transformation module, and a current loop PI adjustment module. S3. Encoder data is transmitted through the FSMC interface. The speed, torque, and position parameters of multiple motors are shared in real time within the unified address space of the MCU. Each FOC function writes its own parameters into the shared data area and reads other parameters to participate in the control calculation during each control loop iteration. S4. Perform multi-motor linkage control based on parameter sharing results. Calculate the speed difference based on the real-time speed of each motor. Output torque coordination commands through the proportional-integral regulator and superimpose them onto the reference input terminals of each inner loop to achieve multi-motor coupling and linkage control.

[0007] Furthermore, the multi-vector control in S2 includes a Clark coordinate transformation step: converting the three-phase stator currents U1, V2, and W3 into the α-axis and β-axis components of a two-phase stationary coordinate system αβ, where: α = U1, The Clark transformation, based on the constraint that the sum of the three-phase currents is zero, projects the space vector of the three-phase stator current onto the two-phase orthogonal stationary coordinate system αβ, obtaining equivalent α-axis and β-axis components. The two-phase orthogonal stationary coordinate system αβ and the three-phase ABC coordinate system form an equal power transformation relationship, and the transformation matrix satisfies the orthogonal normalization condition. The Clark transformation module of each FOC function performs coordinate transformation operations on the sampled three-phase current data to generate the α-axis and β-axis components for use by the subsequent Park transformation module. Each Clark transformation module runs independently, with data structure and algorithm logic consistent with the coordinate transformation formula, and the transformation results are stored in the independent data buffer of each FOC function.

[0008] Furthermore, multi-vector control also includes a Park transformation step: transforming the α-axis and β-axis components of the two-phase stationary coordinate system αβ to a coordinate system that rotates synchronously with the rotor magnetic field, to obtain D. S Axis components and Q S Axial components, where: , Where θ is the rotor position angle encoding value; the Park transform uses the rotor electrical angle as the transformation reference to map the stator current components in the stationary coordinate system to the synchronous rotating coordinate system d. q To achieve excitation current D S Shaft component and torque current Q S Independent control of shaft components; the Park transformation module of each FOC function performs the rotation transformation operation based on the rotor position angle encoding value provided in real time by the encoder reading module of this channel, and generates the D... S Shaft component and torque current Q S The shaft component is used by the subsequent current loop PI adjustment module; the transformation angle parameters of each Park transformation module are updated independently to ensure that the transformation results of each channel correspond precisely to the actual rotor position of each motor.

[0009] Furthermore, multi-vector control also includes inverse Park transform and inverse Clark transform steps: Inverse Park transform is performed based on the rotating coordinate system voltage command to obtain the two-phase stationary coordinate system voltage command. The inverse Park transform is the inverse operation of the Park transform, and the transformation formula is: , The two-phase stationary coordinate system voltage command is converted into a three-phase voltage command through the inverse Clark transformation. The transformation formula is as follows: , , The inverse Clark transformation is implemented using SVPWM space vector pulse width modulation, outputting three PWM duty cycle signals to drive the three-phase power inverter. The inverse Park transformation module of each FOC function performs inverse rotation transformation operation based on the rotor position angle encoding value provided in real time by the encoder reading module of that channel, generating the α-axis component and β-axis component for use by the subsequent SVPWM module. The SVPWM module calculates the three-phase PWM comparison value based on the α-axis component and β-axis component, and writes the three PWM duty cycle data into the PWM control module of the programmable logic device through the FSMC interface.

[0010] Furthermore, the PWM control module in S1 includes a PWM control register, a dead-time generation module, and a complementary output module. The PWM control register is used to set the initial parameters of the PWM carrier period and the duty cycle of each phase. The dead-time generation module inserts a preset dead time between the turn-off edge of the upper bridge arm and the turn-on edge of the lower bridge arm of the complementary output to prevent the upper and lower bridge arms of the power inverter from being simultaneously turned on, causing a shoot-through short-circuit fault. The complementary output module generates a pair of complementary PWM drive signals with dead-time insertion and outputs them to the upper and lower bridge arm drive terminals of the three-phase power inverter, respectively. The PWM control register group includes a period register, a comparator register A, a comparator register B, and a comparator register C, which correspond to the duty cycle control of the three-phase output, respectively. The period registers of each PWM generation channel are set with the same carrier frequency to ensure the synchronization of multiple outputs. Comparator registers A, B, and C store the duty cycle parameters of phase U, phase V, and phase W, respectively. The value of the dead time is determined according to the turn-off delay time of the power device and the highest application voltage level, and is set to the order of hundreds of nanoseconds to several microseconds.

[0011] Furthermore, the encoder reading module in S1 includes an encoder data register and a communication interface module. The encoder data register is used to cache the latest angle sampling data of multiple angle encoders. The communication interface module supports SPI, I2C, or SSI standard interface protocols to read the angle registers inside each angle encoder in a polling or interrupt manner, obtain the real-time rotor position angle values ​​of each motor, and continuously update the contents of the encoder data registers so that each FOC function can query the rotor position information in real time during each control loop iteration. Each encoder interface unit operates independently, and its data structure and communication protocol configuration are independent of each other. The SPI interface supports a communication rate of up to tens of megabits per second, which is used to complete the reading of multiple angle data in a very short time. The I2C interface is suitable for low-speed application scenarios to save pin resources. The SSI interface supports synchronous serial communication to improve anti-interference capability.

[0012] Furthermore, the multi-motor linkage control described in S4 includes a speed coupling calculation step: v=|θ t -θ t-1 | / Δt, , where θ t The rotor angle encoding value at the current sampling time, θ t-1 The value represents the rotor angle encoding at the previous sampling time, and Δt is the time interval between two adjacent samplings. and These are the real-time mechanical speeds of the i-th and j-th motors, respectively. Speed ​​coupling calculation is based on real-time angle sampling data from multi-channel angle encoders, extracting the instantaneous mechanical speed of each motor through differential operations. Each FOC function obtains the current angle value from the encoder reading module during each control loop iteration and calculates the speed value by comparing it with the angle value saved in the previous cycle. Speed ​​calculation performs a division operation between the angle increment and the time increment within each control cycle to obtain continuous speed estimates. Each FOC function writes its calculated speed value to the speed parameter area of ​​the parameter sharing unit, while simultaneously reading the speed values ​​of other motors from the speed parameter area to calculate the speed difference.

[0013] Furthermore, the proportional-integral adjustment described in S4 includes: K p This is the proportional adjustment coefficient. The integral control coefficient is K, I is the integral cumulative state variable, and OUT is the torque coordination command value output by the proportional-integral controller. The proportional-integral control uses the speed difference Δv as the input signal. The proportional term P provides a control response proportional to the deviation, and the integral term I accumulates the speed deviation over time. The PI controller of each FOC function calculates the torque coordination command value based on the difference between its speed value and the speed values ​​of other channels. p and coefficient of integral term The torque coordination command value is determined by debugging according to the system dynamic response requirements; the torque coordination command value is superimposed on the inner loop torque reference input terminal of the corresponding FOC function according to the mapping relationship of each motor number.

[0014] Furthermore, the programmable logic device resource expansion section internally includes a time base module, an FSMC interface module, a PWM control module, and an encoder reading module. The time base module generates a global system clock signal and distributes it to each sub-module as a unified timing reference. The FSMC interface module includes an address decoder and a data register group, establishing a high-speed parallel data path between the microcontroller and the programmable logic device. The PWM control module includes multiple independent PWM generation channels, each including a period register, a compare register, a dead-time generator, and a complementary output driver. The encoder reading module includes multiple independent encoder interface units, supporting SPI, I2C, or SSI communication protocols to read data from each angle encoder. Each module operates in parallel within the same clock domain, achieving complete replication and independent expansion of multiple magnetic field orientation control channels through the hardware parallel characteristics of the programmable logic device. The channels are strictly aligned in timing and do not interfere with each other. The time base module has a built-in PLL phase-locked loop circuit, generating a high-precision system clock based on the frequency multiplication of the external crystal oscillator input. The data width of the FSMC interface can reach 16 bits or 32 bits, and the address mapping uses a static chip select method to access each function register.

[0015] According to another aspect of this disclosure, a highly coupled multi-motor vector control system is provided for implementing the highly coupled multi-motor vector control method described above, comprising: The time base module is used to generate a global system clock signal and distribute it to each functional module as a unified timing reference. The FSMC interface module, which includes an address decoder and a data register set, establishes a high-speed parallel data path between the microcontroller and the programmable logic device. The PWM control module contains multiple independent PWM generation channels. Each channel includes a period register, a compare register, a dead-time generator, and a complementary output driver, used to generate complementary PWM drive signals with dead-time insertion. The encoder reading module contains multiple independent encoder interface units. Each interface unit includes an SPI controller and an angle data buffer register, which are used to read the rotor position data of each angle encoder in polling or interrupt mode. A multi-channel angle encoder is connected to each channel of the encoder reading module to provide rotor position angle signals to each motor. A multi-channel current sensor is connected to the microcontroller's ADC module to collect the phase current signals of each motor and output them to the microcontroller for analog-to-digital conversion.

[0016] According to another aspect of this disclosure, an electric motor is provided, comprising: The highly coupled multi-motor vector control system described above; The motor body, connected to a multi-channel motor drive module, is an actuator used to realize electromechanical energy conversion; A power drive circuit is located between the multi-channel motor drive module and the motor body, and is used to amplify the PWM signal into a drive current and output it to the motor body. The highly coupled multi-channel motor vector control system communicates with the programmable logic device resource expansion unit through the FSMC interface, sends PWM duty cycle configuration data and receives angle sampling results from each encoder. The multi-channel angle encoder collects the rotor position angle of the motor body in real time and transmits it to the microcontroller for vector control calculation through the encoder reading module; The multi-channel current sensor collects the stator current of each phase of the motor body, performs synchronous sampling through the ADC module, and transmits it to the microcontroller. The power drive circuit, under the control of the PWM drive signal, chops the DC bus voltage into a three-phase AC voltage and applies it to the stator windings of the motor body.

[0017] According to another aspect of this disclosure, a computer-readable storage medium is provided storing a computer program that, when executed by a processor, implements the highly coupled multi-channel motor vector control method as described above. After the system is powered on, the computer program first executes an initialization process, including system clock configuration, GPIO pin function multiplexing configuration, ADC module calibration and configuration, FSMC bus initialization, and configuration and self-test of the programmable logic device resource expansion module.

[0018] The beneficial effects of this invention are: This invention embeds a programmable logic device resource expansion unit within a single-processor architecture, utilizing the parallel characteristics of programmable logic hardware to synchronously expand PWM output channels and encoder read channels. This enables a single processor, which was originally limited by microcontroller hardware resources to support only a limited number of control channels, to now run multiple complete field-oriented control functions simultaneously. This breaks through the cognitive bias in the prior art regarding the number of control channels of a single processor, and provides a hardware implementation path for multi-motor cooperative control without adding an additional processor chip.

[0019] In the single-processor architecture, all field-oriented control functions run within the same processor core. The control parameters of each function directly interact within a unified address space through a parameter-sharing unit, eliminating the need for any cross-chip communication protocol stack. This completely eliminates the coupling delay caused by inter-processor data interaction in multi-processor architectures, enabling the synchronization performance of multi-motor coupled control to reach the response level of a single processor instruction cycle. The time base module, FSMC interface module, PWM control module, and encoder reading module within the programmable logic device operate in parallel within the same clock domain. Data is directly transmitted between modules via hardware interconnection rather than indirect access through a software driver layer, thus ensuring the independence and real-time performance of each extended channel.

[0020] At the coupled control level, proportional-integral (PI) regulation based on the real-time speed differences of each motor is used to dynamically allocate torque reference inputs to each motor using speed deviation as a coordination signal. This achieves high-precision synchronous operation of multiple motors under any operating conditions. The speed coupling calculation is completed entirely within a single processor, and the PI regulation output directly acts on the reference inputs of each current loop, eliminating intermediate buffers and protocol conversion stages. Therefore, it has excellent dynamic response characteristics and steady-state synchronization accuracy, ensuring that multiple motors maintain precise speed and phase coordination during collaborative operation.

[0021] The above description is merely an overview of the technical solution of the present invention. In order to better understand the technical means of the present invention and to implement it in accordance with the contents of the specification, the preferred embodiments of the present invention are described in detail below with reference to the accompanying drawings. Attached Figure Description

[0022] Figure 1 This is a structural block diagram of a highly coupled multi-channel motor vector control system according to an embodiment of the present invention; Figure 2 This is a block diagram of the internal module structure of a programmable logic device resource expansion unit in one embodiment of the present invention; Figure 3 This is a flowchart of the FOC control algorithm in one embodiment of the present invention. Detailed Implementation

[0023] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are some embodiments of the present invention, but not all embodiments.

[0024] The term "comprising," and any variations thereof, used in the specification and claims of this application, is intended to cover a non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not necessarily limited to those explicitly listed, but may include other steps or units not explicitly listed or inherent to such process, method, product, or apparatus. Furthermore, the use of "and / or" in the specification and claims indicates at least one of the connected objects, such as A and / or B, indicating the inclusion of A alone, B alone, or both A and B.

[0025] In embodiments of the present invention, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design described as "exemplary" or "for example" in embodiments of the present invention should not be construed as being more preferred or advantageous than other embodiments or designs. Rather, the use of the terms "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.

[0026] The present invention provides the following preferred embodiments: In one embodiment, reference Figure 1 , Figure 2 and Figure 3 This invention provides a specific implementation of a highly coupled multi-channel motor vector control method. This method is executed on a hardware platform including an MCU microcontroller and a CPLD programmable logic device, and includes the following steps: S1. Programmable Logic Device Resource Expansion Section Configuration Stage. A high-speed parallel communication path is established between the MCU and CPLD through the CPLD's FSMC interface module. The MCU writes channel configuration data to the CPLD, and the CPLD generates enable signals for multiple PWM output channels and chip select signals for multiple encoder read channels based on the configuration data. The configuration data includes the frequency division coefficient, dead time parameters, and complementary output enable bits for each PWM channel, as well as the communication rate and interface type selection parameters for each encoder channel. The time base module provides a unified time base for the entire resource expansion section, ensuring the consistency and synchronization of timing among the expansion channels. The FSMC interface module includes an address decoder, a data register group, and a control status register. The address decoder selects the target register based on the address signal output by the MCU, the data register group buffers the PWM configuration data to be written or the encoder angle data to be read, and the control status register reflects the operating status of each channel.

[0027] S2. Parallel Execution Stage of Multi-channel Field-Oriented Control Program. The stator phase currents of multiple motors are synchronously converted from analog to digital using multiple ADC synchronous sampling channels within the MCU. Taking four-motor control as an example, each motor is equipped with three current sensors to collect the U-phase, V-phase, and W-phase currents respectively. Each motor's three-phase current occupies one ADC channel. The ADCs simultaneously start sampling under the synchronous trigger signal provided by the time base module. The sampling results are directly transmitted to the designated SRAM data buffer via the DMA controller, without the processor core's involvement in data transfer. Based on the synchronously sampled phase current data, the MCU constructs an independent field-oriented control function instance for each motor. Each function instance is executed at high speed in a time-division multiplexing manner on the same processor core. The rotation frequency is much higher than the motor's electromechanical time constant, thus ensuring real-time control. During execution, each function instance queries the rotor position angle data updated by the CPLD encoder reading module in real time, completes core calculations such as Clark transformation, Park transformation, current loop PI regulation, inverse Park transformation, and SVPWM modulation, and outputs three PWM duty cycle data to the CPLD's PWM control module.

[0028] S3. Parameter Sharing Stage. A shared data region is allocated in the MCU's SRAM. This region is managed by the parameter sharing unit and stores the operating parameters of each field-oriented control function. The operating parameters include: speed parameters v1 to vn, torque parameters T1 to Tn, and position parameters theta1 to thetan. At the end of each control loop iteration, each function writes its real-time speed, torque, and position data to the corresponding address in the shared data region. At the start of the next iteration, it reads the parameter data of other functions from the shared data region and calculates the coordinated control quantity for its own motor. The shared data region uses a mutual exclusion access mechanism to avoid data races caused by simultaneous reading and writing by multiple functions, ensuring the atomicity and consistency of parameter sharing. After reading the parameters from other functions, each function calculates the torque coordination command based on the speed difference between its own function and other functions. This coordination command is superimposed on the reference input of its current loop, thereby achieving synchronous speed coupling control between the motors.

[0029] S4. Multi-motor coupling and linkage control stage. First, the CPLD encoder reading module sequentially reads the current angle value thetat of each angle encoder via the SPI interface and writes this data into the encoder data register for the MCU to query. The MCU reads the current angle θ of each motor and the previous angle θ-1 from the encoder data register, and calculates the value according to the formula v=|θ|. t -θ t-1 The MCU calculates the real-time speed of each motor using | / Δt. Then, it performs pairwise difference operations on the speeds of each motor to obtain a speed difference sequence. The speed difference is used as a coupling control input to the PI controller, which then adjusts the control according to the formula... The torque coordination command OUT is calculated using OUT=P+I and then superimposed onto the inner loop reference input of the corresponding motor's FOC function. This superposition of torque coordination commands allows each motor to maintain its base speed while dynamically adjusting its output torque based on its speed deviation from other motors, thus achieving synchronized speed coupling and linkage control among multiple motors. The outputs of each FOC function are used by the CPLDPWM control module to generate complementary PWM signals with dead-time insertion, which are then amplified by the power drive circuit to drive the motors.

[0030] In one implementation, refer to Figure 1 and Figure 2 This invention provides a specific structural implementation of a highly coupled multi-channel motor vector control system. The invention consists of a microcontroller (DSP / MCU), a programmable logic device (CPLD / FPGA), an angle encoder and interface circuit, a motor and drive circuit, a current sensor and amplification processing circuit, and a voltage sensor and amplification processing circuit.

[0031] This embodiment takes four-way motor vector control as an example to illustrate the specific implementation method. The programmable logic device mentioned in this invention can be a CPLD or an FPGA. Here, a CPLD is used as an example for description.

[0032] This invention incorporates a time base module, an FSMC interface module, a PWM control module, and an encoder readout module within a programmable logic device (CPLD). The time base module generates the clock signal used by the other modules; the FSMC interface module includes an FSMC decoder and an FSMC register; the PWM control module includes a PWM control register, a PWM dead-time module, and a PWM complementary output module; the encoder readout module includes an encoder data register and an encoder interface, which can be an SPI interface, an SSI interface, or an I2C interface, but is exemplified here by using an SPI interface. The FSMC decoder is used to decode the address signals and read / write signals input to the MCU. The FSMC register has a data temporary storage function and is connected to the PWM control register and encoder data register inside the CPLD. The MCU writes to the FSMC register through the FSMC decoder and further transmits the data to the PWM control register. The PWM control register processes the data transmitted from the FSMC register and controls the PWM dead-time module and the PWM complementary output module to output PWM control signals. The duty cycles of the three-phase PWM input of motor #1 are set to U_pwm1, U_pwm2, and U_pwm3, respectively. The encoder reading module reads the angle encoder data through the SPI interface and stores it in the encoder data register. The encoder data register further transmits the encoder data to the FSMC register. The MCU reads the FSMC register through the FSMC decoder and obtains the angle encoder data from the FSMC register. Here, the return angle of motor #1 encoder is set to reg_code.

[0033] The microcontroller described in this invention can be an MCU or a DSP, capable of performing fixed-point or floating-point operations and running relevant algorithms related to FOC. Here, an MCU is used as an example. The MCU should have multiple ADC interfaces, the number of which is related to the number of motors. The MCU acquires the phase currents of the motors during operation via the ADCs. The phase currents of motor #1 are set as U_adc1, V_adc2, and W_adc3. The motor phase currents are input to the Clark transformation module of the FOC program (see formulas 1 and 2) to generate two-phase stationary coordinates Alpha and Beta. The MCU has an FSMC interface or a parallel interface with similar functionality. Here, the FSMC interface is used as an example. The MCU reads data through the FSMC interface. The angle encoder data acquired by the CPLD is processed by the MCU through the Park transformation module of the FOC program (see formulas 3 and 4) to generate the rotating coordinate system Ds and Qs of the motor. The generated two-phase stator coordinate system is then processed by the inverse Park transformation module (see formulas 5 and 6) and the inverse Clark transformation module (see formulas 7, 8, and 9), and then by the SVPWM module to generate three PWM duty cycle data (see code 1). The MCU transmits the three PWM duty cycle data generated by the SVPWM module to the PWM control module of the CPLD through the FSMC interface, thereby controlling the CPLD to output PWM control signals, which drive the motor to run through the motor drive circuit.

[0034] Clark Transform Module: Since U_adc1+V_adc2+W_adc3=0, the formula simplifies: Formula 1 Formula 2 Park Transform Module: Formula 3 Formula 4 Inverse Park Transform Module: Formula 5 Formula 6 Inverse Clark Transform Module: Formula 7 Formula 8 Formula 9 Because the current sampling is signed floating-point data, while the PWM output is unsigned integer data, the conversion relationship needs to be considered when converting PWM data, according to formulas 10, 11, and 12: Formula 10 Formula 11 Formula 12 SVPWM module: M_Pwm_Out(U_pwm1,V_pwm2,W_pwm3); Code 1 The angle encoder and interface circuit, motor and drive circuit, current sensor and amplification processing circuit, and voltage sensor and amplification processing circuit described in this invention are all consistent with the prior art and have no special requirements.

[0035] The FOC control program described in this invention runs in the MCU. The number of FOC control functions is only related to the number of motors. This invention controls four motors, namely motors 1#, 2#, 3#, and 4#. Therefore, four FOC control functions are designed in the MCU.

[0036] The PWM control module and encoder reading module in the programmable logic device (CPLD) of this invention operate independently and can be replicated according to actual applications and hardware resources, thereby expanding the number of motors. This invention controls a total of four motors, therefore, four PWM control modules and four encoder reading modules are designed in the CPLD.

[0037] The FOC control function of this invention runs simultaneously in the MCU. Therefore, the speed, torque, and position information of each FOC control function are shared and participate in the calculation. The algorithm can perform closed-loop control of each parameter, giving the system control a high degree of control coupling. Taking speed control as an example, the current speed angle is... From a historical perspective t-1 The acquisition time is Δt. The motor speed Speed ​​is calculated (see formula 13). The Speed1 of motor 1 is set as the reference. The speed difference between motor 2 (and similarly motors 3 and 4) and motor 1 is ΔSpeed ​​(see formula 14). The speed difference is used as the feedback input to the PID control function of the speed loop to perform PI (proportional and integral) control on the speed (see formulas 15, 16, and 17). The corresponding proportional result P and integral result I are output respectively, and the final result OUT is output. By doing so, high-coupling synchronous control of the speed of the four motors can be achieved.

[0038] Speed ​​calculation: Formula 13 PI parameter calculation: Δspeed=Speed1-Speed2 Formula 14 P=K p×Δspeed Formula 15 Formula 16 Out = P + I (Formula 17) The MCU (Microcontroller Unit) is the core of the entire control system, responsible for executing the field-oriented control algorithm, coordinating the work of various expansion modules, and managing data interaction with the parameter sharing unit. The MCU integrates a floating-point arithmetic unit or employs a fixed-point arithmetic optimization algorithm, enabling it to complete all computations for multiple field-oriented control functions within a single control cycle. The MCU exchanges data at high speed with the CPLD resource expansion unit through the FSMC parallel interface, sending PWM duty cycle configuration data and receiving angle sampling results from each encoder. The MCU runs a real-time operating system or bare-metal driver, providing scheduling and management support for the time-sharing execution of multiple function instances. In a preferred embodiment, the MCU uses a 32-bit microcontroller with an ARM Cortex-M4 core, operating at 168MHz, equipped with a single-cycle hardware multiplier and a floating-point arithmetic unit, capable of completing all coordinate transformations and PI adjustment calculations for four FOC functions within a single control cycle.

[0039] The CPLD (Programmable Logic Device) resource expansion unit is the hardware carrier of the programmable logic device resource expansion section. It is tightly coupled to the MCU via the FSMC bus. Its internal module structure includes a timing module, an FSMC interface module, a PWM control module, and an encoder readout module. The timing module incorporates a high-precision PLL (Phase-Locked Loop) circuit. Based on the external crystal oscillator input, it generates a system clock signal that meets the timing requirements of each submodule and distributes this clock signal to the FSMC interface module, PWM control module, and encoder readout module, ensuring that the entire CPLD resource expansion unit operates within a unified clock domain. In one embodiment, the timing module outputs an 80MHz system clock, and each submodule performs timing control based on this clock. The FSMC interface module includes an address decoder, a data register group, and a control status register. The address decoder selects the target register based on the address signal output by the MCU. The data register group buffers the PWM configuration data to be written or the encoder angle data to be read. The control status register reflects the operating status of each channel. The FSMC interface has a 16-bit data width, and the address mapping uses a static chip select method to access each function register, with an access delay of one system clock cycle. The PWM control module contains multiple independent PWM generation subunits. Each subunit includes a period register, a comparator register, a dead-time generator, and a complementary output driver. The period register sets the carrier frequency of the PWM signal, the comparator register sets the duty cycle of each phase, and the dead-time generator inserts a dead time between the turn-off edge of the upper bridge arm and the turn-on edge of the lower bridge arm of the complementary output to prevent short circuits in the power inverter. The complementary output driver converts the internal logic level signal into a level standard that meets the input requirements of the power driver. The encoder reading module contains multiple independent encoder interface subunits. Each subunit includes an SPI controller, an angle accumulator register, and a data buffer register. The SPI controller accesses the internal registers of the angle encoder at a configurable communication rate. The angle accumulator register updates the absolute angle value in real time based on the incremental signal output by the encoder, and the data buffer register caches the latest angle data for the MCU to query and read via the FSMC interface. In the four-motor control embodiment, the PWM control module contains four PWM generation subunits, and the encoder reading module contains four encoder interface subunits. Each subunit operates independently and with strictly aligned timing.

[0040] Each channel of the multi-channel angle encoder is connected to a corresponding channel of the CPLD encoder reading module. Each motor is equipped with one angle encoder, responsible for converting the rotor position into a standard SPI communication protocol data stream and transmitting it to the CPLD. The angle encoder uses magnetic or photoelectric encoding principles, outputting a fixed number of position counts within each mechanical cycle of the rotor revolution, and has a built-in angle accumulation algorithm to output the absolute angle value, supporting multi-cycle position memory function. In one embodiment, the angle encoder uses an 18-bit absolute magnetic encoder with a resolution of 0.00000381 degrees, an SPI communication rate of 10Mbps, and an angle data update rate of 10kHz. Multiple current sensors are connected to the MCU's ADC module. Each phase of the stator winding of each motor is equipped with one current sensor, for a total of 3n current sensors (n being the number of motors). The current sensors, based on the Hall effect or shunt resistor principle, convert the stator phase current into a proportional voltage signal, which is then processed by amplification and filtering circuits before being sent to the MCU's ADC input pin. The ADC module performs synchronous sampling on each channel under the synchronous trigger signal provided by the interrupt, ensuring that the three-phase current is acquired at the same time, thereby meeting the stringent requirements of the field-oriented control algorithm for current data synchronization. In the four-motor control embodiment, the ADC module is configured in 16-channel synchronous sampling mode, with a sampling resolution of 12 bits and a sampling rate of 1MHz.

[0041] The parameter sharing unit is implemented internally within the MCU, providing shared data access services for each field-oriented control function. The parameter sharing unit maintains a contiguous SRAM storage area, divided into speed parameter, torque parameter, and position parameter areas. Each function writes its parameters to the corresponding partition at the end of each control loop iteration and reads parameter data from other functions at the start of the iteration. The parameter sharing unit prevents concurrent access conflicts and ensures the consistency of shared data through software mutexes or a hardware-based AHB bus arbitration mechanism. During system operation, in each control cycle, the ADC module synchronously samples multiple current data streams and transfers them to the SRAM data buffer via DMA; each FOC function obtains the current rotor angle from the CPLD encoder module, calculates the coordinate transformation and PI adjustment required for field-oriented control, and outputs PWM duty cycle data to the CPLD PWM control module; each FOC function writes its speed, torque, and position parameters to the shared storage area of ​​the parameter sharing unit, while simultaneously reading parameters from other functions for coupling and coordination calculations; the PI adjustment based on the speed difference outputs torque coordination commands and superimposes them onto the reference inputs of each current loop, thereby completing the entire multi-motor coupling and linkage control process. In a preferred embodiment, the control period is set to 100 microseconds, i.e., the control frequency is 10kHz, and the access delay of the parameter sharing unit is less than 1 microsecond.

[0042] In one implementation, refer to Figure 1The present invention provides a specific implementation of a motor product that applies the aforementioned highly coupled multi-channel motor vector control system, including a motor body, a highly coupled multi-channel motor vector control system, and a power drive circuit.

[0043] The motor body adopts a permanent magnet synchronous motor or a brushless DC motor structure and is the actuator for realizing electromechanical energy conversion. The stator winding of the motor body adopts a three-phase star connection, with stator slots evenly distributed on the stator core. The three-phase windings are embedded in the slots in 60-degree phase bands. The rotor part has built-in permanent magnets or uses surface-mounted or built-in magnet structures to generate the main magnetic field. The working principle of the motor body is: after three-phase alternating current is passed through the stator windings, a rotating magnetic field is generated in the air gap. This rotating magnetic field interacts with the permanent magnet rotor magnetic field to generate electromagnetic torque, driving the rotor to rotate and output mechanical power. The number of pole pairs of the motor body determines the conversion relationship between the rotor mechanical speed and electrical angular velocity. In the vector control system of this invention, the mechanical angle measured by the angle encoder needs to be multiplied by the number of pole pairs to obtain the electrical angle used for Park transformation.

[0044] In one embodiment, the motor body adopts a built-in permanent magnet synchronous motor structure with 10 pole pairs, a rated speed of 3000 rpm, a rated power of 320 W, a stator resistance of 0.14 ohms, and a winding inductance of 0.25 mH.

[0045] The power drive circuit is located between the multi-channel motor drive module and the motor body, and is responsible for the power conversion function of amplifying the PWM control signal into drive current. The core components of the power drive circuit include a gate driver chip and a power transistor array. The gate driver chip receives three complementary PWM signals from the motor drive module. Within each PWM cycle, it sets the power transistors of the upper and lower bridge arms to the on and off states respectively according to the duty cycle. The power transistor array is composed of IGBT or MOSFET devices. Under the action of the gate drive signal, it chops and modulates the DC bus voltage, outputting a three-phase pulse width modulated voltage waveform. At the turn-on edge of the PWM signal, the upper bridge arm power transistor is turned on and the lower bridge arm is turned off, and current flows from the DC positive terminal through the upper bridge arm into the motor windings. At the turn-off edge of the PWM signal, the upper bridge arm is turned off and the lower bridge arm is turned on, and current flows from the motor windings through the lower bridge arm into the DC negative terminal, forming a freewheeling path. The PWM duty cycle determines the proportion of the upper bridge arm's conduction time within one carrier cycle, thus determining the average voltage value applied to the motor windings. The selection of the PWM carrier frequency requires a trade-off between switching losses and current ripple, and is typically chosen within the range of 10kHz to 20kHz to avoid audible noise. In one embodiment, the power drive circuit uses a three-phase full-bridge MOSFET module as the power device, with a DC bus voltage of 36V, a PWM carrier frequency of 10kHz, and a dead time of 520 nanoseconds.

[0046] The DC bus of the power drive circuit is supplied by an external power source or rectifier. The stability and power capacity of the DC bus voltage directly affect the performance of the motor drive system. The power drive circuit typically integrates overcurrent protection, overvoltage protection, and overheat protection functions. When abnormal operating conditions are detected, the PWM output is quickly blocked to protect the power devices and the motor body. The overcurrent protection threshold is typically set to 1.5 times the rated current, with a protection response time of less than 1 microsecond; the overvoltage protection threshold is typically set to 1.2 times the DC bus voltage; and the overheat protection monitors the junction temperature of the power devices using a temperature sensor, blocking the PWM output when the junction temperature exceeds the set threshold. In the multi-motor cooperative operation scenario of this invention, multiple motor bodies are coupled and linked through a mechanical transmission mechanism, such as in applications like the cooperative motion of multi-axis robot joints, the synchronous drive of multiple conveyor belts on a production line, and the linkage interpolation of multiple coordinate axes in a CNC machine tool. Under the joint drive of the vector control system and the power drive circuit, each motor body achieves cooperative operation based on the speed, torque, and position parameters of each FOC function in the parameter sharing unit. Changes in the speed of one motor are transmitted to other related mechanisms through mechanical coupling. At the same time, the vector control system senses the real-time speed of each motor through the parameter sharing unit, and dynamically adjusts the torque reference input of each motor through PI regulation based on the speed difference, so that all related motors always maintain precise speed synchronization and phase coordination during the dynamic process.

[0047] In multi-motor drive applications requiring balanced torque distribution, the torque parameters in the parameter sharing unit are used to distribute the total load torque among the motors. When multiple motors drive a single load, the control system calculates a torque coordination command based on the speed deviation of each motor. This command is then superimposed on the base torque reference input, causing the motor carrying the heavier load to appropriately reduce its speed and transfer some of the load to another motor, thus achieving balanced load distribution among the motors. For example, in a dual-motor drive on the same shaft application, if one motor's speed increases due to external disturbances, the parameter sharing unit detects the increased speed difference between the two motors. The PI controller outputs a positive torque coordination command to the motor with the higher speed, increasing its output torque and thus reducing its speed. Simultaneously, a negative torque coordination command is output to the other motor to increase its output torque, thereby achieving dynamic balanced load distribution and improving the dynamic performance and reliability of the entire drive system.

[0048] In one embodiment, the present invention provides a specific implementation of a computer-readable storage medium storing a computer program that, when executed by a processor, implements all the steps of the highly coupled multi-channel motor vector control method.

[0049] Computer-readable storage media can take the form of non-volatile memory, including but not limited to flash memory, electrically erasable programmable read-only memory, NAND flash memory arrays inside solid-state drives, or mask read-only memory embedded in application-specific integrated circuits. In the specific implementation of the product, it is preferred to use the flash memory integrated inside the MCU or an externally extended Nor Flash chip as the storage medium. When the system is powered on, the MCU can directly read the program code in the storage medium and load it into the internal SRAM or execute it directly in place. The capacity of the storage medium needs to be determined according to the amount of computer program code and the size of the constant data table. For the amount of program code required to implement four or more magnetic field orientation controls, a storage space of not less than 512KB is usually required. In a preferred embodiment, the 1MB flash memory integrated inside the MCU is used as the storage medium, and the XIP in-place execution mode is adopted. The program code does not need to be moved and is executed directly in the flash memory, which reduces the program loading time and saves SRAM space.

[0050] The computer program is written in C language, VHDL language, or a hybrid programming method of both. The C language part is responsible for implementing the upper-level control logic, including the calculation flow of each magnetic field orientation control function, the control algorithm of the PI regulator, ADC synchronous sampling, interrupt response of FSMC bus data reading and writing, and read and write management of parameter sharing area. The VHDL language part is responsible for implementing the timing logic, including the time base module, FSMC interface module, PWM control module, and encoder reading module, as well as the precise read and write timing of the register bit fields of the programmable logic device.

[0051] The program is cross-compiled on an ARM Cortex-M series processor or an MCU platform with equivalent computing power, generating target machine code which is then burned into the storage medium in hex or bin format. The core functional modules of the computer program include: a programmable logic device resource expansion module, responsible for configuring the operating parameters of each module within the CPLD during system initialization, including setting the frequency division coefficient of the time base module, configuring the address mapping of the FSMC interface module, configuring the period register and dead-time parameters of the PWM control module, and configuring the SPI communication rate of the encoder read module; an ADC synchronous sampling module, responsible for configuring the multi-channel synchronous sampling parameters of the MCU's internal ADC module, including the mapping relationship between sampling channels and pins, selecting the trigger source for the sampling sequence, and configuring the target address for DMA transfer; a multi-channel FOC function execution module, responsible for implementing the complete field-oriented control calculation process; a parameter sharing module, responsible for managing the shared data area in the MCU's internal SRAM; and a multi-channel motor coupling and linkage control module, responsible for implementing speed coupling calculation and PI coordinated adjustment functions.

[0052] The multi-channel FOC function execution module maintains an independent function instance for each motor. These instances are independent in data structure but share code segments, accessing their respective runtime data through parameter pointers. The Clark transform converts the three-phase current sample values ​​into alpha and beta axis components. The Park transform rotates the alpha and beta components to the dq rotating coordinate system to obtain the Ds and Qs axis current components. The PI regulator calculates the Ds and Qs axis voltage commands based on the deviations between the reference and actual Ds and Qs axis current values. The inverse Park transform rotates the dq coordinate system voltage commands back to the alpha and beta coordinate system. The SVPWM module calculates the three-phase PWM comparison values ​​based on the alpha and beta voltage commands and writes them to the comparison register of the CPLD PWM control module. Each FOC function instance executes independently according to the same computational flow in each control loop iteration, with only numerical differences in parameter data. The parameter sharing module is called after each control loop iteration by the multi-channel FOC function execution module, writing the latest parameter data of each function to the corresponding address in the shared memory area and updating the parameter version number to support data consistency verification at the read end. When any FOC function needs to read parameters from other paths, the parameter sharing module calculates the source address based on the function number and returns the corresponding parameter value, ensuring that the parameter data accessed by all path functions at any time comes from the same complete control cycle.

[0053] The multi-motor coupling and linkage control module obtains the current angle encoding value of each motor from the CPLD encoder reading module. Based on the difference between the current angle and the angle of the previous cycle, and the sampling time interval, it calculates the real-time speed of each motor, and then calculates the speed difference Δv between each pair of motors. The speed difference is sent to the PI coordinating regulator, according to the formula... A torque coordination command is calculated and superimposed onto the inner loop torque reference input of the corresponding FOC function according to the motor number mapping relationship, thereby achieving speed synchronization coupling and linkage control between multiple motors. In a preferred embodiment, the proportional adjustment coefficient K... p Set to 0.15, integral adjustment coefficient With a setting of 0.02 and a control cycle of 100 microseconds, the system can achieve a speed synchronization error of less than 0.5% between multiple motors. In another implementation, the computer program further includes a communication interface module, supporting data interaction with a host computer or human-machine interface via standard communication interfaces such as UART, CAN, or Ethernet. This enables online adjustment of control parameters, real-time monitoring of operating status, and feedback reporting of fault diagnosis information. The communication interface module is implemented in the program as an independent task or interrupt service routine, exchanging data with the main control loop through message queues or shared memory, providing flexible system configuration and debugging methods without affecting real-time control performance. This embodiment solidifies all steps of the highly coupled multi-motor vector control method into executable code in the form of a computer program and stores it in a general-purpose storage medium, allowing control systems with corresponding processor hardware to directly load and run, and implement the technical solution of this invention. Based on the above-mentioned multi-motor cooperative control, the technical solution of this invention also supports phase coordination functions between multiple motors. In three-phase motor drive applications, the phase relationship of the stator currents of each motor directly affects the combined torque characteristics of the motor output. When multiple motors are coupled and linked through a mechanical transmission mechanism, such as in the coordinated movement of joints in a multi-axis robot, the phase relationship of each joint motor needs to be precisely coordinated to ensure the accuracy of the end effector's motion trajectory. In the technical solution of this invention, the parameter sharing unit not only shares the speed, torque, and position parameters of each motor, but also the current phase information of each motor. When executing SVPWM modulation, each FOC function dynamically adjusts its voltage vector phase angle based on the phase difference between its current phase and the phases of other motors, ensuring that the stator current phase of each motor satisfies a predetermined coordination relationship at any given time. This phase coordination function is achieved by maintaining a phase offset table for each motor in the parameter sharing unit. Each FOC function queries the phase offset table in each control cycle and corrects its voltage vector angle reference value accordingly. Through this phase coordination mechanism, this invention can achieve phase synchronization of multiple motors under any load conditions and any operating speed, ensuring the overall operational stability and position control accuracy of the multi-motor system. Although the present invention has been specifically described above with reference to preferred embodiments, it should be understood that the present invention is not limited to the embodiments described above. Various modifications and variations can be made by those skilled in the art without departing from the spirit of the present invention, and such modifications and variations should fall within the scope defined by the appended claims and their equivalents.

Claims

1. A highly coupled multi-channel motor vector control method, characterized in that, Includes the following steps: S1. Obtain the programmable logic device resource expansion unit, configure the time base module, FSMC interface module, PWM control module and encoder reading module. The time base module is used to generate clock signals for each module. The FSMC interface module is used to realize data interaction with the microcontroller. The PWM control module is used to generate multiple PWM drive signals. The encoder reading module is used to collect multiple rotor position angle data. S2. The microcontroller ADC collects the phase current of multiple motors and synchronously samples the stator current of each phase of multiple motors in a synchronous triggering manner. Based on the synchronously sampled phase current data, the multi-channel vector control program is executed. Each FOC function instance runs in parallel with time-division multiplexing on a single processor core. Each FOC function includes a Clark transformation module, a Park transformation module, and a current loop PI adjustment module. S3. Encoder data is transmitted through the FSMC interface. The speed, torque, and position parameters of multiple motors are shared in real time within the unified address space of the MCU. Each FOC function writes its own parameters into the shared data area and reads other parameters to participate in the control calculation during each control loop iteration. S4. Perform multi-motor linkage control based on parameter sharing results. Calculate the speed difference based on the real-time speed of each motor. Output torque coordination commands through the proportional-integral regulator and superimpose them onto the reference input terminals of each inner loop to achieve multi-motor coupling and linkage control.

2. The highly coupled multi-channel motor vector control method according to claim 1, characterized in that, The multi-vector control in S2 includes the Clark coordinate transformation step: converting the three-phase stator currents U1, V2, and W3 into the α-axis and β-axis components of the two-phase stationary coordinate system αβ, where: α = U1, The Clark coordinate transformation, based on the constraint that the sum of the three-phase currents is zero, projects the three-phase stator current space vector onto a two-phase orthogonal stationary coordinate system αβ, obtaining equivalent α-axis and β-axis components. The two-phase orthogonal stationary coordinate system αβ and the three-phase ABC coordinate system form an equal power transformation relationship, and the transformation matrix satisfies the orthogonal normalization condition. The Clark transformation module of each FOC function performs coordinate transformation operations on the sampled three-phase current data to generate the α-axis and β-axis components for use by the subsequent Park transformation module. Each Clark transformation module runs independently, with data structure and algorithm logic consistent with the coordinate transformation formula, and the transformation results are stored in the independent data buffer of each FOC function.

3. The highly coupled multi-channel motor vector control method according to claim 2, characterized in that, Multi-vector control also includes the Park transformation step: transforming the α-axis and β-axis components of the two-phase stationary coordinate system αβ to a coordinate system that rotates synchronously with the rotor magnetic field, to obtain D. S Axis components and Q S Axial components, where: , Where θ is the rotor position angle encoding value; the Park transform uses the rotor electrical angle as the transformation reference to map the stator current components in the stationary coordinate system to the synchronous rotating coordinate system d. q To achieve excitation current D S Shaft component and torque current Q S Independent control of shaft components; the Park transformation module of each FOC function performs rotation transformation calculations based on the rotor position angle encoding values ​​provided in real time by the encoder reading module of that channel, generating the D... S Shaft component and torque current Q S The shaft component is used by the subsequent current loop PI adjustment module; the transformation angle parameters of each Park transformation module are updated independently to ensure that the transformation results of each channel correspond precisely to the actual rotor position of each motor.

4. The highly coupled multi-channel motor vector control method according to claim 3, characterized in that, Multi-vector control also includes inverse Park transform and inverse Clark transform steps: Based on the rotating coordinate system voltage command, an inverse Park transform is performed to obtain the two-phase stationary coordinate system voltage command. The inverse Park transform is the inverse operation of the Park transform, and the transformation formula is: , The two-phase stationary coordinate system voltage command is converted into a three-phase voltage command through the inverse Clark transformation. The transformation formula is as follows: , , The inverse Clark transformation is implemented using SVPWM space vector pulse width modulation, outputting three PWM duty cycle signals to drive the three-phase power inverter. The inverse Park transformation module of each FOC function performs inverse rotation transformation operation based on the rotor position angle encoding value provided in real time by the encoder reading module of that channel, generating the α-axis component and β-axis component for use by the subsequent SVPWM module. The SVPWM module calculates the three-phase PWM comparison value based on the α-axis component and β-axis component, and writes the three PWM duty cycle data into the PWM control module of the programmable logic device through the FSMC interface.

5. The highly coupled multi-channel motor vector control method according to claim 4, characterized in that, The PWM control module in S1 includes a PWM control register, a dead-time generation module, and a complementary output module. The PWM control register is used to set the initial parameters of the PWM carrier period and the duty cycle of each phase. The dead-time generation module inserts a preset dead time between the turn-off edge of the upper bridge arm and the turn-on edge of the lower bridge arm of the complementary output to prevent the upper and lower bridge arms of the power inverter from being simultaneously turned on, causing a shoot-through short circuit fault. The complementary output module generates a pair of complementary PWM drive signals with dead-time insertion and outputs them to the upper and lower bridge arm drive terminals of the three-phase power inverter, respectively. The PWM control register group includes a period register, a comparator register A, a comparator register B, and a comparator register C, which correspond to the duty cycle control of the three-phase output, respectively. The period registers of each PWM generation channel are set with the same carrier frequency to ensure the synchronization of multiple outputs. Comparator registers A, B, and C store the duty cycle parameters of phase U, phase V, and phase W, respectively. The value of the dead time is determined according to the turn-off delay time of the power device and the highest application voltage level, and is set to the order of hundreds of nanoseconds to several microseconds.

6. The highly coupled multi-channel motor vector control method according to claim 5, characterized in that, The encoder reading module described in S1 includes an encoder data register and a communication interface module. The encoder data register is used to cache the latest angle sampling data of multiple angle encoders. The communication interface module supports SPI, I2C, or SSI standard interface protocols to read the angle registers inside each angle encoder in a polling or interrupt manner, obtain the real-time rotor position angle values ​​of each motor, and continuously update the contents of the encoder data registers so that each FOC function can query the rotor position information in real time during each control loop iteration. Each encoder interface unit operates independently, and its data structure and communication protocol configuration are independent of each other. The SPI interface supports a communication rate of up to tens of megabits per second, which is used to complete the reading of multiple angle data in a very short time. The I2C interface is suitable for low-speed application scenarios to save pin resources. The SSI interface supports synchronous serial communication to improve anti-interference capability.

7. The highly coupled multi-channel motor vector control method according to any one of claims 1 to 6, characterized in that, The multi-motor linkage control in S4 includes speed coupling calculation steps: ,in The rotor angle encoding value at the current sampling time, θ t-1 The value represents the rotor angle encoding at the previous sampling time, and Δt is the time interval between two adjacent samplings. and These are the real-time mechanical speeds of the i-th and j-th motors, respectively. Speed ​​coupling calculation is based on real-time angle sampling data from multi-channel angle encoders, extracting the instantaneous mechanical speed of each motor through differential operations. Each FOC function obtains the current angle value from the encoder reading module during each control loop iteration and calculates the speed value by comparing it with the angle value saved in the previous cycle. Speed ​​calculation performs a division operation between the angle increment and the time increment within each control cycle to obtain continuous speed estimates. Each FOC function writes its calculated speed value to the speed parameter area of ​​the parameter sharing unit, while simultaneously reading the speed values ​​of other motors from the speed parameter area to calculate the speed difference.

8. The highly coupled multi-channel motor vector control method according to claim 7, characterized in that, S4's proportional-integral control includes: ,in This is the proportional adjustment coefficient. Here, K is the integral control coefficient, I is the integral cumulative state variable, and OUT is the torque coordination command value output by the proportional-integral controller. The proportional-integral control uses the speed difference Δv as the input signal. The proportional term P provides a control response proportional to the deviation, and the integral term I accumulates the speed deviation over time. The PI controller of each FOC function calculates the torque coordination command value based on the difference between its speed value and the speed values ​​of other channels. p and coefficient of integral term The torque coordination command value is determined by debugging according to the system dynamic response requirements; the torque coordination command value is superimposed on the inner loop torque reference input terminal of the corresponding FOC function according to the mapping relationship of each motor number.

9. The highly coupled multi-channel motor vector control method according to claim 1, characterized in that, The programmable logic device resource expansion section includes a time base module, an FSMC interface module, a PWM control module, and an encoder reading module. The time base module generates a global system clock signal and distributes it to each sub-module as a unified timing reference. The FSMC interface module includes an address decoder and a data register group, establishing a high-speed parallel data path between the microcontroller and the programmable logic device. The PWM control module includes multiple independent PWM generation channels, each including a period register, a compare register, a dead-time generator, and a complementary output driver. The encoder reading module includes multiple independent encoder interface units, supporting SPI, I2C, or SSI communication protocols to read data from each angle encoder channel. Each module operates in parallel within the same clock domain. The hardware parallelism of the programmable logic device enables the complete replication and independent expansion of multiple magnetic field orientation control channels. The channels are strictly aligned in timing and do not interfere with each other. The time base module has a built-in PLL circuit, which generates a high-precision system clock based on the frequency multiplication of the external crystal oscillator input. The data width of the FSMC interface can reach 16 bits or 32 bits, and the address mapping uses a static chip select method to access each function register.

10. A highly coupled multi-channel motor vector control system, used to implement the highly coupled multi-channel motor vector control method as described in any one of claims 1-9, characterized in that, include: The time base module is used to generate a global system clock signal and distribute it to each functional module as a unified timing reference. The FSMC interface module, which includes an address decoder and a data register set, establishes a high-speed parallel data path between the microcontroller and the programmable logic device. The PWM control module contains multiple independent PWM generation channels. Each channel includes a period register, a compare register, a dead-time generator, and a complementary output driver, used to generate complementary PWM drive signals with dead-time insertion. The encoder reading module contains multiple independent encoder interface units. Each interface unit includes an SPI controller and an angle data buffer register, which are used to read the rotor position data of each angle encoder in polling or interrupt mode. A multi-channel angle encoder is connected to each channel of the encoder reading module to provide rotor position angle signals to each motor. A multi-channel current sensor is connected to the microcontroller's ADC module to collect the phase current signals of each motor and output them to the microcontroller for analog-to-digital conversion.

11. An electric motor, characterized in that, include: The highly coupled multi-channel motor vector control system as described in claim 10; The motor body, connected to a multi-channel motor drive module, is an actuator used to realize electromechanical energy conversion; A power drive circuit is located between the multi-channel motor drive module and the motor body, and is used to amplify the PWM signal into a drive current and output it to the motor body. The highly coupled multi-channel motor vector control system communicates with the programmable logic device resource expansion unit through the FSMC interface, sends PWM duty cycle configuration data and receives angle sampling results from each encoder. The multi-channel angle encoder acquires the rotor position angle of the motor body in real time and transmits it to the microcontroller for vector control calculation through the encoder reading module; The multi-channel current sensor collects the stator current of each phase of the motor body, performs synchronous sampling through the ADC module, and transmits it to the microcontroller. The power drive circuit, under the control of the PWM drive signal, chops the DC bus voltage into a three-phase AC voltage and applies it to the stator windings of the motor body.

12. A computer-readable storage medium, characterized in that, The system contains a computer program that, when executed by a processor, implements the highly coupled multi-channel motor vector control method as described in any one of claims 1 to 9. After the system is powered on, the computer program first executes an initialization process, including system clock configuration, GPIO pin function multiplexing configuration, ADC module calibration and configuration, FSMC bus initialization, and configuration and self-test of the programmable logic device resource expansion module.

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