A fast soft recovery diode and a method of manufacturing the same

Abstract

This invention relates to the field of semiconductor technology, specifically to a fast soft recovery diode and its manufacturing method. The diode includes an N+ substrate region, an N buffer region, an N- drift region, a P- anode region, and a P+ anode contact region. The N- drift region has a stepped concentration layer, which includes at least two layers, N1 and N2, arranged from bottom to top. The doping concentration of the N2 layer is higher than that of the N1 layer. The surface doping concentration of the P+ anode contact region is greater than that of the P-anode region, and the surface doping concentration of the P-anode region is greater than that of the N2 layer. The N- drift region has a pre-defined depletion layer edge region, which has at least one P+ buried layer located below and / or to the side of the P+ anode region in the vertical direction. This improves the diode's fast soft recovery capability, effectively reduces device conduction losses and switching losses, and suppresses electromagnetic interference, thereby improving the overall system efficiency, power density, and reliability.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and more specifically to a fast soft recovery diode and its manufacturing method. Background Technology

[0002] Fast recovery diodes (FRDs) are core components in power electronic systems, and their performance directly affects the efficiency and reliability of the entire system. Traditional planar FRDs typically employ a deep P+ anode region and a lightly doped N- drift region. To achieve low on-state voltage drop and high surge capability, the doping concentration of the P+ region needs to be increased to enhance minority carrier injection efficiency, thereby generating a strong conductivity modulation effect. However, this leads to the storage of excessive minority carriers in the N- drift region during forward conduction. During the reverse recovery process from conduction to turn-off, these stored charges need to be rapidly emptied, affecting the reverse recovery time (trr). Simultaneously, a large reverse recovery peak current (Irrm) and a sharp rate of current change (di / dt) are formed. After the charge is rapidly emptied, the current decays rapidly, resulting in a "hard" reverse recovery waveform (small S value), which is highly susceptible to severe voltage oscillations and spikes, posing a threat to the device itself and other components in the circuit.

[0003] To improve softness, existing SPEED structures adjust implantation efficiency through specific anode doping profiles. However, existing SPEED structures or similar schemes often have limitations in the design of P-region concentration, and their effective P-region concentration is still too high, resulting in excessive stored charge and limited improvement in softness.

[0004] Therefore, there is an urgent need to develop a fast soft recovery diode and its manufacturing method to solve the above problems. Summary of the Invention

[0005] This invention relates to a fast soft recovery diode and its manufacturing method. By combining the stepped concentration design on the anode side of the N-drift region with the P+ buried layer at the edge of the depletion layer of the N-drift region, the soft recovery capability of the fast recovery diode is achieved, effectively solving the above-mentioned technical problems.

[0006] To achieve the above objectives, the present invention provides the following technical solution: a fast soft recovery diode, comprising:

[0007] N+ substrate region;

[0008] The N-buffer zone is located above the N+ substrate region;

[0009] The N-drift region located above the N-buffer;

[0010] The P-anode region is located above the N-drift region;

[0011] The P+ anode contact area is located above the P anode region;

[0012] The N-drift region has a stepped concentration layer, which includes at least an N1 layer and an N2 layer from bottom to top. The doping concentration of the N2 layer is higher than that of the N1 layer. The surface doping concentration of the P+ anode contact region is greater than that of the P anode region. The surface doping concentration of the P anode region is greater than that of the N2 layer.

[0013] The N-drift region is pre-defined with a depletion layer edge region, and the depletion layer edge region is provided with at least one P+ buried layer, which is located below and / or to the side of the P+ anode region in the vertical direction.

[0014] Preferably, the distance between the upper surface of the stepped concentration layer and the upper surface of the diode is 4-6 μm, and the thickness of the stepped concentration layer is 5-9 μm.

[0015] Preferably, the N1 layer concentration is 10. 15 cm -3 The N2 layer concentration is 10. 16 cm -3 .

[0016] Preferably, the P+ buried layer consists of at least two layers, and each P+ buried layer is a ring structure arranged at intervals along the vertical direction.

[0017] Preferably, the P+ buried layer can be a ring-shaped discontinuous structure.

[0018] Preferably, a method for manufacturing a fast soft recovery diode is provided, comprising the following steps:

[0019] S1: Prepare an N+ substrate region, on which an N-buffer zone is epitaxially grown. The N-buffer zone is located above the N+ substrate region, and the N-buffer zone concentration is 10. 15 cm -3 The thickness of the N-buffer is on the order of magnitude of 5-40 μm.

[0020] S2: An N-drift region is epitaxially grown outside the N-buffer, the N-drift region being located above the N-buffer, the N-drift region having a concentration of 10. 14 cm -3 On a certain scale, after the N-drift region is epitaxially grown at a set distance, a ring structure is formed through photolithography, and a P+ buried layer is formed by ion implantation.

[0021] S3: Continue to grow N1 and N2 layers epitaxially in the N-drift region. The thickness of N1 and N2 layers is 2-4 μm, and the sum of the thicknesses of N1 and N2 layers is 5-9 μm. After the N2 layer is grown, continue to grow an N-drift region of 4-6 μm on the N2 layer.

[0022] S4: The outer portion of the N-drift region is processed through oxidation, photolithography, etching, implantation, and push-bonding to form the P-anode region;

[0023] S5: The P anode region is formed into a P+ anode contact region through oxidation, photolithography, etching, implantation and push-bonding processes.

[0024] Preferably, in S1, the N+ substrate region is doped with AS and / or doped with P, the resistivity of the N+ substrate region is 0.002-0.004 (Ω•cm), and the thickness of the N+ substrate region is 525-625 μm.

[0025] Preferably, in S2, the P+ buried layer consists of three layers, and the distance between the P+ buried layers is 8-12 μm.

[0026] Preferably, in step S4, the thickness of the P-anode region is 12-14 μm, and the surface concentration of the P-anode region is 10. 17 cm -3 Magnitude.

[0027] Preferably, in step S5, the thickness of the P+ anode contact region is 4-6 μm, and the surface concentration of the P+ anode contact region is 10. 19 cm -3 Magnitude.

[0028] This invention provides a fast soft recovery diode, which has the following advantages compared with existing technologies:

[0029] This invention designs a stepped N1 / N2 bilayer structure in the N-drift region on the anode side. After diffusion in the P+ anode contact region, this structure enables a gradient effective doping concentration distribution along the longitudinal direction of the P-anode region, particularly reducing the effective concentration near the PN junction. This achieves a self-adjusting emitter injection efficiency mechanism: at low current densities, the injection efficiency is moderate, and the on-state voltage drop is mainly determined by the optimized pn-junction characteristics, resulting in lower forward conduction losses; at high current densities, the higher concentration p+pn-junction at deeper depths dominates, significantly enhancing the injection efficiency and generating a strong conductivity modulation effect, enabling the device to withstand high surge current impacts, thus simultaneously achieving low on-state voltage drop and high surge capability.

[0030] This invention directly reduces the total number of minority carriers injected and stored in the N-drift region during forward conduction by lowering the effective doping concentration on the anode side. This reduces the amount of charge that needs to be pumped out in reverse at the source, helping to reduce the peak reverse recovery current Irrm and shorten the recovery time. Furthermore, a P+ buried layer is pre-positioned at the edge of the depletion layer within the N-drift region. When the reverse recovery process reaches its final stage and the depletion layer extends into this region, the P+ buried layer efficiently injects holes into the N-drift region under the influence of a strong electric field. These injected holes effectively maintain the "tail" portion of the reverse recovery current, making the current decay curve smoother, thereby significantly improving the softness factor S (S=tb / ta) and effectively enhancing softness.

[0031] This invention successfully resolves the long-standing technical dilemma of balancing low on-state voltage drop, high surge capability, and high reverse recovery softness. It achieves rapid soft recovery of the diode, effectively reducing device conduction and switching losses, and suppressing electromagnetic interference, thereby improving overall system efficiency, power density, and reliability. Attached Figure Description

[0032] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0033] Figure 1 This is a cross-sectional view of the epitaxial state of the N+ substrate region, N buffer zone, and N- drift region of the present invention;

[0034] Figure 2 This is a cross-sectional view of the two-layer stepped concentration layer of the present invention;

[0035] Figure 3 This is a cross-sectional view of the three-layer stepped concentration layer of the present invention;

[0036] Figure 4 This is a graph showing the maximum recovery current curves of the diode of this invention and existing diodes;

[0037] Figure 5 This is a schematic diagram of the doping concentration in the epitaxial state of the N+ substrate region, N buffer region, and N- drift region of the present invention.

[0038] Figure 6 This is a schematic diagram of the concentration distribution during diffusion in the P region of the present invention;

[0039] Figure 7 This is a top view of the P+ buried layer of the present invention.

[0040] In the picture:

[0041] 1. N+ substrate region, 2. N buffer zone, 3. N- drift region, 4. P anode region, 5. P+ anode contact region, 6. N1 layer, 7. N2 layer, 8. P+ buried layer, 9. field confinement ring, 10. N3 layer. Detailed Implementation

[0042] To make the technical problems, technical solutions, and beneficial effects of the present invention clearer, the present invention will be further described in detail with reference to the embodiments and accompanying drawings. It should be understood that the specific embodiments described herein are merely for explaining the present invention and are not intended to limit the present invention. The technical solutions of the present invention will be described in detail below with reference to the embodiments and accompanying drawings, but the scope of protection is not limited thereto.

[0043] This invention provides a fast soft recovery diode. By combining the stepped concentration design on the anode side of the N-drift region 3 with the P+ buried layer 8 at the edge of the depletion layer of the N-drift region 3, the long-standing technical contradiction between low on-state voltage drop, high surge capability and high reverse recovery softness is effectively solved without significantly increasing the process complexity, thus obtaining the soft recovery capability of the fast recovery diode.

[0044] Please see Figures 1-7 The present invention provides a technical solution:

[0045] A fast soft recovery diode, comprising:

[0046] N+ substrate region 1;

[0047] N-buffer 2 is located above N+ substrate region 1;

[0048] The N-drift region 3 is located above the N-buffer zone 2;

[0049] The P-anode region 4 is located above the N-drift region 3;

[0050] The P+ anode contact area 5 is located above the P anode region 4;

[0051] The N-drift region 3 has a stepped concentration layer, which includes at least an N1 layer 6 and an N2 layer 7 from bottom to top. The doping concentration of the N2 layer 7 is higher than that of the N1 layer 6. The surface doping concentration of the P+ anode contact region 5 is greater than that of the P anode region 4. The surface doping concentration of the P anode region 4 is greater than that of the N2 layer 7.

[0052] The N-drift region 3 is pre-defined as a depletion layer edge region, and the depletion layer edge region is provided with at least one P+ buried layer 8, which is located below and / or to the side of the P+ anode region in the vertical direction.

[0053] A terminal protection structure is provided on the outside of the P anode region 4, and the terminal protection structure is embedded in the upper part of the N-drift region 3.

[0054] By designing a specific stepped doping concentration distribution within the N-drift region 3 on the anode side and introducing at least one P+ buried layer 8 at a preset position within the N-drift region 3, the on-state voltage drop, surge current capability, and reverse recovery softness of the diode are synergistically optimized.

[0055] In some embodiments, the terminal protection structure is a field-limiting loop 9.

[0056] In some embodiments, the doping concentration of N+ substrate region 1 in this invention is 10. 19 cm -3 On the order of magnitude, a stepped concentration layer is epitaxially grown in region 1 of the N+ substrate. The stepped concentration layer includes N1 layer 6 and N2 layer 7, with the doping concentration of N1 layer 6 being 10. 15 cm -3 The doping concentration of N2 layer 7 is 10. 16 cm -3 This forms a stepped epitaxial doping concentration, with the distance between the upper surface of the stepped concentration layer and the upper surface of the diode being 4-6 μm. When the P anode region 4 diffuses to a depth of 13 μm, the net doping concentration at N1 layer 6 and N2 layer 7 is high, and the doping concentration at N2 layer 7 is higher than that at N1 layer 6, which significantly reduces the concentration in the P region. This results in a lower on-state voltage drop at low current density, lower injection efficiency, shorter storage time during reverse recovery, and better softness.

[0057] In some embodiments, the N1 layer 6 and the N2 layer 7 have the same thickness.

[0058] In some embodiments, three P+ buried layers 8 are buried at the edge of the depletion layer in the N-drift region 3. The shape of the P+ buried layers 8 is the same as that of the field limiting ring 9. The P+ buried layers 8 are arranged in a stepped manner in the N-drift region 3. When the electric field at the edge of the depletion layer is strong, it can provide more holes, maintain the reverse current at the end of the reverse recovery, obtain high surge capability and increase softness.

[0059] In some embodiments, the P+ buried layer 8 structure can be an intermittent structure.

[0060] In some embodiments, reverse recovery time and reverse recovery peak current tests were performed on the diode structure of the present invention and existing diode structures, generating curves as shown below. Figure 4 As shown, the present invention

[0061] Example 1:

[0062] This embodiment proposes a method for manufacturing a fast soft recovery diode, including the following steps:

[0063] S1: Prepare N+ substrate region 1. N+ substrate region 1 can be doped with AS or P elements. The resistivity of N+ substrate region 1 is in the range of 0.002-0.004 (Ω•cm). The thickness of N+ substrate region 1 is maintained at 525-625um. Epitaxial growth is performed on N+ substrate region 1 to obtain N buffer 2. The concentration of N buffer 2 is 10. 15 cm -3 The magnitude is such that the thickness of the N-buffer 2 is 5-40um.

[0064] S2: An N-drift region 3 is epitaxially grown on top of N-buffer 2, with a doping concentration of 10. 14 cm -3 After epitaxial growth of 10µm, a photolithography process is used to form a pattern with the same shape as the field confinement ring 9. Then, a P+ buried layer 8 is formed in the photolithographic region by ion implantation. After another 10µm epitaxial growth in the N-drift region 3, a second P+ buried layer 8 is formed through photolithography and ion implantation. Finally, after another 10µm epitaxial growth in the N-drift region 3, a third P+ buried layer 8 is formed through photolithography and ion implantation.

[0065] S3: Continue epitaxial growth of N-drift region 3 to 39um, then epitaxially grow N1 layer 6 with a doping concentration of 10. 15 cm -3 The thickness of N1 layer 6 is 2 μm, and then N2 layer 7 is epitaxially grown on N1 layer 6. The doping concentration of N2 layer 7 is 10. 16 cm -3 The thickness of N2 layer 7 is 3 μm. After N2 layer 7 is grown, an N-drift region 3 with a thickness of 4 μm is epitaxially grown on N2 layer 7.

[0066] S4: Above the N-drift region 3, the P-anode region 4 is formed through oxidation, photolithography, etching, implantation, and push-bonding processes. The thickness of the P-anode region 4 is 13 μm, and the surface doping concentration of the P-anode region 4 is 10. 17 cm -3 Magnitude.

[0067] S5: After the formation of P anode region 4, P+ anode contact region 5 is formed on top of P anode region 4 through photolithography, etching, implantation, and push-bonding processes. The thickness of P+ anode contact region 5 is 4 μm, and the surface doping concentration of P+ anode contact region 5 is 10. 19 cm -3 Magnitude.

[0068] The three P+ burial layers 8 have different widths or radii, and are arranged in a stepped manner.

[0069] The P anode region 4 is embedded in the middle of the N-drift region 3, and the P+ anode contact region 5 is embedded in the middle of the P anode region 4.

[0070] Example 2:

[0071] This embodiment modifies steps S2 and S3 based on embodiment 1:

[0072] In S2, the parameters of the growth step concentration layer in the N-drift region 3 are adjusted as follows: N1 layer 6 is grown, with a thickness of 3 μm and a doping concentration of 10. 15 cm -3 On the order of magnitude. An N2 layer 7 was grown, with a thickness of 4 μm and a doping concentration of 10⁻⁶. 16 cm -3 The effective doping gradient on the anode side is further reduced to optimize the on-state characteristics at extremely low current densities.

[0073] In S3, the P+ buried layer 8 is changed to a four-layer continuous ring structure, and its doping concentration is increased to 10. 18 cm -3 Magnitude.

[0074] The diodes made in this way have a smoother reverse recovery waveform, making them suitable for applications with stringent electromagnetic compatibility requirements.

[0075] Example 3:

[0076] This embodiment adjusts steps S3, S4, and S5 based on embodiment 1:

[0077] In S3, the P+ buried layer 8 has an intermittent ring design structure, and after the N2 layer 7 is grown, an N-drift region 3 with a thickness of 6μm is grown epitaxially on top of the N2 layer 7.

[0078] In S4, the terminal protection structure uses a composite field ring instead of the field limiting ring 9.

[0079] In S5, the thickness of the P+ anode contact region 5 is 6 μm.

[0080] Through the above adjustments, the hole current injected by the P+ buried layer 8 is balanced and homogenized, making the reverse recovery "tail" current smoother, further improving the stability and consistency of the softness, reducing the parameter dispersion between devices, significantly increasing the space for the depletion layer to expand when the device withstands reverse voltage, further improving high surge capability, and increasing stability.

[0081] Example 4:

[0082] This embodiment adjusts step S3 based on embodiment 1:

[0083] In S3, after the epitaxial growth of N-drift region 3 continues to 39 μm, N1 layer 6 is epitaxially grown, with a doping concentration of 10. 14 cm -3 The order of magnitude is 6, with the N1 layer having a thickness of 2µm.

[0084] An N2 layer 7 is epitaxially grown on the N1 layer 6, and the doping concentration of the N2 layer 7 is 10. 15 cm -3 The thickness of layer 7 (N2) is 3µm.

[0085] An N3 layer 10 is epitaxially grown on the N2 layer 7, and the doping concentration of the N3 layer 10 is 10. 16 cm -3 The thickness of the N3 layer (10) is 4µm.

[0086] An N-drift region 3 with a thickness of 5 μm is further epitaxially grown on the N3 layer 10.

[0087] This embodiment provides sufficient withstand voltage for high voltage levels while maintaining a precise concentration gradient on the anode side.

[0088] The present invention has been further described in detail with reference to specific preferred embodiments. For those skilled in the art, several simple deductions or substitutions can be made without departing from the present invention, and all such deductions or substitutions should be considered as falling within the scope of patent protection determined by the submitted claims.

Claims

1. A fast soft recovery diode, characterized in that, include: N+ substrate region; The N-buffer zone is located above the N+ substrate region; The N-drift region located above the N-buffer; The P-anode region is located above the N-drift region; The P+ anode contact area is located above the P anode region; The N-drift region has a stepped concentration layer, which includes at least an N1 layer and an N2 layer from bottom to top. The doping concentration of the N2 layer is higher than that of the N1 layer. The surface doping concentration of the P+ anode contact region is greater than that of the P anode region. The surface doping concentration of the P anode region is greater than that of the N2 layer. The N-drift region is pre-defined with a depletion layer edge region, and the depletion layer edge region is provided with at least one P+ buried layer, which is located below and / or to the side of the P+ anode region in the vertical direction.

2. The fast soft recovery diode according to claim 1, characterized in that: The distance between the upper surface of the stepped concentration layer and the upper surface of the diode is 4-6 μm, and the thickness of the stepped concentration layer is 5-9 μm.

3. The fast soft recovery diode according to claim 1, characterized in that: The N1 layer concentration is 10. 15 cm -3 The N2 layer concentration is 10. 16 cm -3 .

4. The fast soft recovery diode according to claim 1, characterized in that: The P+ buried layer consists of at least two layers, and each P+ buried layer is a ring structure arranged at intervals along the vertical direction.

5. The fast soft recovery diode according to claim 1, characterized in that: The P+ buried layer can be a ring-shaped discontinuous structure.

6. The method for manufacturing a fast soft recovery diode according to claim 1, characterized in that, Includes the following steps: S1: Prepare an N+ substrate region, on which an N-buffer zone is epitaxially grown. The N-buffer zone is located above the N+ substrate region, and the N-buffer zone concentration is 10. 15 cm -3 The thickness of the N-buffer is on the order of magnitude of 5-40 μm. S2: An N-drift region is epitaxially grown outside the N-buffer, the N-drift region being located above the N-buffer, the N-drift region having a concentration of 10. 14 cm -3 On a certain scale, after the N-drift region is epitaxially grown at a set distance, a ring structure is formed through photolithography, and a P+ buried layer is formed by ion implantation. S3: Continue to grow N1 and N2 layers epitaxially in the N-drift region. The thickness of N1 and N2 layers is 2-4 μm, and the sum of the thicknesses of N1 and N2 layers is 5-9 μm. After the N2 layer is grown, continue to grow an N-drift region of 4-6 μm on the N2 layer. S4: The outer portion of the N-drift region is processed through oxidation, photolithography, etching, implantation, and push-bonding to form the P-anode region; S5: The P anode region is formed into a P+ anode contact region through oxidation, photolithography, etching, implantation and push-bonding processes.

7. A method for manufacturing a fast soft recovery diode according to claim 6, characterized in that: In S1, the N+ substrate region is doped with AS and / or P, the resistivity of the N+ substrate region is 0.002-0.004 Ω•cm, and the thickness of the N+ substrate region is 525-625 μm.

8. A method for manufacturing a fast soft recovery diode according to claim 6, characterized in that: In S2, the P+ buried layer consists of three layers, and the distance between the P+ buried layers is 8-12 μm.

9. A method for manufacturing a fast soft recovery diode according to claim 6, characterized in that: In S4, the thickness of the P anode region is 12-14 μm, and the surface concentration of the P anode region is 10. 17 cm -3 Magnitude.

10. A method for manufacturing a fast soft recovery diode according to claim 6, characterized in that: In step S5, the thickness of the P+ anode contact region is 4-6 μm, and the surface concentration of the P+ anode contact region is 10. 19 cm -3 Magnitude.

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