A timing control system and method for a MOPA laser

Abstract

This application relates to the field of laser timing control technology, specifically to a timing control system and method for a MOPA laser. The system includes a constant current source, a signal acquisition and transmission unit, a timing control unit, a control unit, and a modulation drive unit. The constant current source outputs a constant current; the signal acquisition and transmission unit acquires multiple timing signals and converts the digital signals into high and low level outputs; the timing control unit is composed of discrete logic devices, performs combinational logic judgment on the received multiple signals, and outputs a laser output enable signal; the control unit outputs a drive control signal based on the enable signal; the modulation drive unit receives the constant current from the constant current source and conducts power to the laser pump group when the drive control signal is valid. The use of discrete logic devices eliminates software response delay and program runaway risk, improving the reliability of the output timing; at the same time, the constant current source continuously carries the load, avoiding damage to the laser pump group due to current overshoot.

Description

Technical Field

[0001] This application relates to the field of laser timing control technology, specifically to a timing control system and method for a MOPA laser. Background Technology

[0002] During the output process, MOPA lasers (master oscillator power amplifier lasers) need to judge various timing signals to ensure that the output timing is correct and to avoid failures such as fiber optic disk burnout caused by timing disorder.

[0003] In existing technologies, the timing determination of MOPA laser output mainly relies on FPGA or MCU. While FPGA offers fast response speed, its high cost hinders large-scale application. MCU, although relatively inexpensive, suffers from poor stability, and its timing determination efficiency depends heavily on program response speed. Interference or abnormalities in the program can easily cause timing errors, leading to fiber optic cable burnout during laser output and poor maintainability. Furthermore, the coordination between the constant current source and modulation drive unit in existing solutions is insufficient. The constant current source load may be unloaded before current injection, resulting in current overshoot upon re-conduction and damage to the laser pump assembly.

[0004] Therefore, how to provide a timing control scheme that is low-cost, fast-response, and highly stable, and avoid fiber optic disk burnout due to timing errors or current overshoot, is a technical problem that urgently needs to be solved in this field. Summary of the Invention

[0005] To address the above problems, this invention provides a timing control system and method for a MOPA laser.

[0006] In a first aspect, the present invention provides a timing control system for a MOPA laser, comprising: A constant current source is used to output a constant current. The signal acquisition and transmission unit is used to acquire timing signals from multiple signal sources, including digital signals and analog signals, and to convert the acquired digital signals into high-level or low-level signals before outputting them. The timing control unit, whose input terminal is connected to the output terminal of the signal acquisition and transmission unit, is used to perform combinational logic judgment on the received multi-channel signals and output a laser output enable signal according to the judgment result. The control unit, whose input terminal is connected to the output terminal of the timing control unit, is used to receive the laser output enable signal and output a drive control signal based on the laser output enable signal; A modulation drive unit, the input of which is connected to the output of a constant current source and the output of a control unit respectively, and the output of the modulation drive unit is connected to a laser pump group; it is used to receive the constant current output by the constant current source, and to turn on or off the power supply to the laser pump group when a drive control signal is received; The timing control unit is composed of discrete logic devices and is used to output a valid laser output enable signal when all received multiple signals meet preset logic conditions, and otherwise output a disabled laser output enable signal.

[0007] The timing control unit is composed of discrete logic devices and uses pure hardware logic to perform combinational logic judgments on multiple signals, without relying on software program operation. Compared with the existing technology that uses MCU for timing judgment, this invention completely eliminates timing judgment errors caused by program crashes, response delays, or interrupt priority conflicts, improves the reliability and stability of optical output timing judgment, and avoids fiber optic disk burnout failures caused by timing disorder from the source.

[0008] Compared to existing technologies that use FPGAs for timing determination, this invention uses low-cost discrete logic devices to construct the timing control unit, which significantly reduces system costs while ensuring fast response and is conducive to the large-scale application of the product.

[0009] The modulation drive unit is connected to both the constant current source and the control unit. The constant current source continuously outputs a constant current, while the modulation drive unit only turns on when it receives a drive control signal. This architecture ensures that the constant current source is always loaded before current injection, avoiding the current overshoot phenomenon caused by no-load load in existing solutions, and effectively protecting the laser pump assembly from current surge damage.

[0010] As a preferred embodiment of the technical solution of the present invention, the timing signals acquired by the signal acquisition and transmission unit include a first-stage optical output signal, an interlock status signal, a first-stage driver board voltage signal, and a second-stage optical output enable signal. The timing control unit includes a first-level timing judgment subunit and a second-level timing judgment subunit; The first-level timing judgment subunit is used to receive the first-level output optical signal and the interlock status signal from the signal acquisition and transmission unit, and output a high-level first-level timing OK signal when the first-level output optical signal is high and the interlock status signal is high. The secondary timing judgment subunit has its input terminals connected to the output terminals of the primary timing judgment subunit and the signal acquisition and transmission unit, respectively. After receiving the primary timing OK signal, it judges the primary driver board voltage signal and at least one secondary light output enable signal received from the signal acquisition and transmission unit. When the primary driver board voltage signal meets the preset threshold condition and the secondary light output enable signal is high, it outputs a high-level laser output enable signal. The preset logic conditions include: the first-level light output signal is high, the interlock status signal is high, the first-level driver board voltage meets the preset threshold condition, and the second-level light output enable signal is high.

[0011] The first-level timing judgment performs a preliminary judgment on the first-level light output signal and the interlock status signal. The second-level timing judgment further judges the first-level driver board voltage and the second-level light output enable signal only after the first-level judgment passes. This two-stage series judgment mechanism makes the laser's light output logic more rigorous and scientific. Light output is only allowed when all preset conditions are met simultaneously, maximizing the reliability of the laser.

[0012] As a preferred embodiment of the technical solution of the present invention, the first-stage output signal includes a first-stage DA signal, a first-stage enable signal, and a modulation signal; the first-stage timing judgment subunit includes: The first AND gate has its first input terminal used to receive the first-level DA signal from the signal acquisition and transmission unit, and its second input terminal used to receive the interlock status signal from the signal acquisition and transmission unit. It is used to perform a logical AND operation on the two signals and output the first intermediate result. The second AND gate has a first input terminal for receiving a first-level enable signal from the signal acquisition and transmission unit, and a second input terminal for receiving a modulation signal from the signal acquisition and transmission unit. It is used to perform a logical AND operation on the two signals and output a second intermediate result. The third AND gate has its first input connected to the output of the first AND gate and its second input connected to the output of the second AND gate. It is used to perform a logical AND operation on the first intermediate result and the second intermediate result, and output a first-level timing OK signal.

[0013] As a preferred embodiment of the present invention, the secondary light output enable signal includes a secondary DA signal, a secondary enable signal, and a secondary PD signal; the primary light output signal also includes a primary PD signal; the secondary timing judgment subunit includes a voltage detection isolation circuit and a multi-level digital logic AND gate circuit; the voltage detection isolation circuit is used to perform threshold comparison and signal isolation on the primary driver board voltage signal, and output a stable voltage comparison result; the multi-level digital logic AND gate circuit is used to perform multi-level logical AND operations on the primary timing OK signal, the primary PD signal, the secondary DA signal, the secondary enable signal, the voltage comparison result, and the secondary PD signal, and output a laser output enable signal.

[0014] As a preferred embodiment of the technical solution of the present invention, the voltage detection isolation circuit includes: Isolated power supply, used to provide electrical isolation of operating power; The comparator, whose input is connected to the signal acquisition and transmission unit, is used to receive the voltage signal of the first-stage driver board, compare the voltage of the first-stage driver board after voltage division with the preset threshold voltage, and output the comparison result. An operational amplifier, connected to the output of a comparator, is used to perform voltage following and signal isolation on the comparison result; The multi-level digital logic and gate circuits include: The first-level AND gate has its first input terminal connected to the output terminal of the first-level timing judgment subunit to receive the first-level timing OK signal, and its second input terminal connected to the signal acquisition and transmission unit to receive the first-level PD signal. It is used to perform logical AND operation on the two signals and output the first-level intermediate result. The second-level AND gate has its first input terminal connected to the signal acquisition and transmission unit to receive the second-level DA signal, and its second input terminal connected to the signal acquisition and transmission unit to receive the second-level enable signal. It is used to perform a logical AND operation on the two signals and output the second-level intermediate result. The third-level AND gate has its first input connected to the output of the first-level AND gate and its second input connected to the output of the second-level AND gate. It is used to perform a logical AND operation on the first-level intermediate result and the second-level intermediate result and output the third-level intermediate result. The fourth-stage AND gate has its first input connected to the output of the third-stage AND gate and its second input connected to the output of the operational amplifier. It is used to perform a logical AND operation on the intermediate result of the third stage and the voltage comparison result, and output the intermediate result of the fourth stage. The fifth-level AND gate has its first input connected to the output of the fourth-level AND gate, and its second input connected to the signal acquisition and transmission unit to receive the second-level PD signal. It is used to perform a logical AND operation on the fourth-level intermediate result and the second-level PD signal to output a laser output enable signal.

[0015] By performing sequential logical AND operations on nine signals—the first-level DA signal, the interlock status signal, the first-level enable signal, the modulation signal, the first-level PD signal, the second-level DA signal, the second-level enable signal, the first-level driver board voltage comparison result, and the second-level PD signal—precise control of the complex light output timing of the MOPA laser is achieved. This ensures that the laser is output only when all safety and enable conditions are met simultaneously, eliminating the risk of erroneous light output.

[0016] The system employs multi-level digital logic gates to process digital signals. Analog signals, after being processed by comparators and operational amplifiers, participate in the logical AND operation together with the digital signals. This analog / digital separation processing architecture ensures both the accuracy of analog signal threshold judgment and the speed of digital logic judgment, achieving an optimal balance between the judgment accuracy and response speed of the entire timing control unit.

[0017] As a preferred embodiment of the technical solution of the present invention, the output terminal of the isolation power supply is connected to the power supply terminals of the comparator and the operational amplifier respectively, for providing a working power supply that is electrically isolated from the primary side; The comparator is configured to output a high-level comparison result when the voltage of the first-stage driver board reaches a preset threshold, and otherwise output a low-level comparison result. The operational amplifier is configured such that, after impedance matching and level isolation of the comparator output signal, it outputs to one input of the fourth-stage AND gate.

[0018] An isolated power supply is used to provide the comparator and operational amplifier with electrical isolation from the primary side, which effectively blocks the interference of primary side power supply noise on the timing judgment circuit, ensures the accuracy of the comparator threshold judgment, and improves the system's anti-interference capability in complex electromagnetic environments.

[0019] As a preferred embodiment of the technical solution of the present invention, the constant current source is configured to continue to output a constant current when the modulation drive unit disconnects the power supply to the laser pump group, so as to avoid current overshoot when it is turned on again and ensure the stability of the output pulse.

[0020] The constant current source continues to output a constant current even when the modulation drive unit is disconnected from the power supply, ensuring that the modulation drive unit is always under load. When the control unit outputs a valid drive control signal again, no current overshoot occurs at the moment the modulation drive unit turns on, ensuring the stability and consistency of the emitted light pulse and extending the service life of the laser pump assembly.

[0021] As a preferred embodiment of the technical solution of the present invention, it further includes a first high-frequency analog switch and a second high-frequency analog switch; The input terminal of the first high-frequency analog switch is connected to the signal acquisition and transmission unit to receive the first-level DA signal. The output terminal of the first high-frequency analog switch is connected to the modulation driving unit. The control terminal of the first high-frequency analog switch is connected to the output terminal of the first-level timing judgment subunit, which is used to turn on when the first-level timing OK signal is received and transmit the first-level DA signal to the modulation driving unit. The input terminal of the second high-frequency analog switch is connected to the signal acquisition and transmission unit to receive the secondary DA signal. The output terminal of the second high-frequency analog switch is connected to the modulation drive unit. The control terminal of the second high-frequency analog switch is connected to the output terminal of the secondary timing judgment subunit, which is used to turn on when the laser output enable signal is received and transmit the secondary DA signal to the modulation drive unit. The modulation drive unit includes a high-frequency switch. The control terminal of the high-frequency switch is connected to the output terminal of the control unit to receive the drive control signal, the input terminal is connected to the output terminal of the constant current source, and the output terminal is connected to the laser pump group. When the drive control signal is valid, the high-frequency switch is turned on, delivering a constant current to the laser pump group. When the drive control signal is invalid, the high-frequency switch is turned off, stopping the power supply.

[0022] The transmission channels of the first-level DA signal and the second-level DA signal are controlled by a first high-frequency analog switch and a second high-frequency analog switch, respectively. Their control terminals are connected to the output terminals of the first-level timing judgment subunit and the second-level timing judgment subunit, respectively, to ensure that the DA signal is only allowed to pass after the timing judgment is passed. This achieves precise timing coordination between the power setting signal and the enable signal, and avoids light output abnormalities caused by the power signal arriving too early or too late.

[0023] As a preferred embodiment of the technical solution of the present invention, it further includes a feedback unit, wherein the input end of the feedback unit is connected to the laser pump group and the output end is connected to the control unit; The feedback unit includes a current detection circuit and an optical PD detection circuit; the current detection circuit is connected in series in the power supply circuit of the laser pump group to detect the pump current and generate a current detection signal, which is transmitted to the control unit; the optical PD detection circuit is located at the output end of the laser pump group to detect the actual output light intensity and generate a first-level PD signal and a second-level PD signal, which are transmitted to the signal acquisition and transmission unit and the control unit, respectively. The control unit is further configured to: when the laser output enable signal is valid and the drive control signal is output, if the pump current is detected to be zero and both the first-level PD signal and the second-level PD signal received from the optical PD detection circuit are zero, then the laser pump group is determined to be abnormal, a fault alarm is output, and the modulation drive unit is turned off.

[0024] When both the pump current and the optical PD signal are zero, a fault of open circuit or burnout in the laser pump assembly is detected. The control unit immediately outputs a fault alarm and shuts down the modulation drive unit. This dual-detection fault judgment mechanism can quickly cut off the output after the laser pump assembly burns out, minimizing fault losses and improving system safety and maintainability.

[0025] As a preferred embodiment of the technical solution of the present invention, the signal acquisition and transmission unit includes a level conversion circuit and an analog signal transmission circuit; The level conversion circuit is used to convert the acquired first-level DA signal, second-level DA signal, first-level PD signal, and second-level PD signal into high-level or low-level signals compatible with discrete logic devices. The analog signal transmission circuit is used to directly transmit the acquired first-stage driver board voltage signal in analog form to the comparator input of the second-stage timing judgment subunit.

[0026] The level conversion circuit converts the acquired DA and PD signals into high or low level signals compatible with discrete logic devices, while the analog signal transmission circuit directly transmits the voltage signal from the first-stage driver board in analog form. This functional division ensures that signals of different natures are optimally accessed by the timing control unit, guaranteeing both the logical compatibility of digital signals and the original accuracy of analog signals.

[0027] Secondly, the present invention provides a timing control method for a MOPA laser, applied to the timing control system described in the first aspect, comprising the following steps: The signal acquisition and transmission unit acquires timing signals from multiple signal sources, including digital signals and analog signals, and converts the acquired digital signals into high-level or low-level signals before outputting them to the timing control unit. The timing control unit uses discrete logic devices to perform combinational logic judgment on the received multiple signals. When all signals meet the preset logic conditions, it outputs a valid laser output enable signal; otherwise, it outputs a disabled laser output enable signal. The control unit receives the laser output enable signal and outputs a drive control signal to the modulation drive unit based on the laser output enable signal. The constant current source continuously outputs a constant current to the modulation drive unit; The modulation drive unit responds to the drive control signal. When the drive control signal is valid, it turns on the power supply to the laser pump group and delivers the constant current output from the constant current source to the laser pump group to drive the light output. When the drive control signal is invalid, it disconnects the power supply to the laser pump group and stops the light output.

[0028] As can be seen from the above technical solutions, this application has the following advantages: The system provided by this application limits the output timing of the MOPA laser, which greatly avoids the risk of the laser accidentally burning the fiber optic disc due to machine tool interference; the combination and superposition judgment of the timing control unit makes the laser output logic more rigorous and scientific, maximizing the reliability of the laser; it can reduce the dependence on the corresponding control chip of the output logic, eliminating the potential risk of uncontrolled laser due to control chip failure; it opens up new ideas for the design of laser control circuits, allowing the chip to handle logic operations and using timing control to realize the combination logic of synchronous signals, which improves the stability of the system and meets the cost target requirements in the product design process; it reduces the fiber burn-out rate of the laser and saves the scrap rate of products due to optical path burn-out. Attached Figure Description

[0029] To more clearly illustrate the technical solution of this application, the accompanying drawings used in the description will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0030] Figure 1 This is a logic block diagram of a timing control circuit.

[0031] Figure 2 This is the logic diagram for a first-level timing judgment unit.

[0032] Figure 3 This is the logic diagram for a two-level timing judgment unit.

[0033] Figure 4 This is a partial circuit schematic of the timing control circuit. Detailed Implementation

[0034] To make the purpose, features, and advantages of this application more apparent and understandable, specific embodiments and accompanying drawings will be used to clearly and completely describe the technical solution protected by this application. Obviously, the embodiments described below are only some embodiments of this application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0035] Unless otherwise defined, all technical and scientific terms used in this application have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used in this application and in the specification of this invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.

[0036] like Figure 1As shown, an embodiment of the present invention provides a timing control system for a MOPA laser, comprising: A constant current source is used to output a constant current. The signal acquisition and transmission unit is used to acquire timing signals from multiple signal sources, including digital signals and analog signals, and to convert the acquired digital signals into high-level or low-level signals before outputting them. The timing control unit, whose input terminal is connected to the output terminal of the signal acquisition and transmission unit, is used to perform combinational logic judgment on the received multi-channel signals and output a laser output enable signal according to the judgment result. The control unit, whose input terminal is connected to the output terminal of the timing control unit, is used to receive the laser output enable signal and output a drive control signal based on the laser output enable signal; A modulation drive unit, the input of which is connected to the output of a constant current source and the output of a control unit respectively, and the output of the modulation drive unit is connected to a laser pump group; it is used to receive the constant current output by the constant current source, and to turn on or off the power supply to the laser pump group when a drive control signal is received; The timing control unit is composed of discrete logic devices and is used to output a valid laser output enable signal when all received multiple signals meet preset logic conditions, and otherwise output a disabled laser output enable signal.

[0037] In some embodiments, the timing signals acquired by the signal acquisition and transmission unit include a first-stage optical output signal, an interlock status signal, a first-stage driver board voltage signal, and a second-stage optical output enable signal. The timing control unit includes a first-level timing judgment subunit and a second-level timing judgment subunit; The first-level timing judgment subunit is used to receive the first-level output optical signal and the interlock status signal from the signal acquisition and transmission unit, and output a high-level first-level timing OK signal when the first-level output optical signal is high and the interlock status signal is high. The secondary timing judgment subunit has its input terminals connected to the output terminals of the primary timing judgment subunit and the signal acquisition and transmission unit, respectively. After receiving the primary timing OK signal, it judges the primary driver board voltage signal and at least one secondary light output enable signal received from the signal acquisition and transmission unit. When the primary driver board voltage signal meets the preset threshold condition and the secondary light output enable signal is high, it outputs a high-level laser output enable signal. The preset logic conditions include: the first-level light output signal is high, the interlock status signal is high, the first-level driver board voltage meets the preset threshold condition, and the second-level light output enable signal is high.

[0038] In some embodiments, such as Figure 2 As shown, the first-stage output optical signal includes a first-stage DA signal, a first-stage enable signal, a modulation signal, and a first-stage PD signal; the first-stage timing determination subunit includes: The first AND gate U5-1 has its first input terminal used to receive the first-level DA signal from the signal acquisition and transmission unit, and its second input terminal used to receive the interlock status signal from the signal acquisition and transmission unit. It is used to perform a logical AND operation on the two signals and output the first intermediate result. The second AND gate U5-2 has a first input terminal for receiving a first-level enable signal from the signal acquisition and transmission unit, and a second input terminal for receiving a modulation signal from the signal acquisition and transmission unit. It is used to perform a logical AND operation on the two signals and output a second intermediate result. The third AND gate U5-3 has its first input connected to the output of the first AND gate U5-1 and its second input connected to the output of the second AND gate U4-2. It is used to perform a logical AND operation on the first and second intermediate results, outputting a first-level timing OK signal. In this embodiment, the truth table of the first-level timing OK signal is shown in Table 1.

[0039] Table 1

[0040] In some embodiments, the secondary light output enable signal includes a secondary DA signal, a secondary enable signal, and a secondary PD signal; the secondary timing judgment subunit includes a voltage detection isolation circuit and a multi-level digital logic AND gate circuit; the voltage detection isolation circuit is used to perform threshold comparison and signal isolation on the primary driver board voltage signal, and output a stable voltage comparison result; the multi-level digital logic AND gate circuit is used to perform multi-level logical AND operations on the primary timing OK signal, the primary PD signal, the secondary DA signal, the secondary enable signal, the voltage comparison result, and the secondary PD signal, and output a laser output enable signal. Figure 3 As shown, the multi-level digital logic AND gate circuit includes: The first-level AND gate U4-1 has its first input terminal connected to the output terminal of the first-level timing judgment subunit to receive the first-level timing OK signal, and its second input terminal connected to the signal acquisition and transmission unit to receive the first-level PD signal. It is used to perform logical AND operation on the two signals and output the first-level intermediate result. The second-level AND gate U4-2 has its first input terminal connected to the signal acquisition and transmission unit to receive the second-level DA signal, and its second input terminal connected to the signal acquisition and transmission unit to receive the second-level enable signal. It is used to perform a logical AND operation on the two signals and output the intermediate result of the second level. The third-level AND gate U4-3 has its first input connected to the output of the first-level AND gate U4-1 and its second input connected to the output of the second-level AND gate U4-2. It is used to perform a logical AND operation on the first-level intermediate result and the second-level intermediate result and output the third-level intermediate result. The fourth-stage AND gate U4-4 has its first input connected to the output of the third-stage AND gate U4-3 and its second input connected to the output of the operational amplifier. It is used to perform a logical AND operation on the intermediate result of the third stage and the voltage comparison result, and output the intermediate result of the fourth stage. The fifth-level AND gate U4-5 has its first input terminal connected to the output terminal of the fourth-level AND gate U4-4, and its second input terminal connected to the signal acquisition and transmission unit to receive the second-level PD signal. It is used to perform a logical AND operation on the fourth-level intermediate result and the second-level PD signal to output a laser output enable signal. In some embodiments, the voltage detection isolation circuit includes: Isolated power supply, used to provide electrical isolation of operating power; The comparator, whose input is connected to the signal acquisition and transmission unit, is used to receive the voltage signal of the first-stage driver board, compare the voltage of the first-stage driver board after voltage division with the preset threshold voltage, and output the comparison result. An operational amplifier, connected to the output of a comparator, receives the comparator's output, performs voltage following and signal isolation, and then outputs it to a multi-stage digital logic gate circuit. In this embodiment, the multi-level digital logic AND gate circuit uses multiple 74HC08D logic devices to implement multi-level AND gate logic operations. The connection between one of the logic devices and the voltage isolation circuit is as follows: Figure 4As shown, the voltage signal VCC_MO of the first-stage driver board is grounded through the sliding terminals of resistor R164 and sliding resistor R175 in sequence. The connection point of resistor R164 and sliding resistor R175 is connected to the positive input terminal of comparator U1. The power supply terminal of comparator U1 is connected to the first output terminal VCC_5V_A of the isolated power supply. The inverting input terminal of comparator U1 is connected to the threshold voltage. The output terminal of comparator U1 outputs the comparison result to the positive input terminal of operational amplifier U2. The output terminal of comparator U1 is also connected to the first output terminal VCC_5V_A of the isolated power supply through resistor R160. The output terminal of operational amplifier U2 is connected to the inverting input terminal of operational amplifier U2. The power supply terminal of operational amplifier U2 is connected to the first output terminal VCC_5V_A of the isolated power supply. The output of U2 is also connected to the anode of the diode of optocoupler U3 through resistor R181. The cathode of the diode of optocoupler U3 is grounded. The collector of the transistor of optocoupler U3 is connected to the second output terminal VCC_5V_B of the isolation power supply. The emitter of the transistor of optocoupler U3 is grounded through resistor R182. The emitter of the transistor of optocoupler U3 is also connected to one input terminal of the logic device U4-4, which is the fourth-stage AND gate. The power supply terminal of logic device U4-4 is connected to the second output terminal VCC_5V_B of the isolation power supply. The other input terminal of logic device U4-4 is connected to the output terminal of the third-stage AND gate. The output terminal of the logic device U4-4 is connected to the fifth-stage AND gate. The laser output enable signal is output through the logic operation of the fifth-stage AND gate.

[0041] In this embodiment of the invention, the output terminal of the isolation power supply is connected to the power supply terminals of the comparator and the operational amplifier, respectively, to provide a working power supply that is electrically isolated from the primary side; The comparator is configured to output a high-level comparison result when the voltage of the first-stage driver board reaches a preset threshold, and otherwise output a low-level comparison result. The operational amplifier is configured such that, after impedance matching and level isolation of the comparator output signal, it outputs to one input of the fourth-stage AND gate.

[0042] In some embodiments, the constant current source is configured to continue outputting a constant current when the modulation drive unit disconnects the power supply to the laser pump group, so as to avoid current overshoot when it is turned on again and ensure the stability of the output pulse.

[0043] In some embodiments, a first high-frequency analog switch and a second high-frequency analog switch are also included; The input terminal of the first high-frequency analog switch is connected to the signal acquisition and transmission unit to receive the first-level DA signal. The output terminal of the first high-frequency analog switch is connected to the modulation driving unit. The control terminal of the first high-frequency analog switch is connected to the output terminal of the first-level timing judgment subunit, which is used to turn on when the first-level timing OK signal is received and transmit the first-level DA signal to the modulation driving unit. The input terminal of the second high-frequency analog switch is connected to the signal acquisition and transmission unit to receive the secondary DA signal. The output terminal of the second high-frequency analog switch is connected to the modulation drive unit. The control terminal of the second high-frequency analog switch is connected to the output terminal of the secondary timing judgment subunit, which is used to turn on when the laser output enable signal is received and transmit the secondary DA signal to the modulation drive unit. The modulation drive unit includes a high-frequency switch. The control terminal of the high-frequency switch is connected to the output terminal of the control unit to receive the drive control signal, the input terminal is connected to the output terminal of the constant current source, and the output terminal is connected to the laser pump group. When the drive control signal is valid, the high-frequency switch is turned on, delivering a constant current to the laser pump group. When the drive control signal is invalid, the high-frequency switch is turned off, stopping the power supply.

[0044] In some embodiments, a feedback unit is also included, wherein the input of the feedback unit is connected to the laser pump assembly and the output is connected to the control unit; The feedback unit includes a current detection circuit and an optical PD detection circuit; the current detection circuit is connected in series in the power supply circuit of the laser pump group to detect the pump current and generate a current detection signal, which is transmitted to the control unit; the optical PD detection circuit is located at the output end of the laser pump group to detect the actual output light intensity and generate a first-level PD signal and a second-level PD signal, which are transmitted to the signal acquisition and transmission unit and the control unit, respectively. The control unit is further configured to: when the laser output enable signal is valid and the drive control signal is output, if the pump current is detected to be zero and both the first-level PD signal and the second-level PD signal received from the optical PD detection circuit are zero, then the laser pump group is determined to be abnormal, a fault alarm is output, and the modulation drive unit is turned off.

[0045] In some embodiments, the drive control signal output by the control unit to the modulation drive unit includes a power factor signal and a laser output mode signal; The power factor signal is an analog voltage signal from 0V to NV, corresponding to 0% to 100% laser output power; when the power factor signal is NV, the modulation drive unit controls the laser pump group to output light at 100% power; when the power factor signal is 0V, the modulation drive unit controls the laser pump group to stop outputting light and reports an output fault. The laser output mode signal includes a first frequency signal for controlling the long output mode and a second frequency signal for controlling the pulse output mode.

[0046] In the above scheme, the optical PD signal and current signal of the MOPA laser pump group are detected and fed back in real time through the signal feedback unit. When the loop current of the MOPA laser pump group is 0 and the optical PD signal is also 0, the control unit will output fault alarm information to the host computer display unit and stop the output of the modulation drive unit at the same time; in order to ensure the reliability of the output light.

[0047] In some embodiments, the signal acquisition and transmission unit includes a level conversion circuit and an analog signal transmission circuit; The level conversion circuit is used to convert the acquired first-level DA signal, second-level DA signal, first-level PD signal, and second-level PD signal into high-level or low-level signals compatible with discrete logic devices. The analog signal transmission circuit is used to directly transmit the acquired first-stage driver board voltage signal in analog form to the comparator input of the second-stage timing judgment subunit.

[0048] It should be noted that the multiple signal sources include the control unit, interlock circuit, first-level driver board, and optical PD detection circuit; The control unit generates a primary DA signal, a secondary DA signal, a primary enable signal, a secondary enable signal, and a modulation signal. The primary and secondary DA signals are analog voltage signals used to set the laser output power; the primary and secondary enable signals are digital enable signals used to control the light emission timing; and the modulation signal is a frequency signal used to set the light emission mode (continuous emission or pulsed emission). An interlock circuit generates an interlock status signal, a digital level signal used for safety protection judgment. The voltage sampling terminal of the primary driver board is connected to the signal acquisition and transmission unit to provide the primary driver board voltage signal, which is an analog voltage signal. The optical PD detection circuit includes a first photodiode and a second photodiode, used to detect the optical power of the primary and secondary optical paths, respectively, generating primary and secondary PD signals.

[0049] The input terminals of the signal acquisition and transmission unit are connected to the output terminals of the control unit, the interlock circuit, the voltage sampling terminal of the first-stage driver board, and the optical PD detection circuit, respectively. Specifically, the signal acquisition and transmission unit receives the first-stage DA signal, the second-stage DA signal, the first-stage enable signal, the second-stage enable signal, and the modulation signal from the control unit; it receives the interlock status signal from the interlock circuit; it receives the first-stage driver board voltage signal from the first-stage driver board; and it receives the first-stage PD signal and the second-stage PD signal from the optical PD detection circuit.

[0050] The signal acquisition and transmission unit converts the received digital or quasi-digital signals, such as the first-level DA signal, second-level DA signal, first-level PD signal, and second-level PD signal, into high-level or low-level signals compatible with discrete logic devices through a level conversion circuit, and then outputs them to the timing control unit. The received first-level driver board voltage signal is transmitted directly to the comparator input terminal of the timing control unit in analog form through an analog signal transmission circuit.

[0051] In some embodiments, a host computer display unit is also included. The input terminal of the host computer display unit is the input terminal of the control unit, and the output terminal is the input terminal of the control unit. It is used to print out the timing judgment information, timing signal, fault signal, and light output status of the MOPA laser.

[0052] The signal acquisition and transmission unit outputs a high or low level of the timing signal of the MOPA laser to the timing control unit. A constant current source outputs a constant current to the modulation drive module. When the signal acquisition and transmission unit outputs a high level of the timing signal of the MOPA laser to the timing control unit, the timing control unit outputs timing logic back to the control unit according to timing priority. The control unit then outputs a high level to the modulation drive unit, at which point the modulation drive unit supplies current to the laser pump assembly. The high or low level of the timing signal output by the signal acquisition and transmission unit to the timing control unit includes: The control unit adjusts the power factor signal DA output by the signal acquisition and transmission unit; The control unit adjusts the optical pump group temperature signal T output by the signal acquisition and transmission unit; The control unit adjusts the optical pump group humidity signal RH output by the signal acquisition and transmission unit; The control unit adjusts the pump source drive voltage signal V0 output by the signal acquisition and transmission unit; The control unit adjusts the signal cd of the optical PD output by the signal acquisition and transmission unit; The control unit adjusts the switching signal EN1 of the constant current source output by the signal acquisition and transmission unit; The control unit adjusts the drive switch signal EN2 output by the signal acquisition and transmission unit; Before the step of the constant current source outputting a constant current to the modulation drive unit, the control unit further adjusts the output amplitude and output frequency of the constant current source. When the signal acquisition and transmission unit outputs a timing signal level to the timing control unit, the timing control unit will output a high level or a low level to the control unit, and the control unit will output an optical enable level to the modulation drive unit, including: the control unit supplying current to the laser pump group through the modulation signal, DA signal, etc. output by the modulation drive unit.

[0053] The control unit outputs timing signals to the timing control unit through the signal acquisition and output unit, such as the power factor signal DA, the optical pump group temperature signal T, the optical pump group humidity signal RH, the pump source drive voltage signal V0, the optical PD signal cd, the constant current source switch signal EN1, and the drive switch signal EN2. The control unit outputs either a high-level "1" or a low-level "0" timing signal to the timing control unit through the signal acquisition and transmission unit. When all output timing signals are high-level "1", the control unit outputs a high-level "1" to the modulation drive unit, at which point the modulation drive unit is connected to the laser pump group, and the laser emits light. When any output timing signal is low-level "0", the laser control unit outputs a low-level "0" to the modulation drive unit, at which point the modulation drive unit is disconnected from the laser pump group, and the laser stops emitting light.

[0054] The constant current source outputs a constant current, such as 33A, to the modulation drive unit. The control unit outputs a high-level "1" or a low-level "0" to the modulation drive unit. When the control unit outputs a high-level "1", the modulation drive unit is connected to the laser pump group and delivers the 33A current to the laser pump group, at which point the laser emits light. When the control unit outputs a low-level "0", the modulation drive unit disconnects from the laser pump group, at which point the laser stops emitting light.

[0055] The control unit also outputs a power factor signal DA to the modulation drive unit, such as a 0-2.5V signal corresponding to 0-100% power. When the control unit outputs a power factor signal of 2.5V, the modulation drive unit connects to the laser pump assembly and outputs light at 100% power. When the control unit outputs a power factor signal of 0V, the modulation drive unit connects to the laser pump assembly, the laser output unit outputs a "light output fault" to the feedback unit, the feedback unit transmits this signal to the control unit, and the control unit prints it out through the host computer display unit, triggering a light output fault alarm.

[0056] The control circuit allows for an output power range of 10% to 100%, with a corresponding power factor signal DA of 0.8V to 2.5V.

[0057] The control unit also outputs a laser output mode signal to the modulation drive unit, such as (5000Hz for continuous output and 1000Hz for pulsed output). When the laser output mode signal output by the control unit is 5000Hz, the modulation drive unit is connected to the laser pump group and continuously outputs laser in continuous output mode; when the laser output mode signal output by the control unit is 1000Hz, the modulation drive unit is connected to the laser pump group and outputs laser in pulsed output mode.

[0058] As can be seen, this scheme still uses a constant current drive circuit as a basis, and controls the connection or disconnection of the control unit and the modulation drive unit by the level output of the signal acquisition and transmission unit and the timing control unit to realize the laser output or disconnection. After adding the feedback unit, even if the laser pump group is burned out and in an open circuit or short circuit state, the feedback unit can quickly indirectly make the timing control unit work through the control unit, output a low level "0", stop the laser output, and thus maximize the output stability of the MOPA laser.

[0059] This scheme uses the control unit as the core of the MOPA laser control, which is controlled by two parallel logic signals. The constant current source is always connected to the modulation drive unit. When the signal acquisition and transmission unit sends the timing signal to the timing control unit, the timing control unit will request the control unit to turn on or stop the output of the modulation drive unit according to the timing judgment result, so that the modulation drive unit turns on or stops the constant current to the laser pump group, thus completing the laser output or shutdown action.

[0060] This solution ensures the output of the constant current source and modulation drive unit, eliminating the impact of overshoot on the laser pump group; it also ensures efficient timing signal judgment, enabling the MOPA laser to perform light output according to the correct timing, truly achieving high efficiency and stability of the MOPA laser.

[0061] This invention also provides a timing control method for a MOPA laser, applied to the timing control system described in the above embodiments, comprising the following steps: Step 1: The signal acquisition and transmission unit acquires timing signals from multiple signal sources, including digital signals and analog signals, and converts the acquired digital signals into high-level or low-level signals before outputting them to the timing control unit. Step 2: The timing control unit uses discrete logic devices to perform combinational logic judgment on the received multiple signals. When all signals meet the preset logic conditions, it outputs a valid laser output enable signal; otherwise, it outputs a disabled laser output enable signal. Step 3: The control unit receives the laser output enable signal and outputs a drive control signal to the modulation drive unit based on the laser output enable signal; Step 4: The constant current source continuously outputs a constant current to the modulation drive unit; Step 5: The modulation drive unit responds to the drive control signal. When the drive control signal is valid, it turns on the power supply to the laser pump group and delivers the constant current output from the constant current source to the laser pump group to drive the light output. When the drive control signal is invalid, it disconnects the power supply to the laser pump group and stops the light output.

[0062] In some embodiments, the timing signals acquired by the signal acquisition and transmission unit include a first-stage optical output signal, an interlock status signal, a first-stage driver board voltage signal, and a second-stage optical output enable signal. The timing control unit comprises a step of performing combinational logic judgments on the received multiple signals using discrete logic devices, specifically including: The first-level timing judgment subunit receives the first-level output optical signal and the interlock status signal from the signal acquisition and transmission unit. When the first-level output optical signal is high and the interlock status signal is high, it outputs a high-level first-level timing OK signal. After receiving the first-level timing OK signal, the second-level timing judgment subunit receives the first-level driver board voltage signal and at least one second-level light output enable signal from the signal acquisition and transmission unit. When the first-level driver board voltage signal meets the preset threshold condition and the second-level light output enable signal is high, it outputs a high-level laser output enable signal. The preset logic conditions include: the first-level light output signal is high, the interlock status signal is high, the first-level driver board voltage meets the preset threshold condition, and the second-level light output enable signal is high.

[0063] In some embodiments, the first-stage optical output signal includes a first-stage DA signal, a first-stage enable signal, a modulation signal, and a first-stage PD signal; The step of the first-level timing judgment subunit outputting a high-level first-level timing OK signal specifically includes: The first AND gate performs a logical AND operation on the first-level DA signal and the interlock status signal, and outputs the first intermediate result; The second AND gate performs a logical AND operation on the first-level enable signal and the modulation signal, and outputs the second intermediate result. The third AND gate performs a logical AND operation on the first and second intermediate results, and outputs a first-level timing OK signal.

[0064] In some embodiments, the secondary light output enable signal includes a secondary DA signal, a secondary enable signal, and a secondary PD signal; The step of the secondary timing judgment subunit outputting a high-level laser output enable signal specifically includes: Voltage detection and isolation steps: an electrical isolation power supply is provided through an isolation power supply; a comparator receives the voltage signal from the first-stage driver board, compares the voltage of the first-stage driver board after voltage division with a preset threshold voltage, and outputs the comparison result; an operational amplifier performs voltage tracking and signal isolation on the comparison result; Multi-level logical AND operation steps: The first-level AND gate performs a logical AND operation on the first-level timing OK signal and the first-level PD signal, and outputs the first-level intermediate result; The second-level AND gate performs a logical AND operation on the second-level DA signal and the second-level enable signal, and outputs the intermediate result of the second level. The third-level AND gate performs a logical AND operation on the first and second intermediate results, and outputs the third-level intermediate result. The fourth-level AND gate performs a logical AND operation on the intermediate result of the third level and the voltage comparison result, and outputs the intermediate result of the fourth level. The fifth-level AND gate performs a logical AND operation on the intermediate results of the fourth level and the second-level PD signal, and outputs a laser output enable signal.

[0065] In some embodiments, a constant current source continuous power supply step is also included: When the modulation drive unit disconnects the power supply to the laser pump group, the constant current source continues to output a constant current to avoid current overshoot when it is turned on again, thus ensuring the stability of the output pulse.

[0066] In some embodiments, a high-frequency switching control step is also included: The first high-frequency analog switch turns on when it receives the first-level timing OK signal, allowing the first-level DA signal to pass through; The second high-frequency analog switch turns on when it receives the laser output enable signal, allowing the secondary DA signal to pass through; The high-frequency switch in the modulation drive unit receives the drive control signal output by the control unit. When the drive control signal is valid, it is turned on to deliver the constant current output by the constant current source to the laser pump group; when the drive control signal is invalid, it is turned off to stop the power supply.

[0067] In some embodiments, fault detection and protection steps are also included: The feedback unit monitors the pump current and optical PD signal of the laser pump group in real time. When the pump current is zero and the optical PD signal is zero, the feedback unit transmits the fault signal to the control unit. The control unit outputs the fault alarm information and shuts down the modulation drive unit, causing the laser pump group to stop emitting light.

[0068] In some embodiments, the step of the signal acquisition and transmission unit acquiring timing signals from multiple signal sources specifically includes: The level conversion circuit converts the acquired first-level DA signal, second-level DA signal, first-level PD signal, and second-level PD signal into high-level or low-level signals compatible with discrete logic devices; the analog signal transmission circuit transmits the acquired first-level driver board voltage signal directly to the comparator input of the second-level timing judgment subunit in analog form.

[0069] Those skilled in the art will clearly understand that the techniques in the embodiments of the present invention can be implemented using software plus necessary general-purpose hardware platforms. Based on this understanding, the technical solutions in the embodiments of the present invention, or the parts that contribute to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium such as a USB flash drive, mobile hard drive, read-only memory (ROM), random access memory (RAM), magnetic disk, or optical disk, or other media capable of storing program code. It includes several instructions to cause a computer terminal (which may be a personal computer, server, or a second terminal, network terminal, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention.

[0070] In the embodiments provided by this invention, it should be understood that the disclosed systems, methods, and approaches can be implemented in other ways. For example, the system embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between systems or units may be electrical, mechanical, or other forms.

[0071] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0072] In addition, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0073] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A timing control system for a MOPA laser, characterized in that, include: A constant current source is used to output a constant current. The signal acquisition and transmission unit is used to acquire timing signals from multiple signal sources, including digital signals and analog signals, and to convert the acquired digital signals into high-level or low-level signals before outputting them. The timing control unit, whose input terminal is connected to the output terminal of the signal acquisition and transmission unit, is used to perform combinational logic judgment on the received multi-channel signals and output a laser output enable signal according to the judgment result. The control unit, whose input terminal is connected to the output terminal of the timing control unit, is used to receive the laser output enable signal and output a drive control signal based on the laser output enable signal; A modulation drive unit, the input of which is connected to the output of a constant current source and the output of a control unit, and the output of the modulation drive unit is connected to a laser pump group; Used to receive the constant current output from the constant current source, and to turn on or off the power supply to the laser pump group when a drive control signal is received; The timing control unit is composed of discrete logic devices and is used to output a valid laser output enable signal when all received multiple signals meet preset logic conditions, and otherwise output a disabled laser output enable signal.

2. The timing control system for the MOPA laser according to claim 1, characterized in that, The timing signals acquired by the signal acquisition and transmission unit include the first-stage optical output signal, the interlock status signal, the first-stage driver board voltage signal, and the second-stage optical output enable signal. The timing control unit includes a first-level timing judgment subunit and a second-level timing judgment subunit; The first-level timing judgment subunit is used to receive the first-level output optical signal and the interlock status signal from the signal acquisition and transmission unit, and output a high-level first-level timing OK signal when the first-level output optical signal is high and the interlock status signal is high. The secondary timing judgment subunit has its input terminals connected to the output terminals of the primary timing judgment subunit and the signal acquisition and transmission unit, respectively. After receiving the primary timing OK signal, it judges the primary driver board voltage signal and at least one secondary light output enable signal received from the signal acquisition and transmission unit. When the primary driver board voltage signal meets the preset threshold condition and the secondary light output enable signal is high, it outputs a high-level laser output enable signal. The preset logic conditions include: the first-level light output signal is high, the interlock status signal is high, the first-level driver board voltage meets the preset threshold condition, and the second-level light output enable signal is high.

3. The timing control system for the MOPA laser according to claim 2, characterized in that, The primary output signal includes a primary DA signal, a primary enable signal, and a modulation signal; the primary timing determination subunit includes: The first AND gate has its first input terminal used to receive the first-level DA signal from the signal acquisition and transmission unit, and its second input terminal used to receive the interlock status signal from the signal acquisition and transmission unit. It is used to perform a logical AND operation on the two signals and output the first intermediate result. The second AND gate has a first input terminal for receiving a first-level enable signal from the signal acquisition and transmission unit, and a second input terminal for receiving a modulation signal from the signal acquisition and transmission unit. It is used to perform a logical AND operation on the two signals and output a second intermediate result. The third AND gate has its first input connected to the output of the first AND gate and its second input connected to the output of the second AND gate. It is used to perform a logical AND operation on the first intermediate result and the second intermediate result, and output a first-level timing OK signal.

4. The timing control system for the MOPA laser according to claim 3, characterized in that, The secondary light output enable signal includes a secondary DA signal, a secondary enable signal, and a secondary PD signal. The primary light output signal also includes a primary PD signal. The secondary timing judgment subunit includes a voltage detection isolation circuit and a multi-level digital logic AND gate circuit. The voltage detection isolation circuit is used to perform threshold comparison and signal isolation on the voltage signal of the first-level driver board, and output a stable voltage comparison result; the multi-level digital logic AND gate circuit is used to perform multi-level logic AND operation on the first-level timing OK signal, the first-level PD signal, the second-level DA signal, the second-level enable signal, the voltage comparison result and the second-level PD signal, and output a laser output enable signal.

5. The timing control system for the MOPA laser according to claim 4, characterized in that, The voltage detection isolation circuit includes: Isolated power supply, used to provide electrical isolation of operating power; The comparator, whose input is connected to the signal acquisition and transmission unit, is used to receive the voltage signal of the first-stage driver board, compare the voltage of the first-stage driver board after voltage division with the preset threshold voltage, and output the comparison result. An operational amplifier, connected to the output of a comparator, receives the comparator's output, performs voltage following and signal isolation, and then outputs it to a multi-stage digital logic AND gate circuit.

6. The timing control system for the MOPA laser according to claim 5, characterized in that, The multi-level digital logic and gate circuits include: The first-level AND gate has its first input terminal connected to the output terminal of the first-level timing judgment subunit to receive the first-level timing OK signal, and its second input terminal connected to the signal acquisition and transmission unit to receive the first-level PD signal. It is used to perform logical AND operation on the two signals and output the first-level intermediate result. The second-level AND gate has its first input terminal connected to the signal acquisition and transmission unit to receive the second-level DA signal, and its second input terminal connected to the signal acquisition and transmission unit to receive the second-level enable signal. It is used to perform a logical AND operation on the two signals and output the second-level intermediate result. The third-level AND gate has its first input connected to the output of the first-level AND gate and its second input connected to the output of the second-level AND gate. It is used to perform a logical AND operation on the first-level intermediate result and the second-level intermediate result and output the third-level intermediate result. The fourth-stage AND gate has its first input connected to the output of the third-stage AND gate and its second input connected to the output of the operational amplifier. It is used to perform a logical AND operation on the intermediate result of the third stage and the voltage comparison result, and output the intermediate result of the fourth stage. The fifth-level AND gate has its first input connected to the output of the fourth-level AND gate, and its second input connected to the signal acquisition and transmission unit to receive the second-level PD signal. It is used to perform a logical AND operation on the fourth-level intermediate result and the second-level PD signal to output a laser output enable signal.

7. The timing control system for the MOPA laser according to claim 3, characterized in that, It also includes a first high-frequency analog switch and a second high-frequency analog switch; The input terminal of the first high-frequency analog switch is connected to the signal acquisition and transmission unit to receive the first-level DA signal. The output terminal of the first high-frequency analog switch is connected to the modulation driving unit. The control terminal of the first high-frequency analog switch is connected to the output terminal of the first-level timing judgment subunit, which is used to turn on when the first-level timing OK signal is received and transmit the first-level DA signal to the modulation driving unit. The input terminal of the second high-frequency analog switch is connected to the signal acquisition and transmission unit to receive the secondary DA signal. The output terminal of the second high-frequency analog switch is connected to the modulation drive unit. The control terminal of the second high-frequency analog switch is connected to the output terminal of the secondary timing judgment subunit, which is used to turn on when the laser output enable signal is received and transmit the secondary DA signal to the modulation drive unit. The modulation drive unit includes a high-frequency switch. The control terminal of the high-frequency switch is connected to the output terminal of the control unit to receive the drive control signal, the input terminal is connected to the output terminal of the constant current source, and the output terminal is connected to the laser pump group. When the drive control signal is valid, the high-frequency switch is turned on, delivering a constant current to the laser pump group. When the drive control signal is invalid, the high-frequency switch is turned off, stopping the power supply.

8. The timing control system for the MOPA laser according to claim 1, characterized in that, It also includes a feedback unit, the input of which is connected to the laser pump group and the output of which is connected to the control unit; The feedback unit includes a current detection circuit and an optical PD detection circuit; the current detection circuit is connected in series in the power supply circuit of the laser pump group to detect the pump current and generate a current detection signal, which is transmitted to the control unit; the optical PD detection circuit is located at the output end of the laser pump group to detect the actual output light intensity and generate a first-level PD signal and a second-level PD signal, which are transmitted to the signal acquisition and transmission unit and the control unit, respectively. The control unit is further configured to: when the laser output enable signal is valid and the drive control signal is output, if the pump current is detected to be zero and both the first-level PD signal and the second-level PD signal received from the optical PD detection circuit are zero, then the laser pump group is determined to be abnormal, a fault alarm is output, and the modulation drive unit is turned off.

9. The timing control system for the MOPA laser according to claim 4, characterized in that, The signal acquisition and transmission unit includes a level conversion circuit and an analog signal transmission circuit; The level conversion circuit is used to convert the acquired first-level DA signal, second-level DA signal, first-level PD signal, and second-level PD signal into high-level or low-level signals compatible with discrete logic devices. The analog signal transmission circuit is used to directly transmit the acquired first-stage driver board voltage signal in analog form to the comparator input of the second-stage timing judgment subunit.

10. A timing control method for a MOPA laser, applied to the timing control system according to any one of claims 1-9, characterized in that, Includes the following steps: The signal acquisition and transmission unit acquires timing signals from multiple signal sources, including digital signals and analog signals, and converts the acquired digital signals into high-level or low-level signals before outputting them to the timing control unit. The timing control unit uses discrete logic devices to perform combinational logic judgment on the received multiple signals. When all signals meet the preset logic conditions, it outputs a valid laser output enable signal; otherwise, it outputs a disabled laser output enable signal. The control unit receives the laser output enable signal and outputs a drive control signal to the modulation drive unit based on the laser output enable signal. The constant current source continuously outputs a constant current to the modulation drive unit; The modulation drive unit responds to the drive control signal. When the drive control signal is valid, it turns on the power supply to the laser pump group and delivers the constant current output from the constant current source to the laser pump group to drive the light output. When the drive control signal is invalid, it disconnects the power supply to the laser pump group and stops the light output.

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