Task scheduling method, chip, device, scheduler and program product

Abstract

This invention discloses a task scheduling method, chip, device, scheduler, and program product, relating to the field of chip technology. In the process of scheduling multiple tasks to the same physical core, the scheduler obtains a scheduling table and determines a first task group that matches a first physical core among multiple task groups. This scheduling table provides cache partition ratio information for each task in the private cache corresponding to the same physical core. The scheduler uses the cache partition ratio information to determine the cache partition of each task in the first private cache corresponding to the first physical core, and sends instructions to the first physical core to execute the tasks in the first task group. The scheduler uses the cache partition ratio information of each task to determine the cache partition of each task in the private cache. This allows logical cores within the physical core to access their corresponding cache partitions, avoiding contention for the private cache among different logical cores within the same physical core, thereby improving the multi-task concurrent execution capability of the physical core.

Description

Technical Field

[0001] This application relates to the field of chip technology, and in particular to a task scheduling method, chip, device, scheduler, and program product. Background Technology

[0002] Simultaneous multithreading (SMT) technology allows multiple threads to execute simultaneously on the same physical core of the Central Processing Unit (CPU) to improve CPU processing performance.

[0003] Multiple independent threads share some CPU resources during execution. For example, different threads running on each physical core share the private cache of that physical core. In actual operation, multiple threads running on the same physical core may compete for private cache resources, leading to a decrease in the overall performance of the SMT system. Summary of the Invention

[0004] This application provides a task scheduling method, chip, device, scheduler, and program product to allocate the resource usage of each thread to the private cache in SMT thread scheduling, reduce resource competition between different threads, and improve SMT performance.

[0005] The technical solution adopted in this application is as follows.

[0006] Firstly, this application provides a task scheduling method applied to a chip. The chip includes multiple physical cores, each corresponding to a private cache, and different logical cores on each physical core are used to execute different tasks. In the process of scheduling multiple tasks to the same physical core, the scheduler obtains a scheduling table and determines a first task group that matches the first physical core among multiple task groups. The scheduling table provides cache partition ratio information for each task in the private cache corresponding to the same physical core. The scheduler uses the cache partition ratio information to determine the cache partitions of each task in the first private cache corresponding to the first physical core, and sends instructions to the first physical core to cause the first physical core to execute the tasks in the first task group.

[0007] Based on the first aspect, during the process of scheduling tasks within a task group to the same physical core, the scheduler uses a scheduling table to determine the cache partition ratio information for each task in the task group, and then determines the cache partition for each task in the private cache based on this ratio information. This allows the logical cores on the physical core used to execute the corresponding tasks to access their respective cache partitions, avoiding contention for the private cache among different logical cores on the same physical core, thereby improving the multi-task concurrent execution capability of the physical core. Furthermore, the scheduling table is used to dynamically adjust the private cache usage of each logical core on the same physical core.

[0008] In one optional implementation, the scheduling table is created based on the performance metrics of multiple tasks under different combinations. The performance metrics include one or more of the following: instructions per cycle (IPC), input / output operations per second (IOPS), and response time.

[0009] Based on this optional implementation, the scheduler can create a scheduling table according to the performance metrics of multiple tasks in different combinations. In this way, during task scheduling based on the scheduling table, the scheduler can select appropriate task groups based on the performance metrics of different task combinations and schedule them onto the same physical core, ensuring the reliability of task scheduling and guaranteeing the computational performance of the physical core.

[0010] In one optional implementation, the scheduler selects a preset number of tasks from multiple tasks according to different combinations, forming multiple task groups. For each task group, the scheduler obtains multiple candidate cache partition ratio parameters and performance metrics for each task group under different candidate cache partition ratio parameters; the candidate cache partition ratio parameters that meet the performance metric requirements are determined as the cache partition ratio parameters for each task group. Based on each task group, the cache partition ratio parameters for each task group, and the corresponding performance metrics, the scheduler forms a scheduling table.

[0011] The candidate cache partition ratio parameter includes the candidate cache partition ratio information for each task in each task group; the cache partition ratio parameter is used to indicate the cache partition ratio information for each task in each task group.

[0012] Optionally, the number of tasks is the same in different task groups within multiple task groups. Alternatively, at least two task groups within multiple task groups have a different number of tasks.

[0013] Based on this optional implementation, the scheduler provides different combinations of tasks, resulting in multiple task groups. For each task group, the cache partition ratio of tasks within that group is determined based on performance metrics of tasks running with different candidate cache partition ratios, thereby creating a scheduling table. In this way, using performance metrics as a quantitative indicator to select the cache partition ratio of tasks within a task group ensures the reliability and accuracy of the cache partition ratio information for tasks within that group in the scheduling table. This, in turn, ensures the reliability of subsequent task scheduling and guarantees the computational performance of the physical cores.

[0014] In one alternative implementation, the scheduler receives a first task request and updates the scheduling table according to the new task indicated by the first task's relative.

[0015] In this way, the scheduler can adjust the scheduling table in a timely manner, ensuring the reliability of the scheduling table.

[0016] In one optional implementation, the scheduler determines the first task group that matches the first physical core from multiple task groups based on the scheduling table. Specifically, when a second task is running in the second logical core of the first physical core, the scheduler obtains one or more first candidate task groups from multiple task groups based on the scheduling table, and determines the first candidate task group that meets the first requirement among the one or more first candidate task groups as the first task group.

[0017] Optionally, the first requirement may include: a performance metric threshold or a task priority.

[0018] Each first candidate task group includes a second task, the second logical core is the logical core of the task currently running in the first physical core, and the first logical core is the logical core of the task to be scheduled in the first physical core.

[0019] Based on this optional implementation, when a second task is running on the second logical core within the first physical core, the scheduler selects one or more first candidate task groups containing the second task from the scheduling table, and determines the priority of the one or more first candidate task groups based on the task priority. The first candidate task groups whose priority and performance indicators meet the first requirement are determined as the first task groups. This ensures that scheduling the selected first task groups to the first physical core improves the running performance of the first physical core, thereby increasing the operating efficiency of the physical core.

[0020] In one optional implementation, the scheduler determines the first task group that matches the first physical core from multiple task groups based on the scheduling table. Specifically, if no second task is running in the first physical core, the scheduler obtains one or more second candidate task groups from multiple task groups based on the scheduling table and the priority of each task in the multiple tasks, and determines the second candidate task group that meets the second requirement as the first task group.

[0021] Optionally, the second requirement includes: performance indicator thresholds.

[0022] Based on this optional implementation, if no second task is running on the first physical core, the scheduler selects multiple second candidate task groups that meet the priority from the scheduling table, and determines the second candidate task group that meets the second performance requirement as the first task group. This ensures that scheduling the selected first task group to the first physical core improves the running performance of the first physical core, thereby increasing the operating efficiency of the physical core.

[0023] In one alternative implementation, the scheduler obtains a first task group that matches the first physical core, and then modifies the priority of one or more tasks in the first task group so that one or more tasks in the first task group are scheduled to the first physical core.

[0024] Based on this optional implementation, the scheduler modifies the priority of each task in the first task group so that one or more tasks in the first task group are scheduled to the first physical core, ensuring the accuracy of task scheduling.

[0025] In one optional implementation, the specific implementation is as follows: the cache partition ratio information of each task in the private cache corresponding to the same physical core is determined according to one or two of the following: the cache capacity ratio and bandwidth ratio of each task in the private cache corresponding to the same physical core.

[0026] In this way, by combining the capacity and size of the private cache, the scheduler can improve the reliability of cache partitioning.

[0027] Secondly, this application provides a chip, which includes multiple physical cores and a cache. The cache includes multiple private caches, and one of the multiple physical cores corresponds to one of the multiple private caches. Different logical cores running in one physical core are used to perform different tasks.

[0028] Among them, the first physical core among the multiple physical cores is used to allocate the cache partition of each task in the first private cache based on the cache partition ratio information of each task in the first task group, and in response to the instruction, control the first logical core among the multiple logical cores to execute the first task in the first task group according to the data stored in the first cache partition; the first cache partition is the cache partition in the first private cache corresponding to the first task, and the first private cache is the private cache corresponding to the first physical core among the multiple private caches.

[0029] Thirdly, this application provides a computing device, which includes a processor and the chip provided in the second aspect above.

[0030] The processor is used to obtain a scheduling table and, in conjunction with the chip, execute the method in the first aspect or an optional implementation of the first aspect.

[0031] Optionally, the scheduling table includes: multiple task groups determined according to different combination methods, performance indicators of each task group in the multiple task groups, and cache partitioning information of each task in the same physical core in the private cache. One combination method corresponds to one task group.

[0032] Fourthly, this application provides a scheduler, which includes a storage module, a processing module, and a communication module.

[0033] The storage module provides a scheduling table to the processing module. This scheduling table includes: multiple task groups determined by different combinations, performance metrics for each task group, and cache partitioning information for each task within the same physical core's private cache; one combination corresponds to one task group.

[0034] The processing module is used to determine the first task group that matches the first physical core from multiple task groups based on the scheduling table, and to determine the cache partition of each task in the first private cache based on the cache partition ratio information of each task in the first task group.

[0035] Among them, the first private cache is the private cache corresponding to the first physical core among multiple private caches, and multiple logical cores run in the first physical core;

[0036] The communication module is used to send instructions to the first physical core.

[0037] The instruction is used to instruct the first logical core among multiple logical cores to execute the first task in the first task group based on the data stored in the first cache partition; the first cache partition is the cache partition in the first private cache corresponding to the first task.

[0038] In one optional implementation, the scheduling table is created based on the performance metrics of multiple tasks in different combinations; the performance metrics include one or more of the following: IPC, IOPS, and response time.

[0039] In one optional implementation, the processing module is further configured to: select a preset number of tasks from multiple tasks according to different combinations to form multiple task groups; for each task group, obtain multiple candidate cache partition ratio parameters for each task group, and the performance indicators of each task group under different candidate cache partition ratio parameters; and determine the candidate cache partition ratio parameters that meet the performance indicator requirements as the cache partition ratio parameters for each task group. The processor is further configured to form a scheduling table based on each task group, the cache partition ratio parameters for each task group, and the corresponding performance indicators.

[0040] The candidate cache partition ratio parameter includes the candidate cache partition ratio information for each task in each task group; the cache partition ratio parameter is used to indicate the cache partition ratio information for each task in each task group.

[0041] In an alternative implementation, the processor is also configured to receive a first task request and update the schedule table according to the new task indicated by the first task relative.

[0042] In one alternative implementation, the processor is specifically configured to: when a second task is running in the second logical core of the first physical core, obtain one or more first candidate task groups from multiple task groups according to a scheduling table, and determine the first candidate task group that meets the first requirement among the one or more first candidate task groups as the first task group.

[0043] Optionally, the first requirement may include: a performance metric threshold or a task priority.

[0044] Each first candidate task group includes a second task, the second logical core is the logical core of the task currently running in the first physical core, and the first logical core is the logical core of the task to be scheduled in the first physical core.

[0045] In one alternative implementation, the processor is specifically configured to: when no second task is running in the first physical core, the scheduler obtains one or more second candidate task groups from multiple task groups based on the scheduling table and the priority of each task in the multiple tasks, and determines the second candidate task group that meets the second requirement as the first task group.

[0046] Optionally, the second requirement includes: performance indicator thresholds.

[0047] In an alternative implementation, the processor is further configured to: after acquiring a first task group that matches the first physical core, modify the priority of one or more tasks in the first task group so that one or more tasks in the first task group are scheduled to the first physical core.

[0048] In one alternative implementation, the processor is further configured to: determine the cache partition ratio information of each task in the private cache corresponding to the same physical core based on one or two of the following: the cache capacity ratio and bandwidth ratio of each task in the private cache corresponding to the same physical core.

[0049] Fifthly, this application provides a computer program product that, when the instructions are run by a scheduler, causes the scheduler to execute the method described in the first aspect or any of the optional implementations of the first aspect.

[0050] Sixthly, this application provides a computer-readable storage medium including computer program instructions. When the computer program instructions are executed by a scheduler, the scheduler executes the instructions in the computer program stored in the computer-readable storage medium to perform the method in the first aspect or any optional implementation thereof.

[0051] The technical effects of any of the optional implementations of aspects two through six can be found in the first aspect or the technical effects of any of the optional implementations of aspect one. Further details are omitted here. Based on the implementations provided in the above aspects, this application can be further combined to provide more implementations. Attached Figure Description

[0052] Figure 1 This is a schematic diagram illustrating a private cache contention scenario.

[0053] Figure 2 Schematic diagram of the computer system provided in this application Figure 1 ;

[0054] Figure 3 Schematic diagram of the computer system provided in this application Figure 2 ;

[0055] Figure 4 A schematic diagram of the scheduling table provided in this application;

[0056] Figure 5 A flowchart illustrating the process of creating a scheduling table provided for this application;

[0057] Figure 6 A flowchart illustrating the task scheduling method provided in this application;

[0058] Figure 7 A schematic diagram showing the cache partition ratio of different logical cores provided in this application;

[0059] Figure 8 The flowchart for determining the first task group provided in this application Figure 1 ;

[0060] Figure 9 A diagram illustrating the priority of the tasks provided in this application;

[0061] Figure 10 The flowchart for determining the first task group provided in this application Figure 2 ;

[0062] Figure 11 A schematic diagram of the scheduler provided in this application;

[0063] Figure 12 A schematic diagram of the computing device provided in this application. Detailed Implementation

[0064] In a multi-core CPU, each physical core corresponds to a private cache. A physical core's private cache can be further divided into Level 1 cache and Level 2 cache. The Level 1 cache and Level 2 cache have different capacities.

[0065] The first-level cache can be used to store program code and data running on the physical core. Typically, the first-level cache can include a first-level data cache (L1 Data Cache, L1 D-Cache) or a first-level instruction cache (L1 Instruction Cache, L1 I-Cache).

[0066] The second-level cache (L2 cache) can be used to store other data from the physical core.

[0067] The first-level cache will be referred to as the L1 cache, and the second-level cache as the L2 cache.

[0068] A single physical core can run multiple logical cores, with each logical core dedicated to running a single task. During multi-core CPU execution of multiple tasks, SMT (Scheduled Multitasking) technology can be used to schedule two or more tasks to different logical cores on the same physical core, thereby improving CPU utilization. For example, running two logical cores on a single physical core... Figure 1 As shown, Task 1 and Task 2 are scheduled to the same physical core, with Logical Core 1 running Task 1 and Logical Core 2 running Task 2.

[0069] Currently, during SMT scheduling, multiple tasks are allocated to the same physical core. Because these tasks compete for the private cache resources of that physical core while it's running, the computational performance of that physical core fluctuates. For example... Figure 1 As shown, the physical core runs Task 1 and Task 2 simultaneously. Task 1 and Task 2 share the physical core's execution units, L1 D-Cache, L1 I-Cache, L2 Cache, etc. (where black represents the resources used by Task 1, and white represents the resources used by Task 2). If Task 1 needs to frequently access the L1 D-Cache and L1 I-Cache, while Task 2 does not, the large amount of resources in the L1 D-Cache and L1 I-Cache being occupied by Task 2 increases the time the physical core takes to run Task 1, thus impacting the physical core's computational performance.

[0070] Based on this, the resource usage of each thread in the private cache is allocated in the SMT thread scheduling to reduce resource contention between different threads and improve SMT performance. This application provides a task scheduling method. During the scheduling of tasks in a task group to the same physical core, the scheduler uses a scheduling table to determine the cache partition ratio information of each task in the task group, and then determines the cache partition of each task in the private cache based on the cache partition ratio information of each task. This allows the logical cores in the physical core used to execute the corresponding tasks to access the corresponding cache partitions, avoiding contention for the private cache by different logical cores in the same physical core, thereby improving the multi-task concurrent execution capability of the physical core. Furthermore, the scheduling table is used to dynamically adjust the private cache usage of each logical core on the same physical core.

[0071] Specifically, in the process of scheduling multiple tasks to the same physical core, the scheduler obtains a scheduling table and determines the first task group that matches the first physical core among multiple task groups. This scheduling table provides information on the cache partition ratio of each task in the private cache corresponding to the same physical core. The scheduler uses the cache partition ratio information to determine the cache partition of each task in the first private cache corresponding to the first physical core, and sends instructions to the first physical core to execute the tasks in the first task group.

[0072] The technical solutions involved in this application can be applied not only to current chips, distributed computing devices, centralized computing devices, storage devices, storage servers, chip technologies or storage technologies, but also to future chip technologies or storage devices, or to systems on a chip (SoC) with multiple CPUs, storage devices, storage nodes or servers, etc.

[0073] The terminology used in the implementation section of this application is only for explaining specific embodiments of this application and is not intended to limit this application. A brief introduction to some concepts that may be involved in this application is given below.

[0074] A process is an instance of a program running on a specific set of data in a computer. It is the basic unit for resource allocation in a system and the foundation of the operating system architecture. In early process-oriented computer architectures, a process was the fundamental execution entity of a program; in contemporary thread-oriented computer architectures, a process is a container for threads. A program is a description of instructions, data, and their organization; a process is the entity that implements a program.

[0075] Thread: The smallest unit of computation that an operating system can schedule. Threads are typically contained within processes and are the actual units of operation within a process. A thread refers to a single, sequential flow of control within a process; multiple threads can run concurrently within a process, each performing a different task. In this embodiment, a thread may also be referred to as a task.

[0076] Simultaneous Multithreading (SMT): Also known as Hyper-threading, it simulates a single physical core as multiple physical chips, allowing a single physical core to use thread-level parallel computing, thus ensuring compatibility with multi-threaded operating systems and software. Simply put, Hyper-threading refers to two or more threads being processed simultaneously by a single physical core.

[0077] Physical core: An independent processing unit that actually exists on the CPU. A physical core can also be called a physical chip.

[0078] Logical core: A virtual processing unit simulated on a single physical core. Multiple logical cores simulated on a single physical core can share the resources of that physical core (e.g., cache resources, computing resources, network resources, or storage resources).

[0079] Shared memory, also known as shared cache, refers to memory that can be accessed by different CPUs in a multi-CPU computer system, or memory that can be accessed by different physical cores in a multi-core CPU.

[0080] To make the objectives, technical solutions, and advantages of this application clearer, the application will now be described in further detail with reference to the accompanying drawings.

[0081] In the following description, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the description of this application, unless otherwise stated, "a plurality of" means two or more.

[0082] Furthermore, in this application, directional terms such as "upper" and "lower" are defined relative to the orientation of the components shown in the accompanying drawings. It should be understood that these directional terms are relative concepts, used for relative description and clarification, and can change accordingly depending on the orientation of the components in the accompanying drawings.

[0083] like Figure 2 As shown, Figure 2 This is a schematic diagram of a computer system for the task scheduling method provided in this application. The computer system 100 shown includes a hardware layer 20 and a software layer 10. The hardware layer 20 includes a processor 201, a memory 202, a bus 204, and a memory 203, etc., and the software layer 10 includes an operating system 105. The processor 201, memory 202, bus 204, and memory 203 are connected via a bus. The processor 201 and memory 203 are used to provide computing resources.

[0084] Specifically, the processor 201 may be a CPU, a graphics processing unit (GPU), a microprocessor (MP), a digital signal processor (DSP), or a neural processing unit (NPU), which can implement or execute various exemplary logic blocks, modules, and circuits described in conjunction with the embodiments of this application. The processor may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, etc. This application embodiment only uses a CPU as an example for illustration. Figure 2 As shown, the computer system 100 includes multiple CPUs (such as...) Figure 2 The CPUs shown are CPU1 to CPUn, each containing multiple physical cores (e.g., CPU1 to CPUn). Figure 2 As shown in Core1 to Corem), after enabling SMT technology, each Core runs at least two logical cores. Figure 2 (Illustration only using two logical cores). This application does not limit the number of CPUs in the computer or the number of physical cores in each CPU. It is understood that... Figure 2 This is merely an illustrative structural diagram. The number of logical cores running on each Core can be the same or different, and this application embodiment does not limit this. Wherein, n is a positive integer greater than 2, and m is a positive integer greater than or equal to 2.

[0085] Memory 203 refers to internal memory that directly exchanges data with the processor. It can read and write data at any time and at high speed, serving as temporary data storage for the operating system or other running programs. Memory includes at least two types of memory. For example, memory can be random access memory, such as dynamic random access memory (DRAM), or storage class memory (SCM). DRAM is a semiconductor memory and, like most random access memory (RAM), is a type of volatile memory device. SCM is a composite storage technology that combines the characteristics of traditional storage devices and memory. Storage class memory can provide faster read and write speeds than hard drives, but its access speed is slower than DRAM, and it is also cheaper than DRAM. However, DRAM and SCM are only illustrative examples in this embodiment, and memory can also include other random access memories, such as static random access memory (SRAM).

[0086] Additionally, memory 203 can also be a dual in-line memory module (DIMM), i.e., a module composed of dynamic random access memory (DRAM), or a solid state disk (SSD). In practical applications, processor 201 can be configured with multiple memory modules 203, and different types of memory modules 203. This embodiment does not limit the number or type of memory modules 203. Furthermore, memory modules 203 can be configured to have a power-saving function. The power-saving function means that when the system experiences a power outage and then power is restored, the data stored in memory modules 203 will not be lost. Memory with a power-saving function is called non-volatile memory.

[0087] The memory 202 can be used to store software programs and modules. The processor 201 executes various functional applications and data processing of the computer system 100 by running the software programs and modules stored in the memory 202. The memory 202 may contain one or more computer-readable storage media. The memory 202 includes a program storage area and a data storage area. The program storage area can store the operating system, applications required for at least one function, etc., for example, a program that implements the task scheduling method provided in the embodiments of this application. The data storage area can store data created by the computer system 100, etc. For example, it can store task information of multiple tasks that need to be scheduled during the execution of the task scheduling method, a scheduling table of multiple tasks, etc.

[0088] In this embodiment of the application, memory 202 may specifically include volatile memory, such as random-access memory (RAM); the memory may also include non-volatile memory, flash memory, hard disk drive (HDD) or solid-state drive (SSD); the memory may also include a combination of the above types of memory.

[0089] Bus 204 is the common communication trunk line for transmitting information between various functional components of a computer. According to the types of information transmitted by the computer, the computer bus can be divided into data bus, address bus and control bus, which are used to transmit data, data address and control signals respectively.

[0090] An operating system (OS) is a computer program that manages and controls computer hardware and software resources. It is the most basic system software that runs directly on the "bare metal" and supports the operation of other software, such as various applications. In the embodiments of this application, the operating system can be various operating systems, such as Windows, Linux, iOS, Android open-source operating system, and virtualization platforms such as KVM and Xen running on Windows and Linux.

[0091] Understandably, Figure 2 For illustrative purposes only, in practical applications, computer system 100 may include more than Figure 2 The system may include more or fewer components, such as a user interface for supporting interaction and information exchange between the system and the user, or a communication interface for supporting communication between the terminal and other terminals, servers, or networks. Figure 2 The structure shown does not constitute any limitation on the computer provided in the embodiments of this application.

[0092] In one optional implementation, after SMT technology is enabled, to reduce the shared memory usage by different logical cores, the computer system 100 divides different physical cores into corresponding private caches and configures the cache partition ratio information of different logical cores on the same physical core in the private cache corresponding to that physical core. This ensures that after SMT technology is enabled, the logical cores in the physical core used to execute corresponding tasks can access the corresponding cache partitions, avoiding contention for private caches when the same physical core is running on multiple logical cores, thereby improving the multi-task synchronization capability of the physical core. Furthermore, a scheduling table is used to dynamically adjust the private cache usage of each logical core on the same physical core.

[0093] In one alternative approach, the cache partition ratio information may refer to the cache level, partition percentage, or other information of different cache partitions in the private cache; this application embodiment does not limit this. The cache partition ratio is used to indicate the proportion of the private cache used by the logical core during task execution. In some approaches, the cache partition ratio may include a cache bandwidth ratio or a cache capacity ratio. Accordingly, the cache partition ratio information includes cache bandwidth ratio information or cache capacity ratio information.

[0094] The cache bandwidth ratio indicates the proportion of cache bandwidth used by the logical core during task execution. The cache capacity ratio indicates the proportion of cache capacity used by the logical core during task execution.

[0095] For ease of explanation, such as Figure 3 As shown, a schematic diagram of a specific computer system is provided here. Figure 3 The schematic diagram shown illustrates the task scheduling method provided in the embodiments of this application. Relative to... Figure 2 The provided computer system 100, Figure 3 The computer system 200 shown includes a scheduler 210 and two CPUs, denoted as CPU1 and CPU2. CPU1 and CPU2 each contain two physical cores, denoted as Core11, Core12, Core21, and Core22, respectively. Core11 of CPU1 runs two logical cores, denoted as logical core 111 and logical core 112, and Core12 of CPU1 runs two logical cores, denoted as logical core 121 and logical core 122, respectively. Core21 of CPU2 runs two logical cores, denoted as logical core 211 and logical core 212, and Core22 of CPU2 runs two logical cores, denoted as logical core 221 and logical core 222, respectively.

[0096] like Figure 3As shown, CPU1 has cache 13, and CPU2 has cache 23. Each physical core in the CPU (CPU1 or CPU2) has a private cache. Taking CPU1 as an example, Core11 has private cache 132, and Core12 has private cache 133. Cache 13 supports access from Core11 and Core12, or it supports access from Core11, Core12, Core21, and Core22. Private cache 132 supports access from Core11 but not from other physical cores (such as Core12, Core21, or Core22 mentioned above). Similarly, private cache 133 supports access from Core12 but not from other physical cores (such as Core11, Core21, or Core22 mentioned above).

[0097] Taking Core 11's private cache 132 as an example, such as Figure 3 As shown, the private cache 132 includes L1 cache and L2 cache, and the private cache 132 supports access from logical core 111 and logical core 112.

[0098] In one alternative approach, scheduler 210 is used to schedule tasks to the corresponding physical core (e.g., Core11, Core12, Core21, or Core22) and configure the cache partition ratio information of different logical cores on the same physical core (e.g., Core11, Core12, Core21, or Core22) for the private cache corresponding to that physical core.

[0099] In some alternative approaches, the scheduler 210 can be implemented in hardware within the computer system. For example, the scheduler 210 can be implemented as a control circuit or controller within the aforementioned hardware layer 20. Alternatively, the computer system 200 can select a master processor from multiple processors and use that master processor as the scheduler 210. Yet another example is that the computer system 200 can select a master physical core from multiple physical cores and use that master physical core as the scheduler 210.

[0100] In other alternatives, scheduler 210 may also be deployed as a software module in computer system 200. For example, scheduler 210 may be deployed in the aforementioned software layer 10.

[0101] In some optional implementations, after SMT technology is started, to reduce contention for the same private cache among different logical cores, the scheduler 210 can implement the task scheduling method provided in this application during task scheduling to configure the cache partition ratio information of the private cache corresponding to the private cache of different logical cores on the same physical core. Regarding the task scheduling process, the following describes... Figures 4 to 10 An example is provided.

[0102] In one alternative implementation, during task scheduling, in order to dynamically configure the cache partition ratio information of the logical cores of the running tasks, the scheduler 210 can create a scheduling table based on multiple tasks that need to be executed in the computer system 200. During task scheduling, the scheduler 210 uses the scheduling table to determine the cache partition ratio information of the logical cores of the running tasks, thereby realizing the dynamic allocation of cache partition ratio information.

[0103] The following combination Figures 4 to 5 An example is provided to illustrate the implementation of the scheduling table.

[0104] In one optional implementation, the scheduling table includes: multiple task groups determined according to different combination methods, performance indicators of each task group in the multiple task groups, and cache partition ratio information of each task in the same physical core in the private cache of each task in the same task group.

[0105] A task group comprises one or more tasks scheduled to the same physical core. A task group may consist of a single task that is not executed in combination with other tasks and is performed by a single physical core. A task group may consist of multiple tasks that are executed in combination, allowing the physical core to process multiple tasks in parallel.

[0106] The number of tasks in a task group is related to the number of logical cores that can run in the physical cores. For example, as mentioned above... Figure 3 Taking Core11 of CPU1 as an example, if Core11 supports running logical cores 111 and 112, then the task group includes one or two tasks.

[0107] The performance metrics of a task group are used to indicate the performance status of a physical core when the same physical core executes tasks in that task group.

[0108] In some alternative approaches, the performance metrics for task combinations may include, but are not limited to: IPC, IOPS, and response time.

[0109] Alternatively, in other alternative approaches, the performance metrics for a task group can be metrics determined based on IPC, IOPS, or response time. For example, using performance metrics determined based on IPC, IOPS, and response time, scheduler 210 can use the average, weighted average, or sum of the IPC, IOPS, and response time of a task group as the performance metrics for that task group.

[0110] IPC is used to measure the average number of instructions that a computer system 200 or a physical core in the computer system 200 can execute in each cycle (or unit of time). IPC can be used to indicate the execution efficiency of a physical core; the higher the IPC value, the higher the execution efficiency of the corresponding physical core, and the higher the instruction throughput per unit of time, i.e., the better the SMT performance.

[0111] IOPS refers to the number of input / output operations that can be performed per second, which is the number of read and write operations that a physical core can complete in each time period (or unit of time). The higher the IOPS value, the more read and write operations a physical core can complete per unit of time, the more reasonable the swap space partitioning of logical cores in the physical core, and the better the SMT performance.

[0112] Response time, also known as maximum response time or maximum response curve (MRC), refers to the maximum response time of a physical core. It indicates the data throughput or instruction throughput of the physical core in each cycle (or unit of time). The lower the response time value, the higher the instruction throughput of the physical core per unit of time, meaning better SMT performance.

[0113] For example, taking the tasks to be executed in a computer system as follows: Task 0, Task 1, Task 2, and Task 3, if the number of logical cores supported by the physical core is 2, then... Figure 4 As shown, Figure 4 This is a schematic diagram of the scheduling table provided in this application. The scheduling table includes six elements: G1 to G10, each element representing a task group formed by a combination method, such as... Figure 4 As shown, element G1 represents task 0 and task 0, element G2 represents task 0 and task 1, element G3 represents task 0 and task 2, element G4 represents task 0 and task 3, element G5 represents task 1 and task 1, element G6 represents task 1 and task 2, element G7 represents task 1 and task 3, element G8 represents task 2 and task 2, element G9 represents task 2 and task 3, and element G10 represents task 3 and task 3.

[0114] In an alternative approach, element G1 can also be described as task 0, element G5 can also be described as task 1, element G8 can also be described as task 2, and element G10 can also be described as task 3.

[0115] Element G1 indicates that only task 0 runs on a physical core, and task 0 is not run in combination with other tasks. Similarly, element G5 indicates that only task 1 runs on a physical core, and task 1 is not run in combination with other tasks. Element G8 indicates that only task 2 runs on a physical core, and task 2 is not run in combination with other tasks. Element G10 indicates that only task 3 runs on a physical core, and task 3 is not run in combination with other tasks.

[0116] Each element in the scheduling table provides information on the cache partition ratio of one or two tasks running on the same physical core. Taking the aforementioned IPC as a performance metric as an example, such as... Figure 4 As shown, element G2 includes: a performance metric of 3.1 when tasks 0 and 2 are executed together; a cache capacity ratio of X1:X2 for tasks 0 and 1 in the L1 cache; a cache bandwidth ratio of Y1:Y2 for tasks 0 and 1 in the L1 cache; a cache capacity ratio of A1:A2 for tasks 0 and 1 in the L2 cache; and a cache capacity ratio of C1:C2 for tasks 0 and 1 in the L2 cache. Where X1+X2 equals 1, or X1+X2 equals 100%; similarly, Y1+Y2 equals 1, or Y1+Y2 equals 100%; A1+A2 equals 1, or A1+A2 equals 100%; and C1+C2 equals 1, or C1+C2 equals 100%.

[0117] The following is an exemplary description of how the scheduler 210 creates the scheduling table.

[0118] In one alternative implementation, the scheduler 210 can create a scheduling table based on the performance metrics of multiple tasks in different combinations. Thus, during task scheduling according to the scheduling table, the scheduler 210 can select appropriate task groups based on the performance metrics of different task combinations and schedule them onto the same physical core, ensuring the reliability of task scheduling and guaranteeing the computational performance of the physical core.

[0119] Please see Figure 5 , Figure 5 The flowchart for creating a scheduling table provided in this application shows that the process includes steps S510 to S540.

[0120] S510, the scheduler 210 selects a preset number of tasks from multiple tasks according to different combination methods to form multiple task groups.

[0121] In some optional methods, the specific value of the preset number is related to the number of logical cores that a physical core can run. For example, when the number of logical cores that can run on a physical core is 2, the preset number is a positive integer less than or equal to 2. In some methods, different physical cores in the same chip can run the same number of logical cores. In other methods, at least two physical cores in the same chip run different numbers of logical cores. This application does not limit this. The following description uses the example of different physical cores in the same chip running the same number of logical cores.

[0122] In one alternative implementation, a preset number of tasks can be selected from multiple tasks through permutation and combination to form multiple task groups.

[0123] In the first optional example, the preset quantity is 2. The scheduler 210 selects 2 tasks from multiple tasks to form a task group, thus forming... There are 6 task groups. Here, N is the total number of tasks that need to be executed in computer system 200. For example, if the tasks that need to be executed in computer system 200 include: task 0, task 1, task 2, and task 3, then scheduler 210 selects 2 tasks from the multiple tasks as a task group, forming 6 task groups.

[0124] In the second optional example, the preset number is 2, and the scheduler 210 selects one task from multiple tasks as a task group to form N task groups.

[0125] In the third optional example, the preset quantity is 2. The scheduler 210 selects 2 tasks from multiple tasks as a task group and selects 1 task from multiple tasks as a task group to form a task group. Task groups. For example, if the tasks to be executed in computer system 200 include: Task 0, Task 1, Task 2, and Task 3, then scheduler 210 selects two tasks from the multiple tasks to form a task group, resulting in six first-type task groups. Scheduler 210 also selects one task from the multiple tasks to form a task group, resulting in four second-type task groups. Scheduler 210 combines the first-type and second-type task groups to obtain ten task groups, as described above. Figure 4 As shown.

[0126] The three optional examples described above are merely different arrangements and combinations of tasks formed by the scheduler 210. In other embodiments, the scheduler 210 may also use other arrangements and combinations to form multiple task groups. For example, the scheduler 210 may cluster the multiple task groups to form multiple clusters, where each cluster includes a preset number of tasks. The scheduler 210 determines each cluster as a task group. This application does not limit this aspect.

[0127] S520, for each task group in multiple task groups, scheduler 210 obtains multiple candidate cache partition ratio parameters for each task group, as well as the performance indicators of each task group under different candidate cache partition ratio parameters.

[0128] The candidate cache partition ratio parameter is used to indicate the candidate cache partition ratio information for each task in each task group.

[0129] In one optional implementation, for each task group, the scheduler 210 adjusts the cache partition ratio information of each task in the task group according to a preset change in cache partition ratio, forming multiple candidate cache partition ratio parameters. It then predicts the performance metrics of the task group under different candidate cache partition ratio parameters.

[0130] The preset cache partition ratio change amount is used to indicate the change value of the cache partition ratio information of each task in a task group during each adjustment.

[0131] In one optional approach, the preset cache partition ratio change includes either a bandwidth change or a capacity change. The bandwidth change indicates the change in the cache bandwidth occupied by the task in the private cache, while the capacity change indicates the change in the cache capacity occupied by the task in the private cache.

[0132] In one optional approach, the preset cache partition ratio change can be user-defined, set by the scheduler 210 itself, or determined by the scheduler 210 according to the capacity and bandwidth of the private cache in the chip. This application embodiment does not limit this. Furthermore, this application embodiment does not limit the specific value of the preset cache partition ratio change.

[0133] For example, if the scheduler 210 determines the preset change in the proportion of cache partitions according to the capacity and bandwidth of the private cache in the chip, the scheduler 210 obtains the bandwidth and capacity of the private cache corresponding to the physical core in the computer system 200 (e.g., the average bandwidth and average capacity of the private cache corresponding to all physical cores), and obtains the change in the proportion of cache partitions according to the mapping data between the bandwidth and capacity of the private cache and the change.

[0134] The mapping data between the bandwidth and capacity of the private cache and the changes includes the changes in the proportion of multiple candidate cache partitions, as well as the bandwidth and capacity of the private cache corresponding to the changes in the proportion of each candidate cache partition.

[0135] The following is an example of how the scheduler 210 obtains the proportion parameters of multiple candidate cache partitions for each task group.

[0136] In the first optional implementation, the preset cache partition ratio change includes the bandwidth change. For a task group, the scheduler 210 obtains the initial cache partition ratio parameter for that task group. This initial cache partition ratio parameter indicates the initial cache partition ratio information for each task in the task group. The scheduler 210 adjusts the initial cache partition ratio information for each task in the task group in multiple rounds according to the bandwidth change, obtaining the initial candidate cache partition ratio parameter for the task group in each round. The scheduler 210 summarizes the initial cache partition ratio parameter for the task group and the initial candidate cache partition ratio parameter for the task group in each round to form multiple candidate cache partition ratio parameters for the task group.

[0137] In some alternative approaches, the initial cache partition ratio parameter can be the default cache partition ratio parameter pre-configured by the scheduler 210. For example, in the case where the task group includes two tasks, the initial cache partition ratio parameter can include: Task 1: x; Task 2: 1-x, where x is a positive number less than 1.

[0138] In each round of adjustment, the scheduler 210 adjusts the proportion of cache bandwidth occupied by each task in the task group according to the amount of bandwidth change, forming the adjusted cache bandwidth proportion of each task. The scheduler 210 obtains the candidate cache partition proportion information of each task in the current round of adjustment according to the adjusted cache bandwidth proportion of each task.

[0139] For example, a task group may include two tasks (Task 1 and Task 2). The initial cache partition ratio parameters could be: Task 1: 0.5; Task 2: 0.5. Accordingly, Task 1 occupies 50% of the cache bandwidth, and Task 2 occupies 50% of the cache bandwidth. With a bandwidth change of 10%, after each round of adjustment, the cache bandwidth ratio occupied by Task 1 increases (or decreases) by 10%, and the cache bandwidth ratio occupied by Task 2 decreases (or increases) by 10%. Consequently, the candidate cache partition ratio information for Task 1 increases (or decreases) by 0.1, and the candidate cache partition ratio information for Task 2 decreases (or increases) by 0.1, forming 9 candidate cache partition ratio parameters for this task group.

[0140] In the second optional implementation, the preset cache partition ratio change includes the capacity change. For a task group, scheduler 210 obtains the initial cache partition ratio parameters for that task group. Scheduler 210 adjusts the initial cache partition ratio information of each task in the task group multiple times according to the capacity change, obtaining the initial candidate cache partition ratio parameters for the task group in each round. Scheduler 210 summarizes the initial cache partition ratio parameters of the task group and the initial candidate cache partition ratio parameters for the task group in each round to form multiple candidate cache partition ratio parameters for the task group.

[0141] Similar to the first optional implementation method mentioned above, for each round of adjustment, the scheduler 210 adjusts the proportion of cache capacity occupied by each task in the task group according to the amount of capacity change, forming the adjusted cache capacity proportion of each task. The scheduler 210 obtains the candidate cache partition proportion information of each task in the current round of adjustment according to the adjusted cache capacity proportion of each task.

[0142] For example, a task group may include two tasks (Task 1 and Task 2). The initial cache partition ratio parameters could be: Task 1: 0.5; Task 2: 0.5. Accordingly, Task 1 occupies 50% of the cache capacity, and Task 2 occupies 50% of the cache capacity. With a capacity change of 10%, after each round of adjustments, the cache capacity ratio occupied by Task 1 increases (or decreases) by 10%, and the cache capacity ratio occupied by Task 2 decreases (or increases) by 10%. Consequently, the candidate cache partition ratio information for Task 1 increases (or decreases) by 0.1, and the candidate cache partition ratio information for Task 2 decreases (or increases) by 0.1, forming 9 candidate cache partition ratio parameters for this task group.

[0143] In the third optional implementation, the preset cache partition ratio change includes both capacity and bandwidth changes. For a task group, scheduler 210 obtains the initial cache partition ratio parameters for that task group. Scheduler 210 adjusts the initial cache partition ratio information of each task in the task group multiple times according to the capacity and bandwidth changes, obtaining the initial candidate cache partition ratio parameters for the task group in each round. Scheduler 210 summarizes the initial cache partition ratio parameters of the task group and the initial candidate cache partition ratio parameters for the task group in each round to form multiple candidate cache partition ratio parameters for the task group.

[0144] Similar to the two optional implementations mentioned above, for each round of adjustment, scheduler 210 adjusts the proportion of cache capacity occupied by each task in the task group according to the capacity change, forming the adjusted cache capacity proportion for each task. Scheduler 210 also adjusts the proportion of cache bandwidth occupied by each task in the task group according to the bandwidth change, forming the adjusted cache bandwidth proportion for each task. Based on the adjusted cache capacity proportion and cache bandwidth proportion for each task, scheduler 210 obtains the candidate cache partition proportion information for each task in the current round of adjustment.

[0145] The three optional implementations described above are merely different ways for the scheduler 210 to obtain the multiple candidate cache partition ratio parameters for each task group. In other embodiments, the scheduler 210 may also employ other implementations for the multiple candidate cache partition ratio parameters for each task group. For example, the scheduler 210 may predict the possible multiple candidate cache partition ratio parameters for each task group based on the capacity and bandwidth of the private cache in the chip. As another example, the scheduler 210 may also predict the possible multiple candidate cache partition ratio parameters for each task group using a prediction model. This application embodiment does not limit this approach. The prediction model can be a machine learning-based model or a neural network-based model; this application embodiment does not limit this approach.

[0146] The following is an example of how the scheduler 210 obtains the performance metrics of each task group under different candidate cache partition ratio parameters.

[0147] In one alternative implementation, for a candidate cache partition ratio parameter for each task group, the scheduler 210 predicts the initial performance index of each task in the task group under the candidate cache partition ratio parameter, and the scheduler 210 obtains the performance index of the task group under a candidate cache partition ratio parameter based on the initial performance index of each task in the task group.

[0148] The following example illustrates how the scheduler 210 predicts the initial performance metrics for each task in the task group.

[0149] In a first optional example, scheduler 210 can invoke a simulation tool to obtain the initial performance metrics of each task in the task group under the candidate cache partition ratio parameter. This application embodiment does not limit the specific type of simulation tool; it can be selected according to the specific application scenario or the specific type of performance metric. For example, if the performance metric is IPC, the simulation tool may include, but is not limited to: the performance analysis tool perf, the general execution-driven multiprocessor simulator 5 (GEM5), system simulators (simics), binary analysis platform (Pin), and the performance analysis tool Intel VTune profiler. As another example, if the performance metric is IOPS, the simulation tool may include, but is not limited to: the flesible I / O tester (FIO), the input / output reference tool (IOR), and the file system benchmark tool (IOzone). Yet another example, if the performance metric is MRC, the simulation tool may include, but is not limited to: GEM5, Pin, and Intel VTune profiler.

[0150] In a second optional example, scheduler 210 can invoke a metric prediction model to obtain the initial performance metric for each task in the task group under the candidate cache partition ratio parameter. The metric prediction model can be a machine learning-based prediction model, such as a logistic regression-based model. The metric prediction model can also be a neural network-based prediction model; this embodiment does not limit the specific type of metric prediction model.

[0151] The two optional examples described above are merely different implementations of how the scheduler 210 obtains the initial performance metrics of each task in the task group under the candidate cache partition ratio parameter. In other embodiments, the scheduler 210 may also employ other implementations to obtain the initial performance metrics of each task in the task group under the candidate cache partition ratio parameter. This application does not limit these implementations.

[0152] The following two specific examples illustrate how the scheduler 210 obtains the performance index of the task group under a candidate cache partition ratio parameter based on the initial performance index of each task in the task group.

[0153] In a first alternative example, scheduler 210 may use the sum of the absolute values ​​of the initial performance metrics of each task in the task group as the performance metric of the task group under a candidate cache partition ratio parameter.

[0154] In the second alternative example, scheduler 210 may use the sum of the initial performance metrics of each task in the task group as the performance metric of the task group under a candidate cache partition ratio parameter.

[0155] The two optional examples described above are merely different implementations of how the scheduler 210 obtains the performance metrics of the task group under a candidate cache partition ratio parameter based on the initial performance metrics of each task in the task group. In other embodiments, the scheduler 210 may also use other implementations to obtain the performance metrics of the task group under a candidate cache partition ratio parameter. This application does not limit this.

[0156] S530, scheduler 210 determines the cache partition ratio parameter for each task group based on the candidate cache partition ratio parameter that meets the performance index requirements.

[0157] The cache partition ratio parameter is used to indicate the cache partition ratio information for each task in each task group.

[0158] In the first optional implementation, the performance metric requirement can be a candidate cache partition ratio parameter where the performance metric is greater than or equal to a performance metric threshold. The performance metric threshold can be preset by the scheduler 210, or it can be determined by the scheduler 210 based on the performance metrics of the task group under different candidate cache partition ratio parameters. For example, the performance metric threshold can be the maximum, median, or average of the performance metrics of the task group under different candidate cache partition ratio parameters.

[0159] When the performance metric is at least one of IPC and IOPS, or the performance metric is the average of IPC, IOPS, response time, or a weighted average or sum, the "candidate cache partition ratio parameter that meets the performance metric requirements" can be a candidate cache partition ratio parameter whose corresponding performance metric is greater than or equal to the performance metric threshold. This ensures that the selected cache partition ratio parameter can achieve higher SMT performance.

[0160] When response time is the performance metric, the "candidate cache partition ratio parameter that meets the performance metric requirement" can be a candidate cache partition ratio parameter whose corresponding performance metric is less than the performance metric threshold. This ensures that the selected cache partition ratio parameter achieves higher SMT (Simultaneous Response Time) performance.

[0161] The following explanation uses performance metrics such as at least one of IPC and IOPS, or the average, weighted average, or sum of IPC, IOPS, and response time as examples. In other words, the higher the value of the performance metric, the better the SMT performance.

[0162] In the first optional example, scheduler 210 pre-sets performance metric thresholds. The performance metric thresholds can be the same for each task group.

[0163] In the second alternative example, scheduler 210 determines a performance metric threshold based on the performance metrics of task groups under different candidate cache partition ratio parameters. Different task groups correspond to different performance metric thresholds.

[0164] In the second alternative implementation, the performance metric requirement can be to select the candidate cache partition ratio parameter with the highest performance metric. For each task group, the scheduler 210 selects the maximum performance metric from the performance metrics of the task group under different candidate cache partition ratio parameters, and determines the candidate cache partition ratio parameter corresponding to the maximum performance metric as the cache partition ratio parameter of the task group.

[0165] The two optional implementation methods described above are merely ways in which the scheduler 210 selects different cache partition ratio parameters for each task group based on performance requirements. In other embodiments, the scheduler 210 may also use other implementation methods to select the cache partition ratio parameters for each task group. For example, for each task group, the scheduler 210 predicts the probability of the task group running with different candidate cache partition ratio parameters based on the performance indicators of the task group under different candidate cache partition ratio parameters, and sets the candidate cache partition ratio parameter with the highest prediction probability as the cache partition ratio parameter for the task group. This application embodiment does not limit this.

[0166] S540, scheduler 210 forms a scheduling table based on each task group, the cache partition ratio parameter of each task group, and the corresponding performance indicators.

[0167] In one optional implementation, scheduler 210 associates each task group, the cache partition ratio parameter of each task group, and the performance metrics corresponding to the cache partition ratio parameter to form a scheduling table. For example... Figure 5 As shown, scheduler 210 executes steps S510 to S540 based on task 0, task 1, task 2, and task 3, forming... Figure 5 The scheduling table shown is shown.

[0168] In an alternative approach, the scheduling table can be stored as a data table in the memory or storage of the scheduler 210 or the computer system 200. The form of this data table can be referenced as described above. Figure 4 .

[0169] In another alternative approach, the scheduling table can be stored as metadata. This metadata is used to provide metadata for multiple task groups, where the metadata for each task group includes the tasks included in the task group, as well as the cache partition ratio information for each task.

[0170] based on Figure 5 In the provided embodiment, the scheduler 210 provides multiple combinations of tasks to obtain multiple task groups. For each task group, the cache partition ratio information of the tasks in that task group is determined based on performance metrics of the tasks running with different candidate cache partition ratio information, thereby creating a scheduling table. In this way, performance metrics are used as quantitative indicators to select the cache partition ratio information of tasks in a task group. This ensures the reliability and accuracy of the cache partition ratio information of tasks in the task group in the scheduling table. This ensures the reliability of subsequent task scheduling and guarantees the computational performance of the physical cores.

[0171] The above Figure 5Taking the selection of cache partition ratio parameters for a task group from multiple candidate cache partition ratio parameters according to performance index requirements as an example, the implementation method of scheduler 210 creating a scheduling table is explained. In some optional embodiments, scheduler 210 can also use other implementation methods to create the scheduling table. This application embodiment does not limit this. For example, scheduler 210 can form multiple task groups with reference to S510 above. For each task group, scheduler 210 calls the partition ratio prediction model to obtain the cache partition ratio information of each task in the task group. Scheduler 210 creates a scheduling table based on the cache partition ratio information of multiple task groups and each task in each task group. As another example, scheduler 210 calls the generation model, taking multiple tasks and the number of logical cores that each physical core can run as input to the generation model, and obtains the scheduling table output by the generation model. The generation model can be a large language model or a model based on a generative network. This application embodiment does not limit this.

[0172] In one alternative implementation, to improve the reliability of the scheduling table, when the scheduler 210 determines that the computer system 200 has received a new task that needs to be executed, the scheduler 210 receives a first task request, and the scheduler 210 executes the aforementioned new task according to the indication of the first task request. Figure 5 The provided implementation updates the scheduling table.

[0173] For example, scheduler 210 updates the task pool based on the new task indicated by the first task request. Scheduler 210 then executes steps S510 to S540 again for multiple tasks in the updated task pool to obtain a new scheduling table.

[0174] Alternatively, in an optional manner, if the scheduler 210 detects a decrease or increase in the number of tasks in the task pool, the scheduler 210 re-executes steps S510 to S540 based on the current number of tasks in the task pool to obtain a new scheduling table. In this way, the scheduler 210 can promptly adjust the scheduling table when tasks are completed or new tasks are added to the task pool, ensuring the reliability of the scheduling table.

[0175] In one alternative implementation, during the process of scheduling tasks to the first physical core among multiple physical cores, the scheduler 210 schedules the first task group that matches the first physical core to the first physical core based on the aforementioned scheduling table, and divides the cache partitions of each logical core in the first physical core in the private cache according to the cache partition ratio information of each task in the first task group.

[0176] In the first example, the first physical core can be any one of multiple physical cores. For example, as described above... Figure 3For example, in the provided embodiment, the first physical core can be Core11, Core12, Core21 or Core22 as described above.

[0177] In the second example, the first physical core can also be any one of the multiple physical cores that is currently idle. For example, as described above... Figure 3 Taking the provided embodiment as an example, when Core11, Core12, and Core21 are in an idle state, the first physical core can be any one of Core11, Core12, and Core21.

[0178] "Currently in an idle state" can mean that none of the physical cores or logical cores are running any tasks. Alternatively, "currently in an idle state" can also mean that at least one of the physical cores or logical cores is not running any tasks. For example, taking Core11 as an example, Core11 is in an idle state if neither logical core 111 nor logical core 112 is running any tasks. Alternatively, Core11 is in an idle state if logical core 111 is running a task and logical core 112 is not running a task, or if logical core 112 is running a task and logical core 111 is not running a task.

[0179] In the third example, the first physical core can also be the first physical core among multiple physical cores that needs to be assigned a task. For example, if scheduler 210 assigns tasks in the order of Core11→Core12→Core21→Core22, and scheduler 210 assigns a task to Core11, then Core11 is the first physical core. Accordingly, after scheduler 210 completes the task assignment for Core11, the first physical core changes from Core11 to Core12.

[0180] The three examples above are merely different options for the first physical core. In other embodiments, the first physical core may have other options. For example, if a task group or task is associated with a corresponding physical core, the first physical core may also be the physical core corresponding to the task / task group currently to be scheduled. This application does not limit this aspect.

[0181] In other alternative implementations, the first physical core can also be the physical core where the logical core of the task to be scheduled is located. For example, the scheduler 210 can also select the first logical core from the logical cores of multiple tasks to be scheduled, and use the physical core where the first logical core is located as the first physical core.

[0182] The following is combined Figures 6 to 10 The process of scheduling tasks by scheduler 210 is illustrated by way of example.

[0183] Please see Figure 6 , Figure 6 This is a flowchart illustrating a task scheduling method provided in an embodiment of this application. The task scheduling method includes steps S610 to S640.

[0184] S610, scheduler 210 obtains the scheduling table.

[0185] In the first alternative implementation, scheduler 210 can read the stored scheduling table.

[0186] In the second alternative approach, scheduler 210 can also perform the above. Figure 5 The provided embodiment obtains the scheduling table.

[0187] In a third optional implementation, scheduler 210 can also read a stored initial scheduling table. The number of tasks in the task pool is compared with the number of tasks in the scheduling table. If the number of tasks in the task pool matches the number of tasks in the scheduling table, scheduler 210 uses this initial scheduling table as the scheduling table. If the number of tasks in the task pool does not match the number of tasks in the scheduling table, scheduler 210 executes the above... Figure 5 Get the scheduling table.

[0188] The initial scheduling table can be a scheduling table generated by the scheduler 210 in the previous task scheduling, or the latest scheduling table stored in the computer system 200.

[0189] The three optional implementation methods mentioned above are only different ways for the scheduler 210 to obtain the scheduling table. In other embodiments, the scheduler 210 may also use other implementation methods to obtain the scheduling table, and this application embodiment does not limit this.

[0190] S620, for the first physical core among multiple physical cores, the scheduler 210 determines the first task group that matches the first physical core from multiple task groups according to the scheduling table.

[0191] The following is an exemplary description of how the scheduler 210 determines the first task group.

[0192] In one alternative implementation, the scheduler 210 may select the task group with the highest performance index as the first task group to match the first physical core, according to the performance index of each task group in the scheduling table.

[0193] In the first alternative example, no tasks are running on the first physical core. Scheduler 210 selects the task group with the highest performance index from multiple task groups according to the scheduling table as the first task group to match the first physical core.

[0194] For example, taking the tasks to be executed in computer system 200 as including: task 0, task 1, task 2 and task 3, the first physical core is the aforementioned Core11. If element G3 in the scheduling table has the highest performance index, the scheduler 210 will use element G3 as the first task group matched with Core11.

[0195] In the second alternative example, a task is running on the first physical core. The scheduler 210, based on the task running on the first physical core, retrieves multiple candidate task groups containing that task from multiple task groups. The candidate task group with the highest performance metric among the multiple candidate task groups is selected as the first task group matched with the first physical core.

[0196] For example, taking the tasks to be executed in computer system 200 as including: Task 0, Task 1, Task 2, and Task 3, and the first physical core being Core 11, if Core 11 is running Task 1, the scheduler 210 considers elements G5, G2, G6, and G7, which contain Task 1, as multiple candidate task groups. If element G2 has the highest performance, the scheduler 210 selects element G2 as the first task group matching Core 11.

[0197] The two optional examples described above are merely illustrative examples of how scheduler 210 determines the first task group based on performance metrics. In another optional implementation, scheduler 210 can also use other methods to determine the first task group. For example, scheduler 210 can also refer to the following... Figure 8 The provided embodiments determine the first task group. For example, scheduler 210 may also refer to the following... Figure 10 The provided embodiments determine a first task group. This application does not limit this approach.

[0198] S630, the scheduler 210 determines the cache partition of each task in the first private cache based on the cache partition ratio information of each task in the first task group, and sends the first instruction to the first physical core.

[0199] In an alternative approach, the first instruction may also be referred to as an instruction, a task execution instruction, a task scheduling instruction, or other names, and the embodiments of this application do not limit this.

[0200] In some alternative embodiments, the first instruction is used to instruct the first logical core among the plurality of logical cores of the first physical core to execute the first task in the first task group based on the data stored in the first cache partition. Corresponding to the processing procedure of S630, the first physical core responds to the first instruction and controls the first logical core among the plurality of logical cores to execute the first task in the first task group based on the data stored in the first cache partition (S640).

[0201] The first cache partition is the cache partition in the first private cache corresponding to the first task. The first logical core is the logical core of the task currently to be scheduled in the first physical core. The corresponding first task can be the task in the first task group that currently needs to be allocated a logical core, or the first task can be any task in the first task group, or the first task can also be a task in the first task group that is specified to be run by the first logical core.

[0202] For example, taking Core11 as the first physical core, neither logical core 111 nor logical core 112 is running any tasks. When the first task group is element G3, the first logical core is either logical core 111 or logical core 112, and the first task is either task 0 or task 2. When scheduler 210 schedules the first task (task 0) to the first logical core (logical core 111), the first logical core switches from logical core 111 to logical core 112, and the corresponding first task switches from task 0 to task 2. Scheduler 210 then schedules task 1 to logical core 112.

[0203] For example, if the first physical core is Core11, and logical core 111 is running task 1 while logical core 112 is not running any tasks, then the first logical core is logical core 112. In the case where the first task group is element G2, the first task is task 0.

[0204] In one alternative implementation, the first instruction may include a task identifier. The first physical core responds to the first instruction by randomly assigning tasks from the first task group to logical cores on the first physical core.

[0205] In one alternative implementation, the first instruction may include one or more task identifiers.

[0206] In a first optional example, scheduler 210 sends one or more first instructions to the first logical core. Each first instruction includes a task identifier. This first instruction instructs the first physical core to allocate a task to one logical core. The number of first instructions sent by scheduler 210 is related to the number of logical cores with scheduled tasks in the first physical core. For example, if the first physical core has two logical cores with scheduled tasks, scheduler 210 sends two first instructions to the first physical core. Or, if the first physical core has one logical core with one scheduled task, scheduler 210 sends one first instruction to the first physical core.

[0207] In a second alternative example, scheduler 210 sends a first instruction to the first logical core, the first instruction including one or more task identifiers. The number of task identifiers included in the first instruction is related to the number of logical cores containing the tasks to be scheduled in the first physical core. For example, if the first physical core contains two logical cores containing tasks to be scheduled, the first instruction includes two task identifiers. Or, if the first physical core contains one logical core containing one task to be scheduled, the first instruction includes one task identifier.

[0208] In another alternative implementation, the first instruction may include a task identifier and a logical core identifier corresponding to each task. The first physical core responds to the first instruction by assigning each task to the corresponding logical core according to the logical core identifier.

[0209] Similar to the first instruction mentioned above, which includes one or more task identifiers, the first instruction also includes one or more logical core identifiers.

[0210] In a first alternative example, scheduler 210 sends one or more first instructions to the first logical core. The first instruction includes a task identifier and a corresponding logical core identifier. This first instruction instructs the first physical core to assign the task corresponding to the task identifier to the logical core corresponding to the logical core identifier.

[0211] In the second alternative example, the scheduler 210 sends a first instruction to the first logical core, the first instruction including at least one task identifier and at least one logical core identifier, the task identifier and the logical core identifier corresponding one-to-one.

[0212] The two optional implementation methods mentioned above are only different ways for the scheduler 210 to send the first instruction. In other embodiments, the scheduler 210 may also use other implementation methods to send the first instruction, and this application embodiment does not limit this.

[0213] The following is an exemplary description of how the scheduler 210 determines the cache partitions of each task in the first private cache based on the cache partition ratio information of each task in the first task group.

[0214] In one alternative implementation, "the cache partitions of each task in the first private cache" can refer to the cache capacity in the first private cache that the logical cores running each task can access during the execution of the corresponding task.

[0215] In another alternative implementation, "the cache partitions of each task in the first private cache" can also refer to the cache capacity and cache bandwidth occupied by the logical cores running each task during the execution of the corresponding task.

[0216] In some optional implementations, the scheduler 210 may invoke a partitioning tool to determine the cache partitions for each task in the first private cache according to the cache partition ratio information of each task in the first task group. This application embodiment does not limit the specific type of partitioning tool; for example, the partitioning tool may be a memory system resource partitioning and monitoring (MPAM) tool.

[0217] In one alternative implementation, the cache partitions of each task in the first private cache are isolated from each other, meaning that the first cache partition does not support access from other logical cores besides the first logical core.

[0218] Taking Core 11 as the first physical core as an example, Core 11's first private cache includes L1 cache and L2 cache. With the first task group being G3, and task 0 and task 2 each allocating 50% of their L1 cache to this cache, and task 0 and task 2 allocating 30% and 70% of their L2 cache to this cache respectively, as follows: Figure 7 As shown in Figure (a), during the execution of task 0, logical core 111 uses the first 50% of the L1 cache and the first 30% of the L2 cache. During the execution of task 2, logical core 112 uses the remaining 50% of the L1 cache and the remaining 70% of the L2 cache.

[0219] In one alternative implementation, after the first physical core has completed executing the first task group or any task within the first task group, the scheduler 210 can select a second task group from the remaining task groups that matches the first physical core and schedule the second task group to the first physical core. The scheduler 210 then repartitions the first private cache of the first physical core according to the cache partitioning ratio information of each task in the second task group.

[0220] For example, taking Core11 as the first physical core, such as... Figure 7 As shown, when Core11 runs Task 0 and Task 2, logical core 111 uses the first 50% of the L1 cache and the first 30% of the L2 cache during Task 0. Logical core 112 uses the last 50% of the L1 cache and the last 70% of the L2 cache during Task 2.

[0221] After Core 11 runs tasks 0 and 2, scheduler 210 assigns element G7 as the second task group and schedules it onto Core 11. When tasks 1 and 3 in the second task group each have a 50% L2 cache partitioning ratio, and tasks 1 and 3 have 70% and 30% L1 cache partitioning ratios respectively, the partitioning method of the first private cache in Core 11 is as described above. Figure 7 (a) in the middle is switched to Figure 7 In Figure (b), during the execution of Task 1, logical core 111 uses the first 50% of the L2 cache and the first 70% of the L1 cache. During the execution of Task 3, logical core 112 uses the remaining 50% of the L2 cache and the remaining 30% of the L1 cache.

[0222] based on Figure 6 In the provided embodiment, during the scheduling of tasks within a task group to the same physical core, the scheduler 210 uses a scheduling table to determine the cache partition ratio information of each task in the task group, and then determines the cache partition of each task in the private cache based on the cache partition ratio information of each task. This allows the logical cores on the physical core used to execute the corresponding tasks to access the corresponding cache partitions, avoiding contention for the private cache among different logical cores on the same physical core, thereby improving the multi-task concurrent execution capability of the physical core. Furthermore, the scheduling table is used to dynamically adjust the private cache usage of each logical core on the same physical core.

[0223] The above Figures 4 to 7 The task scheduling method provided in this application is described with scheduler 210 as the execution entity. In some optional implementations, the task scheduling method provided in this application embodiment can also be executed by other computing devices. For example, the computing device may include, but is not limited to: virtual computing nodes, distributed computing devices, centralized computing devices, distributed storage devices, centralized storage devices, servers, SoCs, resource pools with computing functions, storage servers, or other nodes or clusters that can execute the task scheduling method provided in this application embodiment.

[0224] In one alternative implementation, in order to ensure the rationality of task scheduling, the scheduler 210 can obtain the priority of each task and select the first task group that matches the first physical core from multiple task groups based on the priority of each task in the task group and the performance index of the task group.

[0225] In this context, task priority determines when a task runs. In some optional methods, a smaller priority value indicates a higher task priority, and the scheduler 210 schedules the task earlier. In other optional methods, a larger priority value indicates a higher task priority, and the scheduler 210 schedules the task earlier. This application embodiment does not limit the correspondence between priority values ​​and priorities. The following explanation uses the example of a smaller priority value indicating a higher task priority.

[0226] The following two specific examples illustrate task prioritization.

[0227] In the first alternative example, during task scheduling by scheduler 210 using the Completely Fair Scheduling (CFS) algorithm, task priority is related to the task's virtual runtime. The shorter the virtual runtime of a task, the higher its priority.

[0228] In some methods, virtual runtime may also be referred to as weighted runtime or other names, and this application does not limit this to specific methods.

[0229] The CFS scheduling algorithm sets a virtual clock for each task in the run queue to record the virtual runtime (vruntime), which is the time the task has been running.

[0230] In the second alternative example, the priority of the task can also be related to the SLA (Service Level Agreement).

[0231] The two optional examples above are only alternative ways to determine the priority of tasks. In other embodiments, the scheduler 210 may also use other implementation methods to determine the priority of tasks. This application embodiment does not limit this.

[0232] The following is combined Figures 8 to 10 An example is provided to illustrate how the scheduler 210 uses priority and performance metrics to determine the first task group.

[0233] In one alternative implementation, if there is a logical core in the first physical core that is running a task, the scheduler 210 can select a first task group that includes the tasks running in the first physical core based on the task priority and performance indicators.

[0234] like Figure 8 As shown, Figure 8 The flowchart for determining the first task group provided in this application Figure 1 The process for identifying the first task group includes steps S821A to S822A.

[0235] S821A, when a second task is running in the second logical core of the first physical core, the scheduler 210 obtains one or more first candidate task groups from multiple task groups according to the scheduling table.

[0236] Each first candidate task group includes a third task; the second logical core is the logical core of the task currently running in the first physical core.

[0237] In one alternative implementation, if a second logical core exists on the first physical core, the scheduler 210 can query the scheduling table based on the second task running on the second logical core to obtain one or more first candidate task groups containing the second task.

[0238] For example, taking Core11 as the first physical core, if task 1 is running on logical core 111, logical core 111 acts as the second logical core, and task 1 becomes the second task. Scheduler 210, from the above... Figure 4 The first candidate task group containing task 1 is obtained from the provided scheduling table: element G5, element G2, element G6, and element G7.

[0239] In one alternative implementation, after determining the first physical core, the scheduler 210 may query the running status of each logical core in the first physical core. If the scheduler determines that there is a second logical core in the first physical core based on the running status of each logical core in the first physical core, the scheduler 210 may obtain the second task that the second logical core is running.

[0240] The running status is used to indicate whether the logical core is running a task.

[0241] In an optional example, scheduler 210 can query the logs of the first physical core to obtain the running status of each logical core in the first physical core.

[0242] In another alternative example, scheduler 210 may also obtain the logical core corresponding to each of the multiple tasks running in computer system 200. If the logical core corresponding to each task in the multiple tasks includes a logical core on the first physical core, scheduler 210 determines that a second logical core exists in the first physical core.

[0243] The two examples above illustrate how the scheduler 210 obtains the second task that is running on the second logical core by querying whether the second logical core exists in the first physical core. In other embodiments, the scheduler 210 may also use other implementation methods to determine the second logical core, and this application does not limit this.

[0244] S822A, scheduler 210 determines the first candidate task group that meets the first requirement from one or more first candidate task groups as the first task group.

[0245] The first requirement includes: a performance metric threshold or a task priority. The performance metric threshold can be the maximum value among the performance metrics of multiple first-candidate task groups.

[0246] In the first alternative implementation, the first requirement includes a performance metric threshold. Scheduler 210 can refer to S620 above to determine the first candidate task group whose performance metric is greater than the performance metric threshold as the first task group.

[0247] In the second alternative implementation, the first requirement includes task priority. For each first candidate task group, the scheduler 210 obtains the task group priority value of the first candidate task group based on the priority value of each task in the first candidate task group. The first candidate task group with the lowest priority value is determined as the first task group.

[0248] For example, with Figure 9 Here's an example of the priority of the tasks provided. Figure 9 This application provides a priority diagram for multiple tasks. The tasks to be run in the computing device include task X, task Y, task Z, task C, task A, task 0, task 2, and task 3. The priority values ​​are: task X = 70, task Y = 60, task Z = 40, task C = 30, task A = 27, task 0 = 2, task 2 = 7, and task 3 = 19.

[0249] Task 0 has a priority value of 2, Task 2 has a priority value of 7, and Task 3 has a priority value of 19. When the first candidate task group includes elements G2, G6, and G7, the task group priority value for element G2 is 2, the task group priority value for element G6 is 7, and the task group priority value for element G7 is 19. Therefore, scheduler 210 determines element G2 as the first task group.

[0250] In the third optional implementation, the first requirement includes a performance metric threshold and task priority. Scheduler 210 obtains the task group priority value of the first candidate task group, and determines the first candidate task group whose task group priority value is less than the task group priority threshold and whose performance metric is greater than the performance metric threshold as the first task group.

[0251] For example, with the above Figure 9Taking the example of the provided task priority, when the task group priority threshold is 10, the scheduler 210 selects element G2, whose performance index is greater than the performance index threshold, as the first task group from elements G2 and G6.

[0252] Of the three optional implementation methods described above, these are merely different ways for the scheduler 210 to select the first task group. In other embodiments, the scheduler 210 may also use other implementation methods to select the first task group. For example, the scheduler 210 may obtain the task group priority value of each first candidate task group, perform weighted processing based on the task group priority value and performance indicators of each first candidate task group to obtain a coefficient, and determine the first candidate task group with the largest coefficient as the first task group. Alternatively, the scheduler 210 may predict the probability value of each first candidate task group as the first task group based on the task group priority value and performance indicators of each first candidate task group, and determine the first candidate task group with the largest probability value as the first task group. This application does not limit this approach.

[0253] based on Figure 8 In the provided embodiment, when a second task is running on a second logical core within a first physical core, the scheduler 210 selects one or more first candidate task groups containing the second task from the scheduling table, and determines the priority of the one or more first candidate task groups based on the task's priority. First candidate task groups whose priority and performance indicators meet a first requirement are determined as first task groups. This ensures that scheduling the selected first task group to the first physical core improves the operating performance of the first physical core, thereby increasing the operating efficiency of the physical core.

[0254] The above Figure 8 This explanation uses the example of scheduler 210 selecting a first candidate task group containing the second task from the scheduling table. In another embodiment, scheduler 210 can also select multiple candidate tasks with priority values ​​less than or equal to a preset priority threshold based on task priority. Each candidate task is then combined with the second task to form multiple first candidate task groups. Scheduler 210 obtains the performance indicators of each first candidate task group according to the scheduling table and determines the first candidate task group with the performance indicators as the first task group. Thus, when the number of tasks to be executed in computer system 200 is large, scheduler 210 filters by task priority, retaining multiple candidate tasks with priority values ​​less than or equal to the preset priority threshold. This reduces the number of first candidate task groups, thereby shortening task scheduling time and improving task scheduling efficiency.

[0255] In addition, in some alternative implementations, if no second task is running in the first physical core, the scheduler 210 may also use other implementations to determine the first task group.

[0256] The following is combined Figure 10 The method for determining the first task group in the case where there is no logical core in the first physical core that is running a task is illustrated by an example.

[0257] Please see Figure 10 , Figure 10 The flowchart for determining the first task group provided in this application Figure 2 In contrast Figure 8 The provided embodiments, in Figure 10 The process of determining the first task group also includes steps S821B to S822B. After determining whether a second task is running in the first physical core, scheduler 210 executes steps S821B to S822B to determine the first task group. Specifically:

[0258] S821B, when no second task is running in the first physical core, obtains one or more second candidate task groups from multiple task groups based on the scheduling table and the priority of each task in the multiple tasks.

[0259] In one alternative implementation, the scheduler 210 can obtain the priorities of multiple tasks, filter the multiple tasks based on their priorities, and form multiple candidate tasks. The multiple candidate tasks are then arranged and combined to form one or more second candidate task groups. Each second candidate task group includes at least one of the multiple candidate tasks.

[0260] In another alternative implementation, scheduler 210 may also query a scheduling table to obtain one or more second candidate task groups after obtaining multiple candidate tasks.

[0261] S822B, determines the first task group from one or more second candidate task groups that meet the second requirement.

[0262] The second requirement includes: performance indicator thresholds.

[0263] In one alternative implementation, scheduler 210 may identify a second candidate task group whose performance metric is greater than a performance metric threshold as the first task group.

[0264] In one alternative approach, when multiple candidate task groups exist with performance metrics exceeding a performance metric threshold, the candidate task group with the highest performance metric among these groups can be designated as the first task group. Alternatively, the candidate task group with the lowest priority value among these groups can be designated as the first task group.

[0265] based on Figure 10 In the provided embodiment, when no second task is running on the first physical core, the scheduler 210 selects multiple second candidate task groups that meet the priority from the scheduling table, and determines the second candidate task groups that meet the second performance requirements as the first task group. This ensures that scheduling the selected first task group to the first physical core improves the operating performance of the first physical core, thereby increasing the operating efficiency of the physical core.

[0266] The above Figure 10 The following explanation uses the example of scheduler 210 directly querying the scheduling table. In other embodiments, scheduler 210 may also, after obtaining multiple candidate tasks and forming one or more second candidate task groups, refer to the above-described... Figure 5 The provided embodiment obtains the performance index of each second candidate task group, and selects the second candidate task group with the largest performance index as the first task group based on the performance index of multiple second candidate task groups.

[0267] In one alternative implementation, after determining the first task group, the scheduler 210 can modify the priority of each task in the first task group to ensure that the scheduler 210 can schedule the first task group to the first physical core, so that one or more tasks in the first task group are scheduled to the first physical core, thus ensuring the accuracy of task scheduling.

[0268] The following example illustrates how scheduler 210 modifies the implementation of the priority of each task in the first task group.

[0269] In one alternative implementation, scheduler 210 may reduce the priority value of each task in the first task group to increase the priority of each task in the first task group. For example, scheduler 210 may reduce the virtual runtime of each task in the first task group.

[0270] In a first alternative example, scheduler 210 may reduce the priority value of each task in the first task group to a preset value.

[0271] The embodiments of this application do not limit the specific value of the preset value.

[0272] For example, taking the first task group as an example, which includes Task 1 and Task 2, the second logical core of the first physical core runs Task 1, as described above. Figure 9 It can be seen that the priority value of task 2 is 7. In order to ensure that task 2 can be scheduled to the first logical core, the scheduler 210 adjusts the priority value of task 2 from 7 to the preset value 1.

[0273] For example, taking the first task group as an example, which includes Task 0 and Task 2, no tasks are running on the first physical core. From the above... Figure 9It is known that the priority value of task 2 is 7 and the priority value of task 0 is 2. In order to ensure that task 2 and task 0 can be scheduled to the first physical core, the scheduler 210 reduces the priority value of task 2 from 7 to the preset value of 1.

[0274] In a second alternative example, scheduler 210 can reduce the priority value of each task by a priority change value.

[0275] The priority change value indicates the amount by which the priority value of a task needs to be reduced.

[0276] In one alternative approach, the priority change value is correlated with the performance metrics of the task group.

[0277] For example, if a second task is running in the first physical core, the scheduler 210 can determine the priority change value of each first candidate task group by referring to the performance indicators of the aforementioned first candidate task groups. The scheduler 210 then reduces the priority value of the tasks to be scheduled in each first candidate task group according to the priority change value. The priority change value of a first candidate task group is positively correlated with its performance indicator; that is, the higher the performance indicator of a first candidate task group, the greater its corresponding priority change value. This ensures that tasks in the first task groups among multiple first candidate task groups can have lower priority values.

[0278] For example, if no second task is running in the first physical core, the scheduler 210 can determine the priority change value of each second candidate task group by referring to the performance indicators of each second candidate task group. The scheduler 210 reduces the priority value of the tasks to be scheduled in each second candidate task group according to the priority change value. The priority change value of a second candidate task group is positively correlated with its performance indicator; that is, the higher the performance indicator of a second candidate task group, the greater its corresponding priority change value. This ensures that tasks in the first task group among multiple second candidate task groups have lower priority values.

[0279] The two optional examples described above are only implementations of the scheduler 210 reducing the different priorities of tasks in the first task group. In other optional implementations, the scheduler 210 may also use other methods to reduce the priorities of tasks in the first task group, which are not limited in this embodiment.

[0280] Furthermore, the two examples described above illustrate how scheduler 210 reduces the priority of each task in the first task group. In other embodiments, scheduler 210 may also increase the priority of each task in the first task group to ensure that one or more tasks in the first task group are scheduled to the first physical core, thereby ensuring the accuracy of task scheduling.

[0281] In one alternative implementation, after determining the first task group, the scheduler 210 refers to the above-described S630 to divide the first physical core into cache partitions for each logical core in the first physical core when executing the corresponding task, and schedules the first task group to the first physical core.

[0282] To achieve the functions described in the above implementation examples, the scheduler 210 includes hardware structures and / or software modules corresponding to the execution of each function. Those skilled in the art should readily recognize that, based on the units and method steps of the various examples described in conjunction with the embodiments disclosed in this application, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in hardware or by computer software driving hardware depends on the specific application scenario and design constraints of the technical solution.

[0283] The above Figures 2 to 10 This application provides a detailed description of the computer system 200, task scheduling method, and scheduler 210 for executing task scheduling. After enabling hyper-threading, scheduler 210 forms a scheduling table based on task groups of multiple tasks under different modes and the cache partition ratio information of each task in each task group. During the process of scheduling multiple tasks to the same physical core, scheduler 210 determines the first task group matching the first physical core based on the scheduling table, and partitions the first private cache of the first physical core based on the cache partition ratio information of each task in the first task group. This ensures that the same physical core does not compete for private cache resources when running different tasks simultaneously. Furthermore, scheduler 210 dynamically partitions the cache based on the task groups that need to be executed on the same physical core, increasing the flexibility and real-time performance of private cache partitioning. Moreover, in cache partitioning, scheduler 210 combines the capacity and size of the private cache to improve the reliability of cache partitioning. In addition, the partitioning of the private cache during hyper-threading scheduling by scheduler 210 can improve the overall performance of SMT scheduling.

[0284] In an alternative approach, the scheduler 210 described above can be implemented via a software module or via a hardware architecture.

[0285] For example, taking the scheduler 210 implemented through a software module as an example, such as Figure 11 As shown, Figure 11 Schematic diagram of the scheduler 210 provided in this application Figure 1 The scheduler 210 shown includes a communication module 2011, a processing module 2012, and a storage module 2013.

[0286] The storage module 2013 provides a scheduling table to the processing module 2013. This scheduling table includes: multiple task groups determined according to different combination methods, performance metrics for each task group, and cache partitioning information for each task in the same physical core's private cache; one combination method corresponds to one task group.

[0287] The processing module 2012 is used to determine the first task group that matches the first physical core from multiple task groups based on the scheduling table for the first physical core among multiple physical cores, and to determine the cache partition of each task in the first private cache based on the cache partition ratio information of each task in the first task group.

[0288] Among them, the first private cache is the private cache corresponding to the first physical core among multiple private caches, and multiple logical cores run in the first physical core;

[0289] The communication module 2011 is used to send instructions to the first physical core.

[0290] The communication module 2011, processing module 2012, and storage module 2013 can be implemented in software or in hardware. For example, the implementation of processing module 2012 will be described below. Similarly, the implementation of communication module 2011 and storage module 2013 can refer to the implementation of processing module 2012.

[0291] As an example of a software functional unit, the processing module 2012 may include code running on a computing instance. The computing instance may include at least one of a physical host (computing device), a virtual machine, or a container. Further, the computing instance may be one or more. For example, the processing module 2012 may include code running on multiple hosts / virtual machines / containers. It should be noted that the multiple hosts / virtual machines / containers used to run the code may be distributed in the same region or in different regions. Further, the multiple hosts / virtual machines / containers used to run the code may be distributed in the same availability zone (AZ) or in different AZs, each AZ including one or more geographically proximate data centers. Typically, a region may include multiple AZs.

[0292] Similarly, multiple hosts / virtual machines / containers used to run this code can be distributed within the same Virtual Private Cloud (VPC) or across multiple VPCs. Typically, a VPC is set up within a region. Communication between two VPCs within the same region, as well as between VPCs in different regions, requires a communication gateway to be set up within each VPC to enable interconnection between VPCs.

[0293] As an example of a hardware functional unit, the processing module 2012 may include at least one computing device, such as a server. Alternatively, the processing module 2012 may also be a device implemented using an application-specific integrated circuit (ASIC) or a programmable logic device (PLD). The PLD may be implemented using a complex programmable logical device (CPLD), a field-programmable gate array (FPGA), generic array logic (GAL), or any combination thereof.

[0294] The processing module 2012 includes multiple computing devices that can be distributed within the same region or in different regions. Similarly, the communication module 2011 includes multiple computing devices that can be distributed within the same Availability Zone (AZ) or in different AZs. Likewise, the processing module 2012 includes multiple computing devices that can be distributed within the same Virtual Private Cloud (VPC) or in multiple VPCs. These multiple computing devices can be any combination of computing devices such as servers, ASICs, PLDs, CPLDs, FPGAs, and GALs.

[0295] It should be noted that, in other embodiments, the processing module 2012 can be used to execute any step in the task scheduling method. The communication module 2011 can be used to execute any step in the task scheduling method. The storage module 2013 can be used to execute any step in the task scheduling method. The communication module 2011, processing module 2012, and storage module 2013 can all be used to execute any step in the task scheduling method. The steps implemented by the communication module 2011, processing module 2012, and storage module 2013 can be specified as needed. By implementing different steps in the task scheduling method through the communication module 2011, processing module 2012, and storage module 2013, all the functions of the scheduler 210 can be realized.

[0296] For example, taking the scheduler 210 implemented in hardware as an example, the scheduler 210 may include a control circuit and an interface circuit. The interface circuit is used to receive data from other devices besides the storage controller and transmit it to the control circuit, or to send data from the control circuit to other devices besides the storage controller. For example, the interface circuit performs the above... Figure 6 S610 retrieves the scheduling table, and S630 sends the first instruction to the first physical core. The control circuit executes the functions of the scheduler 210 in the aforementioned task scheduling method through logic circuits or executed code instructions and interface circuits, such as executing the above-mentioned... Figure 6 The S620 and S630 in it.

[0297] This application also provides a computing device for performing the above-described task scheduling method, such as... Figure 12 As shown, the computing device 16 includes a bus 162, a processor 164, a memory 166, and a communication interface 168. The processor 164, the memory 166, and the communication interface 168 communicate with each other via the bus 162. The computing device 16 can be a server or a terminal device. It should be understood that this application does not limit the number of processors 164 and memory 166 in the computing device 16.

[0298] Bus 162 can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. Buses can be divided into address buses, data buses, control buses, etc. For ease of representation, Figure 12 The bus 162 may be represented by a single line, but this does not mean that there is only one bus or one type of bus. The bus 162 may include a path for transmitting information between various components of the computing device 16 (e.g., memory 166, processor 164, communication interface 168).

[0299] Processor 164 may include any one or more processors such as a central processing unit (CPU), a graphics processing unit (GPU), a microprocessor (MP), or a digital signal processor (DSP).

[0300] In this application, processor 164 can perform the above-mentioned... Figure 8The provided task scheduling method involves, for example, obtaining a scheduling table and determining a first task group that matches the first physical core from among multiple task groups. This scheduling table provides cache partition ratio information for each task within the private cache corresponding to the same physical core. Using this cache partition ratio information, the cache partitions for each task in the first private cache corresponding to the first physical core are determined, and instructions are sent to the first physical core to cause it to execute the tasks in the first task group.

[0301] Memory 166 may include volatile memory, such as random access memory (RAM). Processor 164 may also include non-volatile memory, such as read-only memory (ROM), flash memory, hard disk drive (HDD), or solid state drive (SSD).

[0302] The memory 166 stores executable program code, and the processor 164 executes the executable program code to implement the functions of the aforementioned communication module 2011, processing module 2012, and storage module 2013, thereby implementing the task scheduling method. That is, the memory 166 stores instructions for executing the task scheduling method.

[0303] The communication interface 168 uses transceiver modules, such as, but not limited to, network interface cards and transceivers, to enable communication between the computing device 16 and other devices or communication networks.

[0304] The task scheduling method disclosed in the above embodiments can be applied to processor 164, or implemented by processor 164. Processor 164 can be an integrated circuit chip with signal processing capabilities.

[0305] In the implementation process, each step of the above method can be completed by the integrated logic circuit of the hardware in the processor 164 or by instructions in the form of software. The processor 164 can be a general-purpose processor, including a CPU, a network processor (NP), etc.; it can also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete vacuum tubes or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the method disclosed in the embodiments of this application can be directly embodied in the execution of the hardware decoding processor, or the execution can be completed by a combination of hardware and software modules in the decoding processor. The software modules can be located in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. The storage medium is located in memory 166, and the processor 164 reads the information in memory 166 and completes the steps of the above method in combination with its hardware.

[0306] In one possible implementation, the processor 164 can also be used to execute a task scheduling method. For specific implementation, please refer to the embodiments provided by the task scheduling method described above. The embodiments of this application will not be repeated here.

[0307] In this embodiment, the chip system may be composed of chips, or it may include chips and other discrete devices. The structure of the chip is similar to that described above. Figure 3 The CPUs (CPU1 or CPU2) provided in the application have similar structures, and will not be described in detail here. After scheduling a task, any physical core in the chip (e.g., the first physical core mentioned above) can allocate a corresponding cache partition based on the cache partition ratio information of each task, and in response to the first instruction of the scheduler 210 mentioned above, control any one of the multiple logical cores on the physical core (e.g., the first logical core mentioned above) to access the corresponding cache partition to execute the corresponding task, for example, to execute S640 mentioned above.

[0308] The method steps in this embodiment can be implemented in hardware or by a processor executing software instructions. The software instructions can consist of corresponding software modules, which can be stored in random access memory (RAM), flash memory, read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), registers, hard disks, portable hard disks, CD-ROMs, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor, enabling the processor to read information from and write information to the storage medium. Of course, the storage medium can also be a component of the processor. The processor and storage medium can reside in an ASIC. Alternatively, the ASIC can reside in computing device 16. Of course, the processor and storage medium can also exist as discrete components in a network device or terminal device.

[0309] This application also provides a computer program product containing instructions. The computer program product may be software or program products containing instructions, capable of running on a computing device 16 or stored on any available medium. When the computer program product runs on at least one computing device 16, it causes the at least one computing device 16 to perform the task scheduling method described above.

[0310] For example, when a computer program product is run on at least one computing device 16, it causes at least one computing device 16 to perform... Figure 6 The task scheduling method shown.

[0311] This application also provides a computer-readable storage medium. All or part of the processes in the above method embodiments can be implemented by a computer program instructing related hardware. This program can be stored in the computer-readable storage medium, and when executed, it can include the processes of the above method embodiments. The computer-readable storage medium can be a terminal of any of the foregoing embodiments, such as an internal storage unit including a data transmission end and / or a data receiving end, like a hard disk or memory of the terminal. The computer-readable storage medium can also be an external storage device of the terminal, such as a plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, etc., equipped on the terminal. Further, the computer-readable storage medium can include both the internal storage unit and the external storage device of the terminal. The computer-readable storage medium is used to store the computer program and other programs and data required by the terminal. The computer-readable storage medium can also be used to temporarily store data that has been output or will be output.

[0312] In the above embodiments, implementation can be achieved entirely or partially through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented entirely or partially in the form of a computer program product. A computer program product includes one or more computer programs or instructions. When a computer program or instruction is loaded and executed on a computer, the processes or functions of the embodiments of this application are performed entirely or partially. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a network device, a user equipment, or other programmable device. The computer program or instructions can be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another. For example, a computer program or instructions can be transferred from one website, computer, server, or data center to another website, computer, server, or data center via wired or wireless means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium, such as a floppy disk, hard disk, or magnetic tape; it can also be an optical medium, such as a digital video disc (DVD); or it can be a semiconductor medium, such as a solid-state drive (SSD).

[0313] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A task scheduling method, characterized in that, The method is applied to a chip, which includes multiple physical cores and a cache, the cache including multiple private caches, and one of the multiple physical cores corresponds to one of the multiple private caches. Different logical cores running within a single physical core are used to perform different tasks; The method includes: Obtain a scheduling table for multiple tasks; wherein the scheduling table includes: multiple task groups determined according to different combination methods, performance indicators of each task group in the multiple task groups, and cache partition ratio information of each task in the task group in the private cache corresponding to the same physical core; one combination method corresponds to one task group; For the first physical core among the plurality of physical cores, a first task group matching the first physical core is determined from the plurality of task groups according to the scheduling table; The cache partition of each task in the first private cache is determined based on the cache partition ratio information of each task in the first task group, and an instruction is sent to the first physical core; Wherein, the first private cache is the private cache corresponding to the first physical core among the plurality of private caches, and the first physical core runs multiple logical cores; The instruction is used to instruct that: the first logical core among the plurality of logical cores executes the first task in the first task group according to the data stored in the first cache partition; the first cache partition is the cache partition in the first private cache corresponding to the first task.

2. The method according to claim 1, characterized in that, The scheduling table is created based on the performance metrics of the multiple tasks under different combinations; the performance metrics include one or more of the following: instructions per cycle (IPC), input / output operations per second (IOPS), and response time.

3. The method according to claim 2, characterized in that, The method further includes: Each of the multiple task groups comprises the same number of tasks; A preset number of tasks are selected from the plurality of tasks according to different combination methods to form the plurality of task groups; For each of the multiple task groups, obtain multiple candidate cache partition ratio parameters for each task group, as well as the performance indicators of each task group under different candidate cache partition ratio parameters; the candidate cache partition ratio parameters include the candidate cache partition ratio information of each task in each task group; The candidate cache partition ratio parameter that meets the performance index requirements is determined as the cache partition ratio parameter for each task group; the cache partition ratio parameter is used to indicate the cache partition ratio information of each task in each task group; The scheduling table is formed based on each task group, the cache partition ratio parameter of each task group, and the corresponding performance indicators.

4. The method according to any one of claims 1 to 3, characterized in that, The method further includes: Receive the first task request; The scheduling table is updated according to the new task indicated by the first task request.

5. The method according to any one of claims 1 to 4, characterized in that, The step of determining the first task group matching the first physical core from the plurality of task groups according to the scheduling table includes: When a second task is running in the second logical core of the first physical core, one or more first candidate task groups are obtained from the plurality of task groups according to the scheduling table; each first candidate task group includes the second task; the second logical core is the logical core of the task currently running in the first physical core, and the first logical core is the logical core of the task to be scheduled in the first physical core; The first candidate task group that meets the first requirement among the one or more first candidate task groups is determined as the first task group; the first requirement includes: a performance index threshold or the priority of the task.

6. The method according to any one of claims 1 to 4, characterized in that, The step of determining the first task group matching the first physical core from the plurality of task groups according to the scheduling table includes: If no second task is running in the first physical core, one or more second candidate task groups are obtained from the multiple task groups according to the scheduling table and the priority of each task in the multiple tasks; The first task group is determined from the one or more second candidate task groups that meet the second requirement; the second requirement includes: a performance index threshold.

7. The method according to any one of claims 1 to 6, characterized in that, After obtaining the first task group matching the first physical core, the method further includes: Modify the priority of one or more tasks in the first task group so that one or more tasks in the first task group are scheduled to the first physical core.

8. The method according to any one of claims 1 to 7, characterized in that, The cache partition ratio information of each task in the private cache corresponding to the same physical core is determined based on one or two of the following: the cache capacity ratio and bandwidth ratio of each task in the private cache corresponding to the same physical core.

9. A chip, characterized in that, The chip includes multiple physical cores and a cache, the cache includes multiple private caches, and one of the multiple physical cores corresponds to one of the multiple private caches; Different logical cores running within a single physical core are used to perform different tasks; The first physical core among the plurality of physical cores is used to allocate cache partitions for each task in the first private cache based on the cache partition ratio information of each task in the first task group, and in response to an instruction, to control the first logical core among the plurality of logical cores to execute the first task in the first task group according to the data stored in the first cache partition; the first cache partition is the cache partition in the first private cache corresponding to the first task, and the first private cache is the private cache corresponding to the first physical core among the plurality of private caches.

10. A computing device, characterized in that, The computing device includes a processor and the chip as described in claim 9; The processor is used to obtain a scheduling table and, in conjunction with the chip, execute the method of any one of claims 1-8 according to the scheduling table; the scheduling table includes: multiple task groups determined according to different combination methods, performance indicators of each task group in the multiple task groups, and cache partition ratio information of each task in the same physical core in the private cache of each task group; one combination method corresponds to one task group.

11. A scheduler, characterized in that, The scheduler includes a storage module, a processing module, and a communication module; The storage module is used to provide a scheduling table to the processing module; The scheduling table includes: multiple task groups determined according to different combination methods, performance indicators of each task group in the multiple task groups, and cache partition ratio information of each task in the same physical core in the private cache of each task group; one combination method corresponds to one task group. The processing module is configured to, for the first physical core among the plurality of physical cores, determine the first task group matching the first physical core from the plurality of task groups according to the scheduling table, and determine the cache partition of each task in the first private cache according to the cache partition ratio information of each task in the first task group. Wherein, the first private cache is the private cache corresponding to the first physical core among the plurality of private caches, and the first physical core runs multiple logical cores; The communication module is used to send instructions to the first physical core; The instruction is used to instruct that: the first logical core among the plurality of logical cores executes the first task in the first task group according to the data stored in the first cache partition; the first cache partition is the cache partition in the first private cache corresponding to the first task.

12. A computer program product containing instructions, characterized in that, When the instructions are executed by the computing device, the computing device performs the method as described in any one of claims 1 to 8.

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