Frequency ratio measurement circuit and method based on an analog-to-digital converter and a phase-locked loop feedback

By using a frequency ratio measurement circuit based on an analog-to-digital converter and phase-locked loop feedback, the frequency ratio is directly measured and compensated using digital signals. This solves the problems of low frequency ratio measurement accuracy and temperature hysteresis in existing technologies, and achieves high-precision and stable frequency ratio measurement.

CN122339481APending Publication Date: 2026-07-03HUNAN UNIV +1
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
HUNAN UNIV
Filing Date
2026-04-08
Publication Date
2026-07-03

AI Technical Summary

Technical Problem

Existing frequency ratio measurement methods have low accuracy and suffer from temperature hysteresis, especially in environments with rapid temperature changes where compensation accuracy is limited. Traditional PLL-structured VCOs also exhibit nonlinearity and power supply noise sensitivity.

Method used

A frequency ratio measurement circuit based on analog-to-digital converter and phase-locked loop feedback is adopted, including a frequency and phase detector, a low-pass filter, a Sigma-Delta analog-to-digital converter and a frequency divider. Through a digital feedback closed-loop structure, the frequency ratio is directly measured and compensated using digital signals, replacing the VCO in the traditional PLL.

Benefits of technology

It achieves high-precision frequency ratio measurement, eliminates errors introduced by VCO, solves the temperature hysteresis problem, provides flexible compensation methods, and improves measurement accuracy and stability.

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Abstract

This invention discloses a frequency ratio measurement circuit and method based on analog-to-digital converter (ADC) and phase-locked loop (PLL) feedback. The frequency ratio measurement circuit based on ADC and PLL feedback includes: a frequency and phase detector (PFD) circuit, a low-pass filter (LPF) circuit, a Sigma-Delta ADC circuit, and a frequency divider circuit connected in sequence. When the PLL is locked, the digital signal output by the Sigma-Delta ADC circuit is the frequency ratio measurement result N between the measured frequency signal and the reference frequency signal.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor integrated circuit technology, and more specifically to a frequency ratio measurement circuit and method based on analog-to-digital converter and phase-locked loop feedback. Background Technology

[0002] Accurately measuring the frequency ratio of two signals is a critical requirement for many electronic systems. For example, in temperature-compensated crystal oscillators (TCXOs) or MEMS oscillators (TCMOs), the core task is to compensate for the frequency drift of the resonator caused by temperature changes, which typically requires precise sensing of temperature information or direct measurement of frequency deviation.

[0003] Existing TCXOs and TCMOs, whether digital or analog, mostly employ an "open-loop" compensation architecture. For example... Figure 1 As shown, this type of architecture relies on a temperature sensor, such as a thermistor, to sense the ambient temperature, and then uses a compensation network to generate a compensation voltage or frequency signal to correct the output frequency of the voltage-controlled crystal oscillator (VCXO) or quartz crystal oscillator.

[0004] This open-loop architecture, which relies on an external temperature sensor, suffers from a fundamental drawback: temperature hysteresis. This is because the temperature sensor is physically separated from the hermetically packaged resonator chip, causing the temperature sensed by the sensor to be out of sync with the real-time temperature changes experienced by the resonator chip. This difference in temperature gradient and response time results in compensation lagging behind the actual frequency drift, severely limiting the compensation accuracy of TCXOs / TCMOs, especially in environments with rapidly changing temperatures, or in applications requiring extremely high stability such as telecom-grade clocks.

[0005] To address this issue, some technologies propose closed-loop compensation architectures. These technologies eliminate the need for temperature sensors, instead using the VCXO's own frequency offset as a real-time indicator of temperature. For example, this can be achieved by using a microprocessor to measure the frequency in real time and digitally comparing it to a target frequency, or by using a frequency-to-voltage conversion circuit and a voltage comparison circuit for analog feedback. However, the primary goal of these solutions is to stabilize the frequency of a single oscillator, rather than providing a universal, high-precision method for measuring the frequency ratio. On the other hand, in general scenarios requiring direct measurement of the frequency ratio of two independent signals, traditional methods such as counter-based measurements like the reciprocal counting method suffer from high quantization noise and loss of clock edge information between sampling points, thus limiting measurement accuracy.

[0006] Furthermore, although phase-locked loops (PLLs) are a commonly used structure for frequency processing, their core analog component, the voltage-controlled oscillator (VCO), suffers from nonlinearity, significant temperature drift, and sensitivity to power supply noise. These drawbacks limit the potential for high-precision measurements based on traditional PLL structures.

[0007] Therefore, there is an urgent need for a new type of high-precision frequency ratio measurement circuit. It should not only overcome the accuracy limitations of traditional frequency ratio measurement methods, but also avoid the performance bottleneck caused by the VCO in traditional PLLs in terms of structure. Furthermore, when applied to temperature compensation, it should be able to naturally solve the temperature hysteresis problem and provide a flexible and accurate compensation implementation method. Summary of the Invention

[0008] In view of this, the present invention provides a frequency ratio measurement circuit and method based on analog-to-digital converter and phase-locked loop feedback, so as to at least solve the problems of low accuracy and temperature hysteresis in the prior art frequency ratio measurement methods.

[0009] To achieve the above objectives, the present invention adopts the following technical solution: A frequency ratio measurement circuit based on analog-to-digital converter and phase-locked loop feedback includes: a frequency and phase detector circuit (PFD), a low-pass filter circuit (LPF), and a Sigma-Delta analog-to-digital converter circuit. The frequency divider circuit is connected in sequence; among them, PFD detection and comparison with reference frequency signal With feedback frequency signal The phase and frequency differences between the two signals are output to the LPF and converted into control signals. , according to The changes in frequency divider are used to output a digital signal to the frequency divider circuit, thereby controlling the frequency division ratio of the frequency divider circuit. The frequency divider circuit receives the frequency signal to be measured. Output feedback frequency signal based on the current frequency division ratio To PFD; When the phase-locked loop is locked, The output digital signal is the frequency signal to be measured. With reference frequency signal The frequency ratio between the measured results is N.

[0010] Preferred, include Modulator and digital / decimation filter circuits; The modulator will simulate the input signal Digitalization and noise shaping are achieved, pushing low-frequency quantization noise to higher frequencies; Digital / decimation filter circuitry is used to reduce high-frequency noise and pass the signal at a reduced data rate. The output of .

[0011] Preferably, the digital / decimation filter circuit includes a digital filter circuit and a decimator circuit; wherein, Digital filter circuits, through sampling The modulator's data stream is used to implement low-pass filtering; An extractor circuit reduces the output rate of a digital signal by discarding a portion of the output data.

[0012] Preferably, the frequency signal to be measured The reference frequency signal is transmitted to the PFD via a temperature-sensitive resonator. Transmitted to the PFD via a temperature-stable reference source.

[0013] Preferably, it further includes: a digital processing module, which receives the frequency ratio measurement result N and calculates the frequency compensation value based on the frequency ratio measurement result N.

[0014] The frequency ratio measurement method based on analog-to-digital converter and phase-locked loop feedback includes the following steps: S1: PFD detects and compares the reference frequency signal. With feedback frequency signal The phase and frequency differences between the two signals are output to the LPF and converted into control signals. ; S2: according to The changes in frequency divider are used to output a digital signal to the frequency divider circuit, thereby controlling the frequency division ratio of the frequency divider circuit. S3: Frequency divider circuit receives the frequency signal to be measured. Output feedback frequency signal based on the current frequency division ratio To PFD; S4: When the phase-locked loop is locked The output digital signal is the frequency signal to be measured. With reference frequency signal The frequency ratio between them is measured.

[0015] As can be seen from the above technical solution, compared with the prior art, the present invention discloses a frequency ratio measurement circuit and method based on analog-to-digital converter and phase-locked loop feedback, which has the following beneficial effects: 1. High precision and low noise: This method utilizes Its high resolution and noise shaping characteristics effectively suppress quantization noise, significantly improving the accuracy of frequency ratio measurement compared to traditional counters and other methods.

[0016] 2. Eliminating errors introduced by the VCO: In a traditional phase-locked loop (PLL), the VCO is a voltage-to-frequency converter that receives a control voltage Vtune from a low-pass filter and outputs a frequency signal proportional to it. In this invention, This process is completed in conjunction with the frequency divider circuit; the ADC converts the analog voltage... Converted into a high-precision digital signal N, the frequency divider receives the frequency to be measured. It adjusts the frequency division ratio in real time according to the digital signal N and outputs the feedback frequency. = / N, from the perspective of the entire loop, the input is The output is the feedback frequency. Adjusting N by changing the ADC In mathematical logic, this is equivalent to changing the output frequency of a VCO. Therefore, this invention utilizes digital... By replacing the analog VCO, the inherent nonlinearity, temperature drift, and power supply noise sensitivity of the VCO are completely avoided, thus improving the stability and robustness of the circuit.

[0017] 3. Solving the temperature hysteresis problem: In temperature compensation applications, this invention enables the output signal to reflect the physical temperature of the resonator chip in real time and accurately by directly measuring the frequency ratio of the temperature-sensitive resonator relative to a stable reference source. This self-sensing architecture eliminates the need for an external temperature sensor, thereby eliminating the spatial thermal gradient and thermal conduction delay between the sensor and the resonator, and completely overcoming the temperature hysteresis problem at the physical level.

[0018] 4. High compensation flexibility: The output frequency ratio is a digital signal, which can directly drive digital compensation algorithms. Whether it is complex polynomial fitting or resource-efficient piecewise linear (PWL) approximation, it is easy to implement, providing flexibility in compensation strategies.

[0019] 5. Preserving clock edge information: Compared to traditional methods that only count at specific moments, phase-locked loop structures can utilize more phase information of the signal, which helps to improve accuracy. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a structural diagram of a microprocessor-based open-loop temperature-compensated crystal oscillator in the prior art; Figure 2 This is an overall framework diagram of a frequency ratio measurement circuit based on analog-to-digital converter and phase-locked loop feedback provided in an embodiment of the present invention; Figure 3 This is a block diagram of the Sigma-Delta analog-to-digital converter circuit in an embodiment of the present invention; Figure 4 A system block diagram of applying a frequency ratio measurement circuit to a temperature-compensated oscillator is provided for embodiments of the present invention. Figure 5 This is a flowchart illustrating the operation of a frequency ratio measurement circuit provided in an embodiment of the present invention. Detailed Implementation

[0022] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0023] This invention provides a frequency ratio measurement circuit based on an analog-to-digital converter (ADC) and a phase-locked loop (PLL) feedback. Its core lies in constructing a digital feedback closed loop without a VCO. Existing closed-loop frequency measurement or frequency tracking schemes typically employ two structures: First, an all-digital PLL (ADPLL) with a base TDC, which measures and digitizes the phase difference between the reference clock and the feedback clock, then drives a digitally controlled oscillator (DCO). Its disadvantages are that the resolution of the TDC is limited by the minimum gate delay of the process, and the DCO still suffers from nonlinearity and frequency jump problems similar to those of a VCO. Second, a traditional analog PLL combined with a counter, which uses the traditional PLL to lock the frequency and then uses an external high-frequency clock for countdown. This method separates the loop locking process from the measurement process, cannot compensate for the analog nonlinearity within the loop in real time, and the counter cannot utilize the signal's phase information, resulting in high quantization noise. This circuit, as shown in Figure 2, directly... Placed in the forward path of the PLL, it replaces the VCO in a traditional PLL. While a traditional PLL controls the frequency with voltage, this circuit controls the frequency division ratio with voltage. This circuit shifts the accuracy of frequency measurement from the stability of an analog oscillator to... The digital accuracy of the modulator. Due to... It has powerful noise shaping capabilities, which can push the quantization noise generated during the measurement process to high frequencies, thereby obtaining extremely high frequency ratio measurement resolution in the low frequency band.

[0024] The circuit includes: a frequency and phase detector circuit (PFD), a low-pass filter circuit (LPF), and a Sigma-Delta analog-to-digital converter circuit. The frequency divider circuit is connected in sequence; among them, PFD detection and comparison with reference frequency signal With feedback frequency signal The phase and frequency differences between the two signals are output to the LPF and converted into control signals. , according to The changes in frequency divider are used to output a digital signal to the frequency divider circuit, thereby controlling the frequency division ratio of the frequency divider circuit. The frequency divider circuit receives the frequency signal to be measured. Output feedback frequency signal based on the current frequency division ratio To PFD; When the phase-locked loop is locked, The output digital signal is the frequency signal to be measured. With reference frequency signal The frequency ratio between the measured results is N.

[0025] It should be noted that: The circuit is as follows Figure 2 As shown, f1 represents the frequency-temperature characteristic curve of the oscillator to be compensated, which represents the trend of the original frequency of the main oscillator in the system changing with temperature. Due to physical characteristics, it usually exhibits nonlinearity, which is the target that needs to be compensated by this invention. The f2 curve is the frequency-temperature characteristic curve of the temperature-sensitive resonator, which represents the temperature-sensitive resonator used as a frequency thermometer. It is designed to change monotonically with temperature, decreasing linearly as shown in the figure. Its frequency value can accurately reflect the real-time temperature of the resonator chip. The frequency signal to be measured The output signal after the frequency divider is fed back to the frequency and phase detector in the phase-locked loop, and compared with the reference frequency. Comparison is performed to achieve closed-loop tracking; in the figure and The transmission characteristic curves illustrate the equivalent substitution of a digitally controlled frequency divider for an analog VCO, demonstrating how the loop changes... To linearly adjust the frequency division ratio N, thereby achieving closed-loop feedback, where... for The maximum value.

[0026] In order to further implement the above technical solution, include Modulator and digital / decimation filter circuits; The modulator will simulate the input signal Digitalization and noise shaping are achieved, pushing low-frequency quantization noise to higher frequencies; Digital / decimation filter circuitry is used to reduce high-frequency noise and pass the signal at a reduced data rate. The output of .

[0027] It should be noted that: This circuit is used for accurate measurement of the frequency signal under test. With reference frequency signal The ratio. The core part of it. Receive analog voltage As input, it replaces the VCO in a traditional PLL. Will It is converted into a high-precision digital signal, Digital Output.

[0028] Overall working principle: When the entire phase-locked loop reaches the locked state, the PFD and LPF will adjust. This makes the feedback frequency Equal to the reference frequency in an average sense At this point, the relationship must be satisfied. ,Right now Since the frequency division ratio N is determined by... according to The output digital signal is directly set, therefore, The output digital signal value accurately represents the frequency signal under test in digital form. With reference frequency signal The frequency ratio between them.

[0029] Work process as follows Figure 5 As shown: This invention provides a dynamic locking method for a frequency ratio measurement circuit. After system startup, an initial value (e.g., 96) is first set for the frequency divider, followed by a closed-loop feedback loop: First, the frequency and phase detector (PFD) compares the reference frequency f1 with the feedback frequency in real time. The size, if < That is, if the current division ratio N is too large, the low-pass filter LPF reduces the control voltage Vtune, causing the ADC's digital output N to decrease; conversely, if... > Then, N is increased by increasing Vtune, and the loop continuously corrects the value of N through the aforementioned negative feedback mechanism. When and During strict synchronization, the loop enters a locked state. In this locked state, the digital sequence output by the ADC is processed by a digital / decimation filter to obtain the final high-precision frequency ratio N, which is the desired frequency ratio. .

[0030] To further implement the above technical solutions, such as Figure 3 As shown, the digital / decimation filter circuit includes a digital filter circuit and a decimator circuit; wherein, Digital filter circuits, through sampling The modulator's data stream is used to implement low-pass filtering; An extractor circuit reduces the output rate of a digital signal by discarding a portion of the output data.

[0031] To further implement the above technical solution, the frequency signal under test... The reference frequency signal is transmitted to the PFD via a temperature-sensitive resonator. Transmitted to the PFD via a temperature-stable reference source.

[0032] To further implement the above technical solution, it also includes: a digital processing module, which receives the frequency ratio measurement result N and uses a piecewise linear PWL interpolation algorithm to calculate the frequency compensation value based on the frequency ratio measurement result N.

[0033] It should be noted that: Frequency ratio measurement circuit outputs digital frequency ratio .because It is a monotonic or known function of temperature, while Stable, therefore the ratio of numbers It can accurately and in real time characterize the current temperature of the temperature-sensitive resonator. Therefore, a digital processing module is set up at the back end of the frequency ratio measurement circuit mentioned above, and it is applied to the scenario of temperature-compensated oscillators.

[0034] In this application, the digital processing module calculates a frequency compensation control word Comp based on the input frequency ratio N, which reflects the current temperature. This calculation can be performed using polynomial fitting based on pre-stored polynomial coefficients, or using a pre-stored lookup table (LUT) and piecewise linear (PWL) interpolation algorithm. This frequency compensation control word Comp is ultimately used to adjust the output frequency of a master oscillator to compensate for its own temperature drift, thereby producing a temperature-stable clock output.

[0035] The specific content of polynomial compensation includes: a polynomial calculation unit built into the digital processing module; and storing a set of polynomial coefficients based on the pre-calibrated resonator temperature characteristics and the compensation requirements of the main oscillator.

[0036] Real-time calculation by digital processing module .

[0037] The specific details of PWL compensation include: The digital processing module internally sets up a lookup table (LUT) to store multiple temperature ranges (from...). The value range is divided into corresponding linear compensation parameters, such as the starting point and slope of each interval. Based on the current... The digital processing module determines the temperature range to which the value belongs, reads the corresponding parameters from the LUT, and then performs linear interpolation to calculate the compensation value Comp. The PWL method requires less computational resources and is suitable for low-power or cost-sensitive designs.

[0038] The calculated compensation control word Comp is ultimately sent to the main frequency generation unit of the system, such as the fractional divider control terminal of a main PLL, or directly controls the tuning DAC of a main VCXO, to accurately compensate for the temperature drift of the main oscillator, thereby outputting a highly stable clock signal. .

[0039] Because this scheme directly utilizes the frequency of the temperature-sensitive resonator as a temperature indicator, it avoids the use of an external temperature sensor, thus completely solving the temperature hysteresis problem. At the same time, the digital compensation processing, whether polynomial or PWL, provides extremely high flexibility and accuracy.

[0040] The frequency ratio measurement method based on analog-to-digital converter and phase-locked loop feedback includes the following steps: S1: PFD detects and compares the reference frequency signal. With feedback frequency signal The phase and frequency differences between the two signals are output to the LPF and converted into control signals. ; S2: according to The changes in frequency divider are used to output a digital signal to the frequency divider circuit, thereby controlling the frequency division ratio of the frequency divider circuit. S3: Frequency divider circuit receives the frequency signal to be measured. Output feedback frequency signal based on the current frequency division ratio To PFD; S4: When the phase-locked loop is locked The output digital signal is the frequency signal to be measured. With reference frequency signal The frequency ratio between them is measured.

[0041] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A frequency ratio measurement circuit based on an analog-to-digital converter and phase-locked loop feedback, characterized in that, include: Phase frequency detector circuit PFD, low pass filter circuit LPF, Sigma-Delta analog-to-digital converter circuit and frequency divider circuit are connected in sequence; wherein, PFD detection and comparison with reference frequency signal With feedback frequency signal The phase and frequency differences between the two signals are output to the LPF and converted into control signals. , according to The changes in frequency divider are used to output a digital signal to the frequency divider circuit, thereby controlling the frequency division ratio of the frequency divider circuit. The frequency divider circuit receives the frequency signal to be measured. Output feedback frequency signal based on the current frequency division ratio To PFD; When the phase-locked loop is locked, The output digital signal is the frequency signal to be measured. With reference frequency signal The frequency ratio between the measured results is N.

2. The frequency ratio measurement circuit based on analog-to-digital converter and phase-locked loop feedback according to claim 1, characterized in that, include Modulator and digital / decimation filter circuits; The modulator will simulate the input signal Digitalization and noise shaping are achieved, pushing low-frequency quantization noise to higher frequencies; Digital / decimation filter circuitry is used to reduce high-frequency noise and pass the signal at a reduced data rate. The output.

3. The frequency ratio measurement circuit based on analog-to-digital converter and phase-locked loop feedback according to claim 2, characterized in that, Digital / decimation filter circuits include digital filter circuits and decimator circuits; among which, Digital filter circuits, through sampling The modulator's data stream is used to implement low-pass filtering; An extractor circuit reduces the output rate of a digital signal by discarding a portion of the output data.

4. The frequency ratio measurement circuit based on analog-to-digital converter and phase-locked loop feedback according to claim 1, characterized in that, The frequency signal to be measured The reference frequency signal is transmitted to the PFD via a temperature-sensitive resonator. Transmitted to the PFD via a temperature-stable reference source.

5. The frequency ratio measurement circuit based on analog-to-digital converter and phase-locked loop feedback according to claim 1, characterized in that, Also includes: The digital processing module receives the frequency ratio measurement result N and calculates the frequency compensation value based on the frequency ratio measurement result N.

6. A frequency ratio measurement method based on analog-to-digital converter and phase-locked loop feedback, based on the frequency ratio measurement circuit based on analog-to-digital converter and phase-locked loop feedback as described in any one of claims 1-5, characterized in that, Includes the following steps: S1: PFD detects and compares the reference frequency signal. With feedback frequency signal The phase and frequency differences between the two signals are output to the LPF and converted into control signals. ; S2: according to The changes in frequency divider are used to output a digital signal to the frequency divider circuit, thereby controlling the frequency division ratio of the frequency divider circuit. S3: Frequency divider circuit receives the frequency signal to be measured. Output feedback frequency signal based on the current frequency division ratio To PFD; S4: When the phase-locked loop is locked The output digital signal is the frequency signal to be measured. With reference frequency signal The frequency ratio between them is measured.