Pt film patterning thin film resistance structure with temperature compensation function

Abstract

This invention discloses a patterned thin-film resistor structure with temperature compensation function, belonging to the field of resistor structure technology. It includes a substrate with an N-type layer on top. In use, the dielectric layer acts as an insulating layer. The Pt thin-film resistor layer serves as the main resistive material, ensuring the stability of the resistance value. The temperature compensation thin-film layer uses silicon material doped with copper. Platinum has a positive temperature coefficient of resistance, while copper-doped silicon material has a negative temperature coefficient of resistance. When the ambient temperature changes, the resistance of the Pt film increases, while the resistance of the copper-doped silicon material with a negative temperature coefficient decreases. When the two are connected in series or parallel, the overall resistance change can partially cancel each other out, thereby reducing the influence of temperature on the resistance.

Description

Technical Field

[0001] This invention relates to the field of resistor structure technology, specifically to a patterned thin-film resistor structure of Pt film with temperature compensation function. Background Technology

[0002] Thin-film resistor structures refer to resistor materials deposited as thin films on a substrate, typically achieved through techniques such as physical vapor deposition (PVD) or chemical vapor deposition (CVD). Pt film patterned thin-film resistor structures are resistor structures fabricated using platinum (Pt) thin-film materials. Through patterning processes such as photolithography and etching, the Pt film is shaped into specific shapes and patterns to meet different circuit design and application requirements. Platinum resistance temperature sensors measure temperature by utilizing the property that the resistance of platinum changes with temperature. The Pt film in the Pt film patterned thin-film resistor structure is the key component embodying this property; its resistance change directly reflects the temperature change, making it the core sensitive element enabling temperature measurement.

[0003] In existing technologies, the resistance value of the platinum resistance element in a patterned Pt film resistor structure changes with temperature during use. When affected by changes in ambient temperature and humidity, the temperature change leads to a change in resistance value, causing deviations in the temperature values ​​measured by the patterned Pt film resistor structure. This results in inaccurate reflection of the true measured value, thus affecting measurement accuracy and system performance.

[0004] Therefore, we propose a patterned thin-film resistor structure with temperature compensation function for Pt film to solve the problems mentioned in the background art. Summary of the Invention

[0005] The purpose of this invention is to provide a Pt film patterned thin-film resistor structure with temperature compensation function, so as to solve the problem that when the Pt film patterned thin-film resistor structure mentioned in the background technology is affected by changes in the external environment temperature and humidity during use, the temperature value measured by the Pt film patterned thin-film resistor structure will deviate and cannot accurately reflect the true value of the measured value, thereby affecting the measurement accuracy and system performance.

[0006] To achieve the above objectives, the present invention provides the following technical solution: a Pt film patterned thin film resistor structure with temperature compensation function, comprising a substrate, an N-type layer disposed on the top of the substrate, a noise suppression layer disposed on the top of the N-type layer, a dielectric layer disposed on the top of the noise suppression layer, a Pt thin film resistor layer disposed on the top of the dielectric layer, a temperature compensation thin film layer disposed on the top of the Pt thin film resistor layer, and a first protective adhesive layer disposed on the top of the temperature compensation thin film layer.

[0007] Preferably, two connection grooves are formed on the top of the Pt thin film resistive layer near one side, an adhesive layer is provided on the bottom surface of the two connection grooves, a conductive layer is provided on the top of the two adhesive layers, and an electrode is provided on the top of the two conductive layers.

[0008] Preferably, a second protective adhesive layer is provided on the top of both conductive layers, a silicone insulating sleeve is fixedly fitted on the outer surface of both electrodes near one end, and a first protective shell is provided on the outer surface of the substrate.

[0009] Preferably, a second protective shell is fixedly connected to the top of the first protective shell, and two first mounting grooves are fixedly formed on one side of the outer surface of the first protective shell near the top, and two second mounting grooves are formed on one side of the outer surface of the second protective shell near the bottom.

[0010] Preferably, the outer surfaces of the two silicone insulating sleeves are located inside the two first mounting grooves and the two second mounting grooves, respectively, and the two second protective adhesive layers are respectively wrapped around one end of the two electrodes.

[0011] Preferably, the tops of the two second protective adhesive layers are fixedly connected to the bottom of the temperature compensation film layer, and the N-type layer, noise suppression layer, dielectric layer, Pt thin film resistor layer, temperature compensation film layer and first protective adhesive layer are respectively located inside the first protective shell and the second protective shell.

[0012] A method for fabricating a patterned thin-film resistor structure of Pt film with temperature compensation function includes the following steps:

[0013] S1. The silicon wafer substrate is obtained by cutting, grinding and polishing single crystal silicon ingots to obtain a flat and smooth surface. The surface impurities and oxide layer are removed by cleaning to meet the subsequent requirements.

[0014] S2. Using ion implantation technology, high-energy phosphorus ions are implanted into the substrate surface to a certain depth to form an N-type doped region.

[0015] S3. At high temperature, a gas containing a boron source is diffused into a certain area through a diffusion process to form a P-type layer, which together with the existing N-type layer constitutes a PN structure to achieve noise suppression.

[0016] S4. A plasma-enhanced chemical vapor deposition method is used to generate a silicon oxide thin film by reacting silane and oxygen in a plasma environment, which is then uniformly covered above the noise suppression layer.

[0017] S5. Using physical vapor deposition technology, in a high vacuum environment, argon ions bombard a platinum target to sputter platinum atoms onto the surface of the dielectric layer to form a thin film. Then, the Pt thin film is patterned by photolithography and etching processes to form a rectangular array shape to meet the required resistance value and power distribution requirements.

[0018] S6. Using a sputtering process, a thin titanium layer is deposited on the bottom surface of the two connecting grooves to form an adhesion layer. Then, a conductive layer is deposited on the adhesion layer using the same sputtering process. The shape of the electrode is made on the conductive layer using a photolithography process. Then, the two electrodes are placed on the two conductive layers respectively, and polyurethane adhesive is wrapped around the electrodes by dispensing and cured to form a second protective adhesive layer.

[0019] S7. Using physical vapor deposition, a silicon-doped thin film is deposited on the Pt thin film resistive layer and the second protective adhesive layer to form a tight contact between the Pt thin film resistive layer and the temperature compensation thin film layer. Then, patterning is performed to achieve good electrical connection and thermal coupling.

[0020] S8. Apply silicone sealant evenly to the top of the temperature compensation film layer by spraying to form the first protective adhesive layer. After application, perform a curing process.

[0021] S9. The first and second protective housings are made of ceramic powder using a ceramic sintering process. Two silicone insulating sleeves are aligned with the two first mounting slots respectively, and a thin film resistor structure is installed inside the first protective housing. The housing is then fixed by adhesive bonding. After the adhesive bonding has cured, the second protective housing is installed, and the second mounting slot is aligned with the electrode position. The first and second protective housings are fixed by welding.

[0022] Preferably, the substrate is made of high-purity single-crystal silicon material, the N-type layer is made of silicon as the base material and is formed by doping with pentavalent phosphorus. The noise suppression layer is composed of N-type doped layers and P-type doped layers arranged alternately in the horizontal direction. The P-type doped layer is formed by doping trivalent boron in silicon and is used to reduce noise interference and increase signal stability.

[0023] Preferably, the dielectric layer is made of silicon oxide to provide insulation, the Pt thin film resistive layer is made of platinum, the temperature compensation thin film layer is made of silicon containing copper dopant, the first protective adhesive layer is made of silicone adhesive, the adhesive layer is made of titanium as the adhesive material, the conductive layer is made of silver, and the second protective adhesive layer is made of polyurethane adhesive to wrap around one end of the electrode.

[0024] Preferably, both the first protective shell and the second protective shell are made of ceramic material, and the outer surfaces of both the first protective shell and the second protective shell are coated with carbon nanotube coating.

[0025] Compared with the prior art, the beneficial effects of the present invention are:

[0026] 1. In this invention, the silicon substrate provides mechanical support and physical stability. The N-type layer effectively adjusts the electrical performance of the resistive structure. The noise suppression layer suppresses the influence of noise on signal transmission, improving the stability and reliability of device performance. The dielectric layer acts as insulation. The Pt thin-film resistive layer, as the main resistive material, ensures the stability of the resistance value. The temperature compensation thin-film layer uses silicon material doped with copper. Platinum has a positive temperature coefficient of resistance, while copper-doped silicon material has a negative temperature coefficient of resistance. When the ambient temperature changes, the resistance of the Pt film increases, while the resistance of the copper-doped silicon material with a negative temperature coefficient decreases. When the two are connected in series or parallel, the change in overall resistance can partially cancel each other out, thereby reducing the influence of temperature on resistance, achieving temperature compensation, further maintaining the stability of the overall resistance, which is beneficial to improving the accuracy and reliability of the temperature value measured by the resistive structure, improving measurement precision and system stability.

[0027] 2. In use, both the first and second protective shells of this invention are made of ceramic material, which has high hardness and can effectively resist external mechanical impacts and collisions. Furthermore, the ceramic material provides excellent electrical isolation, ensuring safe and stable operation in complex circuit environments. The outer surfaces of both the first and second protective shells are coated with carbon nanotube paint, providing electromagnetic shielding. The first protective adhesive layer primarily protects the temperature compensation film layer from moisture and mechanical stress. The adhesive layer provides strong adhesion. The conductive layer helps ensure smooth current flow and reduces signal distortion. The second protective adhesive layer has good flexibility and adhesion, preventing damage at the connection points due to stress concentration.

[0028] 3. In this invention, a silicon wafer substrate is obtained through cutting, grinding, and polishing processes. Ion implantation technology is used to implant high-energy phosphorus ions to a certain depth on the substrate surface. Through ion implantation and diffusion doping processes, alternating N-type and P-type doped regions are precisely formed on the N-type layer. Next, a dielectric film is uniformly grown above the noise suppression layer using chemical vapor deposition. Platinum atoms are sputtered onto the dielectric layer surface using physical vapor deposition to form a thin film. The Pt film is patterned using photolithography and etching processes. Titanium and silver materials are sequentially deposited in the bonding trench to form an adhesion layer and a conductive layer. After placing the electrodes, polyurethane adhesive is coated onto the electrodes, and after curing, a second protective adhesive layer is formed.

[0029] 4. In use, this invention employs physical vapor deposition to deposit a silicon-doped thin film on the Pt thin film resistive layer and the second protective adhesive layer, achieving good electrical connection and thermal coupling. Silicone adhesive is uniformly coated onto the top of the temperature-compensating thin film layer using a spraying method and then cured. Finally, the resistive structure is fixedly installed in the first protective housing using thermally conductive adhesive, and the first and second protective housings are connected together by welding, completing the fabrication of the Pt thin film resistive structure. Attached Figure Description

[0030] Figure 1 This is a frontal perspective view of a patterned thin-film resistor structure with temperature compensation function of Pt film according to the present invention.

[0031] Figure 2 This is a cross-sectional schematic diagram of the second protective shell in a Pt film patterned thin film resistor structure with temperature compensation function according to the present invention.

[0032] Figure 3 This is a schematic diagram showing the unfolded structure of the first protective adhesive layer in a Pt film patterned thin film resistor structure with temperature compensation function according to the present invention.

[0033] Figure 4 This is a schematic diagram showing the unfolded structure of the temperature compensation film layer in a patterned thin film resistor structure with temperature compensation function of Pt film according to the present invention.

[0034] Figure 5 This is a schematic diagram showing the unfolded structure of the Pt thin film resistive layer in a patterned thin film resistive structure with temperature compensation function according to the present invention.

[0035] Figure 6 This is a schematic diagram showing the unfolded structure of the conductive layer in a patterned thin-film resistor structure with temperature compensation function of a Pt film according to the present invention.

[0036] Figure 7 This is a schematic diagram showing the unfolded structure of the adhesion layer in a patterned thin-film resistor structure with temperature compensation function of a Pt film according to the present invention.

[0037] In the picture:

[0038] 1. Substrate; 2. N-type layer; 3. Noise suppression layer; 4. Dielectric layer; 5. Pt thin film resistive layer; 6. Temperature compensation thin film layer; 7. First protective adhesive layer; 8. Connecting groove; 9. Adhesive layer; 10. Conductive layer; 11. Electrode; 12. Second protective adhesive layer; 13. Silicone insulating sleeve; 14. First protective housing; 15. Second protective housing; 16. First mounting groove; 17. Second mounting groove. Detailed Implementation

[0039] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0040] Example 1: Please refer to Figures 1-7As shown, the present invention provides a technical solution: a patterned thin-film resistor structure of Pt film with temperature compensation function, including a substrate 1, an N-type layer 2 disposed on the top of the substrate 1, a noise suppression layer 3 disposed on the top of the N-type layer 2, a dielectric layer 4 disposed on the top of the noise suppression layer 3, a Pt thin-film resistor layer 5 disposed on the top of the dielectric layer 4, a temperature compensation thin-film layer 6 disposed on the top of the Pt thin-film resistor layer 5, a first protective adhesive layer 7 disposed on the top of the temperature compensation thin-film layer 6, two connecting grooves 8 formed near one side of the top of the Pt thin-film resistor layer 5, an adhesive layer 9 disposed on the bottom surface of each of the two connecting grooves 8, a conductive layer 10 disposed on the top of each of the two adhesive layers 9, an electrode 11 disposed on the top of each of the two conductive layers 10, a second protective adhesive layer 12 disposed on the top of each of the two conductive layers 10, and silicone glue fixedly sleeved on the outer surface of each of the two electrodes 11 near one end. An insulating sleeve 13 is provided on the outer surface of the substrate 1, and a first protective shell 14 is provided. A second protective shell 15 is fixedly connected to the top of the first protective shell 14. Two first mounting grooves 16 are fixedly formed on one side of the outer surface of the first protective shell 14 near the top, and two second mounting grooves 17 are formed on one side of the outer surface of the second protective shell 15 near the bottom. The outer surfaces of the two silicone insulating sleeves 13 are respectively located inside the two first mounting grooves 16 and the two second mounting grooves 17. Two second protective adhesive layers 12 are respectively wrapped around one end of the two electrodes 11, and the tops of the two second protective adhesive layers 12 are fixedly connected to the bottom of the temperature compensation film layer 6. The N-type layer 2, the noise suppression layer 3, the dielectric layer 4, the Pt thin film resistive layer 5, the temperature compensation film layer 6, and the first protective adhesive layer 7 are respectively located inside the first protective shell 14 and the second protective shell 15. Both the first protective shell 14 and the second protective shell 15 are made of ceramic material, and the outer surfaces of both the first protective shell 14 and the second protective shell 15 are coated with carbon nanotube coating. Substrate 1 is made of high-purity single-crystal silicon. N-type layer 2 uses silicon as the base material, formed by doping with pentavalent phosphorus. Noise suppression layer 3 consists of alternating horizontally arranged N-type and P-type doped layers. The P-type doped layer is formed by doping silicon with trivalent boron, used to reduce noise interference and increase signal stability. Dielectric layer 4 uses silicon oxide to provide insulation. Pt thin-film resistive layer 5 uses platinum. Temperature compensation thin-film layer 6 uses silicon doped with copper. First protective adhesive layer 7 uses silicone adhesive. Adhesive layer 9 uses titanium as the adhesive material. Conductive layer 10 uses silver. Second protective adhesive layer 12 uses polyurethane adhesive and is used to wrap one end of electrode 11.

[0041] In this embodiment, both the first protective housing 14 and the second protective housing 15 are made of ceramic material. Ceramic material has high hardness and can effectively resist external mechanical impacts and collisions. During equipment transportation, if bumps or accidental impacts occur, the first protective housing 14 and the second protective housing 15 can provide reliable physical protection for the Pt film patterned thin-film resistor structure, preventing damage to internal precision components. Furthermore, ceramic material has excellent insulation properties, high-temperature resistance, and chemical stability. Its insulation resistance can reach very high values, achieving good electrical isolation and preventing short circuits between the Pt film patterned thin-film resistor structure and external circuits, ensuring its safe and stable operation in complex circuit environments. The outer surfaces of both the first protective housing 14 and the second protective housing 15 are coated with carbon nanotube paint. Carbon nanotubes have excellent electrical properties. When made into a paint and sprayed onto the outer surfaces of the first and second protective housings 14 and 15, the carbon nanotubes interconnect to form conductive pathways. These pathways can effectively reflect and attenuate electromagnetic waves, achieving an electromagnetic shielding effect. The substrate 1 is made of silicon wafer material, serving as the supporting foundation for the entire resistor structure and providing mechanical support and physical stability for the layers above. The N-type layer 2 uses silicon as the base material, doped with pentavalent phosphorus, which effectively adjusts the electrical properties of the resistor structure, controlling the resistance range and temperature coefficient. It also acts as a barrier layer, reducing the impact of impurities in the substrate 1 on the upper Pt thin-film resistor layer 5. The noise suppression layer 3 uses the PN structure to suppress potential fluctuations in the well region or the noise of the substrate 1 on the signal transmission of the upper Pt thin-film resistor layer 5, improving the stability and reliability of the device performance. The dielectric layer 4 uses silicon oxide, providing insulation and preventing short circuits and leakage. The Pt thin-film resistor layer 5, as the main resistive material, utilizes platinum's high-temperature resistance and temperature resistance characteristics, employing chip technology to fabricate a platinum thin-film resistor, ensuring the stability of the resistance value. The change in resistance value with ambient temperature is measured and reflected as a real-time temperature value. Using chip technology, it offers high precision, can be made very small and thin, and is highly sensitive, quickly detecting changes in ambient temperature. The temperature compensation thin-film layer 6 uses silicon material doped with copper. Different materials have different temperature coefficients of resistance. Platinum has a positive temperature coefficient of resistance, meaning its resistance increases with increasing temperature. Silicon doped with copper is a material with a negative temperature coefficient of resistance.When the ambient temperature changes, the resistance of the Pt thin film resistive layer 5 and the resistance of the temperature compensation thin film layer 6 change at different rates. That is, when the resistance of the Pt film increases, the resistance of the copper-doped silicon material with a negative temperature coefficient decreases. When the two are connected in series or parallel, the change in overall resistance can partially cancel each other out, thereby reducing the influence of temperature on resistance, achieving temperature compensation, and further maintaining the stability of overall resistance. This is beneficial to improving the accuracy and reliability of the temperature value measured by the resistance structure, improving measurement precision and system stability. It solves the problem that when the Pt film patterned thin film resistive structure is affected by changes in external ambient temperature and humidity during use, the measured temperature value of the Pt film patterned thin film resistive structure will deviate, failing to accurately reflect the true value of the measured value, thus affecting measurement accuracy and system performance. The first protective adhesive layer 7 mainly protects the temperature compensation thin film layer 6 from the effects of moisture and mechanical stress, provides insulation, and prevents current leakage. The adhesion layer 9 is made of titanium. Titanium forms a good chemical bond with the Pt thin film resistive layer 5 and the substrate 1, thus providing a strong adhesion effect. The adhesion layer 9 can enhance the adhesion between the electrode 11 and the Pt thin film resistive layer 5, prevent the electrode 11 from falling off during long-term use, and improve the reliability and stability of the connection. The conductive layer 10 has low resistivity and good chemical stability, which can meet the conductivity requirements of the electrode 11 connection, provide good conductivity, reduce the contact resistance between the electrode 11 and the Pt thin film resistive layer 5, ensure that the current can pass smoothly, and reduce the heat and signal distortion caused by contact resistance. The second protective adhesive layer 12 has good flexibility and adhesion, which can adapt to the slight deformation caused by thermal expansion and contraction at the connection, and prevent the connection from being damaged due to stress concentration. A silicone insulating sleeve 13 is provided at one end of the electrode 11, which helps to maintain insulation between the electrode 11 and the first protective shell 14 and the second protective shell 15.

[0042] Example 2: Figures 1-7As shown, a method for fabricating a patterned thin-film resistor structure with temperature compensation function using a Pt film includes the following steps: A silicon substrate 1 is prepared by cutting, grinding, and polishing a single-crystal silicon ingot to obtain a flat and smooth surface. Surface impurities and oxide layers are removed by cleaning to meet subsequent requirements. High-energy phosphorus ions are implanted into the surface of substrate 1 to a certain depth using ion implantation technology to form an N-type doped region. At high temperature, a diffusion process is used to diffuse a boron-containing gas into a portion of the region to form a P-type layer, which, together with the existing N-type layer 2, constitutes a PN structure to achieve noise suppression. Plasma-enhanced chemical vapor deposition is used to generate Pt film by reacting silane and oxygen in a plasma environment. A silicon oxide thin film is uniformly coated above the noise suppression layer 3. Using physical vapor deposition (PVD) in a high vacuum environment, argon ions bombard a platinum target to sputter platinum atoms onto the surface of the dielectric layer 4 to form a thin film. The Pt thin film is then patterned using photolithography and etching processes to create a rectangular array shape to meet the required resistance and power distribution. A thin titanium layer is deposited on the bottom surface of each of the two connecting trenches 8 using a sputtering process to form an adhesion layer 9. A conductive layer 10 is then deposited on the adhesion layer 9 using the same sputtering process. Electrode 11 shapes are fabricated on the conductive layer 10 using photolithography. Finally, two electrodes 11 are placed on the two conductive layers 10, respectively. Polyurethane adhesive is applied to the electrode 11 via dispensing and cured to form a second protective adhesive layer 12. A silicon-doped thin film is deposited on the Pt thin film resistor layer 5 and the second protective adhesive layer 12 using physical vapor deposition (PVD) to create a tight contact between the Pt thin film resistor layer 5 and the temperature compensation thin film layer 6. Patterning is then performed to achieve good electrical connection and thermal coupling. Silicone adhesive is uniformly coated onto the top of the temperature compensation thin film layer 6 using a spraying method to form a first protective adhesive layer 7, which is then cured. The first protective shell 14 and the second protective shell 15 are made using ceramic powder through a ceramic sintering process, and two silicone insulating sleeves are then attached. 13 is aligned with the two first mounting slots 16 respectively, and the thin film resistor structure is installed inside the first protective housing 14 and fixed by adhesive bonding. After the adhesive bonding is cured, the second protective housing 15 is installed and the second mounting slot 17 is aligned with the position of the electrode 11. The first protective housing 14 and the second protective housing 15 are fixed by welding. The substrate 1 is made of high-purity single crystal silicon material. The N-type layer 2 is made of silicon as the base material and is formed by doping with pentavalent phosphorus. The noise suppression layer 3 is composed of N-type doped layers and P-type doped layers arranged alternately in the horizontal direction. The P-type doped layer is formed by doping trivalent boron in silicon to reduce noise interference and increase signal stability.The dielectric layer 4 is made of silicon oxide to provide insulation. The Pt thin film resistive layer 5 is made of platinum. The temperature compensation thin film layer 6 is made of silicon containing copper dopants. The first protective adhesive layer 7 is made of silicone adhesive. The adhesive layer 9 is made of titanium as the adhesive material. The conductive layer 10 is made of silver metal. The second protective adhesive layer 12 is made of polyurethane adhesive and is used to wrap one end of the electrode 11.

[0043] In this embodiment, during use, single-crystal silicon is cut, ground, and polished to obtain a flat and smooth surface. By removing surface impurities and oxide layers, a silicon substrate 1 is obtained, providing mechanical support and a base to ensure the stability and integrity of the entire structure. Using ion implantation technology, high-energy phosphorus ions are implanted to a certain depth on the surface of substrate 1 to form N-type doped regions, forming a tight chemical bond with substrate 1, ensuring good electrical contact and mechanical stability between the two. Through ion implantation and diffusion doping processes, alternating N-type and P-type doped regions are precisely formed on the N-type layer 2, forming a tight integral structure with the N-type layer 2 and the upper dielectric layer 4. Adjacent N-type and P-type doped layers are isolated from each other by the depletion region of the PN junction, but together they constitute a noise suppression functional structure. Its main function is to suppress the influence of potential fluctuations in the well region or substrate noise on the transmission of upper-layer resistive signals, improving the stability and reliability of device performance. Next, a dielectric layer 4 is uniformly grown on top of the noise suppression layer 3 using chemical vapor deposition, covering the entire surface. This dielectric layer 4 adheres tightly to the noise suppression layer 3 below and the Pt thin-film resistive layer 5 above, forming a stable sandwich structure. Then, using physical vapor deposition (PVD) in a high-vacuum environment, argon ions bombard a platinum target, causing platinum atoms to sputter onto the surface of the dielectric layer 4 to form a thin film. The Pt thin film is then patterned using photolithography and etching processes to create specific shapes, such as meandering or rectangular arrays, to meet different resistance values ​​and power distribution requirements. Titanium and silver materials are sequentially deposited in the connection trench 8 using sputtering to form an adhesion layer 9 and a conductive layer 10. After placing the electrode 11, polyurethane adhesive is coated onto the electrode 11, and after curing, a second protective adhesive layer 12 is formed. The second protective adhesive layer 12 uses polyurethane adhesive material, whose main components are polyurethane prepolymer and curing agent. Generally, the mass ratio of polyurethane prepolymer to curing agent is between 1 and 2:1. It may also contain plasticizers, at a content of approximately 5% to 10% of the total mass, to increase the flexibility of the adhesive layer. Then, a silicon-doped thin film is deposited on the Pt thin film resistive layer 5 and the second protective adhesive layer 12 using a physical vapor deposition process, forming a tight contact between the Pt thin film resistive layer 5 and the temperature compensation thin film layer 6. Subsequently, patterning is performed to achieve good electrical connection and thermal coupling. Silicone adhesive is uniformly coated on top of the temperature compensation thin film layer 6 using a spraying method and then cured. Silicone adhesive generally contains siloxane polymers, fillers, and catalysts, with the typical composition ratio being: siloxane polymer: 95%–98%, filler: 2%–5%, catalyst: <1%. Finally, the resistive structure is fixedly installed in the first protective housing 14 using thermally conductive adhesive, and the first protective housing 14 is connected to the second protective housing 15 by welding, completing the fabrication of the Pt thin film resistive structure.

[0044] The overall effect and working principle of the mechanism are as follows: During use, both the first protective shell 14 and the second protective shell 15 are made of ceramic material, which has high hardness and can effectively resist external mechanical impact and collision. Their insulation resistance can reach a very high value, achieving good electrical isolation. The outer surfaces of both the first protective shell 14 and the second protective shell 15 are coated with carbon nanotube paint, providing electromagnetic shielding. The substrate 1 is made of silicon wafer material, serving as the supporting foundation for the entire resistor structure and providing mechanical support and physical stability for the upper layers. The N-type layer 2 uses silicon as the base material, doped with pentavalent phosphorus, which can effectively adjust the electrical performance of the resistor structure and control the resistance range and temperature coefficient. The noise suppression layer 3 suppresses the potential fluctuations in the well region or the noise of the substrate 1 on the signal transmission of the upper Pt thin film resistor layer 5 through the PN structure, improving the stability and reliability of the device performance. The dielectric layer 4 uses silicon oxide material, serving as insulation. The Pt thin film resistor layer 5, as the main resistor material, ensures the stability of the resistance value. The temperature compensation thin film layer 6 uses silicon material doped with copper. Platinum has a positive temperature coefficient of resistance, meaning its resistance increases with temperature. Silicon doped with copper, on the other hand, has a negative temperature coefficient of resistance. When the ambient temperature changes, the resistance of the Pt thin-film resistive layer 5 and the temperature compensation thin-film layer 6 change at different rates. Specifically, as the resistance of the Pt film increases, the resistance of the copper-doped silicon material with its negative temperature coefficient decreases. When connected in series or parallel, the changes in overall resistance can partially cancel each other out, thus reducing the impact of temperature on resistance and further maintaining the stability of the overall resistance. This improves the accuracy and reliability of the temperature values ​​measured by the resistance structure, enhancing measurement precision and system stability. The first protective adhesive layer 7 primarily protects the temperature compensation thin-film layer 6 from moisture and mechanical stress. The adhesion layer 9 enhances the adhesion between the electrode 11 and the Pt thin-film resistive layer 5, improving the reliability and stability of the connection. The conductive layer 10 reduces the contact resistance between the electrode 11 and the Pt thin-film resistive layer 5, ensuring smooth current flow. The second protective adhesive layer 12 has good flexibility and adhesion, adapting to minor deformations caused by thermal expansion and contraction at the connection point, preventing damage due to stress concentration. A silicone insulating sleeve 13 is provided at one end of electrode 11 to facilitate insulation between electrode 11 and the first protective shell 14 and the second protective shell 15. Silicon substrate 1 is obtained through cutting, grinding, polishing, and cleaning processes. Using ion implantation technology, phosphorus ions are implanted to a certain depth on the surface of substrate 1 to form N-type doped regions, which form a tight chemical bond with the substrate 1. Through ion implantation and diffusion doping processes, alternating N-type and P-type doped regions are precisely formed on the N-type layer 2, forming a tight integral structure with the N-type layer 2 and the above dielectric layer 4. Then, a dielectric layer 4 thin film is uniformly grown above the noise suppression layer 3 using chemical vapor deposition, covering the entire surface to form a stable sandwich structure.Then, using physical vapor deposition (PVD) in a high-vacuum environment, argon ions bombard a platinum target, causing platinum atoms to sputter onto the surface of dielectric layer 4 to form a thin film. The Pt thin film is then patterned using photolithography and etching processes to create specific shapes, such as meandering or rectangular arrays, to meet different resistance values ​​and power distribution requirements. In the connecting groove 8, titanium and silver materials are sequentially deposited using sputtering to form an adhesion layer 9 and a conductive layer 10. After placing the electrode 11, polyurethane adhesive is applied to the electrode 11, and after curing, a second protective adhesive layer 12 is formed. Then, using PVD, a silicon-doped thin film is deposited on the Pt thin film resistive layer 5 and the second protective adhesive layer 12, creating a tight contact between the Pt thin film resistive layer 5 and the temperature compensation thin film layer 6. Subsequent patterning processing achieves good electrical connection and thermal coupling. Silicone adhesive is uniformly coated onto the top of the temperature compensation thin film layer 6 using a spraying method and then cured. Finally, the resistor structure is fixedly installed in the first protective housing 14 using thermally conductive adhesive, and the first protective housing 14 is connected to the second protective housing 15 by welding to complete the preparation of the Pt thin film resistor structure.

[0045] Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A patterned thin-film resistor structure of Pt film with temperature compensation function, comprising a substrate (1), characterized in that: An N-type layer (2) is disposed on the top of the substrate (1), a noise suppression layer (3) is disposed on the top of the N-type layer (2), a dielectric layer (4) is disposed on the top of the noise suppression layer (3), a Pt thin film resistive layer (5) is disposed on the top of the dielectric layer (4), a temperature compensation thin film layer (6) is disposed on the top of the Pt thin film resistive layer (5), and a first protective adhesive layer (7) is disposed on the top of the temperature compensation thin film layer (6).

2. The Pt film patterned thin-film resistor structure with temperature compensation function according to claim 1, characterized in that: Two connection grooves (8) are formed on the top of the Pt thin film resistive layer (5) near one side. An adhesive layer (9) is provided on the bottom surface of the two connection grooves (8). A conductive layer (10) is provided on the top of the two adhesive layers (9). An electrode (11) is provided on the top of the two conductive layers (10).

3. The Pt film patterned thin-film resistor structure with temperature compensation function according to claim 2, characterized in that: A second protective adhesive layer (12) is provided on the top of each of the two conductive layers (10), and a silicone insulating sleeve (13) is fixedly fitted on the outer surface of each of the two electrodes (11) near one end. A first protective shell (14) is provided on the outer surface of the substrate (1).

4. The Pt film patterned thin-film resistor structure with temperature compensation function according to claim 3, characterized in that: The top of the first protective housing (14) is fixedly connected to the second protective housing (15). Two first mounting grooves (16) are fixedly opened on one side of the outer surface of the first protective housing (14) near the top. Two second mounting grooves (17) are opened on one side of the outer surface of the second protective housing (15) near the bottom.

5. The Pt film patterned thin-film resistor structure with temperature compensation function according to claim 4, characterized in that: The outer surfaces of the two silicone insulating sleeves (13) are located inside the two first mounting grooves (16) and the two second mounting grooves (17), respectively, and the two second protective adhesive layers (12) are respectively wrapped around one end of the two electrodes (11).

6. The Pt film patterned thin-film resistor structure with temperature compensation function according to claim 5, characterized in that: The tops of the two second protective adhesive layers (12) are fixedly connected to the bottom of the temperature compensation film layer (6). The N-type layer (2), noise suppression layer (3), dielectric layer (4), Pt thin film resistor layer (5), temperature compensation film layer (6) and first protective adhesive layer (7) are located inside the first protective shell (14) and the second protective shell (15), respectively.

7. A method for fabricating a Pt film patterned thin-film resistor structure with temperature compensation function, using the Pt film patterned thin-film resistor structure with temperature compensation function as described in any one of claims 1-6, characterized in that, Includes the following steps: S1, Silicon wafer substrate (1) obtains a flat and smooth surface through single crystal silicon ingot cutting, grinding and polishing processes, and removes surface impurities and oxide layers through cleaning to meet subsequent requirements; S2. Using ion implantation technology, high-energy phosphorus ions are implanted into the surface of substrate (1) to form an N-type doped region. S3. At high temperature, the gas containing boron source is diffused to a part of the region through a diffusion process to form a P-type layer, which together with the existing N-type layer (2) constitutes a PN structure to achieve noise suppression. S4. Using plasma-enhanced chemical vapor deposition, silicon oxide thin film is generated by reacting silane and oxygen in a plasma environment and uniformly covered above the noise suppression layer (3). S5. Using physical vapor deposition technology, in a high vacuum environment, argon ions are used to bombard the platinum target material, causing platinum atoms to be sputtered onto the surface of the dielectric layer (4) to form a thin film. Then, the Pt thin film is patterned by photolithography and etching processes to make it into a rectangular array shape to meet the required resistance value and power distribution requirements. S6. Using a sputtering process, a thin titanium layer is deposited on the bottom surface of the two connecting grooves (8) to form an adhesion layer (9). Then, a conductive layer (10) is deposited on the adhesion layer (9) by the same sputtering process. The shape of the electrode (11) is made on the conductive layer (10) by photolithography. Then, the two electrodes (11) are placed on the two conductive layers (10) respectively. Polyurethane adhesive is wrapped around the electrode (11) by dispensing and cured to form a second protective adhesive layer (12). S7. Using physical vapor deposition, a silicon-doped thin film is deposited on the Pt thin film resistive layer (5) and the second protective adhesive layer (12) to form a tight contact between the Pt thin film resistive layer (5) and the temperature compensation thin film layer (6). Then, patterning is performed to achieve good electrical connection and thermal coupling. S8. Apply silicone sealant evenly to the top of the temperature compensation film layer (6) by spraying to form the first protective adhesive layer (7). After coating, perform curing treatment. S9. The first protective housing (14) and the second protective housing (15) are made of ceramic powder by ceramic sintering process. Two silicone insulating sleeves (13) are aligned with two first mounting slots (16) respectively, and a thin film resistor structure is installed inside the first protective housing (14). It is fixed by adhesive bonding. After the adhesive bonding is cured, the second protective housing (15) is installed and the second mounting slot (17) is aligned with the position of the electrode (11). The first protective housing (14) and the second protective housing (15) are fixed by welding.

8. The method for preparing a patterned thin-film resistor structure with temperature compensation function of Pt film according to claim 7, characterized in that: The substrate (1) is made of high-purity single-crystal silicon material. The N-type layer (2) is made of silicon as the base material and is formed by doping with pentavalent phosphorus. The noise suppression layer (3) is composed of N-type doped layers and P-type doped layers arranged alternately in the horizontal direction. The P-type doped layer is formed by doping trivalent boron in silicon and is used to reduce noise interference and increase signal stability.

9. The method for preparing a patterned thin-film resistor structure with temperature compensation function of Pt film according to claim 8, characterized in that: The dielectric layer (4) is made of silicon oxide to provide insulation. The Pt thin film resistive layer (5) is made of platinum. The temperature compensation thin film layer (6) is made of silicon containing copper dopant. The first protective adhesive layer (7) is made of silicone adhesive. The adhesive layer (9) is made of titanium as the adhesive material. The conductive layer (10) is made of silver. The second protective adhesive layer (12) is made of polyurethane adhesive and is used to wrap one end of the electrode (11).

10. The Pt film patterned thin-film resistor structure with temperature compensation function according to claim 9, characterized in that: Both the first protective shell (14) and the second protective shell (15) are made of ceramic material, and the outer surfaces of both the first protective shell (14) and the second protective shell (15) are coated with carbon nanotube coating.

Images