A dc / dc converter enable circuit compatible with high and low level control and a control method thereof

Abstract

This invention relates to an enable circuit and control method for a DC / DC converter compatible with both high and low level control. The enable circuit includes a low-level enable signal processing circuit, a high-level enable signal processing circuit, and an enable signal control circuit. The input of the low-level enable signal processing circuit is connected to a low-level enable control signal, and its output is connected to the input of the enable signal control circuit. The input of the high-level enable signal processing circuit is connected to a high-level enable control signal, and its output is connected to the input of the enable signal control circuit. The input of the enable signal control circuit is connected to the outputs of both the low-level and high-level enable signal processing circuits, and its output is connected to the enable pin of the DC / DC converter control chip. This invention enables the DC / DC converter to be compatible with both high-level and low-level enable control simultaneously using diodes, transistors, resistors, capacitors, and other devices, effectively improving the enable control flexibility of the DC / DC converter in system applications, while also offering the advantage of low cost in high-reliability applications.

Description

Technical Field

[0001] This invention relates to the field of DC / DC converter control technology, and more specifically to a DC / DC converter enable circuit and its control method that are compatible with high and low level control. Background Technology

[0002] DC / DC converters are an important component of power supply systems. Their main function is to convert the primary DC bus voltage into multiple different DC voltages according to the different power requirements of downstream loads, so as to provide stable and reliable DC power supply for various loads.

[0003] In complex multi-channel DC power supply systems composed of multiple DC / DC converters, the required power supply time for different loads often varies due to their different operating states. In power supply systems, the enable control pins of the DC / DC converters are typically controlled to achieve time-sharing startup of different power modules, adapting to the varying power consumption timing requirements of different loads.

[0004] Currently, enable control for DC / DC converters typically only supports a single high-level or low-level enable, making it difficult to adapt to diverse user control needs. Some switchable polarity solutions require jumpers, resistor configurations, or hardware modifications, making it impossible to simultaneously access and respond to two different polarity enable signals within the same hardware circuit. Therefore, it is necessary to research enable circuits that can simultaneously support both high and low-level control to adapt to different application scenarios, improve the application flexibility of DC / DC converters, and provide users with a wider range of control options.

[0005] Chinese patent document CN108599544 A discloses a high-voltage enable circuit for DC-DC converters. This circuit forms an on-chip enable circuit suitable for ordinary thin-gate oxide CDMOS process by coordinating the functions of the internal power generation unit, voltage detection unit and comparison judgment unit. It solves the problem that the chip enable pin cannot be connected to an external high-voltage power supply, and does not require special processes, thus reducing process costs. However, it is only suitable for single high-level enable control and cannot support high-level enable and low-level enable at the same time.

[0006] Chinese patent document CN108512399 A discloses an enable control circuit for a switching power supply. This enable control circuit can realize fault signal self-locking and the function of multiple enable signals of both positive and negative logic jointly controlling the power enable terminal switch. However, its circuit is relatively complex, requiring active logic chips such as operational amplifiers, OR gates, NAND gates, and NOT gates, and requires an auxiliary power supply to power the chips. When applied to high-reliability application scenarios, the device cost is high.

[0007] Therefore, in order to overcome the shortcomings of the existing technology, there is an urgent need to implement a DC / DC converter enable circuit that is compatible with high and low level control. Summary of the Invention

[0008] The purpose of this invention is to provide a DC / DC converter enable circuit and its control method that are compatible with both high and low level control. This DC / DC converter enable circuit and its control method that are compatible with both high and low level control can overcome the shortcomings of the prior art and enable the DC / DC converter to be compatible with both high-level and low-level enable control.

[0009] To achieve the above objectives, the present invention adopts the following technical solution: A DC / DC converter enable circuit compatible with high and low level control, the enable circuit includes: a low level enable signal processing circuit, a high level enable signal processing circuit, and an enable signal control circuit.

[0010] The input terminal of the low-level enable signal processing circuit is used to receive a low-level enable control signal, and the output terminal is connected to the input terminal of the enable signal control circuit; the input terminal of the high-level enable signal processing circuit is used to receive a high-level enable control signal, and the output terminal is connected to the input terminal of the enable signal control circuit; the output terminal of the enable signal control circuit is used to connect to the enable pin of the DC / DC converter control chip; when the low-level enable control signal or the high-level enable control signal is valid, the enable circuit controls the DC / DC converter to enter the enable state.

[0011] Furthermore, the low-level enable signal processing circuit includes resistor R1, resistor R2, capacitor C1, and diode D2.

[0012] The first end of resistor R1 is connected to the power supply voltage VCC, and the second end is connected to the first end of resistor R2, the first end of capacitor C1, and the cathode of diode D2, serving as the input terminal of the low-level enable signal processing circuit for receiving the low-level enable control signal; the second end of resistor R2 and the second end of capacitor C1 are both grounded; the anode of diode D2 is the output terminal of the low-level enable signal processing circuit.

[0013] Furthermore, the high-level enable signal processing circuit includes diode D1, resistor R4, resistor R5, capacitor C2, and transistor Q2.

[0014] The anode of diode D1 is the input terminal of the high-level enable signal processing circuit, used to receive the high-level enable control signal, and the cathode is connected to the first terminal of resistor R4; the second terminal of resistor R4 is connected to the first terminal of resistor R5, the first terminal of capacitor C2, and the base of transistor Q2; the second terminals of resistor R5 and capacitor C2 are both grounded; the emitter of transistor Q2 is grounded, and the collector is the output terminal of the high-level enable signal processing circuit.

[0015] Furthermore, the enable signal control circuit includes resistor R3, diode D3, diode D4, diode D5, resistor R6, and transistor Q1.

[0016] The first end of resistor R3 is connected to the supply voltage VCC, and the second end is connected to the anode of diode D3, serving as the input terminal of the enable signal control circuit. The cathode of diode D3 is connected to the anode of diode D4. The cathode of diode D4 is connected to the anode of diode D5. The cathode of diode D5 is connected to the first end of resistor R6 and the base of transistor Q1. The second end of resistor R6 is grounded. The emitter of transistor Q1 is grounded, and its collector is the output terminal of the enable signal control circuit, used to connect to the enable pin of the DC / DC converter control chip.

[0017] Furthermore, the enable pin of the DC / DC converter control chip is enabled at a high level.

[0018] The present invention also includes a control method for the above-mentioned DC / DC converter enable circuit compatible with high and low level control, the method comprising: Obtain the status of the high-level enable control signal and the low-level enable control signal of the input; If the high-level enable control signal or the low-level enable control signal is valid, the enable signal control circuit outputs the corresponding control signal to control the enable pin of the DC / DC converter control chip to be in the enabled state, and the DC / DC converter enters the enabled working mode. If both the high-level enable control signal and the low-level enable control signal are invalid, the enable signal control circuit outputs the corresponding control signal to control the enable pin of the DC / DC converter control chip to be in the disabled state, and the DC / DC converter enters the disabled working mode.

[0019] Furthermore, when the high-level enable control signal is high, diode D1 is turned on, transistor Q2 is saturated and turned on, which pulls the input potential of the enable signal control circuit low, transistor Q1 is turned off, and the enable pin of the DC / DC converter control chip is in the enabled state.

[0020] Furthermore, when the low-level enable control signal is low, diode D2 is turned on, which pulls the input potential of the enable signal control circuit low, transistor Q1 is turned off, and the enable pin of the DC / DC converter control chip is in the enabled state.

[0021] Furthermore, when both the high-level enable control signal and the low-level enable control signal are invalid, the power supply voltage VCC provides a conduction voltage to the transistor Q1 through resistor R3, diode D3, diode D4, and diode D5, causing the transistor Q1 to saturate and conduct, pulling the enable pin of the DC / DC converter control chip low, and the converter is in a disabled state.

[0022] Compared with the prior art, the advantages of the present invention are: Compared to traditional DC / DC converters that only support a single high-level or low-level enable control, this invention is compatible with both high-level and low-level enable control logic simultaneously. This significantly improves the application flexibility of DC / DC converters in power systems and meets the diverse enable control needs of different users. By setting up low-level enable signal processing circuits, high-level enable signal processing circuits, and enable signal control circuits, this invention achieves simultaneous compatibility with both high-level and low-level enable signals without configuration, jumpers, or hardware modifications. When the high-level enable signal is valid, the DC / DC converter enters the enabled operating state; when the low-level enable signal is valid, the DC / DC converter also enters the enabled operating state; the converter is only disabled when both enable signals are invalid. This invention does not simply combine existing high-level and low-level enable circuits, but rather achieves automatic identification and control of two enable signals of different polarities through specific component connections and signal logic. This solves the technical problem that traditional enable circuits cannot simultaneously adapt to high and low level control and are limited in application scenarios. Attached Figure Description

[0023] Figure 1 This is a circuit diagram of the DC / DC converter enable circuit compatible with high and low level control in this invention.

[0024] in: 1. Low-level enable signal processing circuit; 2. High-level enable signal processing circuit; 3. Enable signal control circuit. Detailed Implementation

[0025] The present invention will be further described below with reference to the accompanying drawings: like Figure 1 The diagram illustrates a DC / DC converter enable circuit compatible with high and low level control. The circuit includes: a low-level enable signal processing circuit 1, a high-level enable signal processing circuit 2, and an enable signal control circuit 3.

[0026] Specifically, the main function of the low-level enable signal processing circuit 1 is: when the low-level enable control signal is low, this circuit controls the base-emitter voltage of transistor Q1 in the enable signal control circuit to be less than the conduction voltage (usually 0.7V), causing transistor Q1 to be cut off and its collector to be open, thereby controlling the DC / DC converter to enable output. The main function of the high-level enable signal processing circuit 2 is: when the high-level enable control signal is high, this circuit controls the base-emitter voltage of transistor Q1 in the enable signal control circuit to be less than the conduction voltage (usually 0.7V), causing transistor Q1 to be cut off and its collector to be open, thereby controlling the DC / DC converter to enable output. The main function of the enable signal control circuit 3 is: to receive control signals from the low-level enable signal processing circuit 1 and the high-level enable signal processing circuit 2, and by controlling the operating state of transistor Q1, to achieve level control of the enable pin of the DC / DC converter control chip, thereby completing the enable or disable function of the DC / DC converter.

[0027] In this embodiment, regardless of whether the low-level or high-level enable control signal is valid, the ultimate goal is to cut off transistor Q1, causing the enable pin of the DC / DC converter control chip to be in a high-impedance or high-level state, thus enabling the DC / DC converter output. Only when both enable signals are invalid will transistor Q1 conduct, pulling the enable pin low and disabling the DC / DC converter. The circuit described above uses only conventional discrete components, resulting in a simple structure and low cost. However, through specific connection relationships and logic coordination, it achieves automatic compatibility between high and low-level enable signals. It adapts to control signals of different polarities without configuration, jumpers, or hardware modifications, demonstrating strong versatility and wide applicability. This solves the technical problems of poor compatibility and inconvenience in using traditional enable circuits.

[0028] like Figure 1 As shown, the input terminal of the low-level enable signal processing circuit 1 is externally connected to a low-level enable control signal, and its output terminal is connected to the input terminal of the enable signal control circuit; the input terminal of the high-level enable signal processing circuit 2 is externally connected to a high-level enable control signal, and its output terminal is connected to the input terminal of the enable signal control circuit; the input terminal of the enable signal control circuit 3 is connected to the output terminals of the low-level enable signal processing circuit and the high-level enable signal processing circuit, and its output terminal is connected to the enable pin of the DC / DC converter control chip.

[0029] Furthermore, the low-level enable signal processing circuit 1 includes resistor R1, resistor R2, capacitor C1, and diode D2.

[0030] The first end of resistor R1 is connected to the power supply voltage VCC, and the second end is connected to the first end of resistor R2, the first end of capacitor C1, and the cathode of diode D2, and then connected to an external high-level enable control signal; the second end of resistor R2 is grounded; the second end of capacitor C1 is grounded; and the anode of diode D2 is the output terminal of low-level enable signal processing circuit 1.

[0031] Furthermore, the high-level enable signal processing circuit 2 includes a diode D1, a resistor R4, a resistor R5, a capacitor C2, and a transistor Q2.

[0032] The anode of diode D1 is the input terminal of the high-level enable signal processing circuit 2, and the cathode is connected to the first terminal of resistor R4; the second terminal of resistor R4 is connected to the first terminal of resistor R5, the first terminal of capacitor C2, and the base of transistor Q2; the second terminal of resistor R5 is grounded; the second terminal of capacitor C2 is grounded; the emitter of transistor Q2 is grounded, and the collector is the output terminal of the high-level enable signal processing circuit 2.

[0033] Furthermore, the enable signal control circuit 3 includes a resistor R3, a diode D3, a diode D4, a diode D5, a resistor R6, and a transistor Q1.

[0034] The first end of resistor R3 is connected to the supply voltage VCC, and the second end is connected to the anode of diode D3 as the input terminal of enable signal control circuit 3; the cathode of diode D3 is connected to the anode of diode D4; the cathode of diode D4 is connected to the anode of diode D5; the cathode of diode D5 is connected to the first end of resistor R6 and the base of transistor Q1; the second end of resistor R6 is grounded; the emitter of transistor Q1 is grounded, and the collector is the output terminal of enable signal control circuit 3, which is connected to the enable pin of DC / DC converter control chip.

[0035] Furthermore, the DC / DC converter control chip has an enable control pin, which is enabled at a high level.

[0036] In a second aspect of the invention, a control method for the above-described DC / DC converter enable circuit compatible with high and low level control is also disclosed, the method comprising the following steps: S1, DC / DC converter control disabled. When the external high-level enable control signal of the DC / DC converter is left floating, and the low-level enable control signal is left floating or is high, the enable control pin of the DC / DC converter control chip is pulled low, and the DC / DC converter is in a state of no output operation. When the external high-level enable control signal of the DC / DC converter is low, and the low-level enable control signal is left floating or is high, the enable control pin of the DC / DC converter control chip is pulled low, and the DC / DC converter is in a state of no output operation.

[0037] S2, DC / DC converter high-level enable control When the external high-level enable control signal of the DC / DC converter is high, regardless of the state of the low-level enable control signal, the enable control pin of the DC / DC converter control chip is left floating, and the DC / DC converter is in the enabled output working state.

[0038] S3, DC / DC converter low-level enable control When the external low-level enable control signal of the DC / DC converter is low, regardless of the state of the high-level enable control signal, the enable control pin of the DC / DC converter control chip is left floating, and the DC / DC converter is in the enabled output working state.

[0039] Furthermore, the DC / DC converter is disabled for control, including: When the external high-level enable control signal of the DC / DC converter is floating or low-level... Figure 1 In this configuration, diode D1 is cut off, and the base-emitter voltage of transistor Q2 is less than the forward voltage (typically 0.7V), causing transistor Q2 to be cut off and its collector to be open. At this time, if... Figure 1 If the low-level enable control signal is left floating or is high, then diode D2 will be cut off. Figure 1 The supply voltage VCC applies a voltage to the base-emitter junction of transistor Q1 through resistor R3, diode D3, diode D4, and diode D5. By adjusting the values ​​of resistors R3 and R6, when the base-emitter voltage of transistor Q1 is greater than its turn-on voltage (typically 0.7V), the base current of transistor Q1 is controlled, causing transistor Q1 to enter a saturation conduction state. The collector of transistor Q1 is pulled low, thereby controlling the DC / DC converter to enter a no-output operating state.

[0040] when Figure 1 When transistor Q1 is in saturation conduction mode, Figure 1The potential at point A is the sum of the base-emitter forward voltage drop of transistor Q1 (typically 0.7V) and the forward voltage drops of diodes D3, D4, and D5 (typically 0.7V), which is typically 0.7V + 0.7V + 0.7V + 0.7V = 2.8V. When Figure 1 When the low-level enable control signal is left floating, it is necessary to set the resistance values ​​of resistors R1 and R2 to enable it. Figure 1 A voltage higher than 2.1V at point B is required to ensure diode D2 is cut off; similarly, when... Figure 1 When the low-level enable control signal is high, the high level must be greater than 2.1V to ensure that diode D2 is cut off, thereby ensuring that the circuit works stably in the disabled state.

[0041] Furthermore, the high-level enable control of the DC / DC converter includes: When the external high-level enable control signal of the DC / DC converter is high... Figure 1 Diode D1 in the transistor is turned on, and an external high-level signal is applied to the base-emitter junction of transistor Q2 through diode D1 and resistor R4. By adjusting the values ​​of resistors R4 and R5, the base-emitter voltage of transistor Q2 is controlled to be greater than its turn-on voltage (typically 0.7V), simultaneously controlling the base current of transistor Q2, causing transistor Q2 to enter saturation conduction mode, and the collector potential of transistor Q2 is pulled low. At this time, regardless of the state of the low-level enable control signal, Figure 1 The potential at point A in the diagram is the collector-emitter saturation conduction voltage drop of transistor Q2, typically 0.3V. Diodes D3, D4, and D5 are all off, transistor Q1 is cut off with its collector open, and the DC / DC converter is enabled for output.

[0042] Furthermore, the low-level enable control of the DC / DC converter includes: When the external low-level enable control signal of the DC / DC converter is low, and the low level is less than 2.1V, diode D2 conducts. Figure 1 The potential at point A is pulled down to below 2.8V. At this time, regardless of the state of the high-level enable control signal, diodes D3, D4, and D5 are not conducting, transistor Q1 is cut off and its collector is open, and the DC / DC converter is enabled to output.

[0043] In summary, the logic control states are summarized in the table below:

[0044] The DC / DC converter enable circuit compatible with both high and low level control described in this invention, although employing conventional discrete components, is not a simple superposition of existing technologies in its overall circuit topology and control method; rather, it represents a creative effort. In existing technologies, DC / DC converter enable circuits typically only support a single high-level enable or a single low-level enable. To adapt to control signals of different polarities, hardware configuration must be modified, resulting in poor versatility and inconvenience. This invention, without increasing control complexity, using programmable devices, or changing hardware configuration, achieves automatic compatibility between high-level and low-level enable signals through specific coordination between the low-level enable signal processing circuit, the high-level enable signal processing circuit, and the enable signal control circuit. The converter is started when either signal is valid, and shut down when both are invalid.

[0045] In summary, traditional methods for addressing the diverse enable control requirements of different users for DC / DC converters involve designing separate high-level or low-level enable control circuits within the power module to provide different technical states for different users. This invention achieves consistent design of the DC / DC converter's technical state by simultaneously supporting both high-level and low-level enable control within a single technical state. The innovation of this invention lies in the invention of a low-level enable signal processing circuit, a high-level enable signal processing circuit, and an enable signal control circuit. This circuit controls the internal enable control pin of the PWM controller within the DC / DC power supply, innovatively enabling the same DC / DC power module to simultaneously support both high-level and low-level enable control. This effectively improves the application flexibility of the DC / DC converter and provides users with richer control options. This invention, through its control circuit, achieves simultaneous compatibility of high-level and low-level enable control, solving the problem in practical applications where different enable circuit requirements necessitate different technical states for the same power module. Using this invention, product technical states can be unified, transforming two previously separate product models into a single model.

[0046] The above-described embodiments are merely preferred embodiments of the present invention and are not intended to limit the scope of the present invention. Various modifications and improvements made by those skilled in the art to the technical solutions of the present invention without departing from the spirit of the present invention should fall within the protection scope defined by the claims of the present invention.

Claims

1. A DC / DC converter enable circuit compatible with high and low level control, characterized in that, The enabling circuit includes: a low-level enabling signal processing circuit (1), a high-level enabling signal processing circuit (2), and an enabling signal control circuit (3); The input terminal of the low-level enable signal processing circuit (1) is used to receive a low-level enable control signal, and the output terminal is connected to the input terminal of the enable signal control circuit (3); the input terminal of the high-level enable signal processing circuit (2) is used to receive a high-level enable control signal, and the output terminal is connected to the input terminal of the enable signal control circuit (3); the output terminal of the enable signal control circuit (3) is used to connect to the enable pin of the DC / DC converter control chip; when the low-level enable control signal or the high-level enable control signal is valid, the enable circuit controls the DC / DC converter to enter the enable state.

2. The DC / DC converter enable circuit compatible with high and low level control according to claim 1, characterized in that, The low-level enable signal processing circuit (1) includes resistor R1, resistor R2, capacitor C1 and diode D2; The first end of the resistor R1 is connected to the power supply voltage VCC, and the second end is connected to the first end of the resistor R2, the first end of the capacitor C1, and the cathode of the diode D2, and serves as the input end of the low-level enable signal processing circuit (1) to receive the low-level enable control signal; the second end of the resistor R2 and the second end of the capacitor C1 are both grounded; the anode of the diode D2 is the output end of the low-level enable signal processing circuit (1).

3. The DC / DC converter enable circuit compatible with high and low level control according to claim 2, characterized in that, The high-level enable signal processing circuit (2) includes diode D1, resistor R4, resistor R5, capacitor C2 and transistor Q2; The anode of diode D1 is the input terminal of the high-level enable signal processing circuit (2), used to receive the high-level enable control signal, and the cathode is connected to the first end of resistor R4; the second end of resistor R4 is connected to the first end of resistor R5, the first end of capacitor C2, and the base of transistor Q2; the second end of resistor R5 and the second end of capacitor C2 are both grounded; the emitter of transistor Q2 is grounded, and the collector is the output terminal of the high-level enable signal processing circuit (2).

4. The DC / DC converter enable circuit compatible with high and low level control according to claim 3, characterized in that, The enable signal control circuit (3) includes resistor R3, diode D3, diode D4, diode D5, resistor R6 and transistor Q1; The first end of resistor R3 is connected to the power supply voltage VCC, and the second end is connected to the anode of diode D3 and serves as the input terminal of the enable signal control circuit (3). The cathode of diode D3 is connected to the anode of diode D4. The cathode of diode D4 is connected to the anode of diode D5. The cathode of diode D5 is connected to the first end of resistor R6 and the base of transistor Q1. The second end of resistor R6 is grounded. The emitter of transistor Q1 is grounded, and the collector is the output terminal of the enable signal control circuit (3), used to connect to the enable pin of the DC / DC converter control chip.

5. The DC / DC converter enable circuit compatible with high and low level control according to claim 1, characterized in that: The enable pin of the DC / DC converter control chip is enabled at a high level.

6. The control method for the enable circuit of a DC / DC converter compatible with high and low level control according to any one of claims 1 to 5, characterized in that, The method includes: Obtain the status of the high-level enable control signal and the low-level enable control signal of the input; If the high-level enable control signal or the low-level enable control signal is valid, the enable signal control circuit outputs the corresponding control signal to control the enable pin of the DC / DC converter control chip to be in the enabled state, and the DC / DC converter enters the enabled working mode. If both the high-level enable control signal and the low-level enable control signal are invalid, the enable signal control circuit outputs the corresponding control signal to control the enable pin of the DC / DC converter control chip to be in the disabled state, and the DC / DC converter enters the disabled working mode.

7. The control method for the enable circuit of a DC / DC converter compatible with high and low level control according to claim 6, characterized in that, When the high-level enable control signal is high, diode D1 is turned on, transistor Q2 is saturated and turned on, which pulls the input potential of the enable signal control circuit low, transistor Q1 is turned off, and the enable pin of the DC / DC converter control chip is in the enabled state.

8. The control method for the enable circuit of a DC / DC converter compatible with high and low level control according to claim 6, characterized in that, When the low-level enable control signal is low, diode D2 is turned on, which pulls the input potential of the enable signal control circuit low, transistor Q1 is turned off, and the enable pin of the DC / DC converter control chip is in the enabled state.

9. The control method for the enable circuit of a DC / DC converter compatible with high and low level control according to claim 6, characterized in that, When both the high-level enable control signal and the low-level enable control signal are invalid, the power supply voltage VCC provides a conduction voltage to transistor Q1 through resistor R3, diode D3, diode D4, and diode D5, causing transistor Q1 to saturate and conduct, pulling the enable pin of the DC / DC converter control chip low, and the converter is in a disabled state.

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