A method for removing native oxide layer on a surface of polysilicon

Abstract

This invention relates to the field of semiconductor technology and discloses a method for removing a native oxide layer from the surface of polycrystalline silicon. The method includes: S1 providing a semiconductor substrate with a native oxide layer formed on its surface; S2 immersing the semiconductor substrate in an acid bath for acid treatment to remove the native oxide layer; S3 employing a first water treatment step to initially remove residual acid from the substrate surface; S4 cleaning the semiconductor substrate using the RCA cleaning method; S5 employing a second water treatment step to completely remove residual acid from the substrate surface; and S6 performing post-treatment and drying on the semiconductor substrate to complete the removal of the native oxide layer, followed by a subsequent metal layer deposition step. This method eliminates the need for large equipment and, by combining the RCA cleaning process with oxide layer removal, achieves better uniformity control compared to traditional vapor-phase reactions, ensuring the flatness and consistency of the wafer surface.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a method for removing the native oxide layer on the surface of polycrystalline silicon. Specifically, it can be applied to logic devices, mixed-signal devices, embedded memories, BCD (bipolar-complementary metal-oxide-semiconductor-double-diffused metal-oxide-semiconductor), trench MOSFETs, and high-voltage devices (such as power management integrated circuits) and related products and processes. Background Technology

[0002] With the continuous development of semiconductor technology, the size of semiconductor devices is gradually shrinking, leading to higher performance requirements. One issue is that semiconductor substrates are prone to oxidation in water- and oxygen-containing environments, forming a native oxide layer. This native oxide layer typically exhibits lattice defects and uneven thickness, thus requiring removal before subsequent metal dielectric layer deposition. Current methods for removing native oxide layers from polycrystalline silicon surfaces typically utilize vapor phase etching in an HF atmosphere; however, the equipment used in these techniques is outdated and difficult to maintain.

[0003] Therefore, there is a need in the prior art for an improved method for removing the native oxide layer on the surface of polycrystalline silicon. Summary of the Invention

[0004] In view of this, the purpose of this invention is to propose a method for removing the native oxide layer on the surface of polycrystalline silicon without the need for large equipment. The oxide layer is removed by combining the RCA cleaning process, which can achieve better uniformity control compared with traditional gas phase reaction, and ensure the flatness and consistency of the wafer surface.

[0005] To achieve the above objectives, embodiments of the present invention provide a method for removing the native oxide layer on the surface of polycrystalline silicon, comprising the following steps: S1 provides a semiconductor substrate, on the surface of which a native oxide layer is formed; S2 involves placing the semiconductor substrate in an acid bath for acid treatment to remove the native oxide layer; S3 employs a first water treatment step to initially remove residual acid from the substrate surface; S4 uses the RCA cleaning method to clean the semiconductor substrate; S5 employs a second water treatment step to completely remove residual acid from the substrate surface; S6 performs post-processing and drying on the semiconductor substrate to remove the native oxide layer and then performs subsequent metal layer deposition steps.

[0006] In some embodiments, the method further includes: after the second water treatment step, a third water treatment step is performed to rapidly rinse the substrate with ultrapure water, wherein the flow rate of ultrapure water is 5~10L / min and the rinsing time is 300~350s.

[0007] In some embodiments, in S2, the acid solution is a hydrofluoric acid solution, the volume ratio of water to hydrofluoric acid in the hydrofluoric acid solution is 10:1, and the acid treatment time is 20~25s.

[0008] In some embodiments, in S3, the first water treatment step uses a room temperature water bath to clean the substrate, the temperature of the ultrapure water is 20~30°C, and the cleaning time is 300~350s.

[0009] In some embodiments, in S4, RCA cleaning includes a first standard cleaning, wherein the cleaning solution comprises NH4OH:H2O2:H2O = (1:1:5) to (1:2:7) by volume, the cleaning temperature is 70 to 80°C, and the cleaning time is 300 to 350 seconds.

[0010] In some embodiments, in S5, the second water treatment step uses a high-temperature water bath to clean the substrate, the temperature of the ultrapure water is 50~100°C, and the cleaning time is 390~400s.

[0011] In some embodiments, in S6, the post-treatment is an isopropanol immersion process for 5-10 seconds, followed by drying with nitrogen.

[0012] In some embodiments, in S6, a dryer is used to dry the substrate at a temperature of 100~200°C for a drying time of 480~530s.

[0013] In some implementations, a level sensor is installed in the acid tank.

[0014] In some embodiments, the semiconductor substrate comprises, from bottom to top, a substrate, an oxide layer, and a polysilicon layer, wherein the surface of the polysilicon layer has a native oxide layer.

[0015] The present invention has at least the following beneficial technical effects: This invention improves the method of removing the native oxide layer by combining the RCA cleaning process to remove and clean the native oxide layer. The advantages of acid tank treatment are: first, it can achieve better surface uniformity control and avoid uneven etching on the wafer surface; second, it can reduce the risk of damage to the microstructure of the wafer surface and protect the wafer integrity; and third, it can improve the safety and environmental protection of the process, reduce the volatilization and hazards of chemical substances, and make the waste liquid easier to treat.

[0016] Specifically, this invention is applicable to logic elements, mixed-signal elements, embedded memories, BCD (bipolar-complementary metal-oxide-semiconductor-double-diffused metal-oxide-semiconductor), trench MOSFETs, and high-voltage components (such as power management integrated circuits) and related products and processes. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other embodiments can be obtained based on these drawings without creative effort.

[0018] Figure 1 A flowchart illustrating an embodiment of removing the native oxide layer on the surface of polycrystalline silicon provided by the present invention; Figure 2 This is a schematic diagram of an embodiment of the water treatment and post-treatment provided by the present invention.

[0019] Explanation of reference numerals in the attached figures: 1. Semiconductor substrate; 2. Oxide layer; 3. Metal dielectric layer; 4. Water tank; 5. Nozzle; 6. Liquid level sensor; 7. pH sensor. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of the present invention clearer, the embodiments of the present invention will be further described in detail below with reference to specific examples and the accompanying drawings.

[0021] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the invention. For example, terms such as “length,” “width,” “upper,” “lower,” “left,” “right,” “front,” “rear,” “vertical,” “horizontal,” “top,” “bottom,” “inner,” and “outer” indicate orientations or positions based on the orientations or positions shown in the accompanying drawings and are for ease of description only, and should not be construed as limiting the technical solution.

[0022] The terms "comprising" and "having," and any variations thereof, used in the specification, claims, and accompanying drawings of this invention are intended to cover non-exclusive inclusion; the terms "first," "second," etc., used in the specification, claims, and accompanying drawings are used to distinguish different objects, not to describe a particular order. "A plurality of" means two or more, unless otherwise explicitly specified.

[0023] In the description and claims of this invention and the foregoing drawings, when an element is referred to as "fixed to," "mounted to," "disposed on," or "connected to" another element, it can be located directly or indirectly on that other element. For example, when an element is referred to as "connected to" another element, it can be directly or indirectly connected to that other element.

[0024] Furthermore, the reference to "embodiment" herein means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of the invention. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0025] In existing technologies, hydrofluoric acid vapor phase etching (HPV) can remove the native oxide layer, but due to the characteristics of the vapor phase reaction, it can lead to uneven etching on the wafer surface. The angle and concentration of hydrofluoric acid molecules in the vapor phase contacting the wafer surface can vary in different areas, especially for large wafers or complex semiconductor structures, where this unevenness is more pronounced. Furthermore, HPV etching is a relatively vigorous reaction process. During HPV etching, the highly reactive hydrofluoric acid molecules can damage the microstructure of the wafer surface. For example, it may cause localized damage to the silicon lattice or form tiny pits on the wafer surface. These microscopic defects can affect the quality of subsequent semiconductor processes, such as causing uneven film growth during thin film deposition.

[0026] Therefore, based on the problems existing in the prior art, the present invention provides a method for removing the native oxide layer on the surface of polycrystalline silicon, comprising the following steps: S1 provides a semiconductor substrate, and a native oxide layer is formed on the surface of the semiconductor substrate 1; S2 involves placing the semiconductor substrate in an acid bath for acid treatment to remove the native oxide layer; S3 employs a first water treatment step to initially remove residual acid from the substrate surface; S4 uses the RCA cleaning method to clean the semiconductor substrate; S5 employs a second water treatment step to completely remove residual acid from the substrate surface; S6 performs post-processing and drying on the semiconductor substrate to remove the native oxide layer and then performs subsequent metal layer deposition steps.

[0027] like Figure 1The flowchart shown is an embodiment of the removal of the native oxide layer on the surface of polycrystalline silicon provided by the present invention. As shown in 1-a, the provided semiconductor substrate 1, during the semiconductor substrate manufacturing process, especially when exposed to air, the semiconductor surface inevitably reacts with oxygen to form a natural oxide layer. Taking a silicon (Si) substrate as an example, silicon atoms react with oxygen in the air to generate silicon dioxide (SiO2) on the surface. This is a naturally occurring process; even in a relatively clean environment, as long as the substrate surface comes into contact with air, an oxide layer will gradually form. The thickness of the oxide layer is usually related to factors such as exposure time, ambient humidity, and temperature. Figure 1 -b shows the oxide layer 2 formed on the surface of semiconductor substrate 1. The natural oxide layer formed during semiconductor substrate production has a significant impact on resistive properties. It alters carrier mobility because the charge in the oxide layer generates an electric field that scatters carriers. For example, the silicon dioxide layer on a silicon substrate hinders electron movement, reducing mobility and thus decreasing conductivity and increasing resistance. It also causes changes in the band structure, with interface states introducing energy levels in the band gap to trap carriers, reducing the number of effective carriers and increasing resistance. Furthermore, at the metal-semiconductor contact, the oxide layer forms an insulating layer, increasing the difficulty for electrons to cross the potential barrier, significantly increasing contact resistance, and ultimately affecting the resistive characteristics of the entire semiconductor device.

[0028] Therefore, the method provided by the present invention involves placing a substrate with an oxide layer into an acid bath for acid treatment to remove it, thereby obtaining, as shown in the figure. Figure 1 The substrate shown in -c can be followed by the deposition of a metal dielectric layer 3, as shown in the image. Figure 1 -d is shown.

[0029] Furthermore, the method also includes: after the second water treatment step, a third water treatment step is used to rapidly rinse the substrate with ultrapure water, the flow rate of which is 5~10L / min and the rinsing time is 300~350s.

[0030] Furthermore, in S2, the acid solution is a hydrofluoric acid solution, the volume ratio of water to hydrofluoric acid in the hydrofluoric acid solution is 10:1, and the acid treatment time is 20~25s.

[0031] Furthermore, in S3, the first water treatment step uses a room temperature water bath to clean the substrate, with the temperature of the ultrapure water being 20~30℃ and the cleaning time being 300~350s.

[0032] Furthermore, in S4, RCA cleaning includes a first standard cleaning, calculated by volume ratio, in which the cleaning solution comprises NH4OH:H2O2:H2O = (1:1:5)~(1:2:7), the cleaning temperature is 70~80℃, and the cleaning time is 300~350s.

[0033] Furthermore, in S5, the second water treatment step uses a high-temperature water bath to clean the substrate, with the temperature of the ultrapure water being 50~100℃ and the cleaning time being 390~400s.

[0034] Furthermore, in S6, the post-treatment is an isopropanol immersion process with an immersion time of 5-10 seconds, followed by drying with nitrogen.

[0035] Furthermore, in S6, a dryer is used to dry the substrate at a temperature of 100~200°C for a drying time of 480~530s.

[0036] Furthermore, a level sensor is installed in the acid tank.

[0037] Furthermore, the semiconductor substrate comprises, from bottom to top, a substrate, an oxide layer, and a polysilicon layer, with the surface of the polysilicon layer having a native oxide layer.

[0038] The present invention will be further explained below with reference to specific embodiments.

[0039] S1 provides a silicon substrate with a native oxide layer naturally formed on the substrate surface; S2 involves placing the semiconductor substrate in an acid bath for acid treatment to remove the native oxide layer; In this step, the acid in the acid tank is a hydrofluoric acid solution with a water-to-hydrofluoric acid volume ratio of 10:1, and the acid treatment time is 20 seconds.

[0040] S3 employs a first water treatment step to initially remove residual acid from the substrate surface; like Figure 2 As shown in -a, in this step, the first water treatment step uses a room temperature water bath 4 to clean the substrate. Two nozzles 2 are symmetrically arranged at the bottom of the water bath. A liquid level sensor 6 and a pH sensor are installed in the water bath 4. The subsequent high-temperature water bath and rapid rinsing water bath are similar to this step and will not be described in detail. In this step, the temperature of the ultrapure water is 20°C, and the cleaning time is 300 seconds.

[0041] S4 uses the RCA cleaning method to clean the semiconductor substrate; In this step, RCA cleaning includes a first standard cleaning, calculated by volume ratio, in which the cleaning solution consists of NH4OH:H2O2:H2O = 1:1:5, the cleaning temperature is 70°C, and the cleaning time is 300s.

[0042] RCA (Rich Catheterization) cleaning is performed in a liquid environment. In the acid tank, the cleaning solution fully surrounds the wafer, ensuring uniform contact of the cleaning solution with all parts of the wafer surface. By properly configuring the composition, concentration, and agitation method of the cleaning solution, a more uniform removal of the native oxide layer from the entire wafer surface can be achieved. For example, using suitable agitation devices in the acid tank, such as magnetic stirrers or circulating pumps, to circulate the cleaning solution within the tank effectively avoids over- or under-cleaning in certain areas, ensuring the flatness and consistency of the wafer surface.

[0043] S5 employs a second water treatment step to completely remove residual acid from the substrate surface; In this step, such as Figure 2 As shown in -b, the second water treatment step uses a high-temperature water bath to clean the substrate. The temperature of the ultrapure water is 70°C, and the cleaning time is 390s.

[0044] S6 performs post-processing and drying on the semiconductor substrate to remove the native oxide layer and then performs subsequent metal layer deposition steps.

[0045] In this step, the post-treatment involves isopropanol immersion for 5 seconds, followed by a quick rinse (F / R cleaning). Figure 2 As shown in -c, F / R cleaning involves rapidly injecting a large amount of ultrapure water and quickly draining it, removing residual chemicals from the surface. The principle is to utilize the fluidity and dilution effect of water to wash contaminants away from the silicon wafer surface, and finally, nitrogen gas is used to dry it.

[0046] The method of the present invention has the following advantages: First, it enables better control of surface uniformity, avoiding uneven etching on the wafer surface; second, it reduces the risk of damage to the microstructure of the wafer surface, protecting wafer integrity; third, it improves the safety and environmental friendliness of the process, reduces the volatilization and hazards of chemicals, and makes waste liquid easier to treat. In addition, it also has advantages such as significant cleaning effect, wide applicability, high degree of automation, precise control, and energy saving.

[0047] The above are exemplary embodiments disclosed in this invention. However, it should be noted that various changes and modifications can be made without departing from the scope of the embodiments of this invention as defined by the claims. The functions, steps, and / or actions of the methods according to the disclosed embodiments described herein do not need to be performed in any particular order. Furthermore, although the elements disclosed in the embodiments of this invention may be described or claimed individually, they may be understood as multiple unless explicitly limited to a singular number.

[0048] It should be understood that, as used herein, the singular form “a” is intended to include the plural form as well, unless the context clearly supports an exception. It should also be understood that, as used herein, “and / or” refers to any and all possible combinations of one or more of the associated listed items.

[0049] The embodiment numbers disclosed in the above embodiments of the present invention are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0050] Those skilled in the art should understand that the discussion of any of the above embodiments is merely exemplary and is not intended to imply that the scope of the invention (including the claims) is limited to these examples. Within the framework of the invention, technical features of the above embodiments or different embodiments can be combined, and many other variations of different aspects of the invention exist, which are not provided in the details for the sake of brevity. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the invention should be included within the protection scope of the invention.

Claims

1. A method for removing the native oxide layer on the surface of polycrystalline silicon, characterized in that, include: S1 provides a semiconductor substrate, on the surface of which a native oxide layer is formed; S2. The semiconductor substrate is placed in an acid bath for acid treatment to remove the native oxide layer; S3 employs a first water treatment step to initially remove residual acid from the substrate surface; S4 uses the RCA cleaning method to clean the semiconductor substrate; S5 employs a second water treatment step to completely remove residual acid from the substrate surface; S6 performs post-processing and drying on the semiconductor substrate to remove the native oxide layer, and then performs subsequent metal layer deposition steps.

2. The method for removing the native oxide layer on the surface of polycrystalline silicon according to claim 1, characterized in that, Also includes: After the second water treatment step, a third water treatment step is performed to rapidly rinse the substrate with ultrapure water at a flow rate of 5~10L / min and a rinsing time of 300~350s.

3. The method for removing the native oxide layer on the surface of polycrystalline silicon according to claim 1, characterized in that, In S2, the acid solution is a hydrofluoric acid solution, and the volume ratio of water to hydrofluoric acid in the hydrofluoric acid solution is 10:

1. The acid treatment time is 20~25s.

4. The method for removing the native oxide layer on the surface of polycrystalline silicon according to claim 1, characterized in that, In S3, the first water treatment step uses a room temperature water bath to clean the substrate. The temperature of the ultrapure water is 20~30℃, and the cleaning time is 300~350s.

5. The method for removing the native oxide layer on the surface of polycrystalline silicon according to claim 1, characterized in that, In S4, the RCA cleaning includes a first standard cleaning, which, by volume ratio, comprises NH4OH:H2O2:H2O = (1:1:5) to (1:2:7), with a cleaning temperature of 70 to 80°C and a cleaning time of 300 to 350 seconds.

6. The method for removing the native oxide layer on the surface of polycrystalline silicon according to claim 1, characterized in that, In S5, the second water treatment step uses a high-temperature water bath to clean the substrate. The temperature of the ultrapure water is 50~100℃, and the cleaning time is 390~400s.

7. The method for removing the native oxide layer on the surface of polycrystalline silicon according to claim 1, characterized in that, In S6, the post-treatment is an isopropanol immersion procedure with an immersion time of 5-10 seconds, followed by drying with nitrogen gas.

8. The method for removing the native oxide layer on the surface of polycrystalline silicon according to claim 1, characterized in that, In S6, a dryer is used to dry the substrate at a temperature of 100~200°C for a drying time of 480~530s.

9. The method for removing the native oxide layer on the surface of polycrystalline silicon according to claim 1, characterized in that, The acid tank is equipped with a liquid level sensor.

10. The method for removing the native oxide layer on the surface of polycrystalline silicon according to claim 1, characterized in that, The semiconductor substrate comprises, from bottom to top, a substrate, an oxide layer, and a polysilicon layer, with the surface of the polysilicon layer having a native oxide layer.

Images