Method for filling a via with a metal film

Abstract

A method for depositing a metal film into a feature on a substrate is disclosed. Specifically, the method may include a low-temperature plasma deposition step, a thermal etching step, and a selective filling step. This method allows for the deposition of a metal film with low contact resistance at the interface, resulting in better electrical performance of the semiconductor device.

Description

Invention Field

[0001] This disclosure generally relates to processes for manufacturing electronic devices. More specifically, this disclosure relates to filling through-holes with a metal film. The metal film may include, for example, niobium, molybdenum, ruthenium, or tungsten. Background Technology

[0002] In the fabrication of semiconductor devices, substrates can have defined features. These features may require the deposition of metal films, creating metal-metal interfaces. However, contaminants (such as carbon) can migrate onto the metal, resulting in high contact resistance at the metal-metal interface. This can lead to undesirable electrical properties in the resulting semiconductor device.

[0003] Therefore, there is a need for a method for forming a metal film in a via that allows for lower contact resistance at the metal-metal interface of a semiconductor device. Summary of the Invention

[0004] In at least one embodiment of the present invention, a method for depositing a semiconductor film in features of a substrate is disclosed. The method may include: providing a substrate having a plurality of features for processing in a reaction chamber; depositing a metal film onto the substrate via a low-temperature plasma deposition process; thermally etching a portion of the metal film such that the remainder of the metal film is located at the bottom of the plurality of features; and selectively depositing a metal filler layer within the plurality of features, wherein the metal filler layer comprises at least one of niobium, molybdenum, ruthenium, or tungsten.

[0005] In at least one embodiment of the present invention, a semiconductor processing system is disclosed. The semiconductor processing system may include: a reaction chamber; a substrate holder disposed within the reaction chamber and configured to hold a substrate to be processed; a gas distributor configured to distribute gas onto a substrate disposed on the substrate holder; at least one gas source for supplying gas to the substrate on the substrate holder; and an RF source for generating plasma from the gas. The semiconductor processing system is configured to perform a process including: providing a substrate having a plurality of features for processing in the reaction chamber; depositing a metal film onto the substrate via a low-temperature plasma deposition process; thermally etching a portion of the metal film such that the remainder of the metal film is located at the bottom of the plurality of features; and selectively depositing a metal filler layer within the plurality of features, wherein the metal filler layer comprises at least one of niobium, molybdenum, ruthenium, or tungsten.

[0006] For the purpose of summarizing the invention and its advantages relative to the prior art, certain objects and advantages of the invention have been described above. It should be understood, of course, that not all of these objects or advantages may necessarily be achieved according to any particular embodiment of the invention. Therefore, for example, those skilled in the art will recognize that the invention may be embodied or implemented in a manner that achieves or optimizes one or more advantages taught or suggested herein, without necessarily achieving other objects or advantages that may be taught or suggested herein.

[0007] All these embodiments are intended to fall within the scope of the invention disclosed herein. These and other embodiments will be readily apparent to those skilled in the art from the following detailed description of certain embodiments with reference to the accompanying drawings. The invention is not limited to any particular embodiment disclosed. Attached Figure Description

[0008] This patent or application document contains at least one color drawing. A copy of this patent or application disclosure with color drawings will be provided by the Patent Office upon request and payment of the necessary fees.

[0009] These and other features, aspects, and advantages of the invention disclosed herein are described below with reference to the accompanying drawings of certain embodiments, which are intended to illustrate rather than limit the invention.

[0010] Figures 1A to 1C This is a flowchart illustrating a method according to at least one embodiment of the present invention.

[0011] Figures 2A to 2D This is a cross-sectional view of a semiconductor device according to at least one embodiment of the present invention.

[0012] Figure 3A This is a cross-sectional view of a semiconductor device according to at least one embodiment of the present invention.

[0013] Figure 3B This is a top-down view of a semiconductor device according to at least one embodiment of the present invention.

[0014] Figure 3C This is a cross-sectional view of a semiconductor device according to at least one embodiment of the present invention.

[0015] Figure 4 This is a cross-sectional view of a semiconductor processing system according to at least one embodiment of the present invention.

[0016] It should be understood that the elements in the accompanying drawings are shown for simplicity and clarity and are not necessarily drawn to scale. For example, the dimensions of some elements in the drawings may be exaggerated relative to other elements to aid in understanding the embodiments shown in this disclosure. Detailed Implementation

[0017] Although certain embodiments and examples are disclosed below, those skilled in the art will understand that the invention extends beyond the specific embodiments and / or uses disclosed herein, as well as their obvious modifications and equivalents. Therefore, it is intended that the scope of the disclosed invention should not be limited to the specific embodiments described below.

[0018] As used herein, the term "substrate" can refer to any one or more underlying materials, including any one or more underlying materials that can be modified or on which devices, circuits, or films can be formed. A "substrate" can be continuous or discontinuous; rigid or flexible; solid or porous; and combinations thereof. A substrate can be in any form, such as powder, plate, or workpiece. Plate-type substrates can include wafers of various shapes and sizes. Substrates can be made of semiconductor materials, including, for example, silicon, silicon germanium, silicon oxide, gallium arsenide, gallium nitride, or silicon carbide.

[0019] Figure 1A A semiconductor deposition process 100 according to at least one embodiment of the present invention is illustrated. The process 100 includes: (1) a step 110 of providing a substrate having features; (2) a step 120 of low-temperature plasma deposition of a metal film; (3) a step 130 of thermal etching; and (4) a step 140 of selective metal filling. The process can be repeated via a repetition loop 150 to achieve a desired fill thickness.

[0020] Step 110 includes placing a featured substrate into a semiconductor processing chamber. The semiconductor processing chamber may include a single-wafer chamber or a multi-wafer chamber, or may be part of a dual-chamber module or a four-chamber module. The semiconductor processing chamber may be configured to be performed via atomic layer deposition (ALD), plasma-enhanced atomic layer deposition (PEALD), chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), epitaxial deposition, or physical vapor deposition (PVD).

[0021] Step 120 can be performed at a temperature below 400°C or below 350°C. Step 120 of low-temperature plasma deposition of the metal film may include multiple sub-steps. The metal film may include at least one of niobium, molybdenum, ruthenium, or tungsten. Figure 1B The sub-steps shown may include: (1) allowing the metal precursor and reducing gas to flow 121; (2) stopping the flow of the metal precursor and allowing the purge gas to flow 123; (3) applying RF power to form a plasma 125; (4) stopping the RF power 127; and (5) stopping the flow of the purge gas 129. In sub-step 125, the application of RF power to form a plasma allows the metal precursor and reducing gas to react to form a metal film on the substrate.

[0022] The metal precursor in sub-step 121 may include at least one of the following: tungsten tetrafluoride (WOF4); tungsten tetrachloride (WOCl4); tungsten dichlorodioxide (WO2Cl2); tungsten pentachloride (WCl5); tungsten hexachloride (WCl6); tungsten hexafluoride (WF6); molybdenum tetrafluoride (MoOF4); molybdenum tetrachloride (MoOCl4); molybdenum dichlorodioxide (MoO2Cl2); molybdenum dibromodioxide (MoO2Br2); molybdenum oxyiodide (MoO2I or Mo4O) 11 I); Molybdenum pentachloride (MoCl5); Molybdenum hexafluoride (MoF6); Niobium pentachloride (NbCl5); Niobium pentabromide (NbBr5); (tert-butylimino)tris(diethylamino)niobium (((CH3)6N)3NbN(CH3)3); Allylruthenium tricarbonyl (Ru3(CO) 12 ); or carbonyl ruthenium complex (Ru(PF3)4H2).

[0023] The purge gas may include at least one of the following: nitrogen (N2), argon (Ar), helium (He), krypton (Kr), other inert gases, or combinations thereof. The reactant gas may be a reducing gas to allow the formation of a pure metal film. The reducing gas may include at least one of the following: ammonia (NH3), hydrogen (H2), diborane (B2H6); silane (SiH4); germanane (GeH4); monomethylhydrazine (MMH); hydrazine (N2H4); or combinations thereof.

[0024] Step 130 is a thermal etching step using a metal chloride precursor to partially remove the metal film deposited in step 120. The metal chloride precursor may include at least one of the following: molybdenum hexafluoride (MoF6); molybdenum pentachloride (MoCl5); molybdenum hexabromide (MoBr6); tungsten hexafluoride (WF6); fluoride (F2); carbon tetrafluoride (CF4); nitrogen trifluoride (NF3); sulfur hexafluoride (SF6); chlorine (Cl2); carbon tetrachloride (CCl4); or boron trichloride (BCl3). Step 130 may be performed at a temperature of 400°C. Step 130 may be an etch-back step to leave a layer or ring at the bottom of the feature.

[0025] Step 140 may be a selective metal filling step, which includes multiple sub-steps to deposit a metal film into the feature. The metal film may include at least one of niobium, molybdenum, ruthenium, or tungsten. Figure 1CThe sub-steps shown may include: (1) flowing a metal precursor 142; (2) flowing a purge gas 144; (3) flowing a reactant gas that reacts with the metal precursor to form a metal film 146; and (4) flowing a purge gas 148. The selective metal filling step 140 may allow the feature to be filled from the bottom up. The selective metal filling step 140 may optionally include the use of an inhibitor to prevent deposition at the top of the feature.

[0026] The metal precursor may include at least one of the following: tungsten tetrafluoride (WOF4); tungsten tetrachloride (WOCl4); tungsten dichlorodioxide (WO2Cl2); tungsten pentachloride (WCl5); tungsten hexachloride (WCl6); tungsten hexafluoride (WF6); molybdenum tetrafluoride (MoOF4); molybdenum tetrachloride (MoOCl4); molybdenum dichlorodioxide (MoO2Cl2); molybdenum dibromodioxide (MoO2Br2); molybdenum oxyiodide (MoO2I or Mo4O) 11 I); Molybdenum pentachloride (MoCl5); Molybdenum hexafluoride (MoF6); Niobium pentachloride (NbCl5); Niobium pentabromide (NbBr5); (tert-butylimino)tris(diethylamino)niobium (((CH3)6N)3NbN(CH3)3); Allylruthenium tricarbonyl (Ru3(CO) 12 ); or carbonyl ruthenium complex (Ru(PF3)4H2).

[0027] The purge gas in steps 144 and 148 may include at least one of the following: nitrogen (N2), argon (Ar), helium (He), krypton (Kr), other inert gases, or combinations thereof. The reactant gas in step 146 may be a reducing gas to allow the formation of a pure metal film. The reactant gas may include at least one of the following: ammonia (NH3), hydrogen (H2), diborane (B2H6); silane (SiH4); germanane (GeH4); monomethylhydrazine (MMH); hydrazine (N2H4); or combinations thereof.

[0028] Figure 2A A semiconductor device 200 according to at least one embodiment of the present invention is shown. The semiconductor device 200 shows a substrate to be provided into a reaction chamber to undergo the metal-filling process described above. The semiconductor device 200 includes a wafer 210, a metal layer 220, a low-k layer 230, and a silicon oxide layer 240. The wafer 210 may include at least one of the following: silicon, silicon germanium, silicon oxide, gallium arsenide, gallium nitride, or silicon carbide.

[0029] Metal layer 220 may be deposited on wafer 210 and may include at least one of niobium, molybdenum, ruthenium, or tungsten. The region above metal layer 220 between two low-k layers 230 may be a site for depositing additional metal films, thereby creating a metal-metal interface. Metal layer 220 may be a site where contaminants may migrate, leading to a degradation in electrical performance.

[0030] The low-k layer 230 may be disposed on the metal layer 220 and may include at least one of the following: silicon nitride (SiN), silicon oxycarbide (SiOC), silicon oxycarbonate (SiOCN), organosilicon glass, or silicon dioxide (SiO2). The silicon oxide layer 240 may be deposited on the low-k layer.

[0031] Figure 2B A semiconductor device 200 according to at least one embodiment of the present invention is shown. The semiconductor device 200 undergoes a low-temperature PEALD step, whereby a metal film 250 is deposited on top of a silicon oxide layer 240 and a metal layer 220. The metal film 250 may include at least one of niobium, molybdenum, ruthenium, or tungsten. The location where the metal film 250 and the metal layer 220 meet is the metal-metal interface previously discussed.

[0032] Figure 2C A semiconductor device 200 according to at least one embodiment of the present invention is shown. The semiconductor device 200 undergoes a thermal etching step, thereby removing a portion of the metal film 250, such that the remaining metal film 250 is disposed on top of the metal layer 220. Although the metal film 250 is shown to have a thickness substantially the same as that of the low-k layer 230, the metal film 250 does not need to be etched to that thickness. The metal film 250 may be thinner or thicker than the low-k layer 230.

[0033] Figure 2D A semiconductor device 200 according to at least one embodiment of the present invention is shown. The semiconductor device 200 undergoes a selective filling step, thereby depositing a metal filler layer 260 into the features. Furthermore, although the metal filler layer 260 is shown to have a thickness substantially the same as that of the silicon oxide layer 240, the metal filler layer 260 does not need to be etched to that thickness. The metal filler layer 260 may be thinner or thicker than the silicon oxide layer 240. Most likely made of the same material as the metal film 250, the metal filler layer 260 may include at least one of niobium, molybdenum, ruthenium, or tungsten.

[0034] Figure 3AA semiconductor device 300 according to at least one embodiment of the present invention is shown. The semiconductor device 300 shows a substrate to be provided into a reaction chamber to undergo the metal-filling process described above. The semiconductor device 300 includes a wafer 310, a metal layer 320, a low-k layer 330, a silicon oxide layer 340, and a metal ring layer 350. The wafer 310 may include at least one of silicon, silicon germanium, silicon oxide, gallium arsenide, gallium nitride, or silicon carbide.

[0035] Metal layer 320 may be deposited on wafer 310 and may include at least one of niobium, molybdenum, ruthenium, or tungsten. Low-k layer 330 may be disposed on metal layer 320 and may include at least one of silicon nitride (SiN), silicon oxycarbide (SiOC), silicon oxycarbonate (SiOCN), organosilicon glass, or silicon dioxide (SiO2). Silicon oxide layer 340 may be deposited on low-k layer.

[0036] After a thermal etching step according to at least one embodiment of the invention, the thermal etching step may not completely remove the metal layer, thereby producing a metal ring layer 350. The metal ring layer 350 may be disposed on the metal layer 320 and includes at least one of niobium, molybdenum, ruthenium, or tungsten.

[0037] Typically, it may be necessary to remove the metal ring layer 350 so that further processing can produce the desired electrical properties. However, the benefit that the metal ring layer 350 can provide is that it prevents contaminants within the low-k layer 330 or the silicon oxide layer 340 from migrating onto the metal layer 320.

[0038] Figure 3B A semiconductor device 300 according to at least one embodiment of the present invention is shown. Viewed from top, the semiconductor device 300 includes a centrally located metal layer 320, followed by a metal ring layer 350 disposed radially from the metal layer 320. Then, a silicon oxide layer 340 surrounds the metal ring layer 350.

[0039] Figure 3C A semiconductor device 300 according to at least one embodiment of the present invention is illustrated. The semiconductor device 300 undergoes a selective filling step, thereby depositing a metal filler layer 360 into the features. Furthermore, although the metal filler layer 360 is shown to have a thickness substantially the same as that of the silicon oxide layer 340, the metal filler layer 360 does not need to be etched to that thickness. The metal filler layer 360 may be thinner or thicker than the silicon oxide layer 340. Most likely made of the same material as the metal ring layer 350, the metal filler layer 360 may include at least one of niobium, molybdenum, ruthenium, or tungsten.

[0040] Figure 4A semiconductor processing system 400 according to at least one embodiment of the present invention is shown. The semiconductor processing system 400 may include: a reaction chamber 410; a substrate holder 420 within the reaction chamber 410; a gas distributor 430; a gas manifold 440; a first gas source 450A; a second gas source 450B; a third gas source 450C; and an RF power source 460. The substrate holder 420 may be configured to hold a substrate 470 undergoing the deposition process described above.

[0041] Gas distributor 430 is used to distribute metal precursor gas, reducing gas, reactive gas, or purge gas on substrate 470. Gas manifold 440 can be configured to receive gas from first gas source 450A, second gas source 450B, and third gas source 450C. Although in Figure 4 Three gas sources are shown, but more or fewer gas sources may be present in the semiconductor processing system 400. RF power source 460 may supply RF power to gas distributor 430 or other parts of the semiconductor processing system 400 to form a plasma with the gas in reaction chamber 410. The gas can then react to form a metal layer or metal-filled layer as previously disclosed.

[0042] The specific embodiments shown and described are illustrative of the invention and its best mode, and are not intended to limit the scope of aspects and embodiments in any way. In fact, for the sake of brevity, conventional manufacturing, connection, fabrication, and other functional aspects of the system may not be described in detail. Furthermore, the connecting lines shown in the figures are intended to represent exemplary functional relationships and / or physical connections between various elements. Many alternative or additional functional relationships or physical connections may exist in the actual system, and / or may not exist in some embodiments.

[0043] It should be understood that the configurations and / or methods described herein are exemplary in nature, and these specific embodiments or examples herein should not be considered limiting, as many variations are possible. The particular routines or methods described herein may represent one or more of any number of processing strategies. Therefore, the various actions shown may be performed in the order shown, in another order, or in some cases omitted.

[0044] The subject matter of this disclosure includes all novel and non-obvious combinations and sub-combinations of various processes, systems and configurations, as well as other features, functions, actions and / or properties disclosed herein and any and all their equivalents.

Claims

1. A method for forming a semiconductor film on a substrate, comprising: A substrate with multiple features is provided for processing in a reaction chamber; Metal films are deposited onto a substrate using a low-temperature plasma deposition process; A portion of the metal film is thermally etched, such that the remainder of the metal film lies at the bottom of multiple features; as well as A metal filler layer is selectively deposited within multiple features, wherein the metal filler layer comprises at least one of niobium, molybdenum, ruthenium, or tungsten.

2. The method according to claim 1, wherein, The low-temperature plasma deposition process includes: This allows the metal precursor and reducing gas to flow onto the substrate; Stop the flow of the metal precursor and allow the purge gas to flow; RF power is applied to generate plasma that forms a metal film on a substrate; Stop RF power; and Stop the flow of purge gas.

3. The method according to claim 2, wherein, The metal precursor comprises at least one of the following: tungsten tetrafluoride (WOF4); tungsten tetrachloride (WOCl4); tungsten dichlorodioxide (WO2Cl2); tungsten pentachloride (WCl5); tungsten hexachloride (WCl6); tungsten hexafluoride (WF6); molybdenum tetrafluoride (MoOF4); molybdenum tetrachloride (MoOCl4); molybdenum dichlorodioxide (MoO2Cl2); molybdenum dibromodioxide (MoO2Br2); molybdenum oxyiodide (MoO2I or Mo4O) 11 I); Molybdenum pentachloride (MoCl5); Molybdenum hexafluoride (MoF6); Niobium pentachloride (NbCl5); Niobium pentabromide (NbBr5); (tert-butylimino)tris(diethylamino)niobium (((CH3)6N)3NbN(CH3)3); Allylruthenium tricarbonyl (Ru3(CO) 12 ); or carbonyl ruthenium complex (Ru(PF3)4H2).

4. The method according to claim 2, wherein, The reducing gas includes at least one of the following: hydrogen (H2); diborane (B2H6); silane (SiH4); germanane (GeH4); ammonia (NH3); monomethylhydrazine (MMH); or hydrazine (N2H4).

5. The method according to claim 2, wherein, The purging gas includes at least one of the following: argon (Ar); hydrogen (H2); nitrogen (N2); or krypton (Kr).

6. The method according to claim 1, wherein, The thermal etching of the metal film further includes: To allow the etching gas to flow; and Etching gas is purged from the reaction chamber using purging gas.

7. The method according to claim 6, wherein, The etching gas includes at least one of the following: molybdenum hexafluoride (MoF6); molybdenum pentachloride (MoCl5); molybdenum hexabromide (MoBr6); tungsten hexafluoride (WF6); fluoride (F2); carbon tetrafluoride (CF4); nitrogen trifluoride (NF3); sulfur hexafluoride (SF6); chlorine (Cl2); carbon tetrachloride (CCl4); or boron trichloride (BCl3).

8. The method according to claim 6, wherein, The purging gas includes at least one of the following: argon (Ar); hydrogen (H2); nitrogen (N2); or krypton (Kr).

9. The method according to claim 1, wherein, Selectively depositing the metal filler layer further includes: This allows the metal precursor to flow onto the substrate; The metal precursor was purged from the reaction chamber with a purging gas; The reactant gas is allowed to flow onto the substrate, wherein the reactant gas reacts with the metal precursor to form a metal filler layer; and The reactant gases are purged from the reaction chamber using purging gas.

10. The method according to claim 9, wherein, The metal precursor comprises at least one of the following: tungsten tetrafluoride (WOF4); tungsten tetrachloride (WOCl4); tungsten dichlorodioxide (WO2Cl2); tungsten pentachloride (WCl5); tungsten hexachloride (WCl6); tungsten hexafluoride (WF6); molybdenum tetrafluoride (MoOF4); molybdenum tetrachloride (MoOCl4); molybdenum dichlorodioxide (MoO2Cl2); molybdenum dibromodioxide (MoO2Br2); molybdenum oxyiodide (MoO2I or Mo4O) 11 I); Molybdenum pentachloride (MoCl5); Molybdenum hexafluoride (MoF6); Niobium pentachloride (NbCl5); Niobium pentabromide (NbBr5); (tert-butylimino)tris(diethylamino)niobium (((CH3)6N)3NbN(CH3)3); Allylruthenium tricarbonyl (Ru3(CO) 12 ); or carbonyl ruthenium complex (Ru(PF3)4H2).

11. The method according to claim 9, wherein, The reactant gas includes at least one of the following: hydrogen (H2); diborane (B2H6); silane (SiH4); germanane (GeH4); ammonia (NH3); monomethylhydrazine (MMH); or hydrazine (N2H4).

12. The method according to claim 9, wherein, The purging gas includes at least one of the following: argon (Ar); hydrogen (H2); nitrogen (N2); or krypton (Kr).

13. The method according to claim 1, wherein, The deposition of the metal film is carried out at a temperature between 200°C and 400°C.

14. The method according to claim 1, wherein, The selective deposition of the metal filler layer occurs at a higher temperature than the temperature during the step of depositing the metal film.

15. The method according to claim 14, wherein, The temperature during the selective deposition of the metal filler layer is greater than 400°C.

16. A semiconductor processing system for forming a semiconductor film on a substrate, comprising: Reaction chamber; A substrate holder, which is disposed within the reaction chamber and configured to hold the substrate to be processed; A gas distributor configured to distribute gas onto a substrate disposed on a substrate holder; At least one gas source is provided for supplying gas to the substrate on the substrate holder; as well as RF source, used to generate plasma from gas; The semiconductor processing system is configured to perform the following methods: A substrate with multiple features is provided for processing in a reaction chamber; Metal films are deposited onto a substrate using a low-temperature plasma deposition process; A portion of the metal film is thermally etched, such that the remainder of the metal film lies beneath multiple features; and A metal filler layer is selectively deposited within multiple features, wherein the metal filler layer comprises at least one of niobium, molybdenum, ruthenium, or tungsten.

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