A chip packaging system and a chip packaging method

By using a split-architecture chip packaging system, combined with high-intensity pulsed light welding and a high-precision alignment module, high-precision alignment and pressureless rapid bonding of large-size interposers to organic substrates were achieved, solving the problems of warpage and alignment accuracy, and improving production efficiency and solder joint quality.

CN122373847APending Publication Date: 2026-07-10PENG CHENG LAB
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
PENG CHENG LAB
Filing Date
2026-04-16
Publication Date
2026-07-10

AI Technical Summary

Technical Problem

Existing technologies make it difficult to achieve fine-pitch, high-precision alignment of large-size interposers with organic substrates and pressureless, rapid flip-chip bonding. Furthermore, traditional reflow soldering processes can cause warping and deformation, and hot-press bonding can easily damage the interposer.

Method used

The chip packaging system adopts a split architecture, including a surface mount device and a bonding device. It utilizes intense pulsed light welding technology and a high-precision alignment module to achieve high-precision alignment and ultra-fast pressureless bonding between the chip and the substrate through a transport device. It combines a blue film support plate and a temperature sensor for batch bonding and temperature monitoring.

Benefits of technology

It achieves highly reliable, low-warpage, and high-efficiency interconnection between large-size interposers and organic substrates, solves warpage and alignment accuracy problems, and improves production efficiency and solder joint quality.

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Abstract

This invention relates to the field of optoelectronic integration and advanced semiconductor packaging technology, specifically disclosing a chip packaging system and a chip packaging method. The chip packaging system includes: a mounting device comprising a mounting platform, a bonding head, and an alignment module; the mounting platform is used to place a substrate, the bonding head is used to mount a chip, and the alignment module is used to align the mounting platform and the bonding head, wherein the bonding head and the mounting platform are movable relative to each other to pre-bond the chip and substrate into a chip-substrate assembly; a bonding device comprising a bonding platform and a high-intensity pulsed light source; the bonding platform is used to place the chip-substrate assembly, and the pulsed light emitted by the high-intensity pulsed light source can at least partially irradiate the bonding platform; and a transport device disposed between the mounting device and the bonding device for transporting the chip-substrate assembly from the mounting device to the bonding device. This chip packaging system and method provide a complete solution for high reliability, low warpage, and high efficiency for large-size CPO interposer interconnects.
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