Satellite parallel verification system and method based on new technology verification
By constructing a satellite parallel verification system and using electrical components or qualification components to replace the prototype flight components, communication protocols and software logic verification are carried out, which solves the problem of design defects being exposed in traditional satellite development and achieves a shortened development cycle and the safety of on-orbit mission verification.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- CHINA ACADEMY OF SPACE TECHNOLOGY
- Filing Date
- 2026-03-04
- Publication Date
- 2026-07-14
AI Technical Summary
Traditional satellite development processes result in lengthy development cycles, and design flaws are often exposed during the overall satellite testing phase. This makes it impossible to achieve parallel verification throughout the entire process, leading to iterations and rework, and increasing cost risks.
Electrical or qualification components are used to replace the prototype flight components, and a verification system is constructed to be developed in parallel with the prototype satellite system. The electrical interface protocol and functional logic follow the principle of "same method, same interface". Communication protocol, software logic and scheduling are verified through ground test system.
This enables pre-design verification, eliminates design defects, shortens the development cycle, increases the first-time pass rate of design, reduces on-orbit operational risks, and supports on-orbit mission verification.
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Figure CN122387828A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of satellite testing technology, and to a satellite parallel verification system and method based on new technology verification, which is particularly suitable for newly developed satellite platforms. Background Technology
[0002] Currently, satellite technology is undergoing profound changes, exhibiting significant trends towards miniaturization, constellation-based development, commercialization, and intelligence, profoundly reshaping the technological landscape of fields such as communication, remote sensing, navigation, and scientific exploration. The market is placing higher demands on satellite systems: platform standardization to support rapid production and functional expansion; rapid verification and iteration of new technologies to adapt to agile development; and intelligent software to achieve fully automated autonomous flight control.
[0003] However, satellite development, as a highly complex systems engineering project, traditionally follows a linear process of "requirements analysis → scheme design → single-unit development → subsystem integration testing → overall satellite testing → launch and on-orbit testing," resulting in a lengthy development cycle. In the current context of intensified competition and increased mission timeliness requirements, shortening the development cycle has become a core demand. However, all new technologies and new states must undergo rigorous ground verification before being put into flight. The inherent flaw of the traditional process is that the overall satellite testing phase often exposes design defects (such as interface incompatibility and functional logic conflicts), requiring multiple rounds of modifications and iterations, leading to increased process integration time, significantly extending the development cycle, and increasing cost risks.
[0004] While some verification methods exist in the existing technology (such as ground simulation or independent subsystem testing), none of them can achieve full-process parallelization: ground simulation lacks a real system environment, and subsystem testing does not cover the entire star-level interaction, resulting in a disconnect between verification and the flight system.
[0005] Therefore, there is an urgent need for an innovative verification mechanism that breaks through the traditional linear process, so as to simultaneously advance multi-stage testing, reduce process waiting time, and achieve a closed-loop acceleration of "verification-iteration-flight". Summary of the Invention
[0006] For new satellite platforms or satellite models employing numerous new technologies, existing technologies utilize traditional development processes. After the flight components enter the overall satellite verification stage, design or implementation often fails to meet expectations, leading to equipment and software iterations and extending the satellite development cycle. This invention provides a parallel verification system and method for satellites based on new technology verification. By constructing a verification system developed in parallel with the prototype satellite system, and using electrical components or qualification components to replace flight components, it strictly adheres to the principles of the same technology, same methods, and same interfaces, achieving equivalent verification of the electrical performance of the prototype satellite.
[0007] To achieve the aforementioned technical effects, on the one hand, this invention provides a satellite parallel verification system based on new technology verification, used for parallel development with the prototype satellite system, comprising: Onboard products include electrical components or qualification components of at least one satellite subsystem, wherein the electrical components or qualification components and their corresponding prototype flight components follow the same electrical interface protocol and functional logic; A ground-based testing system, connected to the on-board product, is used to provide a testing environment for the on-board product and to verify the electrical functions and interface protocols of the on-board product. The ground testing system includes: Power supply and measurement and control equipment, used to provide power supply and measurement and control channels for the on-board products; A bus data analyzer is used to access the data bus of the on-board product to monitor and analyze the communication data on the data bus and verify the correctness of the bus communication protocol. The software testing equipment is connected to the intelligent central control unit in the on-board product, and is used to send simulated bus data to the intelligent central control unit and receive its response to verify whether the logic of the on-board software and the scheduling between software meet the requirements. The central control service system is communicatively connected to the power supply and measurement and control equipment, the bus data analyzer, and the software testing equipment, and is used for data processing and status management of the ground test network.
[0008] The on-board product includes the intelligent central control unit and the control management unit, which are connected via a bus; wherein the bus is a 1553B bus and / or a serial data bus.
[0009] The ground testing system also includes a test adapter box and an oscilloscope. The test adapter box is used to connect the data path between two communication units during serial communication verification, and the oscilloscope is used to capture the waveform and data of serial communication to verify the correctness of the serial communication protocol.
[0010] The software testing equipment is communicatively connected to the intelligent central control unit and the control management unit via a bus. The software testing equipment has a built-in simulation module, a bus board, and an interface module for simulating and generating bus data and sending it to the intelligent central control unit and the control management unit, and for receiving and responding to instructions from the intelligent central control unit and the control management unit.
[0011] On the other hand, the present invention also provides a satellite parallel verification method based on new technology verification, which is implemented using the satellite parallel verification system based on new technology verification as described above, and includes the following steps: Construct a satellite parallel verification system that runs parallel to the prototype satellite system, in which electrical components or qualification components are used to replace the prototype flight components, and are connected to form an on-board product and a ground testing system; The ground testing system is used to verify the bus communication protocol and serial communication protocol between the electrical components or the test components to determine whether there are any conflicts in the interface protocols. The logic and scheduling of the onboard software running in the electrical components or qualification components are verified using the software testing equipment in the ground testing system.
[0012] Furthermore, the bus communication protocol is verified, specifically including: Connect the bus data analyzer to the 1553B bus of the on-board product; The intelligent central control unit and the single unit under test connected to the bus are powered on and put into operation. The bus data analyzer is used to monitor the communication data on the 1553B bus. According to the preset 1553B bus protocol, the monitored data is compared to verify the correctness of the bus communication protocol; wherein, the comparison includes checking whether the self-description field of the remote terminal RT is correct, checking whether the instruction data format is correct, and checking whether the telemetry source packet format and its splitting rules in multiple sub-addresses are correct.
[0013] Furthermore, the serial communication protocol is verified, specifically including: A test adapter box is connected to the data path between two stand-alone machines that communicate via serial port, and an oscilloscope is connected to the test adapter box; The two stand-alone machines are set to power on and operate, and serial communication is triggered by ground commands. The oscilloscope is used to capture the waveforms and data of the serial communication. According to the preset serial port protocol, the captured data is compared to verify the correctness of the serial communication protocol; wherein, the comparison includes checking whether the high and low bit order of the data word is correct, and checking whether the data field order in the telemetry data frame is correct.
[0014] Furthermore, the logical verification of the on-board software includes verifying the logical branches of the on-board software, specifically as follows: The software testing equipment is connected to the intelligent central control unit via a bus. The software testing equipment simulates and generates bus data that meets the entry conditions of a specific logical branch of the software to be verified, so as to trigger that logical branch. The system receives and analyzes the instructions issued by the software to be verified after responding to the bus data, and verifies the correctness of the software logic branches based on the instructions.
[0015] Furthermore, the software verification step includes verifying the scheduling of the on-board software, specifically including: The software testing equipment is connected to the intelligent central control unit and / or control management unit. The software testing equipment is used to simulate ground commands and on-board status, triggering a multi-step mission process that is collaboratively completed by autonomous mission planning software, satellite management software, and control application software. During the process execution, the software testing equipment receives instructions from the autonomous mission planning software, the space management software, and the control application software, and simulates the return of the corresponding execution status flags. By monitoring the execution order, triggering conditions, and command responses of each software, the scheduling timing relationship between the autonomous mission planning software, space management software, and control application software is verified to meet the requirements of rationality.
[0016] Furthermore, the process of using the software testing equipment to simulate ground commands and onboard status, triggering a multi-step mission flow collaboratively completed by autonomous mission planning software, satellite management software, and control application software, specifically includes: The system uses the software testing device to set the star time and sends a command to initiate the first event; The autonomous task planning software sends a start flag to the control application software, triggering it to execute the first instruction string. The software testing device receives the instruction and simulates returning an execution success flag. After receiving the execution success flag, the autonomous mission planning software interprets the satellite-rocket separation status flag simulated by the software testing device. When the satellite-rocket separation status flag meets the conditions, the satellite management software is triggered to execute the second instruction string. The software testing device receives the instruction and interprets its correctness. After the autonomous task planning software receives the execution success flag of the second instruction string, it triggers the control application software to execute the third instruction string. The software testing device receives the instructions and judges the execution effect. After receiving the third instruction string execution success flag, the autonomous mission planning software interprets the attitude stability flag simulated by the software testing equipment. When the attitude stability flag meets the conditions, the space service management software is triggered to execute the fourth instruction string. The software testing equipment receives the instruction and interprets the execution effect.
[0017] Compared with existing technologies, the satellite parallel verification system and method based on new technology verification described in this invention have the following advantages: 1) Design verification is moved forward to eliminate design defects: By replacing the prototype with electrical components / qualification components, and strictly following the principle of "same technology, same method, same interface", the design verification work of single unit is moved forward to the design stage; design non-compliance such as interface protocol conflict and software logic defect is effectively identified and corrected, and the test equipment, design and method of the prototype satellite are verified at the same time, avoiding rework in the whole satellite testing stage and significantly improving the first pass rate of design.
[0018] 2) Parallelization of the verification process significantly reduces the development cycle: At the single-unit level, electrical component verification is carried out simultaneously during the development of the prototype, eliminating single-unit waiting time; at the subsystem level, based on the whole-satellite interface specification, the qualification part and the prototype system are iterated synchronously, shortening the joint testing cycle; at the whole-satellite level, passive whole-satellite testing is replaced by reproducing whole-satellite interactive verification, improving the problem pre-emptive rate by 85% and achieving precise control of development risks.
[0019] 3) Extended on-orbit mission verification capabilities and reduced on-orbit operational risks: Supports parallel verification of on-orbit satellite missions (such as orbit change strategies and fault handling plans), simulates on-orbit scenarios through ground verification systems, verifies operational correctness in advance, and provides high-confidence safety redundancy for on-orbit missions. Attached Figure Description
[0020] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0021] Figure 1 This is a schematic diagram of the structure of the satellite parallel verification system based on new technology verification provided in an embodiment of the present invention; Figure 2 A block diagram of the electronic information system composition of the satellite parallel verification system based on new technology verification provided in an embodiment of the present invention; Figure 3 This is a schematic diagram of the electronic information system communication protocol verification of the satellite parallel verification system based on new technology verification, provided in an embodiment of the present invention. Figure 4 A block diagram illustrating the working principle of the software testing system for the satellite parallel verification system based on new technology verification, provided in an embodiment of the present invention; Figure 5 A flowchart of the software scheduling process and testing method of the satellite parallel verification system based on new technology verification provided in an embodiment of the present invention; Figure 6 A flowchart illustrating the steps of the satellite parallel verification method based on new technology verification, provided for another embodiment of the present invention; Figure 7 A flowchart illustrating the specific process of verifying the bus communication protocol using the satellite parallel verification method based on new technology verification, as provided in another embodiment of the present invention; Figure 8 A flowchart illustrating the specific process of verifying the serial communication protocol using the satellite parallel verification method based on new technology verification, as provided in another embodiment of the present invention. Figure 9 A flowchart illustrating the specific process of verifying the logical branches of the on-board software using the satellite parallel verification method based on new technology verification, as provided in another embodiment of the present invention. Figure 10 The following is a flowchart illustrating the specific process of verifying the scheduling of onboard software using the satellite parallel verification method based on new technology verification, as provided in another embodiment of the present invention. Detailed Implementation
[0022] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.
[0023] It should be noted that references to "an embodiment," "embodiment," "example embodiment," etc., in this specification refer to the described embodiment including specific features, structures, or characteristics, but not every embodiment must include these specific features, structures, or characteristics. Furthermore, such expressions do not refer to the same embodiment. Moreover, when describing specific features, structures, or characteristics in conjunction with embodiments, whether or not explicitly described, it is indicated that incorporating such features, structures, or characteristics into other embodiments is within the knowledge of those skilled in the art.
[0024] Furthermore, certain terms are used in the specification and subsequent claims to refer to specific components or parts. Those skilled in the art will understand that manufacturers may use different names or terms to refer to the same component or part. This specification and subsequent claims do not distinguish components or parts by differences in name, but rather by differences in function. The terms "comprising" and "including" used throughout the specification and subsequent claims are open-ended and should be interpreted as "including but not limited to." Additionally, the term "connection" here includes any direct and indirect electrical connection means. Indirect electrical connection means include connections made through other means.
[0025] The core concept of this invention lies in using electrical components / qualification components that adhere to the principles of "same technology, same method, same interface" to replace the prototype flight components in building the electrical verification environment. By prioritizing tasks such as single-unit communication protocol verification and software logic verification, and coordinating them with subsystem and whole-satellite testing in parallel, early identification and correction of design defects can be achieved. Simultaneously, the constructed satellite parallel verification system can be extended for ground-based pre-simulation of on-orbit missions, forming a closed loop between ground-based parallel verification and on-orbit safe execution, thereby shortening the development cycle and reducing mission risks.
[0026] To enable those skilled in the art to reproduce and implement the present invention, the various steps of the satellite parallel verification method and system based on new technology verification will be described in detail below with reference to the accompanying drawings and specific embodiments. These embodiments are specific illustrations of the present invention, and their descriptions are helpful in understanding the present invention, but should not be construed as limiting the present invention.
[0027] Figure 1 This invention illustrates a satellite parallel verification system based on a new technology verification, used for parallel development with a prototype satellite system. It includes an onboard product 10 and a ground testing system 20, wherein: The on-board product 10 includes electrical components or qualification components of at least one satellite subsystem. These electrical components or qualification components follow the same electrical interface protocol and functional logic as their corresponding prototype flight components. The ground testing system 20 is connected to the on-board product 10 to provide a testing environment and verify the electrical functions and interface protocols of the on-board product 10. In this embodiment, the electrical components refer to engineering models used to verify electrical performance and interface functions during satellite development. Their physical structure and thermal characteristics may differ from the prototype, but their electrical interfaces, communication protocols, and functional logic are completely consistent with the prototype flight components. The qualification components refer to engineering models that have undergone environmental adaptability testing. Their technical state is basically consistent with the prototype flight components, and they are used to comprehensively verify whether the product meets design requirements. The prototype flight components refer to the satellite product that is ultimately launched into orbit and performs actual flight missions. They are the formal products used for flight after passing all ground tests and environmental trials.
[0028] The ground testing system 20 includes power supply and control equipment, a bus data analyzer, software testing equipment, and a central control service system. The specific functions of each device are as follows: The power supply and control equipment provides power and control pathways for the on-board product 10; the bus data analyzer connects to the data bus of the on-board product 10 to monitor and analyze communication data on the data bus and verify the correctness of the bus communication protocol; the software testing equipment is connected to the intelligent central control unit in the on-board product 10 to send simulated bus data to the intelligent central control unit and receive its response to verify whether the logic of the on-board software and the scheduling between software meet the requirements; the central control service system is communicatively connected to the power supply and control equipment, the bus data analyzer, and the software testing equipment to perform data processing and status management on the ground test network.
[0029] The ground testing system 20 also includes a test adapter box and an oscilloscope. The test adapter box is used to connect the data path between two communication units during serial communication verification, and the oscilloscope captures the waveform and data of serial communication to verify the correctness of the serial communication protocol.
[0030] The on-board product 10 includes the aforementioned intelligent central control unit and control management unit, which are connected via a bus; wherein the bus is a 1553B bus and / or a serial data bus.
[0031] Specifically, the on-board product 10 in this embodiment also includes a power supply and distribution subsystem, a control and propulsion subsystem, a tracking subsystem, a payload subsystem, etc., and each subsystem includes corresponding individual units. Figure 1 The system frame shown only lists some of the standalone units with new technologies and new states. The ground test system includes power supply and control equipment, software testing equipment, central control service system, and other testing equipment.
[0032] The intelligent central control unit mainly realizes telemetry, remote control, fault tolerance, and satellite management functions. It is the satellite data processing center and realizes information fusion of the entire satellite. Among them, the satellite management functions include energy management, thermal control management, payload management, and FDIR (Fault Detection, Isolation and Recovery) management functions.
[0033] The main task of the power supply and distribution subsystem is to provide and distribute power to all instruments and equipment on the satellite during each phase of its flight (including the active phase, transfer orbit phase, and geostationary orbit phase). Figure 1 The power control and distribution units listed primarily regulate the power supply to the battery bank and solar array, ensuring stable bus voltage and power supply to the load. The integrated battery management unit includes battery bank and manager functions, mainly responsible for tasks such as charging and discharging the on-orbit battery bank, collecting battery information, and managing the system.
[0034] The main tasks of the control and propulsion subsystem include transfer orbit and geostationary orbit missions. The transfer orbit mission primarily uses chemical or electric propulsion systems as actuators to send the satellite into its predetermined orbit while maintaining attitude and orbital control requirements, ensuring the solar panels are perpendicular to the sun. The geostationary orbit mission mainly maintains the satellite's normal operating attitude, performing orbital position holding, angular momentum management, automatic solar panel alignment with the sun, and automatic fault handling. Figure 1 The control and drive management unit listed integrates the functions of the original high-orbit satellite attitude and orbit control computer and actuator drive unit. It possesses functions such as control system sensor acquisition and actuator drive, and is the core component of the control subsystem. The vector adjustment mechanism adjusts the thrust direction of the electric thruster by adjusting the rotation angle of different joints.
[0035] The primary task of the telemetry, tracking, and command (TT&C) subsystem is to provide a reliable and efficient satellite-to-ground TT&C transmission channel throughout the satellite's lifespan, and, when necessary, an inter-satellite TT&C channel. The C / Ku integrated digital transponder shown in the diagram combines a C-band transponder with a Ku-band transponder, employing software-defined radio technology to achieve multi-band, multi-mode, and multi-code configurability.
[0036] The main task of the payload subsystem is to receive, process, convert, and forward communication signals between space and ground, ensuring efficient, reliable, and secure communication services within the beam coverage area. The antenna controller shown in the diagram adds a 1553B communication circuit module, a star sensor control circuit, a thermistor acquisition circuit, and a thermal control drive circuit to the conventional antenna deployment and rotation function module. This enables star sensor power-on / off control, antenna temperature measurement, and heating of the antenna rotation unit and star sensor.
[0037] The main task of the power supply and telemetry equipment is to provide power supply and wired telemetry and remote control channels for the satellite during the ground testing phase, ensuring the safe power-on and stable operation of the satellite in the testing environment, and ensuring that ground testing personnel can monitor and control the satellite's operating status.
[0038] The primary task of the software testing equipment is to verify the correctness of the design and implementation of the space mission software and autonomous mission management software. The equipment can simulate software input parameters and respond to software output effects. The software testing equipment communicates with the intelligent central control unit and control management unit via a bus. The equipment has a built-in simulation module, bus board, and interface module for simulating and generating bus data and sending it to the intelligent central control unit and control management unit, as well as receiving and responding to instructions from these units.
[0039] The main task of the central control service system is to process data and manage the status of the entire ground test network. It can be expanded to include multiple graphic data monitoring stations for testers and designers to monitor real-time and replay satellite information. The test is carried out on an integrated test platform, which provides test automation, process informatization, and intelligent data interpretation, thereby improving the level of test automation.
[0040] Other testing equipment includes antenna simulation loads, telemetry and control baseband equipment, multimeters, oscilloscopes, adapter boxes, and other commonly used tools and equipment in satellite testing.
[0041] The satellite parallel verification system based on new technology verification provided in this embodiment can be used to verify the correctness of communication protocols between single units and subsystems; verify the correctness of software design and implementation, the rationality of software coupling and scheduling; and the on-orbit satellite companion function.
[0042] The satellite parallel verification system in this embodiment is not limited to structure or spatial configuration, but focuses on verifying the correctness and rationality of the electrical performance and functions of individual units, subsystems, and the entire satellite.
[0043] Figure 6 This invention illustrates another embodiment of a satellite parallel verification method based on new technology verification, which is implemented using the satellite parallel verification system based on new technology verification described in the above embodiment, and includes the following steps: S101: Construct a satellite parallel verification system parallel to the prototype satellite system, wherein electrical components or qualification components are used to replace the prototype flight components, and these components are connected to form an on-board product and a ground testing system. That is, construct a satellite parallel verification system as shown in the above embodiments, in which electrical components or qualification components are used to replace the prototype flight components, and these components are connected to form an on-board product and a ground testing system; the functions and architecture of the on-board product and the ground testing system are consistent with those described in the above embodiments.
[0044] S102: Use a ground testing system to verify the bus communication protocol and serial communication protocol between the electrical components or the test components to determine whether there is a conflict in the interface protocol.
[0045] S103: Using the software testing equipment in the ground testing system, verify the logic and scheduling of the on-board software running in the electrical components or qualification components.
[0046] The following describes the specific implementation method for functional testing using the method described in this embodiment.
[0047] See Figure 7 In one specific implementation, the bus communication protocol is verified, specifically including: S201: Connect the bus data analyzer to the 1553B bus of the on-board product.
[0048] S202: Power on the intelligent central control unit and the unit under test connected to the bus.
[0049] S203: Monitor the communication data on the 1553B bus using the bus data analyzer.
[0050] S204: According to the preset 1553B bus protocol, the monitored data is compared to verify the correctness of the bus communication protocol; wherein, the comparison includes checking whether the self-description field of the remote terminal RT is correct, checking whether the instruction data format is correct, and checking whether the telemetry source packet format and its splitting rules in multiple sub-addresses are correct.
[0051] like Figure 2 As shown, commonly used communication protocols in electronic information systems include the 1553B bus communication protocol and the serial data bus protocol. Each satellite defines its own dedicated 1553B bus protocol and serial communication protocol for communication between the host computer and the slave computer. The 1553B bus protocol defines the communication method, the terminal status table dynamically maintained by the bus control terminal (hereinafter referred to as the BC terminal), the data definition of the remote terminal (hereinafter referred to as the RT terminal), the bus telemetry protocol, the bus remote control protocol, the important data storage protocol, the terminal address definition, etc. The serial data bus protocol defines the serial port type, the physical characteristics of the serial port data, the remote control command format and telemetry data format at both ends of the serial port. For newly developed 1553B bus stand-alone products and serial port stand-alone products, errors often occur in the communication protocol.
[0052] like Figure 3 As shown, for 1553B communication protocol verification, a 1553B bus data analyzer is often used as an auxiliary tool to analyze the bus data. In specific implementation, taking the power control and distribution unit as an example, the bus analyzer is connected to the 1553B bus terminal. The specific operation steps are as follows: (1) Power on the satellite, connect the telemetry and remote control channels, ensure that the telemetry downlink data is correctly received and displayed, the remote control uplink command channel responds normally, and the self-test command passes.
[0053] (2) The intelligent center control unit is powered on, the power control and distribution unit is powered on, and the ground sends instructions to set the power control and distribution unit to work under the A bus and communicate with the intelligent center control unit.
[0054] (3) Turn on the 1553B bus analyzer, set it to work in bus monitoring mode, create a new task, select the 1553B bus channel, and start BM (Bus Monitor). At this time, you can see the status of all RT addresses under the 1553B A bus and B bus in the monitoring window. According to the bus settings in step (2), on the A bus, find the corresponding RT number according to the known power control and distribution unit terminal address. The sub-address number is displayed at this position. According to the protocol, find the telemetry data, remote control commands, and important data respectively. Save the corresponding sub-address and compare them one by one according to the protocol content.
[0055] (4) Check if the RT self-description field is correct under sub-address 1. The self-description field definition includes information such as synchronization header, instruction position status word, telemetry position status word, circular buffer position status word, circular buffer capacity status word, instruction cycle status word, maximum number of instructions, etc., as well as the number of bytes corresponding to each piece of information. If the self-description field is incorrect, normal communication with the host computer will not be possible.
[0056] (5) When the RT terminal receives instruction data from the host computer, it sets a fixed sub-address to receive instructions, the instruction length is fixed, and the storage mode is single-message storage mode. When the ground sends a 1553B instruction, the monitor receives an instruction message at the corresponding sub-address and checks the instruction message format, including the instruction header, the number of instructions sent, the total length of the instruction packet, the instruction receiver identifier, the instruction data length, and the instruction content. If the instruction format is incorrect, the RT terminal cannot respond to the instructions sent by the BC terminal.
[0057] (6) Telemetry data storage often occupies multiple sub-addresses. Checking the correctness of the bus telemetry source packet format under each telemetry sub-address requires checking the main header and data field content. Source packet data longer than 32 words will be allocated to different sub-addresses. The source packet header is filled into the first sub-address, and subsequent sub-addresses will not have the header filled in. If the telemetry source packet format is incorrect, the BC end will not receive the telemetry information sent by the RT end, will determine that the information format is incorrect, and will discard the packet data.
[0058] (7) For important data, memory data or other complex instruction formats, it is necessary to send specific instructions or instruction strings from the ground to set the corresponding working conditions and check whether the format is correct at the corresponding sub-address position. If it is incorrect, the function will be invalid.
[0059] (8) If the results of steps (4) to (7) above are all correct, it means that the protocol between BC and RT is normal and stand-alone function verification can be carried out.
[0060] See Figure 8 In one specific implementation, the serial communication protocol is verified, specifically including: S301: Connect a test adapter box to the data path between two stand-alone machines that communicate via a serial port, and connect an oscilloscope to the test adapter box.
[0061] S302: Power on the two stand-alone units and trigger serial communication via ground command.
[0062] S303: Capture the waveform and data of serial communication using the oscilloscope.
[0063] S304: According to the preset serial port protocol, the captured data is compared to verify the correctness of the serial communication protocol; wherein, the comparison includes checking whether the high and low bit order of the data word is correct, and checking whether the data field order in the telemetry data frame is correct.
[0064] like Figure 3 As shown, for serial communication protocol verification, breakpoints are often set on the data paths of the two individual machines transmitting and receiving data, and a test adapter box is connected. An oscilloscope is used as an auxiliary tool with the adapter box to analyze the serial data. This embodiment uses an integrated digital transponder as an example. It communicates asynchronously with the host computer via a UART (Universal Asynchronous Receiver / Transmitter) bus, employing a "master call—slave answer" communication mode. An adapter box is connected in series with the corresponding connectors of the integrated digital transponder and the intelligent central management unit's telemetry command. The oscilloscope probes are connected to the corresponding signal contacts on the adapter box. The specific operation steps are as follows: (1) Power on the satellite, connect the telemetry and remote control channels, ensure that the telemetry downlink data is correctly received and displayed, the remote control uplink command channel responds normally, and the self-test command passes.
[0065] (2) Power on the intelligent central control unit, power on the integrated digital transponder, send instructions from the ground to set the transponder frequency selection instructions, and observe on the oscilloscope whether the remote control instruction format of the receiver is consistent with the design, including the instruction length, data words, verification data, etc. New single units often have the situation that the high and low bit order of the data words is inconsistent with the protocol.
[0066] (3) The intelligent central control unit periodically sends a telemetry read command to the transponder. After receiving the command, the transponder sends its own telemetry data to the intelligent central control unit. The format of the telemetry data is defined in detail, including the data field and the check bit. The data field information includes the data field length, the data field information sorting, the telemetry frame header, the specific telemetry information definition, the byte size, the location information, etc. The oscilloscope first finds the telemetry frame header and then checks the other information. The new single-machine often has the problem of abnormal data field sorting, which leads to the telemetry information being out of order.
[0067] (4) If the results of steps (2) to (3) above are all correct, it means that the single-machine protocol of the transceiver is normal and the single-machine function verification can be carried out.
[0068] See Figure 9 In one specific implementation, the logical verification of the on-board software includes verifying the logical branches of the on-board software, specifically as follows: S401: The software testing equipment is connected to the intelligent central control unit via a bus.
[0069] S402: The software testing equipment simulates and generates bus data that meets the entry conditions of a specific logical branch of the software to be verified, so as to trigger the logical branch.
[0070] S403: Receive and analyze the instructions issued by the software to be verified after responding to the bus data, and verify the correctness of the software logic branches based on the instructions.
[0071] See Figure 10 In one specific implementation, the software verification step includes verifying the scheduling of the on-board software, specifically including: S501: Connect the software testing equipment to the intelligent center control unit and / or control management unit; S502: Using the software testing equipment to simulate ground commands and onboard status, triggering a multi-step mission process completed collaboratively by autonomous mission planning software, satellite management software, and control application software; S503: During the process execution, the software testing equipment receives instructions from the autonomous mission planning software, the space management software, and the control application software, and simulates the return of the corresponding execution status flags. S504: By monitoring the execution order, triggering conditions, and instruction responses of each software, the scheduling timing relationship between the autonomous mission planning software, the space service management software, and the control application software is verified to meet the rationality requirements.
[0072] Furthermore, the process of using the software testing equipment to simulate ground commands and onboard status, triggering a multi-step mission flow collaboratively completed by autonomous mission planning software, satellite management software, and control application software, specifically includes: The software testing device sets the satellite timing and sends a command to initiate the first event. The autonomous mission planning software transmits a start flag to the control application software, triggering it to execute a first instruction string. The software testing device receives the command and simulates a successful execution flag. After receiving the successful execution flag, the autonomous mission planning software interprets the satellite-rocket separation status flag simulated by the software testing device. When the satellite-rocket separation status flag meets the conditions, the satellite management software is triggered to execute a second instruction string. The software testing device receives the command and interprets its correctness. After receiving the successful execution flag of the second instruction string, the autonomous mission planning software triggers the control application software to execute a third instruction string. The software testing device receives the command and interprets the execution effect. After receiving the successful execution flag of the third instruction string, the autonomous mission planning software interprets the attitude stabilization status flag simulated by the software testing device. When the attitude stabilization status flag meets the conditions, the satellite management software is triggered to execute a fourth instruction string. The software testing device receives the command and interprets the execution effect.
[0073] like Figure 4 As shown, for software design verification, this embodiment uses a software testing device, which communicates with the intelligent central control unit and the control management unit via a bus. The software testing device has built-in simulation modules, bus boards, and interface modules, which can simulate bus data and send the data to the intelligent central control unit and the control management unit. At the same time, it can receive and respond to the instructions of the above two units.
[0074] This software testing equipment can edit bus data to meet software logic entry requirements, create conditions for each branch of the software logic, and verify the correctness of each branch's logic. It can respond to bus commands and verify the correctness of logic branch output instructions. Simultaneously, it can verify the scheduling timing relationships between software components. For example... Figure 5 The diagram illustrates the satellite-launch separation phase as an example; this simplified diagram does not represent the actual software operation. Tasks within orange rectangles are handled by the satellite management software, tasks within green rectangles are handled by the control application software, and conditional judgments and process scheduling within purple rectangles are handled by the autonomous mission planning software. The mission requirements for the satellite-launch separation phase include: the control subsystem performing pipeline venting and solar orientation; the power supply and distribution subsystem handling the detonation of chemical-propellant pyrotechnic devices and solar array pyrotechnic devices; the detonation of chemical-propellant pyrotechnic devices and solar array pyrotechnic devices; the autonomous venting of pipelines and solar orientation; and the event process scheduling, handled by the autonomous mission planning software. The specific operation steps are as follows: (1) Ground equipment preparation, satellite power-on, and takeoff status settings for each subsystem; (2) Enable the space service software, control software, and autonomous mission management software; (3) When setting up the satellite, the ground sends a satellite service software setting command to initiate the chemical pipeline venting event. The mission planning software transmits this flag to the control software. After the control software reads the enable start flag, it begins to execute the pipeline venting command string. The software testing equipment receives the command and responds, indicating that the chemical propulsion engine pipeline venting is normal. After the venting is completed, it sends an "execution successful" flag to the mission management software.
[0075] (4) After the exhaust process is completed, the autonomous mission planning software, following the time sequence and event scheduling process, simultaneously determines whether the satellite and rocket have separated. This flag is simulated on the ground. If the conditions for activation are met, the satellite mission software executes the detonation command string for the propellant, and the ground testing equipment verifies the correctness of the command. If the execution is successful, a success flag is sent to the mission management software.
[0076] (5) Following the time-series and event scheduling processes, after successful chemical propulsion pyrotechnic initiation, the autonomous mission planning software executes the sun-oriented process instruction string, including instructions to activate individual control subsystem products, set chemical propulsion valves, and set operating modes. The execution effect is judged by the actual actions of the onboard unit and the simulated response of the ground equipment. If the execution is successful, a success flag is sent to the mission management software.
[0077] (6) Following the time-series and event scheduling procedures, after the satellite successfully orients itself to the sun, the autonomous mission planning software simultaneously reads the three-axis angular velocities and confirms attitude stability. Then, the satellite management software executes the solar array pyrotechnic detonation command sequence to handle the solar array deployment. The execution effect is simulated and interpreted by ground equipment.
[0078] (7) Thus, the space management software and control application software complete the software logic under the scheduling of the autonomous mission management software, and the test is carried out on the ground simulation and response at the appropriate time, and the single-unit product status setting completes the logic verification.
[0079] (8) After the functional verification is completed, restore the satellite status and power off the satellite.
[0080] If, during the on-orbit operation of the prototype satellite, it is necessary to verify certain specific functions, strategies, or schemes, then... Figure 1 As shown, set up the required working conditions as needed, and use... Figures 2-5 The method shown is used for verification. After verification, the on-orbit command is sent or the program is injected to ensure that the risk is controllable and the on-orbit operation is stable.
[0081] In summary, the satellite parallel verification system and method based on new technology verification described in this invention, by moving the single-unit design verification work forward, identifies and corrects discrepancies with the design in advance. This allows for highly coordinated and parallel development of single-unit components, subsystem integration testing, and overall satellite testing, significantly reducing process transition time, improving manufacturing and testing efficiency, and providing technical support for shortening the satellite development cycle. Simultaneously, the system also supports parallel verification of on-orbit satellites, conducting verification work on on-orbit orbit changes, position-keeping strategies, fault handling, and other matters to ensure the correctness of on-orbit missions.
[0082] Numerous specific details are set forth in the specification provided herein. However, it will be understood that embodiments of the invention may be practiced without these specific details. In some instances, well-known methods, structures, and techniques have not been shown in detail so as not to obscure the understanding of this specification.
[0083] It should be noted that the scope of the methods and apparatus in the embodiments of the present invention is not limited to performing functions in the order shown or discussed, but may also include performing functions substantially simultaneously or in the reverse order, depending on the functions involved. For example, the described methods may be performed in a different order than described, and various steps may be added, omitted, or combined. In addition, features described with reference to certain examples may be combined in other examples.
[0084] Of course, the present invention may have other various embodiments. Without departing from the spirit and essence of the present invention, those skilled in the art can make various corresponding changes and modifications according to the present invention, but these corresponding changes and modifications should all fall within the protection scope of the appended claims.
Claims
1. A satellite parallel verification system based on new technology verification, used for parallel development with the prototype satellite system, characterized in that, Including: Onboard products include electrical components or qualification components of at least one satellite subsystem, wherein the electrical components or qualification components and their corresponding prototype flight components follow the same electrical interface protocol and functional logic; A ground-based testing system, connected to the on-board product, is used to provide a testing environment for the on-board product and to verify the electrical functions and interface protocols of the on-board product. The ground testing system includes: Power supply and measurement and control equipment, used to provide power supply and measurement and control channels for the on-board products; A bus data analyzer is used to access the data bus of the on-board product to monitor and analyze the communication data on the data bus and verify the correctness of the bus communication protocol. The software testing equipment is connected to the intelligent central control unit in the on-board product, and is used to send simulated bus data to the intelligent central control unit and receive its response to verify whether the logic of the on-board software and the scheduling between software meet the requirements. The central control service system is communicatively connected to the power supply and measurement and control equipment, the bus data analyzer, and the software testing equipment, and is used for data processing and status management of the ground test network.
2. The system according to claim 1, characterized in that, The on-board product includes the intelligent central control unit and the control management unit, which are connected via a bus; wherein the bus is a 1553B bus and / or a serial data bus.
3. The system according to claim 1, characterized in that, The ground testing system also includes a test adapter box and an oscilloscope. The test adapter box is used to connect the data path between two communication units during serial communication verification, and the oscilloscope is used to capture the waveform and data of serial communication to verify the correctness of the serial communication protocol.
4. The system according to claim 2, characterized in that, The software testing equipment is communicatively connected to the intelligent central control unit and the control management unit via a bus. The software testing equipment has a built-in simulation module, a bus board, and an interface module for simulating and generating bus data and sending it to the intelligent central control unit and the control management unit, and for receiving and responding to instructions from the intelligent central control unit and the control management unit.
5. A satellite parallel verification method based on new technology verification, implemented using the satellite parallel verification system based on new technology verification as described in any one of claims 1 to 4, characterized in that, Including the following steps: Construct a satellite parallel verification system that runs parallel to the prototype satellite system, in which electrical components or qualification components are used to replace the prototype flight components, and are connected to form an on-board product and a ground testing system; The ground testing system is used to verify the bus communication protocol and serial communication protocol between the electrical components or the test components to determine whether there are any conflicts in the interface protocols. The logic and scheduling of the onboard software running in the electrical components or qualification components are verified using the software testing equipment in the ground testing system.
6. The method according to claim 5, characterized in that, Verification of the bus communication protocol specifically includes: Connect the bus data analyzer to the 1553B bus of the on-board product; The intelligent central control unit and the single unit under test connected to the bus are powered on and put into operation. The bus data analyzer is used to monitor the communication data on the 1553B bus. According to the preset 1553B bus protocol, the monitored data is compared to verify the correctness of the bus communication protocol; wherein, the comparison includes checking whether the self-description field of the remote terminal RT is correct, checking whether the instruction data format is correct, and checking whether the telemetry source packet format and its splitting rules in multiple sub-addresses are correct.
7. The method according to claim 5, characterized in that, Verification of the serial communication protocol specifically includes: A test adapter box is connected to the data path between two stand-alone machines that communicate via serial port, and an oscilloscope is connected to the test adapter box; The two stand-alone machines are set to power on and operate, and serial communication is triggered by ground commands. The oscilloscope is used to capture the waveforms and data of the serial communication. According to the preset serial port protocol, the captured data is compared to verify the correctness of the serial communication protocol; wherein, the comparison includes checking whether the high and low bit order of the data word is correct, and checking whether the data field order in the telemetry data frame is correct.
8. The method according to claim 5, characterized in that, The logical verification of the on-board software includes verifying the logical branches of the on-board software, specifically as follows: The software testing equipment is connected to the intelligent central control unit via a bus. The software testing equipment simulates and generates bus data that meets the entry conditions of a specific logical branch of the software to be verified, so as to trigger that logical branch. The system receives and analyzes the instructions issued by the software to be verified after responding to the bus data, and verifies the correctness of the software logic branches based on the instructions.
9. The method according to claim 5, characterized in that, The software verification step includes verifying the scheduling of the on-board software, specifically including: The software testing equipment is connected to the intelligent central control unit and / or control management unit. The software testing equipment is used to simulate ground commands and on-board status, triggering a multi-step mission process that is collaboratively completed by autonomous mission planning software, satellite management software, and control application software. During the process execution, the software testing equipment receives instructions from the autonomous mission planning software, the space management software, and the control application software, and simulates the return of the corresponding execution status flags. By monitoring the execution order, triggering conditions, and command responses of each software, the scheduling timing relationship between the autonomous mission planning software, space management software, and control application software is verified to meet the requirements of rationality.
10. The method according to claim 9, characterized in that, The process of using the software testing equipment to simulate ground commands and onboard status triggers a multi-step mission flow collaboratively completed by autonomous mission planning software, satellite management software, and control application software, specifically including: The system uses the software testing device to set the star time and sends a command to initiate the first event; The autonomous task planning software sends a start flag to the control application software, triggering it to execute the first instruction string. The software testing device receives the instruction and simulates returning an execution success flag. After receiving the execution success flag, the autonomous mission planning software interprets the satellite-rocket separation status flag simulated by the software testing device. When the satellite-rocket separation status flag meets the conditions, the satellite management software is triggered to execute the second instruction string. The software testing device receives the instruction and interprets its correctness. After the autonomous task planning software receives the execution success flag of the second instruction string, it triggers the control application software to execute the third instruction string. The software testing device receives the instructions and judges the execution effect. After receiving the third instruction string execution success flag, the autonomous mission planning software interprets the attitude stability flag simulated by the software testing equipment. When the attitude stability flag meets the conditions, the space service management software is triggered to execute the fourth instruction string. The software testing equipment receives the instruction and interprets the execution effect.