A method and system for PCB copper wire electroplating copper slag synergistic inhibition

Abstract

The present application relates to the technical field of printed circuit board, and particularly relates to a method and system for cooperatively inhibiting copper wire copper slag in PCB electroplating. The method comprises: performing short-time pre-deposition electroplating in the initial stage of PCB substrate electroplating to form a uniform initial deposition interface on the substrate surface; in the pre-deposition electroplating process, acquiring current values flowing through different regions of the substrate through a current acquisition unit arranged on the cathode conductive path, thereby constructing a current density spatial distribution and identifying abnormal current density regions; and interrupting the electroplating process when the abnormal current density regions meet preset conditions; during the interruption of electroplating, performing power-off standing treatment on the PCB substrate, and in the standing process, continuously acquiring local current density distribution data on the PCB substrate surface and judging whether it meets uniformity judgment conditions. The present application realizes accurate inhibition and deposition uniformization of copper wire copper slag in PCB electroplating through dynamic monitoring based on local current density and power-off standing.

Description

Technical Field

[0001] This invention relates to the field of printed circuit board technology, and in particular to a method and system for synergistic suppression of copper slag on PCB electroplating copper wires. Background Technology

[0002] Printed Circuit Boards (PCBs) are crucial foundational components in electronic devices, carrying electronic components and enabling electrical interconnection. In PCB manufacturing, electroplating is the core process for forming conductive lines, especially the secondary copper plating process (also known as pattern plating or thickening plating). Its purpose is to thicken the copper conductors after the circuit pattern transfer to meet the requirements of current carrying capacity and signal transmission performance. However, during the secondary copper plating process, copper wires and copper slag defects often appear on the board surface. These defects manifest as dendritic copper protrusions (copper wires) and irregular granular copper deposits (copper slag) on ​​the surface or bottom of the plating layer, severely affecting the electrical performance, appearance quality, and reliability of the product. Especially for high-precision interconnect products such as gold fingers, even tiny surface defects can lead to poor contact or abnormal signal transmission, causing product malfunction. Summary of the Invention

[0003] Based on this, it is necessary for the present invention to provide a method and system for synergistic suppression of copper slag on PCB electroplating copper wires, so as to solve at least one of the above-mentioned technical problems.

[0004] To achieve the above objectives, a method for synergistic suppression of copper dross in PCB electroplating copper wires includes the following steps: Step S1: Perform short-time pre-deposition electroplating in the initial stage of PCB substrate electroplating to form a uniform initial deposition interface on the substrate surface; Step S2: During the pre-deposition electroplating process, the current values ​​flowing through different areas of the substrate are obtained by the current acquisition unit set on the cathode conductive path, thereby constructing the spatial distribution of current density and identifying abnormal current density areas; and the electroplating process is interrupted when the abnormal current density areas meet the preset conditions. Step S3: During the electroplating interruption, the PCB substrate is subjected to a power-off and static treatment. During the static treatment, the local current density distribution data on the surface of the PCB substrate is continuously acquired, and it is determined whether it meets the uniformity judgment condition, so that the deposition state on the surface of the PCB substrate converges to the uniform state corresponding to the initial deposition interface. Step S4: When the local current density distribution data meets the uniformity judgment condition, resume the electroplating process to suppress the formation of copper wire and copper slag.

[0005] The present invention also provides a system for synergistic suppression of copper dross in PCB electroplating copper wires, for performing the method for synergistic suppression of copper dross in PCB electroplating copper wires as described above, wherein the system for synergistic suppression of copper dross in PCB electroplating copper wires includes: The interface construction module is used to perform short-time pre-deposition electroplating in the initial stage of PCB substrate electroplating to form a uniform initial deposition interface on the substrate surface. The distribution detection module is used to acquire the current values ​​flowing through different areas of the substrate during the pre-deposition electroplating process by a current acquisition unit set on the cathode conductive path, thereby constructing the spatial distribution of current density, identifying areas with abnormal current density, and interrupting the electroplating process when the abnormal current density area meets the preset conditions. The static control module is used to perform a power-off static treatment on the PCB substrate during electroplating interruption. During the static process, it continuously acquires local current density distribution data on the surface of the PCB substrate and determines whether it meets the uniformity judgment condition so that the deposition state on the surface of the PCB substrate converges to the uniform state corresponding to the initial deposition interface. The recovery module is used to resume the electroplating process when the local current density distribution data meets the uniformity judgment condition, so as to suppress the generation of copper wire and copper slag.

[0006] This invention introduces a synergistic control strategy in the PCB secondary copper plating process, incorporating short-time pre-deposition electroplating, real-time current density monitoring, power-off settling treatment, and uniformity assessment. Short-time pre-deposition electroplating forms a uniform initial deposition interface on the substrate surface. This extremely thin copper overlay effectively shields the roughness differences and localized oxide layers on the original substrate surface, providing a fresh, uniformly conductive metal interface for subsequent electroplating, thus eliminating the root cause of tip discharge due to uneven substrate surface conditions. Secondly, by setting up segmented current acquisition units along the cathode conductive path, the current values ​​flowing through different areas of the substrate are acquired in real time, and a spatial distribution of current density is constructed. This allows for the detection of abnormally high local current density signals at the very beginning of tip discharge, achieving early warning of the defect formation process. When the area ratio or peak value of the abnormal current density region exceeds a preset threshold, the system immediately interrupts the electroplating process, preventing the abnormal deposition point from entering an irreversible rapid growth phase and effectively preventing the further development of copper wires and copper slag.

[0007] During the power-off settling phase, although the applied current is cut off, the additive molecules in the plating solution undergo redistribution driven by the concentration gradient. Because the initial deposition interface formed by pre-deposition electroplating has similar surface energy and chemical potential across the entire substrate, the additive can achieve uniform adsorption at various locations, forming an adsorption layer with consistent concentration and thickness. The local current density distribution is continuously monitored using an electrochemical measurement device, and uniformity evaluation indicators are calculated. When the indicator drops below a preset threshold, it is determined that the additive has reached adsorption equilibrium. Resuming electroplating at this point ensures that the copper ion reduction rate at each location is suppressed to the same degree, thereby achieving uniform deposition.

[0008] After adopting the method of this invention, the coating has a good cross-sectional morphology, meets the design requirements in thickness, and has a dense and uniform internal structure. No dendritic copper protrusions or granular copper deposits were observed, and the interface between the coating and the substrate is tightly bonded without delamination. In the mass production of high-precision PCB products such as gold fingers, the defect rate of copper wires and copper slag is significantly reduced, and the product qualification rate and production efficiency are significantly improved. The cost losses caused by rework and scrap are reduced, and the reliability test results of the coating show that it fully meets the long-term use requirements of the product. Attached Figure Description

[0009] Other features, objects, and advantages of the invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings: Figure 1 This is a schematic diagram of the steps of a method for synergistic suppression of copper slag in PCB electroplating copper wire according to the present invention; Figure 2 This is a cross-sectional morphology diagram of defects in copper wires and copper slag in PCB electroplating according to an embodiment of the present invention. Figure 3 This is a cross-sectional morphology diagram of a qualified coating according to an embodiment of the present invention; Figure 4 This is a schematic diagram of the steps in the present invention for a synergistic suppression system of copper wire and copper slag for PCB electroplating. Detailed Implementation

[0010] The technical method of the present invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0011] Furthermore, the accompanying drawings are merely illustrative of the invention and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and therefore repeated descriptions of them will be omitted. Some block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities can be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor methods and / or microcontroller methods.

[0012] It should be understood that although the terms "first," "second," etc., may be used herein to describe various units, these units should not be limited by these terms. These terms are used merely to distinguish one unit from another. For example, without departing from the scope of the exemplary embodiments, a first unit may be referred to as a second unit, and similarly, a second unit may be referred to as a first unit. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0013] To achieve the above objectives, please refer to Figures 1 to 3 This invention provides a method for synergistic suppression of copper dross in PCB electroplating copper wires, the method comprising the following steps: Step S1: Perform short-time pre-deposition electroplating in the initial stage of PCB substrate electroplating to form a uniform initial deposition interface on the substrate surface; In one embodiment, before the PCB substrate enters the formal copper plating process, the PCB substrate is immersed in a copper plating bath and a short-time pre-deposition electroplating is performed under constant temperature and predetermined plating bath composition conditions to construct a uniform initial deposition interface. Specifically, a preset current density can be applied to the PCB substrate by a rectified power supply to form a continuous and dense initial copper deposition layer in a short time (e.g., several seconds to tens of seconds). At the same time, before performing the pre-deposition electroplating, the surface state parameters of the substrate copper layer, including surface roughness distribution or surface resistance distribution, can be obtained, and the pre-deposition current density and duration can be adaptively set according to the surface state parameters to avoid over-deposition in local highly active areas in the initial stage.

[0014] For example, when a high surface roughness is detected in certain areas of a PCB substrate, the pre-deposition current density can be appropriately reduced and the pre-deposition time extended to make the deposition rate in that area more gradual, thereby making the overall interface more uniform.

[0015] It should be noted that the initial deposition interface is not used to obtain the target thickness, but rather as a reference benchmark for the uniformity of the subsequent deposition state. The key lies in the consistency of the interface rather than the thickness.

[0016] Step S2: During the pre-deposition electroplating process, the current values ​​flowing through different areas of the substrate are obtained by the current acquisition unit set on the cathode conductive path, thereby constructing the spatial distribution of current density and identifying abnormal current density areas; and the electroplating process is interrupted when the abnormal current density areas meet the preset conditions. In one embodiment, during the pre-deposition electroplating process, multiple current acquisition units are arranged in segments along the cathode conductive path to collect the current flowing through different areas of the PCB substrate in real time. The instantaneous current density is calculated by combining the corresponding area of ​​each region, thereby constructing a spatial distribution model of the current density on the PCB substrate surface. Subsequently, a time-series analysis is performed on the spatial distribution of the current density. The peak instantaneous current density of each region is extracted within a preset time window, and the ratio of the peak value to the set current density of the pre-deposition stage is calculated to identify regions with abnormal current density.

[0017] Furthermore, when the peak instantaneous current density in any region exceeds a preset multiplier threshold, or when the area ratio of multiple abnormal regions reaches a preset ratio threshold, an interruption determination mechanism is triggered. Specifically, when there is an extreme peak, the electroplating process can be interrupted immediately, while when it is only an area diffusion type abnormality, a delayed observation time can be set to continuously monitor the trend of abnormal area changes, and an interruption operation can be performed when the abnormality continues to expand.

[0018] For example, when the current density in a certain local area reaches more than 1.8 times the preset value, the area can be directly identified as abnormal and electroplating can be interrupted immediately; when the current density in multiple areas is slightly higher but has not yet exceeded the peak threshold, it can be observed within a few seconds whether it shows a spreading trend in order to decide whether to interrupt the process.

[0019] It should be noted that the core of this step lies in identifying potential depositional imbalance states through spatial distribution and temporal changes, rather than relying solely on single-point current values ​​for judgment.

[0020] Step S3: During the electroplating interruption, the PCB substrate is subjected to a power-off and static treatment. During the static treatment, the local current density distribution data on the surface of the PCB substrate is continuously acquired, and it is determined whether it meets the uniformity judgment condition, so that the deposition state on the surface of the PCB substrate converges to the uniform state corresponding to the initial deposition interface. In one embodiment, after the electroplating process is interrupted, the applied current is immediately cut off, putting the PCB substrate in a power-off state while keeping it immersed in the copper plating bath, thus entering the power-off settling stage. During the settling process, a weak AC test signal is applied to the surface of the PCB substrate using an electrochemical measurement device, and electrochemical response signals at each location are collected at fixed time intervals. Subsequently, frequency domain analysis is performed on the response signals to extract the impedance amplitude and phase angle within a preset frequency range, and the double-layer capacitance value at each location is obtained by fitting an equivalent circuit model. The double-layer capacitance value is then used as the local current density characteristic value at the corresponding location.

[0021] Furthermore, the local current density characteristic values ​​at each location at the same time are arranged according to spatial location to construct local current density distribution data, and the characteristic value range between each location is calculated based on data from multiple consecutive times as a uniformity evaluation index; when the range gradually decreases and falls below the preset uniformity threshold, it is determined that the current deposition state has become uniform, thereby satisfying the uniformity judgment condition.

[0022] For example, in the initial stage of power-off and resting, the double-layer capacitance values ​​of different regions differ significantly. As time goes by, due to the re-adsorption of additives and ion diffusion, the difference gradually decreases. When the range drops from a relatively large initial value to below a set threshold, the interface can be considered to have returned to equilibrium.

[0023] It is worth noting that the power-off and static setting is not a simple waiting process, but rather a process that utilizes the spontaneous regulation mechanism of the electrochemical system to gradually eliminate the differences in local deposition activity. At the same time, the deposition state can be indirectly characterized by double-layer capacitance, which avoids the interference problems caused by directly measuring current density.

[0024] Step S4: When the local current density distribution data meets the uniformity judgment condition, resume the electroplating process to suppress the formation of copper wire and copper slag.

[0025] In one embodiment, once the local current density distribution data meets the uniformity criteria, an external current is reapplied to the PCB substrate to resume the electroplating process, and subsequent copper layer deposition is performed according to preset process parameters. After resuming electroplating, the deposition morphology on the PCB substrate surface can be periodically inspected. For example, online image acquisition or surface condition monitoring can be used to identify whether dendritic copper protrusions or granular copper deposits exist, in order to verify the suppression effect of copper wires and copper slag.

[0026] Furthermore, if no abnormal deposition morphology is detected within the preset monitoring time, electroplating continues until the target coating thickness is reached; when local abnormal deposition is detected, the current density can be reduced or the power-off and static treatment can be triggered again to form a cyclic control mechanism.

[0027] For example, in the initial stage after electroplating recovery, the morphology of key areas can be scanned at regular intervals. If no dendritic growth is found, it indicates that the aforementioned homogenization treatment is effective. If protrusions reappear locally, the current density can be reduced immediately or the static stage can be restarted.

[0028] It should be noted that restoring electroplating is not a simple restart, but is based on the premise that "the deposition state has been restored to uniformity", so as to avoid the abnormal state being amplified in subsequent deposition processes.

[0029] See Figure 2 In one embodiment, Figure 2 The figure illustrates the typical morphological characteristics of copper wire and copper slag defects generated during secondary copper electroplating (i.e., the second copper plating process) on a PCB substrate. As can be observed from the figure, there is a significant local electric field concentration in the plating interface region, manifested as fine filamentous structures extending along specific directions and irregular particle accumulation structures. The fine filamentous structures are copper wires, typically formed by dendrite growth induced by abnormally high local current density; the particle structures are copper slag, often exhibiting particle agglomeration or detachment and re-attachment due to unstable deposition.

[0030] When the current density of copper electroplating is high or the additives are unevenly distributed, local areas preferentially grow, forming a significant "tip effect," which induces the copper wire to grow rapidly along the electric field direction. At the same time, local deposition instability leads to the formation of copper slag adhesion.

[0031] Furthermore, step S1 also includes: Before performing short-time pre-deposition electroplating, the surface state parameters of the copper layer on the substrate are obtained, wherein the surface state parameters include at least one of surface roughness distribution or surface resistance distribution. In one embodiment, before performing short-time pre-deposition electroplating, the surface state of the copper layer on the PCB substrate is first detected and quantified to obtain surface state parameters. Specifically, the PCB substrate can be placed in an online inspection station, and three-dimensional morphology data of the substrate surface can be obtained using a surface morphology detection device (such as a white light interferometer or a laser confocal scanning device), and the surface roughness distribution parameters can be further calculated; alternatively, a multi-point contact or non-contact resistance testing device can be used to apply a small test current at different locations on the substrate and measure the voltage response to obtain surface resistance distribution data. The surface state parameters are preferably expressed in a spatial distribution form, that is, the PCB substrate is divided into multiple regional units, each unit corresponding to a roughness value or resistance value, thereby constructing a surface state distribution map.

[0032] For example, a PCB substrate can be divided into a 10×10 grid area, and the average roughness value of each area can be measured by scanning. If it is found that the roughness of some areas is significantly higher than that of other areas, it indicates that the area is more likely to form a local high current density area in the early stage of electroplating, and targeted control is required in the subsequent pre-deposition process.

[0033] The current density and duration for short-time pre-deposition electroplating are determined based on surface condition parameters.

[0034] In one embodiment, after acquiring the surface state parameters, the current density and duration of short-time pre-deposition electroplating are adaptively set according to the parameters. Specifically, a mapping model between surface state parameters and initial electroplating deposition behavior can be established. For example, by using historical experimental data or preset rules, different roughness or surface resistance ranges can be mapped to different current density adjustment coefficients and pre-deposition time ranges, thereby achieving dynamic optimization of pre-deposition parameters.

[0035] Furthermore, when the surface state distribution exhibits significant dispersion, a lower current density and a longer pre-deposition time can be prioritized to slow down the deposition rate of locally highly active areas and make the overall deposition process more balanced; while when the surface state distribution is relatively uniform, the current density can be appropriately increased and the pre-deposition time shortened to improve production efficiency.

[0036] For example, when the test results show that the surface roughness of a certain PCB substrate is extremely different, the pre-deposition current density can be reduced by 20% from the normal value and the pre-deposition time can be extended to 1.5 times the original value to avoid the rough area from forming a protrusion quickly due to current concentration; while for substrates with relatively uniform roughness distribution, a higher current density and a shorter pre-deposition time can be used to quickly form a uniform interface.

[0037] Furthermore, the current acquisition unit in step S2 includes: Multiple current sensors are arranged in segments along the cathode conductive path, with each current sensor corresponding to a different area on the substrate surface. In one embodiment, during the electroplating process of the PCB substrate, multiple current sensors are segmented along the cathode conductive path according to a preset partitioning strategy, so that each current sensor corresponds to one or a group of areas on the surface of the PCB substrate. Specifically, the substrate can be divided into several spatial area units (e.g., regular grids or irregular areas divided according to functional zones) based on the size of the PCB substrate, the density of the circuit distribution, and the expected monitoring accuracy. An independent conductive branch is set for each area on the cathode busbar or branch conductive path, and a current sensor is connected in series on each branch to achieve independent current acquisition in different areas. The current sensor can be a Hall current sensor, a shunt resistor sensor, or a closed-loop current detection module to ensure good stability and response speed in the electroplating environment.

[0038] For example, a PCB substrate with a size of 300mm×300mm can be divided into a 6×6 area array, and 36 branch circuits can be designed in the cathode conduction system, with each circuit corresponding to one area. At the same time, a miniature current sensor is connected in series in each circuit to achieve synchronous monitoring of the current in the 36 areas.

[0039] By continuously collecting real-time current values ​​of corresponding areas through various current sensors, and combining the area of ​​each area to calculate the instantaneous current density of that area, the spatial distribution of current density on the substrate surface is constructed.

[0040] In one embodiment, after the current sensors are deployed, the output signals of each current sensor are acquired in real time through a data acquisition system. Combined with the geometric area parameters of each region, the instantaneous current density of the corresponding region is calculated. Specifically, a high-speed data acquisition module can continuously acquire the current values ​​output by each sensor at a preset sampling frequency (e.g., milliseconds), and the ratio of the current value to the area of ​​the corresponding region is calculated to obtain the instantaneous current density of each region at the current moment. Subsequently, the instantaneous current densities of all regions are mapped according to their spatial location to form spatial distribution data of current density.

[0041] Furthermore, to improve data stability and anti-interference capabilities, the acquired current signals can be filtered (such as by moving average or low-pass filtering) and the data can be smoothed within a short time window to eliminate the impact of instantaneous fluctuations on subsequent analysis.

[0042] For example, if a sensor in a certain area measures a current of 0.5A at a certain moment, and the area of ​​that area is 25cm², then the instantaneous current density of that area can be calculated to be 0.02A / cm². By combining the calculation results of all areas, a current density distribution map reflecting the current electroplating state can be generated.

[0043] Furthermore, identifying regions of abnormal current density in step S2 includes: Extract the instantaneous current density of each region in the spatial distribution of current density, and perform time series analysis to extract the peak instantaneous current density that occurs within a certain time window. In one embodiment, based on the established spatial distribution of current density on the PCB substrate, continuous time-series acquisition and analysis of instantaneous current density data for each region are performed to identify local current fluctuation characteristics. Specifically, a corresponding time-series data stream can be established for each region, and statistical analysis of the instantaneous current density of that region is performed within a preset sliding time window (e.g., a range of several milliseconds to several seconds). By comparing the current sampled value with the historical sampled values ​​within the window, the local maximum value within the time window is extracted as the peak value of the instantaneous current density of that region. Simultaneously, to avoid noise interference, the original current density data can be filtered or smoothed before peak value extraction, for example, by using moving average filtering or median filtering, to improve the stability and reliability of peak value identification.

[0044] For example, for a certain area, current density data of 10 sampling points are recorded within a continuous 1-second time window. By comparing these 10 data points, the maximum value can be identified as the peak value of the instantaneous current density within the time window. If the peak value is significantly higher than the other sampling values, it can be considered that there is an abnormal current fluctuation trend in the area during this time period.

[0045] Calculate the ratio of the instantaneous current density peak to the current density of the short-term pre-deposition electroplating. When the ratio exceeds the preset multiplier threshold, the area where the instantaneous current density peak appears will be marked as an abnormal current density area, and the location information of the area and the time when the peak appears will be recorded.

[0046] In one embodiment, after obtaining the peak instantaneous current density of each region, the ratio of the peak value to the reference current density set during the short-term pre-deposition electroplating stage is calculated to assess the degree of current deviation in that region. Specifically, the peak instantaneous current density can be divided by the pre-deposition current density to obtain the corresponding multiplier value, and this multiplier value is compared with a preset multiplier threshold. When the multiplier value exceeds the threshold, it is determined that there is an abnormal current density in that region, and the region is marked as an abnormal current density region. At the same time, the spatial location information of the abnormal region and the specific time of the peak occurrence are recorded for subsequent analysis of abnormal diffusion trends and electroplating interruption decisions.

[0047] Furthermore, the anomaly detection results from multiple time windows can be overlaid and analyzed to identify persistent or intermittent anomaly regions, thereby improving the accuracy of anomaly identification.

[0048] For example, if the current density set in the pre-deposition stage is 0.02 A / cm², and a peak value of 0.036 A / cm² is detected in a certain area within a certain time window, then the multiplier is 1.8; when the preset multiplier threshold is 1.5, the area is determined to be an abnormal area, and its corresponding grid number and peak occurrence time are recorded (e.g., the 5th sampling point at the 3rd second).

[0049] Furthermore, step S2, interrupting the electroplating process when the preset conditions are met in the abnormal current density region, includes: The total area of ​​the currently marked abnormal current density regions is counted, and the proportion of the abnormal area to the total area of ​​the substrate is calculated. In one embodiment, after identifying and marking abnormal current density regions, spatial statistical analysis is performed on all current abnormal regions to obtain the abnormal area ratio. Specifically, regions marked as having abnormal current density can be summarized according to pre-divided regional units, and their corresponding areas can be summed to obtain the total area of ​​abnormal regions; simultaneously, the abnormal area ratio is calculated by combining the total effective electroplating area of ​​the PCB substrate. Preferably, this calculation process can be updated in real time within each sampling period to reflect the dynamic changes of abnormal regions.

[0050] For example, when a PCB substrate is divided into 100 equal-area regions, and 12 of these regions are marked as abnormal regions, the abnormal area ratio is 12%. If some regions subsequently return to normal or new abnormal regions are added, this ratio will change dynamically over time.

[0051] Determine whether the proportion of abnormal area reaches the preset proportion threshold, and whether the peak value of instantaneous current density in any abnormal current density area exceeds the preset peak value threshold. In one embodiment, after obtaining the abnormal area ratio, two types of judgment conditions are introduced simultaneously: a peak value threshold and an area ratio threshold, to form a multi-dimensional anomaly judgment mechanism. Specifically, on the one hand, the instantaneous current density peak value of each abnormal region is detected, and it is determined whether there is a region exceeding a preset peak value threshold; on the other hand, the current abnormal area ratio is compared with a preset ratio threshold to assess the spatial diffusion degree of the anomaly. Through the above dual judgment, two different types of depositional imbalance states, namely "local extreme anomaly" and "widespread diffusion anomaly," can be distinguished.

[0052] For example, when a single area experiences a sharp increase in current density, exceeding a preset peak threshold (e.g., reaching more than twice the reference current density), it can be identified as a high-risk anomaly even if the overall abnormal area ratio is low. Conversely, when multiple areas experience a slight increase in current density, although not reaching the peak threshold, their area ratio gradually increases and exceeds a set ratio (e.g., 10%), it indicates that the anomaly is spreading.

[0053] If the instantaneous current density peak value in any current density abnormal region exceeds the preset peak value threshold, the pre-deposition electroplating process will be immediately interrupted. In one embodiment, when the instantaneous current density peak value in any abnormal current density region exceeds a preset peak threshold, the system immediately triggers an electroplating interruption control mechanism. Specifically, the current can be rapidly reduced to zero or a safe value by controlling the output of the rectified power supply, thereby stopping the pre-deposition electroplating process and preventing the local high current density region from further developing into copper wire or burnt deposition defects. Simultaneously, the location of the region triggering the interruption and the corresponding time point can be recorded for subsequent analysis and process optimization.

[0054] For example, when the current density in a certain area instantaneously reaches 2.2 times the set reference value, the system immediately cuts off the power supply within one sampling period after detecting the peak value, thereby preventing the formation of dendritic protrusions in that area.

[0055] If the abnormal area ratio reaches the preset percentage threshold but does not trigger the peak threshold condition, a delay timer is started, and the changing trend of the abnormal area ratio is continuously monitored during the delay period. If the abnormal area ratio continues to rise during the delay period, the pre-deposition electroplating process is interrupted. If the abnormal area ratio remains stable or decreases during the delay period, the pre-deposition electroplating process continues until the preset pre-deposition time is reached and then interrupted.

[0056] In one embodiment, when the abnormal area ratio reaches a preset percentage threshold but no extreme anomaly exceeding the peak threshold occurs, the system does not immediately interrupt electroplating. Instead, it initiates a delay timing mechanism and continuously monitors the changing trend of the abnormal area ratio during the delay period. Specifically, a delay time window (e.g., several seconds) can be set, during which the abnormal area ratio is periodically calculated and its changing direction (increasing, stabilizing, or decreasing) is analyzed. If the abnormal area ratio is detected to be continuously increasing, it indicates that the deposition imbalance is spreading, and the electroplating process should be interrupted in time. Conversely, if the abnormal area ratio remains stable or gradually decreases, it indicates that the system has a certain self-stabilizing capability and can continue to perform pre-deposition electroplating until the preset time.

[0057] For example, when the abnormal area ratio reaches 10% but the peak values ​​of each region do not exceed the threshold, the system enters the delayed observation stage; if the abnormal area ratio rises from 10% to 15% in the next 3 seconds, it is determined that the abnormal spread trend is obvious and an interruption is executed; if the ratio remains at 10% or drops to 8%, the electroplating process continues until the pre-deposition stage is completed.

[0058] It should be noted that the introduction of this delayed judgment mechanism can avoid frequent interruptions in electroplating due to short-term fluctuations or minor local anomalies, thereby ensuring both quality and process stability and production efficiency.

[0059] Furthermore, the power-off and static treatment described in step S3 includes: Immediately after interrupting the pre-deposition electroplating, cut off the applied current while keeping the PCB substrate immersed in the copper plating bath. In one embodiment, after the pre-deposition electroplating process is interrupted, the applied current is rapidly reduced to zero by controlling the rectified power supply, thereby putting the PCB substrate into a power-off state. Simultaneously, the PCB substrate remains continuously immersed in the copper plating bath without being removed or rinsed, thus maintaining the original electrochemical system environment. Specifically, while cutting off the current, the stirring device can be turned off or adjusted to keep the plating solution in a relatively stable or slow-flowing state, avoiding strong convection from disturbing the interface state. Furthermore, the temperature and plating solution composition can be kept constant, so that the power-off settling process is mainly dominated by spontaneous interfacial electrochemical processes.

[0060] For example, after an anomaly is detected and an interrupt is triggered, the system shuts off the power output within milliseconds, while maintaining the bath temperature at a set value (e.g., 25°C) and reducing the stirring intensity, so that the PCB substrate enters the settling stage in a stable environment.

[0061] Start the static timer and the electrochemical measurement device, which is used to apply a weak AC test signal to the surface of the PCB substrate; In one embodiment, after the PCB substrate enters a power-off and static state, a static timer and an electrochemical measuring device are simultaneously activated to achieve time control and state monitoring of the static process. Specifically, the static timer is used to record the cumulative static time since the power-off moment and can be linked with subsequent uniformity determination and maximum static time limit; the electrochemical measuring device applies a small-amplitude AC test signal (e.g., millivolt-level voltage perturbation) to the surface of the PCB substrate through an electrode system to excite an electrochemical response signal without damaging the interface state.

[0062] Furthermore, the electrochemical measurement device can employ an impedance measurement module (such as an electrochemical impedance spectroscopy testing unit) to acquire interface response characteristics through scanning or fixed frequency methods, thereby achieving precise perception of the local electrochemical state.

[0063] For example, a timer is started and the time is recorded immediately after power is cut off. At the same time, a small AC signal of 10mV is applied to the substrate through a measuring device, and the interface is periodically scanned at a fixed frequency to obtain response data of each region.

[0064] Electrochemical response signals at different locations on the PCB substrate surface are collected at fixed time intervals using an electrochemical measurement device. The local current density characteristic value at each location is calculated based on the electrochemical response signal at each location. The local current density characteristic values ​​at multiple locations at the same time are combined to form the local current density distribution data at that time. In one embodiment, during the power-off and static period, an electrochemical measurement device collects electrochemical response signals at different locations on the PCB substrate surface at fixed time intervals (e.g., every few milliseconds or seconds), and calculates the local current density characteristic values ​​at each location based on the response signals. Specifically, a measurement mapping relationship can be established at the spatial region location corresponding to the PCB substrate, and the electrochemical response signal (such as impedance amplitude, phase, etc.) at each location can be collected. Then, through a preset model or parameter conversion method, the response signal is converted into characteristic values ​​that reflect local deposition activity or interface state.

[0065] Furthermore, at the same sampling time, the local current density characteristic values ​​corresponding to all measurement locations are arranged and combined according to their spatial positions to form the local current density distribution data at that time; this distribution data can reflect the relative differences in the deposition state of each area on the current PCB substrate surface.

[0066] For example, at a certain sampling time, the corresponding electrochemical response signals of the divided regions are measured respectively, and a set of characteristic values ​​(such as C1, C2, ..., Cn) are calculated. After arranging them according to the region position, a set of spatial distribution data is formed to describe the interface homogeneity state at that time.

[0067] Furthermore, the power-off and static treatment in step S3 also includes: The range of local current density characteristic values ​​at different locations is calculated based on local current density distribution data at multiple consecutive time points, and used as a uniformity evaluation index. In one embodiment, during the power-off and static period, based on local current density distribution data acquired at multiple consecutive sampling times, statistical analysis is performed on the local current density characteristic values ​​at different locations to construct an evaluation index for characterizing interface uniformity. Specifically, at each sampling time, the local current density characteristic values ​​corresponding to all measurement locations are summarized, and the maximum and minimum values ​​are extracted respectively. The difference between the two is calculated as the range value at that time. Subsequently, the range values ​​at multiple consecutive times can be smoothed or averaged to reduce the impact of instantaneous fluctuations on the evaluation results, thereby obtaining a more stable uniformity evaluation index.

[0068] For example, at a certain sampling time, the characteristic values ​​corresponding to each region are 0.18, 0.20, 0.22, and 0.19, respectively. Then the range at that time is 0.22 minus 0.18, which is 0.04. If the ranges at three consecutive times are 0.05, 0.04, and 0.03, respectively, then the average value of approximately 0.04 can be taken as the current uniformity evaluation index.

[0069] Determine whether the uniformity evaluation index has dropped below the preset uniformity threshold; if so, determine that the local current density distribution data meets the uniformity judgment condition and record the current settling timer duration; if not, continue settling and return to repeat the acquisition and judgment through the electrochemical measurement device. In one embodiment, after obtaining the uniformity evaluation index, it is compared with a preset uniformity threshold to determine whether the deposition state on the current PCB substrate surface has been restored to a uniform level. Specifically, when the uniformity evaluation index drops below the threshold, it is determined that the local current density distribution has met the uniformity determination condition. At this time, the cumulative resting time of the current resting timer is recorded, and this state is used as the trigger for resuming electroplating. If the uniformity evaluation index is still higher than the threshold, the power-off resting state is maintained, and the electrochemical measurement step is returned to continue the data acquisition and determination cycle.

[0070] For example, when the uniformity threshold is set to 0.02, if the currently calculated evaluation index is 0.018, it is determined to meet the standard, and the resting time at this time is recorded (e.g., 6 seconds of resting). If the evaluation index is 0.03, the resting continues, and the calculation is recalculated in the next sampling period.

[0071] If the settling time exceeds the preset maximum settling time but the uniformity evaluation index still fails to meet the standard, an abnormal state warning for the plating solution will be issued, and the current electroplating process of the substrate will be terminated.

[0072] In one embodiment, to prevent the inability to restore a uniform state after prolonged settling, a maximum settling time is set as a protective control condition. During the settling process, the current cumulative settling time is continuously compared with the preset maximum settling time. When the settling time exceeds this maximum value and the uniformity evaluation index still has not decreased below the threshold, it is determined that there is an abnormality in the current plating solution system or process state, thereby triggering an abnormality warning mechanism and terminating the current electroplating process of the PCB substrate. Specifically, the system can issue an alarm signal and simultaneously record relevant process parameters (such as time, temperature, historical current data, etc.) for subsequent analysis and adjustment.

[0073] For example, if the maximum set time is 10 seconds, and the uniformity evaluation index is still 0.028 (higher than the threshold of 0.02) at the end of 10 seconds, the system will issue an abnormal prompt and stop the subsequent electroplating steps of the substrate.

[0074] Of particular importance, the calculation of the local current density characteristic value at each location based on the electrochemical response signal includes: Frequency domain analysis was performed on the electrochemical response signals collected at each location to extract the impedance amplitude and phase angle within a preset frequency range; The double-layer capacitance value is calculated by fitting an equivalent circuit model based on the impedance magnitude and phase angle. The double-layer capacitance value is used as the local current density characteristic value at the corresponding location, where the magnitude of the double-layer capacitance value is used to characterize the adsorption state of the surface additive at that location. Arrange the double-layer capacitance values ​​at all locations at the same time according to their location coordinates to form the local current density distribution data at that time.

[0075] Of particular importance, the determination of the preset uniformity threshold includes: Under the same plating solution conditions, multiple samples were subjected to a power-off static test, and the range of local current density characteristic values ​​when each sample reached a stable state was recorded. Perform statistical analysis on the range values ​​of all samples, and calculate the mean and standard deviation of the range values; The average value plus one standard deviation is used as the initial value for the preset uniformity threshold.

[0076] Furthermore, step S3 also includes a dynamic adjustment mechanism for the settling time: During the power-off and static process, the current plating solution conditions are recorded simultaneously, including the temperature of the plating solution, the concentration of copper ions, and the concentration of additives. Establish a database of settling time to store the actual settling time required to reach the uniformity judgment condition under different plating solutions. At the start of each new power-off settling period, the historical settling time under similar conditions is queried in the settling time database based on the current plating solution conditions, and used as the estimated settling time. The smaller value between the estimated settling time and the preset maximum settling time is used as the upper limit of the monitoring time for the current batch; When the actual settling time deviates from the estimated settling time by more than 30%, a plating solution status check prompt is triggered. Update the actual settling time and corresponding plating solution conditions to the settling time database.

[0077] In one embodiment, during the power-off settling process, current plating solution condition parameters, including plating solution temperature, copper ion concentration, and additive concentration, are simultaneously collected and recorded, and input into the system as important environmental variables affecting the settling recovery behavior. Based on historical production data, a settling time database is established. This database stores the actual settling times required to achieve uniformity determination under different combinations of plating solution conditions and can be categorized and indexed according to multi-dimensional parameters (such as temperature range and concentration range). At the start of each new power-off settling period, the system searches the database for similar historical conditions based on the currently collected plating solution conditions (e.g., through interval matching or similarity algorithms), extracts the corresponding historical settling time as the estimated settling time for the current period, and then compares this estimated value with a preset maximum settling time, taking the smaller value as the upper limit of the monitoring time for the current batch, balancing efficiency and safety. In actual execution, the current actual settling time is continuously compared with the estimated settling time. When the deviation between the two exceeds 30%, it is determined that the current state of the plating solution may have changed abnormally (such as additive consumption or contamination), thereby triggering a plating solution state check prompt. Finally, after this settling period ends, the actual settling time and the corresponding plating solution conditions are written into the database for subsequent iterative optimization.

[0078] For example, when the current plating solution temperature is 24℃, the copper ion concentration is 60g / L, and the additive concentration is a certain set value, the system matches a historical settling time of 5 seconds under similar conditions from the database and uses it as an estimate; if the maximum settling time is set to 10 seconds, the upper limit for this monitoring is 5 seconds; if the final actual settling time reaches 8 seconds to meet the uniformity condition, the deviation exceeds 30%, the system issues a plating solution abnormality warning, and records "8 seconds + corresponding conditions" into the database.

[0079] It should be noted that this dynamic adjustment mechanism is essentially an adaptive optimization strategy based on empirical data. It can continuously improve the accuracy of prediction as production data accumulates, thereby shortening unnecessary settling time and improving overall process efficiency while ensuring coating quality.

[0080] Furthermore, the recovery process in step S4 includes: Once the local current density distribution data meets the uniformity judgment condition, the applied current is restored and the current density is applied for normal electroplating. Regularly collect the surface condition of the plating on the PCB substrate and identify whether dendritic copper protrusions or granular copper deposits are present. If no dendritic copper protrusions or granular copper deposits are detected within the preset monitoring time, it is confirmed that the copper wire and copper slag suppression is effective, and electroplating continues until the target coating thickness is reached. When dendritic copper protrusions or granular copper deposits are detected, adjust the electroplating current density or repeat the power-off and settling process.

[0081] In one embodiment, when the local current density distribution data obtained through the power-off and static process meets the preset uniformity judgment conditions, the system controls the rectifier power supply to gradually restore the applied current and applies the target current density according to the preset process parameters, so that the PCB substrate re-enters the normal electroplating stage. Preferably, a gradual current increase method (e.g., step-like or ramp-like increase) can be used in the initial recovery stage to avoid new current concentration phenomena caused by sudden changes in interface state; then, stable current density control is adopted. During the electroplating recovery process, the system performs online or offline detection on the plating state of the PCB substrate surface according to a set cycle, for example, by using optical detection or image recognition methods to determine whether there are defects such as dendritic copper protrusions or granular copper deposits; when no such abnormal structure is detected within the preset monitoring time, it is determined that the power-off and static control is effective, and the current electroplating conditions are maintained until the target plating thickness is reached; otherwise, if an abnormal structure is detected, control measures are taken according to the degree of abnormality, such as reducing the current density, adjusting the additive supply, or re-executing the power-off and static process to restore interface uniformity.

[0082] For example, after the settling period, the electroplating is gradually increased from 0.01 A / cm² to 0.02 A / cm², and a surface image is acquired every 2 seconds. If no dendritic structure is found within the 10-second monitoring window, electroplating continues to the target thickness. If local particle accumulation is detected at the 6th second, the current density is reduced to 0.015 A / cm² and the settling process is restarted.

[0083] See Figure 3 The PCB electroplating copper wire and copper slag synergistic suppression method of the present invention yielded a coating with excellent cross-sectional morphology. The cross-section shows a coating thickness of approximately 111.12 micrometers, a smooth surface, and a dense and uniform internal structure, with no observed dendritic copper protrusions or granular copper deposits. The interface between the bottom of the coating and the substrate is tightly bonded, without delamination or voids. The uniform grain size distribution of the coating indicates that the additives in the plating solution were uniformly adsorbed during the power-off and static stage, effectively suppressing the occurrence of tip discharge effects during the subsequent normal electroplating stage.

[0084] After reliability testing (including thermal shock testing), no cracking or delamination was observed at the interface of the coating sample, proving that the initial deposition interface formed by short-time pre-deposition electroplating has good metallurgical bonding strength with the subsequent coating, which meets the requirements for use in PCB products.

[0085] This control strategy was introduced into a batch of production on the gantry line. By comparing the changes in defect rate before and after the introduction (the cross-section of the copper plating after the introduction is shown in the figure), if the defects of copper wire and copper slag decreased significantly, the effectiveness of the scheme was further verified.

[0086] See Figure 4The present invention also provides a synergistic suppression system 100 for copper dross in PCB electroplating copper wires, for performing the synergistic suppression method for copper dross in PCB electroplating copper wires as described above, wherein the synergistic suppression system 100 for copper dross in PCB electroplating copper wires includes: Interface construction module 101 is used to perform short-time pre-deposition electroplating in the initial stage of PCB substrate electroplating to form a uniform initial deposition interface on the substrate surface. The distribution detection module 102 is used to acquire the current values ​​flowing through different areas of the substrate by a current acquisition unit set on the cathode conductive path during the pre-deposition electroplating process, thereby constructing the spatial distribution of current density, identifying abnormal current density areas, and interrupting the electroplating process when the abnormal current density areas meet preset conditions. The static control module 103 is used to perform a power-off static treatment on the PCB substrate during the electroplating interruption. During the static process, it continuously acquires the local current density distribution data on the surface of the PCB substrate and determines whether it meets the uniformity judgment condition so that the deposition state on the surface of the PCB substrate converges to the uniform state corresponding to the initial deposition interface. The determination and recovery module 104 is used to restore the electroplating process when the local current density distribution data meets the uniformity determination conditions, so as to suppress the generation of copper wire and copper slag.

[0087] Therefore, the embodiments should be considered as exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of the equivalents of the application are intended to be included within the invention.

[0088] The above description is merely a specific embodiment of the present invention, enabling those skilled in the art to understand or implement the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the present invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features of the invention herein.

Claims

1. A method for synergistic suppression of copper dross in PCB electroplating copper wires, characterized in that, Includes the following steps: Step S1: Perform short-time pre-deposition electroplating in the initial stage of PCB substrate electroplating to form a uniform initial deposition interface on the substrate surface; Step S2: During the pre-deposition electroplating process, the current values ​​flowing through different areas of the substrate are obtained by the current acquisition unit set on the cathode conductive path, thereby constructing the spatial distribution of current density and identifying abnormal current density areas; and the electroplating process is interrupted when the abnormal current density areas meet the preset conditions. Step S3: During the electroplating interruption, the PCB substrate is subjected to a power-off and static treatment. During the static treatment, the local current density distribution data on the surface of the PCB substrate is continuously acquired, and it is determined whether it meets the uniformity judgment condition, so that the deposition state on the surface of the PCB substrate converges to the uniform state corresponding to the initial deposition interface. Step S4: When the local current density distribution data meets the uniformity judgment condition, resume the electroplating process to suppress the formation of copper wire and copper slag.

2. The method for synergistic suppression of copper dross in PCB electroplating copper wires according to claim 1, characterized in that, Step S1 also includes: Before performing short-time pre-deposition electroplating, the surface state parameters of the copper layer on the substrate are obtained, wherein the surface state parameters include at least one of surface roughness distribution or surface resistance distribution. The current density and duration for short-time pre-deposition electroplating are determined based on surface condition parameters.

3. The method for synergistic suppression of copper slag on PCB electroplating copper wires according to claim 2, characterized in that, The current acquisition unit mentioned in step S2 includes: Multiple current sensors are arranged in segments along the cathode conductive path, with each current sensor corresponding to a different area on the substrate surface. By continuously collecting real-time current values ​​of corresponding areas through various current sensors, and combining the area of ​​each area to calculate the instantaneous current density of that area, the spatial distribution of current density on the substrate surface is constructed.

4. The method for synergistic suppression of copper dross in PCB electroplating copper wire according to claim 3, characterized in that, Step S2 involves identifying regions with abnormal current density, including: Extract the instantaneous current density of each region in the spatial distribution of current density, and perform time series analysis to extract the peak instantaneous current density that occurs within a certain time window. Calculate the ratio of the instantaneous current density peak to the current density of the short-term pre-deposition electroplating. When the ratio exceeds the preset multiplier threshold, the area where the instantaneous current density peak appears will be marked as an abnormal current density area, and the location information of the area and the time when the peak appears will be recorded.

5. The method for synergistic suppression of copper dross in PCB electroplating copper wires according to claim 4, characterized in that, Step S2, interrupting the electroplating process when the preset conditions are met in the abnormal current density region, includes: The total area of ​​the currently marked abnormal current density regions is counted, and the proportion of the abnormal area to the total area of ​​the substrate is calculated. Determine whether the proportion of abnormal area reaches the preset proportion threshold, and whether the peak value of instantaneous current density in any abnormal current density area exceeds the preset peak value threshold. If the instantaneous current density peak value in any current density abnormal region exceeds the preset peak value threshold, the pre-deposition electroplating process will be immediately interrupted. If the abnormal area ratio reaches the preset percentage threshold but does not trigger the peak threshold condition, a delay timer is started, and the changing trend of the abnormal area ratio is continuously monitored during the delay period. If the abnormal area ratio continues to rise during the delay period, the pre-deposition electroplating process is interrupted. If the abnormal area ratio remains stable or decreases during the delay period, the pre-deposition electroplating process continues until the preset pre-deposition time is reached and then interrupted.

6. The method for synergistic suppression of copper dross in PCB electroplating copper wires according to claim 5, characterized in that, The power-off and static treatment in step S3 includes: Immediately after interrupting the pre-deposition electroplating, cut off the applied current while keeping the PCB substrate immersed in the copper plating bath. Start the static timer and the electrochemical measurement device, which is used to apply a weak AC test signal to the surface of the PCB substrate; Electrochemical response signals at different locations on the surface of a PCB substrate are collected at fixed time intervals using an electrochemical measurement device. The local current density characteristic value at each location is calculated based on the electrochemical response signal at each location, and the local current density characteristic values ​​at multiple locations at the same time are combined to form the local current density distribution data at that time.

7. The method for synergistic suppression of copper dross in PCB electroplating copper wires according to claim 6, characterized in that, The power-off and static treatment in step S3 also includes: The range of local current density characteristic values ​​at different locations is calculated based on local current density distribution data at multiple consecutive time points, and used as a uniformity evaluation index. Determine whether the uniformity evaluation index has dropped below the preset uniformity threshold; if so, determine that the local current density distribution data meets the uniformity judgment condition and record the current settling timer duration; if not, continue settling and return to repeat the acquisition and judgment through the electrochemical measurement device. If the settling time exceeds the preset maximum settling time but the uniformity evaluation index still fails to meet the standard, an abnormal state warning for the plating solution will be issued, and the current electroplating process of the substrate will be terminated.

8. The method for synergistic suppression of copper dross in PCB electroplating copper wires according to claim 7, characterized in that, Step S3 also includes a dynamic adjustment mechanism for the settling time: During the power-off and static process, the current plating solution conditions are recorded simultaneously, including the temperature of the plating solution, the concentration of copper ions, and the concentration of additives. Establish a database of settling time to store the actual settling time required to reach the uniformity judgment condition under different plating solutions. At the start of each new power-off settling period, the historical settling time under similar conditions is queried in the settling time database based on the current plating solution conditions, and used as the estimated settling time. The smaller value between the estimated settling time and the preset maximum settling time is used as the upper limit of the monitoring time for the current batch; When the actual settling time deviates from the estimated settling time by more than 30%, a plating solution status check prompt is triggered. Update the actual settling time and corresponding plating solution conditions to the settling time database.

9. The method for synergistic suppression of copper slag in PCB electroplating copper wires according to claim 8, characterized in that, Step S4, which involves resuming the electroplating process, includes: Once the local current density distribution data meets the uniformity judgment condition, the applied current is restored and the current density is applied for normal electroplating. Regularly collect the surface condition of the plating on the PCB substrate and identify whether dendritic copper protrusions or granular copper deposits are present. If no dendritic copper protrusions or granular copper deposits are detected within the preset monitoring time, it is confirmed that the copper wire and copper slag suppression is effective, and electroplating continues until the target coating thickness is reached. When dendritic copper protrusions or granular copper deposits are detected, adjust the electroplating current density or repeat the power-off and settling process.

10. A system for synergistic suppression of copper dross in PCB electroplating copper wires, characterized in that, For performing the method for synergistic suppression of copper slag on PCB electroplating copper wires as described in claim 1, the system for synergistic suppression of copper slag on PCB electroplating copper wires comprises: The interface construction module is used to perform short-time pre-deposition electroplating in the initial stage of PCB substrate electroplating to form a uniform initial deposition interface on the substrate surface. The distribution detection module is used to acquire the current values ​​flowing through different areas of the substrate during the pre-deposition electroplating process by a current acquisition unit set on the cathode conductive path, thereby constructing the spatial distribution of current density, identifying areas with abnormal current density, and interrupting the electroplating process when the abnormal current density area meets the preset conditions. The static control module is used to perform a power-off static treatment on the PCB substrate during electroplating interruption. During the static process, it continuously acquires local current density distribution data on the surface of the PCB substrate and determines whether it meets the uniformity judgment condition so that the deposition state on the surface of the PCB substrate converges to the uniform state corresponding to the initial deposition interface. The recovery module is used to resume the electroplating process when the local current density distribution data meets the uniformity judgment condition, so as to suppress the generation of copper wire and copper slag.

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