A method for manufacturing a buried cavity circuit board which helps to improve alignment accuracy

Abstract

The application relates to a buried cavity circuit board preparation method which helps to improve alignment accuracy, and the method comprises the following steps in sequence: preparing a substrate combination, processing an intermediate substrate, processing two outer layer substrates, pressing the outer layer substrates and the intermediate substrate, preparing straight-through holes and detection holes, preparing blind holes, electroplating copper treatment, preparing outer layer circuits and detecting copper blocks, detection, cutting and screening. In the application, a large alignment hole is arranged to expose a small alignment hole on the intermediate substrate, and processing is carried out based on the small alignment hole, so that the alignment accuracy between the outer layer circuit and the working cavity and between the straight-through hole and the working cavity can be effectively improved; detection cavities and detection holes are arranged in the peripheral non-functional area of a delivery unit, and workers can intuitively and timely judge whether there is a deviation between the detection cavities and the detection holes in the production process, so as to judge whether there is a deviation between the straight-through hole and the working cavity, and the unqualified products can be effectively intercepted in advance.

Description

Technical Field

[0001] This invention relates to the field of circuit board technology, and in particular to a method for manufacturing embedded cavity circuit boards that helps improve alignment accuracy. Background Technology

[0002] With the rapid development of electronic devices towards thinner, lighter, higher-density, and more multifunctional designs, embedded cavity circuit boards (ECBs) have become widely used in high-end communication equipment, medical electronics, aerospace, and other fields because they can embed electronic components into internal cavities, effectively reducing device size, optimizing signal transmission paths, and improving system integration. A typical structure of an embedded cavity circuit board includes an intermediate circuit board and outer circuit boards stacked on the upper and lower sides of the intermediate circuit board. The outer circuit boards have outer layer wiring on the side furthest from the intermediate circuit board and inner layer wiring on the side closest to the intermediate circuit board.

[0003] However, existing embedded cavity circuit board manufacturing processes suffer from significant alignment accuracy issues. Specifically, because the internal cavity is located within the intermediate circuit board, after the outer circuit boards on both sides are laminated, they physically obstruct the cavity area of ​​the intermediate circuit board. This obstruction directly makes it difficult to directly observe or sense the exact position and boundaries of the internal cavity during subsequent processing. Therefore, when it is necessary to fabricate outer circuits on the upper and lower outer circuit boards and ensure precise alignment between these outer circuits and the internal cavity, alignment deviations are highly likely to occur in actual production.

[0004] Furthermore, to achieve electrical interconnection between the three-layer circuit boards, through-holes are typically drilled through the middle circuit board and the upper and lower outer circuit boards. Due to the aforementioned physical obstruction, when drilling using traditional positioning methods (such as relying on targets on the surface of the outer circuit board), the drilling position is difficult to precisely match with the internal cavity position and inner layer circuitry, easily leading to misalignment. In some cases, the through-hole may become too close to the cavity sidewall, penetrating the cavity wall, resulting in ineffective conductivity between the three layers or causing short circuits, open circuits, and other faults. Moreover, due to the continuous obstruction of the outer circuit board, workers cannot visually and in real-time determine whether misalignment has occurred between the through-hole and the internal cavity during the production process. Current technologies often employ offline inspection methods (such as cross-sectional analysis or X-ray sampling of finished or semi-finished products) to determine misalignment. This method has significant lag, failing to intercept defective products in advance during production, making it difficult to stop losses in a timely manner, further increasing production costs and wasting resources.

[0005] In summary, the aforementioned problems—insufficient alignment accuracy and misaligned through-hole drilling caused by the obstruction of cavities on the intermediate circuit board by the outer circuit board, leading to the inability to monitor and intercept defective products online—directly result in a significant decrease in the yield of buried cavity circuit boards, increasing rework costs and material waste. Therefore, improving the alignment accuracy between outer circuitry and cavities, between through-holes and cavities, and between through-holes and inner circuitry, while achieving real-time online process monitoring, has become a pressing technical problem to be solved in this field. Summary of the Invention

[0006] The purpose of this invention is to provide a method for manufacturing buried cavity circuit boards that helps improve alignment accuracy. This method can solve the technical problems in the prior art, such as insufficient alignment accuracy and through-hole drilling deviation caused by the cavity on the intermediate circuit board being blocked by the outer circuit board, as well as the inability to monitor and intercept defective products online in advance.

[0007] To solve the above-mentioned technical problems, the present invention adopts the following technical solution: A method for manufacturing a buried cavity circuit board that helps improve alignment accuracy, the buried cavity circuit board comprising an intermediate circuit board and outer circuit boards located on the upper and lower sides of the intermediate circuit board respectively, and multiple buried cavity circuit boards arranged in an array to form a shipping unit; the manufacturing method includes the following steps: S1. Prepare substrate assembly: Each substrate assembly includes an intermediate substrate and two outer substrates. Each substrate assembly can form multiple shipping units arranged in an array. The intermediate substrate and the outer substrates are respectively formed with shipping unit areas corresponding to each shipping unit. S2. Processing the intermediate substrate: First, a plurality of first positioning holes are formed in the non-functional area of ​​the periphery of the intermediate substrate. Then, with the first positioning holes as a reference, a plurality of alignment holes are formed in the non-functional area of ​​the periphery of the intermediate substrate. A plurality of working cavities arranged in an array are formed in each of the shipping unit areas of the intermediate substrate. At least one detection cavity is formed in the non-functional area of ​​the periphery of each of the shipping unit areas of the intermediate substrate. The plurality of alignment holes are staggered from the plurality of first positioning holes. S3. Process the two outer substrates: First, process a plurality of second positioning holes in the non-functional area of ​​the periphery of the outer substrate. Then, using the second positioning holes as a reference, process a plurality of alignment large holes in the non-functional area of ​​the periphery of the outer substrate. The positions of the plurality of alignment large holes correspond one-to-one with the positions of the plurality of alignment small holes, and the diameter of the alignment large holes is larger than the diameter of the alignment small holes. Next, using the alignment large holes as a reference, prepare inner layer circuits and a plurality of marking points on the side of the outer substrate near the middle substrate. The marking points are located in the non-functional area of ​​the periphery of the outer substrate near the middle substrate. S4. Pressing the outer substrate and the intermediate substrate together: Align the two outer substrates and the intermediate substrate and place them on both sides of the intermediate substrate respectively, so that the plurality of alignment small holes can be exposed from the plurality of alignment large holes on both sides respectively, and press the two outer substrates and the intermediate substrate together to form a pressed substrate. S5. Prepare through holes and detection holes: Based on the exposed alignment holes, at least one through hole for connecting the substrates of each layer in the substrate assembly is formed on the side of each working cavity, and several detection holes are formed on the side of each detection cavity. S6. Preparation of blind holes: A laser drilling machine is used to ablate the area corresponding to the marked point on the side of the two outer substrates away from the middle substrate to expose the marked point; the laser drilling machine drills a number of blind holes on the side of the two outer substrates away from the middle substrate, based on the marked point. S7. Copper plating treatment: Electroplating copper is performed on the through holes and the blind holes; S8. Fabrication of outer layer circuits and detection copper blocks: Using the alignment holes as a reference, outer layer circuits and multiple detection copper blocks are fabricated on the side of the two outer layer substrates away from the middle substrate 1, and the detection copper blocks are set in one-to-one correspondence with the detection holes. S9. Inspection: Inspect each of the aforementioned shipping units to determine whether it is qualified; S10. Cutting and screening: The laminated substrate is cut to remove unqualified shipping units and finally qualified shipping units are screened. Each qualified shipping unit contains multiple precisely aligned embedded cavity circuit boards.

[0008] In a preferred embodiment, the number of the first positioning holes is four, and the four first positioning holes are symmetrically arranged in the non-functional areas at the four corners of the intermediate substrate.

[0009] In a preferred embodiment, the number of alignment holes is four, and the four alignment holes are symmetrically arranged in the non-functional areas at the four corners of the intermediate substrate.

[0010] In a preferred embodiment, step S3, which involves preparing the inner layer circuitry and several marker points, specifically includes the following steps: S31. Using the alignment aperture as a reference, inner dry film is attached to the side of the two outer substrates near the middle substrate. The pattern in the inner dry film includes an inner circuit pattern and several marker point patterns. S32. Exposure, development, etching, and film removal processes are performed sequentially to form the inner layer circuitry and the plurality of marking points on one side of the two outer layer substrates near the middle substrate.

[0011] In a preferred embodiment, step S8, which involves fabricating the outer layer circuitry and multiple detection copper blocks, specifically includes the following steps: S81. Using the alignment hole as a reference, apply an outer dry film to the side of the two outer substrates away from the middle substrate. The pattern in the outer dry film includes an outer circuit pattern and a detection copper block pattern corresponding to each detection hole. S82. Exposure, development, etching, and film removal processes are performed sequentially to form the outer layer circuit and the plurality of detection copper blocks on the side of the two outer layer substrates away from the middle substrate 1.

[0012] In a preferred embodiment, each of the working cavities and each of the detection cavities has the same shape and size. The detection cavity is square, and four detection holes are machined on the side of each detection cavity. The four detection holes are respectively arranged at intervals outside the midpoint of each side of the detection cavity. The cross-sectional shape and size of each detection hole and each through hole are the same. The preset distance between the through hole and the working cavity is slightly larger than the preset distance between the detection hole and the detection cavity.

[0013] In a preferred embodiment, each of the detection copper blocks is disposed on the side of its corresponding detection hole away from the detection cavity, and the design standard is that the detection hole and the corresponding detection copper block partially overlap.

[0014] In a preferred embodiment, the diameter of the detection hole is 0.08–0.12 mm; the detection copper block is rectangular, with a width of 0.18–0.22 mm and a length of 0.55–0.65 mm.

[0015] In a preferred embodiment, step S9, which involves detecting whether each shipping unit is qualified, specifically includes the following steps: S91. Observe whether the inside of each detection cavity turns black. The shipping unit in the same shipping unit area as the detection cavity that has turned black is a defective shipping unit. The shipping unit in the same shipping unit area as the detection cavity that has not turned black is a shipping unit to be further tested. S92. Observe whether the relative position between each detection hole and the corresponding detection copper block in each further inspection unit has shifted. If no shift has occurred, the corresponding further inspection unit is a qualified inspection unit. If a shift has occurred, the shift amount needs to be calculated. If the shift amount is within the safe range, the corresponding further inspection unit is a qualified inspection unit; otherwise, it is an unqualified inspection unit.

[0016] In a preferred embodiment, calculating the offset in step S92 specifically involves: measuring the minimum distance between the edge position of the detection hole where the relative position has shifted and the corresponding edge of the detection cavity, and calculating the difference between the minimum distance and a preset minimum distance value to obtain the offset.

[0017] The beneficial effects of this invention are as follows: (1) The present invention forms several small alignment holes on the intermediate substrate and several large alignment holes on the two outer substrates. Even if the two outer substrates and the intermediate substrate are pressed together, the several small alignment holes can be exposed from the several large alignment holes on both sides, thereby breaking through the obstruction of the working cavity by the outer circuit board. Based on the exposed several small alignment holes, at least one through hole for connecting each layer of the substrate in the substrate assembly is formed on the side of each working cavity, and outer circuits are prepared on the side of the two outer substrates away from the intermediate substrate, thereby greatly improving the alignment accuracy between the outer circuits and the working cavity, while ensuring the accurate matching of the through hole and the working cavity, and effectively reducing the probability of the through hole being drilled off-center.

[0018] (2) When processing the working cavity on the intermediate substrate, at least one detection cavity is simultaneously processed in the non-functional area of ​​the periphery of each shipping unit on the intermediate substrate. When processing the through hole, several detection holes are simultaneously processed on the side of each detection cavity. Therefore, the relative position between the working cavity and the through hole can be directly reflected by the relative position between the detection cavity and the detection hole. Since the detection cavity is located in the non-functional area of ​​the periphery of the shipping unit, there are no lines on the outer substrates on both sides corresponding to this position. Therefore, the staff can intuitively and in real time judge whether there is a misalignment between the detection cavity and the detection hole in the production process, thereby judging whether there is a misalignment between the through hole and the working cavity, realizing the early interception of unqualified products, and effectively reducing production costs and material waste. (3) When the outer layer circuit is prepared on the side of the two outer layer substrates away from the middle substrate, the detection copper blocks are prepared simultaneously and are set in a one-to-one correspondence with the detection holes. The staff can intuitively and quickly judge whether there is a shift in the relative position between the through hole and the working cavity based on whether the relative position between the detection copper block and the detection hole has shifted. (4) When preparing inner layer circuits on the side of the two outer layer substrates close to the middle substrate, several marker points are prepared simultaneously. Before preparing blind holes on the side of the two outer layer substrates away from the middle substrate, a laser drilling machine is used to ablate the area corresponding to the marker points on the side of the two outer layer substrates away from the middle substrate to expose the marker points. Then, the laser drilling machine uses the marker points as a reference to drill several blind holes on the side of the two outer layer substrates away from the middle substrate, thereby achieving accurate alignment between the blind holes and the inner layer circuits and effectively improving the processing yield of blind holes. Attached Figure Description

[0019] Figure 1 This is a flowchart of the method for fabricating the embedded cavity circuit board according to the present invention.

[0020] Figure 2 This is a schematic diagram of the structure of the intermediate substrate of the present invention.

[0021] Figure 3 for Figure 2 A magnified structural diagram of point A in the middle.

[0022] Figure 4 for Figure 3 A magnified structural diagram at point B in the middle.

[0023] Figure 5 This is a schematic diagram of the outer substrate of the present invention.

[0024] Figure 6 for Figure 5 A magnified structural diagram at point C.

[0025] Figure 7 for Figure 6 A magnified structural diagram at point D.

[0026] Figure 8 This is an enlarged view of the actual object after the outer substrate is ablated away from the middle substrate using a laser drilling machine in this invention, revealing the marked points.

[0027] Figure 9 This is an enlarged view of the actual object in the laminated substrate of the present invention, showing the alignment small hole exposed from the alignment large hole.

[0028] Figure 10 This is an enlarged view of the detection hole, detection copper block, and detection cavity in this invention.

[0029] Explanation of reference numerals in the attached figures: 10-Shipping unit; 100-Shipping unit area; 1-Intermediate substrate; 11-First positioning hole; 12-Alignment hole; 13-Working cavity; 14-Detection cavity; 2-Outer substrate; 21-Second positioning hole; 22-Alignment hole; 23-Marker point; 25-Through hole; 26-Detection hole; 27-Detection copper block. Detailed Implementation

[0030] To facilitate understanding by those skilled in the art, the present invention will be further described below with reference to embodiments and accompanying drawings. The content mentioned in the embodiments is not intended to limit the present invention.

[0031] like Figure 1 As shown, the present invention provides a method for manufacturing a buried cavity circuit board that helps improve alignment accuracy. The buried cavity circuit board includes an intermediate circuit board and outer circuit boards located on the upper and lower sides of the intermediate circuit board respectively. Multiple buried cavity circuit boards arranged in an array form a shipping unit 10. The manufacturing method includes the following steps: S1. Prepare substrate assembly: Each substrate assembly includes an intermediate substrate 1 and two outer substrates 2. Each substrate assembly can form multiple shipping units 10 arranged in an array. The intermediate substrate 1 and the outer substrates 2 are respectively formed with shipping unit areas 100 corresponding to each shipping unit 10. S2. Processing the intermediate substrate 1: First, a plurality of first positioning holes 11 are formed in the non-functional area of ​​the periphery of the intermediate substrate 1. Then, based on the first positioning holes 11, a plurality of alignment holes 12 are formed in the non-functional area of ​​the periphery of the intermediate substrate 1. A plurality of working cavities 13 arranged in an array are formed in each of the shipping unit areas 100 of the intermediate substrate 1. At least one detection cavity 14 is formed in the non-functional area of ​​the periphery of each of the shipping unit areas 100 of the intermediate substrate 1. The plurality of alignment holes 12 are staggered from the plurality of first positioning holes 11. S3. Processing the two outer substrates 2: First, a plurality of second positioning holes 21 are formed in the non-functional area of ​​the periphery of the outer substrate 2. Then, based on the second positioning holes 21, a plurality of alignment large holes 22 are formed in the non-functional area of ​​the periphery of the outer substrate 2. The positions of the plurality of alignment large holes 22 correspond one-to-one with the positions of the plurality of alignment small holes 12, and the diameter of the alignment large holes 22 is larger than the diameter of the alignment small holes 12. Next, based on the alignment large holes 22, inner layer circuits and a plurality of marking points 23 are prepared on the side of the outer substrate 2 near the middle substrate 1. The marking points 23 are located in the non-functional area of ​​the periphery of the outer substrate 2 near the middle substrate 1. S4. Laminating the outer substrate and the intermediate substrate: Aligning the two outer substrates 2 with the intermediate substrate 1 and placing them on both sides of the intermediate substrate 1, so that the plurality of alignment small holes 12 can be exposed from the plurality of alignment large holes 22 on both sides, and laminating the two outer substrates 2 and the intermediate substrate 1 to form a laminated substrate; wherein, the lamination process is a conventional production technology in the field of printed circuit boards, and will not be described in detail here. S5. Preparation of through holes and detection holes: Based on the exposed alignment holes 12, at least one through hole 25 for connecting each substrate layer in the substrate assembly is formed on the side of each working cavity 13, and a plurality of detection holes 26 are formed on the side of each detection cavity 14, the detection holes 26 extending from the outer substrate 2 to the middle substrate 1. S6. Preparation of blind holes: A laser drilling machine is used to ablate the area corresponding to the mark point on the side of the two outer substrates 2 away from the middle substrate 1, exposing the mark point 23; the laser drilling machine uses the mark point 23 as a reference to drill a number of blind holes on the side of the two outer substrates 2 away from the middle substrate 1. S7. Copper plating treatment: The through hole 25 and the blind hole are subjected to copper plating treatment; S8. Fabrication of outer layer circuits and detection copper blocks: Using the alignment hole 12 as a reference, outer layer circuits and multiple detection copper blocks 27 are fabricated on the side of the two outer layer substrates 2 away from the middle substrate 1, and the detection copper blocks 27 are set in a one-to-one correspondence with the detection hole 26. S9. Inspection: Inspect each of the shipping units 10 to determine whether it is qualified; S10. Cutting and screening: The laminated substrate is cut to remove unqualified shipping units 10, and qualified shipping units 10 are finally screened. Each qualified shipping unit 10 has multiple precisely aligned buried cavity circuit boards.

[0032] In this embodiment, on the one hand, by pre-processing alignment holes 12 in the non-functional area around the periphery of the intermediate substrate 1 and processing alignment holes 22 at corresponding positions on the two outer substrates 2, even if the two outer substrates 2 and the intermediate substrate 1 are pressed together, the alignment holes 12 can be accurately exposed from the alignment holes 22 on both sides, thereby visually directly penetrating the physical obstruction of the working cavity 13 on the intermediate substrate 1 by the outer substrates 2; subsequently, based on the exposed alignment holes 12, at least one through hole 25 for connecting each layer of substrates in the substrate assembly is formed on the side of each working cavity 13, and outer layer circuits (not shown in the figure) are prepared on the side of the two outer substrates 2 away from the intermediate substrate 1, thereby greatly improving the alignment accuracy between the outer layer circuits and the working cavity 13, while ensuring the accurate matching of the through hole 25 and the working cavity 13, effectively reducing the probability of drilling deviation of the through hole. On the other hand, when processing the working cavity 13 on the intermediate substrate 1, at least one detection cavity 14 is simultaneously formed in the non-functional area of ​​the periphery of each shipping unit 10 on the intermediate substrate 1. When forming the through-hole 25, several detection holes 26 are simultaneously formed on the side of each detection cavity 14. Therefore, the relative position between the working cavity 13 and the through-hole 25 can be directly reflected by the relative position between the detection cavity 14 and the detection hole 26. Since the detection cavity is located in the non-functional area of ​​the periphery of the shipping unit 10, no copper layer lines are provided on the outer substrates 2 on both sides corresponding to this position. Therefore, workers can intuitively and in real-time judge whether there is any misalignment between the detection cavity 14 and the detection hole 26 during the production process. Figure 10As shown, this allows for the determination of whether there is any misalignment between the through-hole and the working cavity, enabling early interception of defective products, effectively avoiding material waste, and significantly reducing production costs. Furthermore, when fabricating the outer layer circuitry on the side of the two outer substrates 2 away from the intermediate substrate 1, detection copper blocks 27, corresponding one-to-one with the detection holes 26, are simultaneously fabricated. Operators can intuitively and quickly determine whether there is any misalignment between the through-hole 25 and the working cavity 13 based on whether the relative positions of the detection copper blocks 27 and the detection holes 26 have shifted. Furthermore, in this embodiment, several marker points 23 are simultaneously prepared when the inner layer circuits are fabricated on the side of the two outer layer substrates 2 near the middle substrate 1. Before fabricating blind vias (not shown in the figure) on the side of the two outer layer substrates 2 away from the middle substrate 1, a laser drilling machine is used to ablate the areas corresponding to the marker points 23 on the side of the two outer layer substrates 2 away from the middle substrate 1 to expose the marker points 23. Then, the laser drilling machine uses the marker points 23 as a reference to drill several blind vias on the side of the two outer layer substrates 2 away from the middle substrate 1, thereby achieving precise alignment between the blind vias and the inner layer circuits. This ensures that the bottom of the blind vias can accurately fall on the pads of the inner layer circuits, solving the process problem of poor connection between blind vias and inner layer circuits due to interlayer misalignment, and effectively improving the processing yield of blind vias.

[0033] like Figure 2 As shown, there are four first positioning holes 11, which are symmetrically arranged in the non-functional areas at the four corners of the intermediate substrate 1; there are also four alignment holes 12, which are symmetrically arranged in the non-functional areas at the four corners of the intermediate substrate 1. Of course, in other embodiments, the number and arrangement of the first positioning holes 11 and the alignment holes 12 may take other forms, which will not be described in detail here.

[0034] Furthermore, the preparation of the inner layer circuitry and several marker points 23 in step S3 specifically includes the following steps: S31. Using the alignment hole 22 as a reference, inner dry film is attached to the side of the two outer substrates 2 near the middle substrate 1. The pattern in the inner dry film includes inner circuit pattern and several marker point patterns. S32. Exposure, development, etching, and film removal processes are performed sequentially to form the inner layer circuit and the plurality of marking points on the side of the two outer layer substrates 2 near the middle substrate 1.

[0035] The processes of applying the inner layer dry film, exposure, development, etching, and film removal in this embodiment are conventional production techniques in the printed circuit board industry and will not be described in detail here. By using the alignment via 22 as a common processing reference for the inner layer circuitry and the marker point 23, a very high degree of relative positional consistency between the marker point 23 and the inner layer circuitry is ensured; at the same time, the marker point pattern is directly integrated into the inner layer dry film, which can be formed simultaneously without additional processes, simplifying the process flow. Figure 8 As shown, these high-precision markers 23 provide a reliable built-in "target" for drilling blind holes from the other side of the outer substrate 2, effectively solving the problem of not being able to directly align the inner circuit due to the obstruction of the outer copper foil, and are the key to achieving high-precision interconnection between layers.

[0036] Furthermore, the fabrication of the outer layer circuitry and multiple detection copper blocks 27 in step S8 specifically includes the following steps: S81. Using the alignment hole 12 as a reference, apply an outer dry film to the side of the two outer substrates away from the middle substrate. The pattern in the outer dry film includes an outer circuit pattern and a detection copper block pattern corresponding to each detection hole 26. S82. Exposure, development, etching, and film removal processes are performed sequentially to form the outer layer circuit and the plurality of detection copper blocks 27 on the side of the two outer layer substrates 2 away from the middle substrate 1.

[0037] Similarly, the processes of applying the outer dry film, exposure, development, etching, and film removal in this embodiment are conventional production techniques in the printed circuit board field and will not be described in detail here. This embodiment directly integrates the detection copper block pattern into the outer dry film, allowing for simultaneous formation without additional steps, simplifying the process flow and achieving synchronous and standardized preparation of the outer circuitry and the detection copper block 27. Because there is a preset relative positional relationship (partial overlap) between the detection copper block 27 and the detection hole 26, the detection copper block 27 and the detection hole 26 form an intuitive "alignment ruler" type detection window. Operators only need to visually inspect or use a simple magnifying glass to observe the offset of the detection copper block 27 relative to the detection hole 26 to assess the matching accuracy of the most critical alignment point—the through-hole—within the entire shipping unit in real time and without damage.

[0038] like Figure 3 and 4As shown, each of the working cavities 13 and each of the detection cavities 14 has the same shape and size. The detection cavity 14 is square, and four detection holes 26 are machined on the side of each detection cavity 14. The four detection holes 26 are respectively arranged at intervals outside the midpoint of each side of the detection cavity 14. The cross-sectional shape and size of each detection hole 26 and each through hole 25 are the same. Specifically, the preset distance between the through hole 25 and the working cavity 13 is slightly larger than the preset distance between the detection hole 26 and the detection cavity 14.

[0039] In this embodiment, the detection cavity 14 and the working cavity 13 have the same shape and size, and the detection hole 26 and the through hole 25 have the same cross-sectional shape and size. The preset distance between the through hole 25 and the working cavity 13 is slightly larger than the preset distance between the detection hole 26 and the detection cavity 14. When the distance between the detection hole 26 and the detection cavity 14 is acceptable, the distance between the through hole 25 and the working cavity 13 will necessarily be acceptable. This ensures that the relative position between the detection cavity 14 and the detection hole 26 directly reflects whether the relative position between the working cavity 13 and the through hole 25 is acceptable. Simultaneously, detection holes are provided at the midpoints of the outer sides of the detection cavity, enabling simultaneous monitoring of offsets in the X, Y, and diagonal directions.

[0040] Furthermore, each of the detection copper blocks 27 is disposed on the side of its corresponding detection hole 26 away from the detection cavity 14, and the design standard is that the detection hole 26 and the corresponding detection copper block 27 partially overlap. Specifically, the diameter of the detection hole 26 is 0.08-0.12 mm; the detection copper block 27 is rectangular, with a width of 0.18-0.22 mm and a length of 0.55-0.65 mm.

[0041] In this embodiment, by designing that the detection hole 26 and the detection copper block 27 partially overlap, once a misalignment occurs, the relative position between the detection hole 26 and the detection copper block 27 will change significantly. For example, the detection copper block 27 may completely cover or detach from the detection hole 26. This design transforms minute displacements into geometric changes that are easily discernible to the naked eye, enabling frontline production personnel to quickly determine whether the misalignment exceeds the standard without the need for precision instruments, thus greatly improving the efficiency of online interception.

[0042] Furthermore, step S9, which involves detecting whether each shipping unit is qualified, specifically includes the following steps: S91. Observe whether the inside of each detection cavity 14 turns black. The shipping unit 10 located in the same shipping unit area 100 as the detection cavity 14 that has turned black is a defective shipping unit. The shipping unit 10 located in the same shipping unit area 100 as the detection cavity that has not turned black is a shipping unit to be further tested. S92. Observe whether the relative position between each detection hole 26 and the corresponding detection copper block 27 in each further inspection shipment unit has shifted. If no shift has occurred, the corresponding further inspection shipment unit is a qualified shipment unit. If a shift has occurred, the shift amount needs to be further calculated. If the shift amount is within the safe range, the corresponding further inspection shipment unit is a qualified shipment unit; otherwise, it is an unqualified shipment unit.

[0043] Specifically, in step S92, the offset is calculated by measuring the minimum distance between the edge position of the detection hole 26 where the relative position has shifted and the corresponding edge of the detection cavity 14, and calculating the difference between the minimum distance and the preset value of the minimum distance to obtain the offset.

[0044] In this embodiment, "detecting the cavity turning black" is first used as a rapid screening method. By utilizing the physical phenomenon that the working cavity 13 is damaged due to the drilling deviation of the through hole, and then the inside of the working cavity 13 is contaminated by copper plating solution and turns black, the shipment unit 10 with serious deviation (such as the through hole penetrating the cavity side wall) can be quickly identified and quickly rejected. Then, the offset of the detection hole 26 and the detection copper block 27 is analyzed for the remaining shipment units 210 to accurately determine whether the offset is within the acceptable tolerance. This classification strategy avoids the inefficiency of using complex measurements for all shipments and achieves a balance between quality and efficiency.

[0045] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of this patent should be determined by the appended claims.

Claims

1. A method for manufacturing a buried cavity circuit board that helps improve alignment accuracy, the buried cavity circuit board comprising an intermediate circuit board and outer circuit boards located on the upper and lower sides of the intermediate circuit board respectively, and multiple buried cavity circuit boards arranged in an array forming a shipping unit (10); characterized in that: The preparation method includes the following steps: S1. Prepare substrate assembly: Each substrate assembly includes an intermediate substrate (1) and two outer substrates (2). Each substrate assembly can form multiple shipping units (10) arranged in an array. The intermediate substrate (1) and the outer substrates (2) are respectively formed with shipping unit areas (100) corresponding to each shipping unit (10). S2. Processing the intermediate substrate (1): First, a plurality of first positioning holes (11) are formed in the non-functional area of ​​the periphery of the intermediate substrate (1). Then, based on the first positioning holes (11), a plurality of alignment holes (12) are formed in the non-functional area of ​​the periphery of the intermediate substrate (1). A plurality of working cavities (13) arranged in an array are formed in each of the shipping unit areas (100) of the intermediate substrate (1). At least one detection cavity (14) is formed in the non-functional area of ​​the periphery of each of the shipping unit areas (100) of the intermediate substrate (1). The plurality of alignment holes (12) are staggered from the plurality of first positioning holes (11). S3. Process the two outer substrates (2): First, process a plurality of second positioning holes (21) in the non-functional area of ​​the periphery of the outer substrate (2). Then, with the second positioning holes (21) as a reference, process a plurality of alignment large holes (22) in the non-functional area of ​​the periphery of the outer substrate (2). The positions of the plurality of alignment large holes (22) correspond one-to-one with the positions of the plurality of alignment small holes (12), and the diameter of the alignment large holes (22) is larger than the diameter of the alignment small holes (12). Then, with the alignment large holes (22) as a reference, prepare inner layer circuits and a plurality of marking points (23) on the side of the outer substrate (2) near the middle substrate (1). The marking points (23) are located in the non-functional area of ​​the periphery of the outer substrate (2) near the middle substrate (1). S4. Pressing the outer substrate and the intermediate substrate: Align the two outer substrates (2) with the intermediate substrate (1) and place them on both sides of the intermediate substrate (1) so that the plurality of alignment small holes (12) can be exposed from the plurality of alignment large holes (22) on both sides. Press the two outer substrates (2) and the intermediate substrate (1) together to form a pressed substrate. S5. Preparation of through holes and detection holes: Based on the exposed alignment holes (12), at least one through hole (25) for connecting each substrate layer in the substrate assembly is formed on the side of each working cavity (13), and a plurality of detection holes (26) are formed on the side of each detection cavity (14). S6. Preparation of blind holes: A laser drilling machine is used to ablate the area corresponding to the mark point (23) on the side of the two outer substrates (2) away from the middle substrate (1) to expose the mark point (23); The laser drilling machine uses the mark point (23) as a reference to drill a number of blind holes on the side of the two outer substrates (2) away from the middle substrate (1). S7. Copper plating treatment: The through hole (25) and the blind hole are subjected to copper plating treatment; S8. Prepare outer layer circuits and detection copper blocks: Based on the alignment hole (12), prepare outer layer circuits and multiple detection copper blocks (27) on the side of the two outer layer substrates (2) away from the middle substrate (1), respectively. The detection copper blocks (27) are set in a one-to-one correspondence with the detection holes (26). S9. Inspection: Inspect each of the shipment units (10) to determine whether it is qualified; S10, Cutting and Screening: The laminated substrate is cut to remove unqualified shipping units (10) and finally qualified shipping units (10) are obtained. Each qualified shipping unit (10) has multiple precisely aligned buried cavity circuit boards.

2. The method for fabricating a buried cavity circuit board that helps improve alignment accuracy according to claim 1, characterized in that: The number of the first positioning holes (11) is four, and the four first positioning holes (11) are symmetrically arranged in the non-functional areas of the four corners of the intermediate substrate (1).

3. The method for fabricating a buried cavity circuit board that helps improve alignment accuracy according to claim 1, characterized in that: The number of alignment holes (12) is four, and the four alignment holes (12) are symmetrically arranged in the non-functional areas of the four corners of the intermediate substrate (1).

4. The method for fabricating a buried cavity circuit board that helps improve alignment accuracy according to claim 1, characterized in that: Step S3, which involves preparing the inner layer circuitry and several marker points, specifically includes the following steps: S31. Using the alignment hole (22) as a reference, inner dry film is attached to the side of the two outer substrates (2) near the middle substrate (1). The pattern in the inner dry film includes inner circuit pattern and several marker point pattern. S32. Exposure, development, etching and stripping processes are performed sequentially to form the inner layer circuit and the several marking points on the side of the two outer substrates (2) near the middle substrate (1).

5. The method for fabricating a buried cavity circuit board that helps improve alignment accuracy according to claim 1, characterized in that: The preparation of the outer layer circuit and multiple detection copper blocks (27) in step S8 specifically includes the following steps: S81. Using the alignment hole (12) as a reference, apply an outer dry film to the side of the two outer substrates away from the middle substrate. The pattern in the outer dry film includes an outer circuit pattern and a detection copper block pattern corresponding to each detection hole (26). S82. Exposure, development, etching and film removal processes are performed in sequence to form the outer layer circuit and the plurality of detection copper blocks (27) on the side of the two outer layer substrates (2) away from the middle substrate (1).

6. The method for fabricating a buried cavity circuit board that helps improve alignment accuracy according to claim 1, characterized in that: Each of the working cavities (13) and each of the detection cavities (14) has the same shape and size. The detection cavity (14) is square. Four detection holes (26) are formed on the side of each detection cavity (14). The four detection holes (26) are respectively arranged at intervals outside the midpoint of each side of the detection cavity (14). The cross-sectional shape and size of each detection hole (26) and each through hole (25) are the same. The preset distance between the through hole (25) and the working cavity (13) is slightly greater than the preset distance between the detection hole (26) and the detection cavity (14).

7. The method for fabricating a buried cavity circuit board that helps improve alignment accuracy according to claim 6, characterized in that: Each of the detection copper blocks (27) is located on the side of its corresponding detection hole (26) away from the detection cavity (14), and the design standard is that the detection hole (26) and the corresponding detection copper block (27) partially overlap.

8. The method for fabricating a buried cavity circuit board that helps improve alignment accuracy according to claim 7, characterized in that: The diameter of the detection hole (26) is 0.08 to 0.12 mm; the detection copper block (27) is rectangular, with a width of 0.18 to 0.22 mm and a length of 0.55 to 0.65 mm.

9. The method for manufacturing a buried cavity circuit board that helps improve alignment accuracy according to claim 7 or 8, characterized in that: Step S9, which checks whether each shipping unit is qualified, specifically includes the following steps: S91. Observe whether the interior of each detection cavity (14) turns black. The shipping unit (10) that is in the same shipping unit area (100) as the blackened detection cavity (14) is a non-conforming shipping unit. The shipping unit (10) that is in the same shipping unit area (100) as the non-blackened detection cavity is a shipping unit to be further tested. S92. Observe whether the relative position between each detection hole (26) and the corresponding detection copper block (27) in each further inspection unit has shifted. If no shift has occurred, the corresponding further inspection unit is a qualified inspection unit. If a shift has occurred, the shift amount needs to be calculated further. If the shift amount is within the safe range, the corresponding further inspection unit is a qualified inspection unit; otherwise, it is an unqualified inspection unit.

10. The method for fabricating a buried cavity circuit board that helps improve alignment accuracy according to claim 9, characterized in that: In step S92, the offset is calculated by measuring the minimum distance between the edge position of the detection hole (26) whose relative position has shifted and the edge of the corresponding detection cavity (14), and calculating the difference between the minimum distance and the minimum distance preset value to obtain the offset.

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