A load insertion recognition circuit, method, and charging device

Abstract

The application discloses a load insertion identification circuit, a method and a charging device, and relates to the technical field of multi-port charging. The circuit comprises a resistive load detection module and a capacitive load detection module. The input end of the resistive load detection module and the input end of the capacitive load detection module are connected with a charging port of the charging device. The resistive load detection module is used for detecting whether the terminal voltage VBUS of the charging device is successfully established in a first pull-up state. If the terminal voltage VBUS is successfully established, whether the terminal voltage VBUS is lower than an insertion identification threshold voltage in a second pull-up state is detected. If the terminal voltage VBUS is lower than the insertion identification threshold voltage, it is considered that there is an effective resistive load inserted into the charging port of the charging device. The capacitive load detection module is used for detecting whether the terminal voltage VBUS drops in the second pull-up state and whether the drop amplitude exceeds a voltage drop threshold value if the terminal voltage VBUS is successfully established. If the terminal voltage VBUS drops in the second pull-up state and the drop amplitude exceeds the voltage drop threshold value, it is considered that there is an effective capacitive load inserted into the charging port of the charging device. The application can improve the load insertion identification accuracy.

Description

Technical Field

[0001] This application relates to the field of multi-port charging technology, and in particular to a load insertion identification circuit, method and charging device. Background Technology

[0002] In recent years, the emergence of multi-port charging devices, such as power strips and portable power banks, has met the need for simultaneous charging of multiple devices, greatly facilitating users' lives. Load plugging / unplugging identification, dynamic power distribution, and intelligent path management are important technologies for multi-port charging. Among them, load plugging / unplugging identification is a key technology for multi-port charging, providing necessary support for dynamic power distribution and intelligent path management.

[0003] There are two main existing load insertion identification technologies. The first is a resistor pull-up scheme for the charging port terminal voltage, which identifies the load insertion by utilizing the drop in the port terminal voltage. For example... Figure 1 As shown, the charging port voltage VBUS is pulled up to the supply voltage VCC through resistor R1. The capacitance of VBUS to GND is C1. The comparator's setup threshold voltage is V1, and the insertion recognition threshold voltage is V2. If VBUS is pulled up above the setup threshold V1 through resistor R1 and remains there for a period of time, it indicates that the VBUS voltage has been successfully established. After the VBUS voltage is successfully established, if the VBUS voltage is pulled down below the recognition threshold V2 and remains there for a period of time, it indicates that a valid load has been inserted.

[0004] Clearly, for VCC, V1, and V2 to satisfy the condition VCC > V1 > V2, the range for identifying resistive loads must be smaller than [the specified value]. The range for identifying capacitive loads must be greater than [the specified value]. For strong pull-ups, the smaller resistor R1 results in a relatively narrow range of receptive loads. For weak pull-ups, the larger resistor R1, while broadening the receptive range for receptive loads, affects the leakage current of the leakage cable due to the VCC value. Specifically, lowering the VCC voltage reduces the leakage current. To maintain the same capacitive receptive range, the insertion threshold voltage must also be lowered accordingly. For example, if the VCC voltage drops from 3V to 1.5V, the receptive thresholds for V1 and V2 must be halved. That is, if VBUS is pulled up to 1.5V, the insertion threshold voltage drops to V2 / 2. When VBUS falls below the V2 / 2 threshold, a load is considered inserted. In this case, VBUS is closer to the lowered insertion threshold voltage; that is, compared to 3V to V2, 1.5V is closer to V2 / 2, increasing the probability of false identification. Since it is impossible to predict in advance whether the inserted load is resistive or capacitive, the identification thresholds for capacitive and resistive loads affect each other during identification. When a leakage cable is inserted, a high VCC will increase the leakage current of the leakage cable, affecting the standby power consumption of the system. A low VCC will bring the pull-up voltage VBUS closer to the identification threshold, increasing the probability of false identification.

[0005] The second type is a current source pull-up scheme for the terminal voltage of the charging port, such as... Figure 2 As shown, if VBUS is pulled up to VCC through current source I1, the capacitance of VBUS to GND is C1, the comparator's setup threshold is V1, and the insertion recognition threshold is V2, in order to reduce the power consumption when only the leakage cable is plugged in, the current pulled up by the current source is often relatively small. At this time, although the small current source reduces the power consumption, due to the image deviation of the MOSFET, the leakage current of the leakage cable may be misjudged as the effective load insertion when the leakage cable is plugged in.

[0006] In summary, existing technologies that use absolute threshold detection of load insertion are prone to misidentifying a valid load insertion when only a leakage cable is plugged in. Summary of the Invention

[0007] The purpose of this application is to provide a load insertion identification circuit, method, and charging device that can solve the problem that existing technologies that use absolute threshold detection of load insertion are prone to misidentifying effective load insertion when only a leakage cable is plugged in.

[0008] To achieve the above objectives, this application provides the following solution: In a first aspect, this application provides a load insertion identification circuit, including a resistive load detection module and a capacitive load detection module, wherein the input terminals of the resistive load detection module and the capacitive load detection module are connected to the charging port of a charging device; wherein: The resistive load detection module is used to: detect whether the terminal voltage VBUS of the charging port of the charging device is successfully established in the first pull-up state; if the terminal voltage VBUS is successfully established, detect whether the terminal voltage VBUS is lower than a preset insertion identification threshold voltage in the second pull-up state; if so, it is considered that there is a valid resistive load inserted into the charging port of the charging device; wherein, the pull-up current of the first pull-up state is greater than the pull-up current of the second pull-up state, the pull-up current of the terminal voltage VBUS in the first pull-up state is greater than the first leakage current, the pull-up current of the terminal voltage VBUS in the second pull-up state is greater than the second leakage current, the first leakage current is the leakage current of the leakage cable inserted into the charging port of the charging device when the terminal voltage VBUS is at the establishment threshold voltage, and the second leakage current is the leakage current of the leakage cable inserted into the charging port of the charging device when the VBUS is at the insertion identification threshold voltage; The capacitive load detection module is used to: if the terminal voltage VBUS is successfully established, detect whether the drop in the terminal voltage VBUS exceeds a preset voltage drop threshold; if so, it is considered that there is a valid capacitive load inserted into the charging port of the charging device.

[0009] Furthermore, the load insertion identification circuit also includes a VBUS pull-up clamping module, the output of which is connected to the charging port of the charging device, wherein: The VBUS pull-up clamping module is used for: During the process of establishing the terminal voltage VBUS of the charging port of the charging device, the pull-up state of the terminal voltage VBUS is switched to the first pull-up state, and after the terminal voltage VBUS of the charging port of the charging device is successfully established, the pull-up state of the terminal voltage VBUS is switched to the second pull-up state.

[0010] Furthermore, the resistive load detection module is also used for: In the first pull-up state, if the terminal voltage VBUS is greater than the establishment threshold voltage and continues for a first target time, it is considered that the terminal voltage VBUS of the charging port of the charging device has been successfully established. In the second pull-up state, if the terminal voltage VBUS drops below the insertion recognition threshold voltage and remains below the second target time, it is considered that there is an effective resistive load inserted into the charging port of the charging device; wherein, the establishment threshold voltage is greater than the insertion recognition threshold voltage.

[0011] Furthermore, the capacitive load detection module is also used for: In the second pull-up state, if the voltage drop of the terminal voltage VBUS exceeds the preset voltage drop threshold and continues for a third target time, it is considered that there is an effective capacitive load inserted into the charging port of the charging device.

[0012] Furthermore, the load insertion identification circuit also includes a first switch S1, the first end of which is connected to the charging port of the charging device, and the second end of which is connected to the input terminal of the resistive load detection module, the input terminal of the capacitive load detection module, and the output terminal of the VBUS pull-up clamping module. The first switch S1 is used to: close during load insertion detection to connect the input terminals of the resistive load detection module, the capacitive load detection module, and the VBUS pull-up clamp module to the charging port of the charging device; and close after a valid capacitive or resistive load insertion is detected to disconnect the input terminals of the resistive load detection module, the capacitive load detection module, and the VBUS pull-up clamp module from the charging port of the charging device.

[0013] Further, the VBUS pull-up clamping module includes a first resistor, a second resistor, a third resistor, a second switch, a regulating transistor, an operational amplifier, and a second capacitor. The first terminal of the second switch and the first terminal of the third resistor are connected to the operating voltage VCC. The second terminal of the second switch and the second terminal of the third resistor are connected to the first terminal of the regulating transistor. The second terminal of the regulating transistor is connected to the first terminal of the first resistor and the target output terminal vdet. The second terminal of the first resistor is connected to the non-inverting input of the operational amplifier and the first terminal of the second resistor. The second terminal of the second resistor is grounded. The inverting input of the operational amplifier is connected to the reference voltage vref. The output terminal of the operational amplifier is connected to the third terminal of the regulating transistor and the first terminal of the second capacitor. The second terminal of the second capacitor is grounded. The target output terminal vdet is either the output terminal of the VBUS pull-up clamping module or the second terminal of the first switch S1. Under the action of the loop, the VBUS pull-up clamping module clamps the voltage of the target output terminal vdet to (1+R1 / R2). vref, where R1 is the resistance value of the first resistor and R2 is the resistance value of the second resistor; to ensure that the terminal voltage VBUS can be successfully established, the clamping voltage of the VBUS pull-up clamping module is greater than the establishment threshold voltage; The second switch is used to: close during the process of establishing the terminal voltage VBUS of the charging port of the charging device to connect the first end of the regulating tube to the working voltage VCC, so that the terminal voltage VBUS is in the first pull-up state, thereby accelerating the establishment process of VBUS; and close after the terminal voltage VBUS of the charging port of the charging device is successfully established to disconnect the first end of the regulating tube from the working voltage VCC, so that the working voltage VCC pulls up the terminal voltage VBUS through the third resistor and the regulating tube, thereby switching the pull-up state of the terminal voltage VBUS to the second pull-up state.

[0014] Further, the capacitive load detection module includes a current source, a fourth resistor, a fifth resistor, a third capacitor, and a first comparator. The first terminal of the current source is connected to the operating voltage VCC. The second terminal of the current source is connected to the first terminal of the fourth resistor and the first input terminal of the first comparator. The second terminal of the fourth resistor is connected to the first terminal of the fifth resistor and the target output terminal vdet. The second terminal of the fifth resistor is connected to the second input terminal of the first comparator and the first terminal of the third capacitor. The second terminal of the third capacitor is grounded. Wherein: The first comparator is used to: in the second pull-up state, when the drop in terminal voltage VBUS is greater than I1 When R4 is active, the first level signal is output; otherwise, the second level signal is output. Specifically, if the first input of the first comparator is the non-inverting input and the second input is the inverting input, the first level signal is low and the second level signal is high. If the first input of the first comparator is the inverting input and the second input is the non-inverting input, the first level signal is high and the second level signal is low. I1 is the output current value of the current source, and R4 is the resistance value of the fourth resistor.

[0015] Further, the capacitive load detection module includes a sixth resistor, a seventh resistor, an eighth resistor, a fourth capacitor, and a second comparator. The first terminal of the sixth resistor is connected to the target output terminal VDET and the first input terminal of the second comparator. The second terminal of the sixth resistor is connected to the first terminals of the seventh and eighth resistors. The second terminal of the seventh resistor is grounded. The second terminal of the eighth resistor is connected to the first terminal of the fourth capacitor and the second input terminal of the second comparator. The second terminal of the fourth capacitor is grounded. The second comparator is used to: in the second pull-up state, if the drop in terminal voltage VBUS is greater than (1+R1 / R2). vref R6 / (R6+R7) outputs the third level signal; otherwise, it outputs the fourth level signal. Wherein, if the first input of the second comparator is the non-inverting input and the second input is the inverting input, then the third level signal is low and the fourth level signal is high; if the first input of the second comparator is the inverting input and the second input is the non-inverting input, then the third level signal is high and the fourth level signal is low; vref is the reference voltage, R6 is the resistance value of the sixth resistor, and R7 is the resistance value of the seventh resistor.

[0016] Secondly, this application provides a load insertion identification method, including: The resistive load detection module based on the load insertion identification circuit detects whether the terminal voltage VBUS of the charging port of the charging device is successfully established in the first pull-up state. If the terminal voltage VBUS is successfully established, based on the output signal of the resistive load detection module, it is detected whether the terminal voltage VBUS is lower than the preset insertion recognition threshold voltage in the second pull-up state. If so, it is considered that the charging port of the charging device has a valid resistive load inserted. Based on the output signal of the capacitive load detection module of the load insertion recognition circuit, it is detected whether the drop amplitude of the terminal voltage VBUS in the second pull-up state exceeds the preset voltage drop threshold. If so, it is considered that the charging port of the charging device has a valid capacitive load inserted. Wherein, the pull-up current in the first pull-up state is greater than the pull-up current in the second pull-up state, the pull-up current in the first pull-up state of the terminal voltage VBUS is greater than the first leakage current, the pull-up current in the second pull-up state of the terminal voltage VBUS is greater than the second leakage current, the first leakage current is the leakage current of the leakage cable plugged into the charging port of the charging device when the terminal voltage VBUS is the establishment threshold voltage, and the second leakage current is the leakage current of the leakage cable plugged into the charging port of the charging device when VBUS is the insertion recognition threshold voltage.

[0017] Furthermore, the load insertion identification circuit includes a VBUS pull-up clamping module; If the terminal voltage VBUS is successfully established, based on the output signal of the resistive load detection module, it is detected whether the terminal voltage VBUS is lower than a preset insertion identification threshold voltage in the second pull-up state. If so, it is considered that the charging port of the charging device has a valid resistive load insertion. Furthermore, based on the output signal of the capacitive load detection module of the load insertion identification circuit, it is detected whether the drop in the terminal voltage VBUS in the second pull-up state exceeds a preset voltage drop threshold. If so, it is considered that the charging port of the charging device has a valid capacitive load insertion. Specifically, this includes: If the terminal voltage VBUS is successfully established, the VBUS pull-up clamping module is controlled to switch the pull-up state of the terminal voltage VBUS to the second pull-up state; wherein, the clamping voltage of the VBUS pull-up clamping module is greater than the establishment threshold voltage V1, and the establishment threshold voltage V1 is greater than the insertion recognition threshold voltage V2. In the second pull-up state, the voltage VBUS at the terminal of the resistive load detection module is lower than the preset insertion recognition threshold voltage. If so, it is considered that there is a valid resistive load inserted at the charging port of the charging device. The voltage drop of the voltage VBUS at the terminal of the load insertion recognition circuit exceeds the preset voltage drop threshold. If so, it is considered that there is a valid capacitive load inserted at the charging port of the charging device.

[0018] Further, in the second pull-up state, based on whether the voltage VBUS at the resistive load detection module is lower than a preset insertion recognition threshold voltage, if so, it is considered that a valid resistive load has been inserted into the charging port of the charging device. And based on whether the drop in the voltage VBUS at the capacitive load detection module of the load insertion recognition circuit exceeds a preset voltage drop threshold, if so, it is considered that a valid capacitive load has been inserted into the charging port of the charging device. Specifically, this includes: The third switch of the resistive load detection module is turned off, and the fourth switch is closed; The system detects whether the first comparator of the first type of capacitive load detection module outputs a first-level signal, whether the first comparator outputs a first-level signal for a third target time, whether the first duration detection module of the second type of capacitive load detection module outputs a first control signal, whether the second comparator of the third type of capacitive load detection module outputs a third-level signal, whether the second comparator outputs a third-level signal for a third target time, or whether the second duration detection module of the fourth type of capacitive load detection module outputs a second control signal. If yes, it is considered that a valid capacitive load has been inserted; otherwise, it is considered that no valid capacitive load has been inserted. It also detects whether the third comparator of the resistive load detection module outputs a seventh-level signal for a second target time, or whether the third duration detection module of the resistive load detection module outputs a fifth control signal. If yes, it is considered that a valid resistive load has been inserted; otherwise, it is considered that no valid resistive load has been inserted.

[0019] Thirdly, this application provides a charging device including the load insertion identification circuit described in any of the above claims.

[0020] According to the specific embodiments provided in this application, the following technical effects are disclosed: This application provides a load insertion identification circuit, method, and charging device. After the terminal voltage VBUS is successfully established, the resistive load detection module detects whether the terminal voltage VBUS is lower than a preset insertion identification threshold voltage in the second pull-up state (weak pull-up). If so, it is considered that a valid resistive load has been inserted into the charging port of the charging device. The capacitive load detection module detects whether the drop in terminal voltage VBUS under weak pull-up exceeds a preset voltage drop threshold. If so, it is considered that a valid capacitive load has been inserted into the charging port of the charging device. This achieves the identification of capacitive and resistive load insertion using different detection methods. The insertion detection of capacitive and resistive loads is independent of each other, avoiding the problem that the identification thresholds of capacitive and resistive loads affect each other when using absolute threshold detection for load insertion, which increases the probability of false identification.

[0021] By detecting whether a valid load has been inserted under weak pull-up conditions, the pull-up voltage of the terminal voltage VBUS is reduced. At the same time, the pull-up current of the terminal voltage VBUS in the first pull-up state is greater than the first leakage current (the leakage current of the leakage cable plugged into the charging port of the charging device when the terminal voltage VBUS is established as the threshold voltage), and the pull-up current of the terminal voltage VBUS in the second pull-up state is greater than the second leakage current (VBUS is the leakage current of the leakage cable plugged into the charging port of the charging device when the insertion identification threshold voltage is established). This ensures that the terminal voltage VBUS can be successfully established when the leakage cable is plugged in, and after switching to weak pull-up, the leakage current of the leakage cable will not pull the voltage of the terminal voltage VBUS below the insertion identification threshold voltage, thereby avoiding false identification of a valid load being inserted.

[0022] In summary, this application solves the problem that existing technologies using absolute threshold detection of load insertion are prone to misidentifying a valid load insertion when only a leakage cable is plugged in, thus improving the accuracy of load insertion identification.

[0023] In addition, because the detection of whether an effective load is inserted is performed under weak pull-up and the pull-up voltage of the terminal voltage VBUS is reduced, the leakage current of the leakage wire is reduced when the leakage wire is plugged in, the standby power consumption of the system is reduced, and the standby time of charging devices such as power banks is extended. Attached Figure Description

[0024] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0025] Figure 1 This is a schematic diagram of the structure of a load insertion identification circuit according to an embodiment of this application; Figure 2 This is a schematic diagram of a load insertion identification circuit according to another embodiment of this application; Figure 3 This is a schematic diagram of the structure of a charging device according to an embodiment of this application; Figure 4 This is a schematic diagram of the structure of a VBUS pull-up clamping module in one embodiment of this application; Figure 5 This is a first structural schematic diagram of a capacitive load detection module according to an embodiment of this application; Figure 6 This is a schematic diagram of the second structure of a capacitive load detection module according to an embodiment of this application; Figure 7 This is a schematic diagram of the third structure of a capacitive load detection module in one embodiment of this application; Figure 8 This is a schematic diagram of the fourth structure of a capacitive load detection module in one embodiment of this application; Figure 9 This is a schematic diagram of the structure of a resistive load detection module according to one embodiment of this application; Figure 10 This is a schematic flowchart of a load insertion identification method provided in an embodiment of this application.

[0026] In the diagram, 1. Pass-through tube, 2. Load insertion identification circuit, 21. Resistive load detection module, 22. Capacitive load detection module, and 23. VBUS pull-up clamping module. Detailed Implementation

[0027] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0028] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0029] To address the aforementioned issues, in one exemplary embodiment, such as Figure 3 As shown, a load insertion identification circuit is provided for use in a charging device.

[0030] Among them, such as Figure 3 As shown, the charging device includes a circuit 1, a load insertion identification circuit 2, and a first capacitor C1. The first end of the circuit 1 is connected to the charging power supply terminal VIN, the second end of the circuit 1 is connected to the terminal voltage VBUS of the charging port and the first end of the first capacitor C1, the second end of the first capacitor C1 is grounded, and the load insertion identification circuit 2 is connected to the terminal voltage (charging voltage) VBUS of the charging port.

[0031] In this embodiment of the application, the path transistor 1 can be a MOS transistor, such as... Figure 3 As shown, if the pass transistor 1 is an NMOS transistor, then the first terminal of the pass transistor 1 is the drain, and the second terminal is the source. If the pass transistor 1 is a PMOS transistor, then the first terminal of the pass transistor 1 is the source, and the second terminal is the drain. To effectively protect the load insertion identification circuit 1 from damage by high voltage, the circuit breaker 1 is turned off during the establishment of the terminal voltage VBUS. If the terminal voltage VBUS is not successfully established within a preset time window, the circuit breaker 1 is closed to connect VIN and the charging port (i.e., open the primary circuit). When the current flowing through the circuit breaker 1 is less than a preset current value, the circuit breaker 1 is turned off to disconnect VIN and the charging port. The load insertion identification circuit 2 then checks whether VBUS has been successfully established. After successful VBUS establishment, the load insertion identification circuit 2 checks whether a valid load has been inserted. After a valid load is detected, the circuit breaker 1 is closed to connect VIN and the charging port (i.e., open the primary circuit), and the load inserted into the charging port is charged.

[0032] During the charging process, when the load device is disconnected from the VBUS terminal, the system will adjust the VIN voltage to a safe voltage (usually 5V). In order to reduce the power consumption of the system, the system will disconnect the circuit tube 1 and then perform load insertion identification. Once a valid load insertion is detected, the circuit tube 1 will be closed, and the circuit tube 1 will transfer the voltage of the VIN terminal to the VBUS terminal to charge the load.

[0033] In one exemplary embodiment, such as Figure 3 As shown, the load insertion identification circuit includes a resistive load detection module 21 and a capacitive load detection module 22. The input terminals of the resistive load detection module 21 and the capacitive load detection module 22 are connected to the charging port of the charging device.

[0034] The resistive load detection module 21 is used to: detect whether the terminal voltage VBUS of the charging port of the charging device is successfully established in the first pull-up state; if the terminal voltage VBUS is successfully established, detect whether the terminal voltage VBUS is lower than the preset insertion identification threshold voltage V2 in the second pull-up state; if so, it is considered that there is a valid resistive load inserted into the charging port of the charging device.

[0035] The capacitive load detection module 22 is used to: if the terminal voltage VBUS is successfully established, detect whether the drop amplitude of the terminal voltage VBUS in the second pull-up state exceeds the preset voltage drop threshold. If so, it is considered that there is a valid capacitive load inserted into the charging port of the charging device.

[0036] Wherein, the pull-up current in the first pull-up state is greater than the pull-up current in the second pull-up state, the pull-up current in the first pull-up state of the terminal voltage VBUS is greater than the first leakage current, the pull-up current in the second pull-up state of the terminal voltage VBUS is greater than the second leakage current, the first leakage current is the leakage current of the leakage cable plugged into the charging port of the charging device when the terminal voltage VBUS is the threshold voltage V1 (near the V1 voltage point), and the second leakage current is the leakage current of the leakage cable plugged into the charging port of the charging device when VBUS is the identification threshold voltage V2 (near the V2 voltage point).

[0037] The first pull-up state is a strong pull-up, which can speed up the VBUS setup process. The second pull-up state is a weak pull-up, which, compared to the strong pull-up, can identify a wider range of resistive loads.

[0038] In this embodiment, after the terminal voltage VBUS is successfully established, the resistive load detection module detects whether the terminal voltage VBUS is lower than a preset insertion identification threshold voltage in the second pull-up state (weak pull-up). If so, it is considered that a valid resistive load has been inserted into the charging port of the charging device. The capacitive load detection module then detects whether the drop in terminal voltage VBUS under the weak pull-up exceeds a preset voltage drop threshold. If so, it is considered that a valid capacitive load has been inserted into the charging port of the charging device. This achieves the identification of capacitive and resistive load insertion using different detection methods. The insertion detection of capacitive and resistive loads is independent of each other, avoiding the problem of mutual influence between the identification thresholds of capacitive and resistive loads when using absolute threshold detection for load insertion, which increases the probability of false identification. Compared with strong pull-up detection, the detection of whether a valid load has been inserted under weak pull-up identifies the resistive load... The design features a wider load range and a design where the pull-up current of the terminal voltage VBUS in the first pull-up state is greater than the first leakage current (VBUS is the leakage current of the leakage cable plugged into the charging port of the charging device when the threshold voltage V1 is established), and the pull-up current of the terminal voltage VBUS in the second pull-up state is greater than the second leakage current (VBUS is the leakage current of the leakage cable plugged into the charging port of the charging device when the insertion identification threshold voltage V2 is established). This ensures that the terminal voltage VBUS can be successfully established when the leakage cable is plugged in, and after switching to a weak pull-up, the leakage current of the leakage cable will not pull the terminal voltage VBUS below V2, thereby avoiding false identification of a valid load insertion. Therefore, the embodiments of this application solve the problem of the prior art of using absolute threshold to detect load insertion, which is prone to false identification of a valid load insertion when only the leakage cable is plugged in, thus improving the accuracy of load insertion identification.

[0039] In another exemplary embodiment of this application, the resistive load detection module 21 is further configured to: If the VBUS voltage fails to be established, a signal indicating the failure is output to close the system control circuit 1 to open a primary circuit. After the current flowing through the circuit 1 is less than the set current value, the system closes the circuit 1 and then executes the VBUS establishment process and the VBUS success detection process.

[0040] In another exemplary embodiment of this application, such as Figure 3 As shown, the load insertion identification circuit also includes a VBUS pull-up clamp module 23, the output of which is connected to the charging port of the charging device.

[0041] The VBUS pull-up clamping module 23 is used to: switch the pull-up state of VBUS to the first pull-up state during the process of establishing the terminal voltage VBUS of the charging port of the charging device, and switch the pull-up state of the terminal voltage VBUS to the second pull-up state after the terminal voltage VBUS of the charging port of the charging device is successfully established.

[0042] In another exemplary embodiment of this application, the resistive load detection module 21 is further configured to: in the first pull-up state, detect whether the terminal voltage VBUS is greater than the establishment threshold voltage V1 and lasts for a first target time; if so, that is, if the terminal voltage VBUS greater than V1 lasts for a first target time period, then the terminal voltage VBUS of the charging port of the charging device is considered to be successfully established; otherwise, the VBUS establishment is considered to have failed.

[0043] In this embodiment, the first target time is not specifically limited and can be set according to actual needs. Detecting whether the terminal voltage VBUS, which is greater than the establishment threshold voltage V1, lasts for the first target time is to prevent a spike in the terminal voltage VBUS from being mistakenly identified as a successful establishment of the terminal voltage VBUS, thereby ensuring that the terminal voltage VBUS can be successfully established.

[0044] In another exemplary embodiment of this application, the resistive load detection module 21 is further configured to: in the second pull-up state, detect whether the terminal voltage VBUS is lower than the insertion identification threshold voltage V2 and remains lower for a second target time; if so, that is, the terminal voltage VBUS is lower than the insertion identification threshold voltage V2 and remains lower for a second target time, then it is considered that there is a valid resistive load inserted into the charging port of the charging device. Wherein, the establishment threshold voltage V1 is greater than the insertion identification threshold voltage V2.

[0045] In this embodiment, the second target time, establishment threshold voltage V1, and insertion identification threshold voltage V2 are not specifically limited and can be set according to actual needs. Detecting whether the terminal voltage VBUS below the insertion identification threshold voltage V2 lasts for the second target time is to prevent a spike in the terminal voltage VBUS from being mistakenly identified as valid load insertion, thereby further improving the accuracy of load insertion identification.

[0046] In another exemplary embodiment of this application, the capacitive load detection module 22 is further configured to: in the second pull-up state, detect whether the drop in terminal voltage VBUS exceeds a preset voltage drop threshold and lasts for a third target time; if so, that is, the terminal voltage VBUS with a drop exceeding the preset voltage drop threshold lasts for a third target time, then it is considered that there is an effective capacitive load inserted into the charging port of the charging device.

[0047] In this embodiment, the voltage drop threshold and the third target time are not specifically limited and can be set according to actual needs. Detecting whether the terminal voltage VBUS, whose drop exceeds the preset voltage drop threshold, continues for the third target time is to prevent a spike in the terminal voltage VBUS from being mistakenly identified as a valid load insertion, thereby further improving the accuracy of load insertion identification.

[0048] In another exemplary embodiment of this application, such as Figure 3 As shown, the load insertion identification circuit 2 also includes a first switch S1. The first end of the first switch S1 is connected to the charging port of the charging device, and the second end of the first switch S1 is connected to the input terminal of the resistive load detection module 21, the input terminal of the capacitive load detection module 22, and the output terminal of the VBUS pull-up clamping module 23.

[0049] The first switch S1 is used to: close during load insertion detection to connect the input terminals of the resistive load detection module 21, the capacitive load detection module 22, and the output terminal of the VBUS pull-up clamp module 23 to the charging port of the charging device; and close after a valid load (capacitive or resistive load) is detected to disconnect the input terminals of the resistive load detection module 21, the capacitive load detection module 22, and the output terminal of the VBUS pull-up clamp module 23 from the charging port of the charging device.

[0050] In this embodiment, once a valid load is detected, the first switch S1 is opened, and the circuit 1 is turned on to transfer the voltage at the VIN terminal to VBUS, charging the inserted load. During the charging process, the high voltage applied will be transferred to VBUS. Opening the switch S1 can effectively protect the load insertion identification circuit 1 from damage by the high voltage.

[0051] In another exemplary embodiment of this application, such as Figure 4 As shown, the VBUS pull-up clamping module 23 includes a first resistor R1, a second resistor R2, a third resistor Rup, a second switch S2, an adjustment transistor M1, an operational amplifier A1, and a second capacitor C2. The first terminal of the second switch S2 and the first terminal of the third resistor Rup are connected to VCC. The second terminal of the second switch S2 and the second terminal of the third resistor Rup are connected to the first terminal (source) of the adjustment transistor M1. The second terminal (drain) of the adjustment transistor M1 is connected to the first terminal of the first resistor R1 and the target output terminal vdet. The second terminal of the first resistor R1 is connected to the non-inverting terminal of the operational amplifier A1 and the first terminal of the second resistor R2. The second terminal of the second resistor R2 is grounded. The inverting terminal of the operational amplifier A1 is connected to the reference voltage vref. The output terminal of the operational amplifier A1 is connected to the third terminal (gate) of the adjustment transistor M1 and the first terminal of the second capacitor C2. The second terminal of the second capacitor C2 is grounded. The target output terminal vdet is either the output terminal of the VBUS pull-up clamping module 23 or the second terminal of the first switch S1.

[0052] Among them, the regulating transistor M1 is used to adjust the output of operational amplifier A1, and the first resistor R1 and the second resistor R2 are used to divide the voltage to generate the pull-up voltage vref of VBUS. (1+R1 / R2), (1+R1 / R2) vref>V1>V2, ensuring that VBUS can be successfully established.

[0053] The second switch is used to: close during the process of establishing the terminal voltage VBUS of the charging port of the charging device to connect the first terminal of the regulating tube M1 to the working voltage VCC, so that the terminal voltage VBUS is in the first pull-up state, thus speeding up the establishment process of VBUS; and close after the terminal voltage VBUS of the charging port of the charging device is successfully established to disconnect the connection between the regulating tube M1 and VCC, so that VCC pulls up VBUS through the third resistor Rup and the regulating tube M1, thereby switching the pull-up state of the terminal voltage VBUS to the second pull-up state.

[0054] In this embodiment, when S2 is closed, it corresponds to a strong pull-up, and when S2 is open, it corresponds to a weak pull-up. Due to the adjustment effect of the loop, the stable voltage corresponding to the target output terminal vdet is (1+R1 / R2). Tests revealed that leakage cables exhibit a common characteristic: leakage is relatively small when the voltage applied to the VBUS and GND lines of the charging cable is below a certain value, and gradually increases as the applied voltage increases. Properly selecting the R1 / R2 ratio can change the stable voltage of VDET and reduce the leakage current of the plugged-in leakage cable. However, it is also necessary that the pull-up current under strong pull-up conditions is greater than the leakage current of the cable near the establishment threshold voltage V1, and the pull-up current under weak pull-up conditions is greater than the leakage current of the cable near the insertion recognition threshold voltage V2. This ensures that VBUS can be successfully established under strong pull-up conditions, and that the leakage current of the leakage cable does not pull the VBUS voltage below V2 after switching to weak pull-up, thus avoiding false identification of an active load insertion.

[0055] Tests revealed that leakage current cables exhibit a common characteristic: leakage current is relatively small when the voltage applied to the VBUS and GND lines of the charging cable is below a certain value, and gradually increases as the applied voltage rises. Reducing the VBUS pull-up voltage and designing a strong pull-up current greater than the leakage current of the leakage current cable at voltage point V1, and a weak pull-up current greater than the leakage current of the leakage current cable at voltage point V2, ensures that VBUS can be successfully established when the leakage current cable is plugged in. When switching to a weak pull-up, the leakage current of the leakage current cable will not pull the VBUS voltage below V2, thus preventing false identification of a valid load insertion.

[0056] At the same time, the pull-up voltage of VBUS is reduced (equal to the clamping voltage vdet = (1 + R1 / R2)). The leakage current of the leakage cable will also decrease, reducing standby power consumption and extending the usage time of a single charge for multi-port power banks. Since most devices exhibit capacitive load characteristics, reducing the V2 voltage point does not affect the recognition range of capacitive loads. Therefore, V2 can be reduced without narrowing its distance from the VBUS clamping voltage (i.e., the background voltage VCC). This solves the problem in existing technologies where reducing the leakage current of the leakage cable and thus reducing the VCC voltage requires a corresponding reduction in the insertion recognition threshold voltage to maintain the same capacitive recognition range, making VBUS closer to the reduced insertion recognition threshold and increasing the probability of false recognition. This reduces the probability of false recognition.

[0057] In another exemplary embodiment of this application, such as Figure 5As shown, the capacitive load detection module 22 includes a current source I1, a fourth resistor R4, a fifth resistor R5, a third capacitor C3, and a first comparator A2. The input terminal of the current source I1 is connected to the operating voltage VCC. The output terminal of the current source I1 is connected to the first terminal of the fourth resistor R4 and the first input terminal of the first comparator A2. The second terminal of the fourth resistor R4 is connected to the first terminal of the fifth resistor R5 and the target output terminal vdet. The second terminal of the fifth resistor R5 is connected to the second input terminal of the first comparator A2 and the first terminal of the third capacitor C3. The second terminal of the third capacitor C3 is grounded.

[0058] The first comparator A2 is used as follows: In a steady state, when the current from the current source I1 flows through the fourth resistor R4, the voltage at the first input terminal of the first comparator A2 is higher than the voltage at the second input terminal, and the first comparator A2 outputs a second-level signal; due to the delay unit composed of the fifth resistor R5 and the third capacitor C3, the voltage at the second input terminal of the first comparator A2 cannot keep up with the change in the voltage at the first input terminal. In the second pull-up state, when the drop in the terminal voltage VBUS is greater than that of I1... When R4 is active, a first-level signal is output; otherwise, a second-level signal is output. The first-level signal indicates that there is an effective capacitive load connected, and the second-level signal indicates that there is no effective capacitive load connected.

[0059] Specifically, if the first input terminal of the first comparator A2 is the non-inverting input and the second input terminal is the inverting input, then the first level signal is a low level signal and the second level signal is a high level signal; if the first input terminal of the first comparator A2 is the inverting input and the second input terminal is the non-inverting input, then the first level signal is a high level signal and the second level signal is a low level signal.

[0060] In this embodiment of the application, if the first comparator A2 outputs a first level signal, the system control circuit 1 is closed and the first switch S1 is opened to charge the inserted load.

[0061] In another exemplary embodiment of this application, such as Figure 6 As shown, the capacitive load detection module 22 also includes a first duration detection module D1, the input of which is connected to the output of the first comparator A2.

[0062] The first duration detection module D1 is used to: detect whether the first comparator A2 outputs a first level signal and continues for a third target time; if so, output a first control signal indicating that an effective capacitive load has been inserted.

[0063] In this embodiment of the application, if the first duration detection module D1 outputs a first control signal indicating that an effective capacitive load has been inserted, then the system control path 1 is closed and the first switch S1 is opened to charge the inserted load.

[0064] In another exemplary embodiment of this application, such as Figure 7 As shown, the capacitive load detection module 22 includes a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a fourth capacitor C4, and a second comparator A3. The first end of the sixth resistor R6 is connected to the target output terminal vdet and the first input terminal of the second comparator A3. The second end of the sixth resistor R6 is connected to the first end of the seventh resistor R7 and the first end of the eighth resistor R8. The second end of the seventh resistor R7 is grounded. The second end of the eighth resistor R8 is connected to the first end of the fourth capacitor C4 and the second input terminal of the second comparator A3. The second end of the fourth capacitor C4 is grounded.

[0065] The second comparator A3 is used as follows: In a stable state, due to the voltage division effect of the sixth resistor R6 and the seventh resistor R7, the voltage at the first input terminal of the second comparator A3 is greater than the voltage at the second input terminal, and the second comparator A3 outputs a fourth-level signal; Due to the delay unit composed of the eighth resistor R8 and the fourth capacitor C4, the voltage at the second input terminal of the second comparator A3 cannot keep up with the change in the voltage at the first input terminal. In the second pull-up state, if the drop in the terminal voltage VBUS is greater than (1+R1 / R2)... vref R6 / (R6+R7), the second comparator A3 outputs the third level signal; otherwise, it outputs the fourth level signal.

[0066] The third level signal indicates that there is an effective capacitive load connected, while the fourth level signal indicates that there is no effective capacitive load connected.

[0067] Specifically, if the first input of the second comparator A3 is the non-inverting input and the second input is the inverting input, then the third level signal is a low level signal and the fourth level signal is a high level signal. If the first input of the second comparator A3 is the inverting input and the second input is the non-inverting input, then the third level signal is a high level signal and the fourth level signal is a low level signal.

[0068] In this embodiment of the application, if the second comparator A3 outputs a third level signal, the system control circuit 1 is closed and the first switch S1 is opened to charge the inserted load.

[0069] In another exemplary embodiment of this application, such as Figure 8 As shown, the capacitive load detection module 22 also includes a second duration detection module D2, the input of which is connected to the output of the second comparator A3.

[0070] The second duration detection module D2 is used to: detect whether the second comparator A3 outputs a third level signal; if so, detect whether the third level signal lasts for a third target time; if so, output a second control signal indicating that an effective capacitive load has been inserted.

[0071] In this embodiment of the application, if the second duration detection module D2 outputs a second control signal indicating that an effective capacitive load has been inserted, then the system control path tube 1 is closed and the first switch S1 is opened to charge the inserted load.

[0072] In another exemplary embodiment of this application, such as Figure 9 As shown, the resistive load detection module 21 includes a third switch S3, a fourth switch S4, a third comparator A4, and a third duration detection module D3. The first input terminal of the third comparator A4 is connected to the target output terminal vdet. The second input terminal of the third comparator A4 is connected to the first terminal of the third switch S3 and the first terminal of the fourth switch S4. The second terminal of the third switch S3 is connected to the establishment threshold voltage V1, and the second terminal of the fourth switch S4 is connected to the insertion recognition threshold voltage V2. The output terminal of the third comparator A4 is connected to the input terminal of the third duration detection module D3.

[0073] In this embodiment of the application, during the process of establishing VBUS using a strong pull-up, the third switch S3 is closed and the fourth switch S4 is open. At this time, the comparison threshold of the third comparator A4 is selected as the establishment threshold voltage V1. When the voltage of VBUS is detected to be greater than V1 and lasts for a first target time, it indicates that VBUS has been successfully established. After that, the pull-up of VBUS is switched to a weak pull-up, the third switch S3 is opened and the fourth switch S4 is closed, and the comparator threshold of the third comparator A4 is switched to the insertion recognition threshold voltage V2.

[0074] The third comparator A4 is used to: detect whether the terminal voltage VBUS is higher than the establishment threshold voltage V1 after the third switch S3 is closed and the fourth switch S4 is open; if yes, output a fifth-level signal; otherwise, output a sixth-level signal. The fifth-level signal indicates that the terminal voltage VBUS is higher than the establishment threshold voltage V1, i.e., the terminal voltage VBUS is successfully established; the sixth-level signal indicates that the voltage VBUS is lower than the establishment threshold voltage V1, i.e., the terminal voltage VBUS establishment fails. When the third switch S3 is open and the fourth switch S4 is closed, detect whether the terminal voltage VBUS is lower than the insertion identification voltage V2; if yes, output a seventh-level signal; otherwise, output an eighth-level signal. The seventh-level signal indicates that a valid load has been inserted; the eighth-level signal indicates that no valid load has been inserted.

[0075] Specifically, if the first input of the third comparator A4 is the non-inverting input and the second input is the inverting input, then the sixth and seventh level signals are low-level signals, and the fifth and eighth level signals are high-level signals. If the first input of the third comparator A4 is the inverting input and the second input is the non-inverting input, then the sixth and seventh level signals are high-level signals, and the fifth and eighth level signals are low-level signals.

[0076] The third duration detection module D3 is used to: after the third switch S3 is closed and the fourth switch S4 is open, detect whether the third comparator A4 outputs a fifth level signal. If so, detect whether the fifth level signal lasts for a first target time. If the fifth level signal lasts for a first target time, output a third control signal. The third control signal is used to control the second switch S2 to open, so as to switch the pull-up state of the terminal voltage VBUS to a weak pull-up and enter the load insertion detection stage. If the third comparator A4 outputs a sixth level signal, output a fourth control signal. After the third switch S3 is open and the fourth switch S4 is closed, detect whether the third comparator A4 outputs a seventh level signal. If so, detect whether the seventh level signal lasts for a second target time. If the seventh level signal lasts for a second target time, output a fifth control signal. The fifth control signal is used to control the circuit tube 1 to close and the first switch S1 to open, so as to charge the inserted resistive load.

[0077] In this embodiment, after the third switch S3 is closed and the fourth switch S4 is opened, if the third duration detection module D3 outputs a fourth control signal, the system controls the path tube 1 to close and open a path once according to the fourth control signal to connect VIN and the charging port (i.e., open a path once). When the current flowing through the path tube 1 is less than the preset current value, the path tube 1 is closed to disconnect VIN and the charging port. Then, VBUS is established and the system detects whether VBUS is established successfully. After VBUS is established successfully, the system detects whether there is a valid load inserted.

[0078] After the third switch S3 is opened and the fourth switch S4 is closed, if the third comparator A4 outputs the eighth level signal, or if the seventh level signal does not last for the second target time, the sixth control signal is output. The system controls the resistive load detection module 21 and the capacitive load detection module 22 to continue to detect whether there is a valid load inserted according to the sixth control signal.

[0079] Compared to existing technologies, traditional detection methods all use absolute thresholds. Because it's impossible to predict in advance whether the inserted load is resistive or capacitive, the thresholds for capacitive and resistive load identification interfere with each other. For example, a VBUS with a leaky wire plugged in is often misidentified as a load. This application's identification method separates the identification of capacitive and resistive loads. Capacitive load identification uses a relative threshold (edge ​​detection) method, while resistive load identification uses an absolute threshold method. The two are independent of each other, with a design of (1+R1 / R2). With vref>V1>V2, the design prioritizes a strong pull-up current greater than the leakage current of the leakage cable at voltage point V1, and a weak pull-up current greater than the leakage current of the leakage cable at voltage point V2. Furthermore, the design reduces the VBUS pull-up voltage (by lowering the ratio of R1 to R2), thus reducing cable leakage current and ensuring compatibility with most leakage cables. For multi-port shared power banks and power strips, even with a leakage cable plugged into one port, fast charging can still be performed in the other ports, significantly improving the user experience. The design also recognizes the insertion of devices such as phones while a leakage cable is plugged in.

[0080] Based on the same inventive concept, this application also provides a load insertion identification method. The solution provided by this method is similar to the solution described in the circuit above. Therefore, the specific limitations of one or more load insertion identification method embodiments provided below can be found in the limitations of the load insertion identification circuit above, and will not be repeated here.

[0081] In one exemplary embodiment, such as Figure 10 As shown, a load insertion identification method is provided, employing the load insertion identification circuit described in any of the above embodiments. The method includes steps 101 to 102. Wherein: Step 101: Based on the resistive load detection module of the load insertion identification circuit, detect whether the terminal voltage VBUS of the charging port of the charging device is successfully established in the first pull-up state.

[0082] In this embodiment of the application, in the first pull-up state, if the terminal voltage VBUS is greater than the establishment threshold voltage V1, and the terminal voltage VBUS greater than V1 lasts for a first target time, then the terminal voltage VBUS is successfully established; otherwise, the terminal voltage VBUS is not established.

[0083] Step 102: If the terminal voltage VBUS is successfully established, the resistive load detection module detects whether the terminal voltage VBUS is lower than the preset insertion identification threshold voltage in the second pull-up state. If so, it is considered that there is a valid resistive load inserted into the charging port of the charging device. The capacitive load detection module of the load insertion identification circuit detects whether the drop amplitude of the terminal voltage VBUS in the second pull-up state exceeds the preset voltage drop threshold. If so, it is considered that there is a valid capacitive load inserted into the charging port of the charging device. Among them, the pull-up current in the first pull-up state is greater than the pull-up current in the second pull-up state, the pull-up current in the first pull-up state of the terminal voltage VBUS is greater than the first leakage current, the pull-up current in the second pull-up state of the terminal voltage VBUS is greater than the second leakage current, the first leakage current is the leakage current of the leakage cable plugged into the charging port of the charging device when the terminal voltage VBUS is the establishment threshold voltage V1, and the second leakage current is the leakage current of the leakage cable plugged into the charging port of the charging device when VBUS is the insertion identification threshold voltage V2.

[0084] Steps 101 and 102 described above are implemented, employing different detection methods to identify inserted capacitive and resistive loads. Specifically, capacitive loads are identified using a relative threshold (edge ​​detection) method, while resistive loads are identified using an absolute threshold method. These two methods are independent of each other, avoiding the problem of increased false identification probability caused by the mutual influence of the identification thresholds for capacitive and resistive loads when using absolute threshold detection for load insertion. Compared to strong pull-up detection, weak pull-up detection identifies a wider range of resistive loads. This is achieved by designing a reduced pull-up voltage of VBUS (by reducing the ratio of R1 to R2), and by designing the pull-up current of the terminal voltage VBUS in the first pull-up state to be greater than the first leakage current (terminal voltage VBU). S represents the leakage current of the leakage cable plugged into the charging port of the charging device when the threshold voltage V1 is established. The pull-up current of the second pull-up state of the terminal voltage VBUS is greater than the second leakage current (VBUS is the leakage current of the leakage cable plugged into the charging port of the charging device when the insertion identification threshold voltage V2 is applied). This ensures that the terminal voltage VBUS can be successfully established when the leakage cable is plugged in. Furthermore, after switching to weak pull-up, the leakage current of the leakage cable will not pull the terminal voltage VBUS below V2, thereby avoiding false identification of a valid load insertion. Therefore, the embodiments of this application solve the problem of the existing technology of using absolute threshold to detect load insertion, which is prone to false identification of a valid load insertion when only the leakage cable is plugged in, thus improving the accuracy of load insertion identification. In addition, compared with strong pull-up detection, weak pull-up detection has a wider range of resistive loads that can be identified. The design reduces the pull-up voltage of VBUS (by reducing the ratio of R1 to R2), reduces the leakage current of the leakage cable, reduces the standby power consumption of the system, and extends the standby time of charging devices such as power banks.

[0085] In another exemplary embodiment of this application, the above-described load insertion identification method further includes: Step 201: If the terminal voltage VBUS fails to be established, an open-circuit operation is performed. The open-circuit operation includes the following steps 2011 to 2014. Wherein: Step 2011: Close the passage tube of the charging device.

[0086] Step 2012: Detect whether the current flowing through the circuit tube is less than the preset current value.

[0087] In this embodiment, the preset current value is not specifically limited and can be set according to actual needs, as long as the established VBUS meets the load insertion detection requirements.

[0088] Step 2013: If the current flowing through the path tube is not less than the preset current value, return to step 2012 until the current flowing through the path tube is less than the preset current value or the protocol is disconnected.

[0089] Step 2014: If the current flowing through the circuit tube is less than the preset current value, disconnect the circuit tube and return to step 101.

[0090] In another exemplary embodiment of this application, if the resistive load detection module adopts... Figure 9 Given the structure shown, step 101 specifically includes: Step 301: When the circuit is turned off, the third switch S3 of the control resistive load detection module is closed and the fourth switch S4 is turned off.

[0091] Step 302: Check whether the third duration detection module outputs the third control signal. If yes, the terminal voltage VBUS is considered to have been successfully established; otherwise, the terminal voltage VBUS is considered to have failed to be established.

[0092] In another exemplary embodiment of this application, if the load insertion identification circuit includes a VBUS pull-up clamp module, then step 301 above further includes: The VBUS pull-up clamping module controls the pull-up state of the terminal voltage VBUS to the first pull-up state.

[0093] Accordingly, step 102 above specifically includes: Step 401: If the terminal voltage VBUS is successfully established, control the VBUS pull-up clamping module to switch the pull-up state of the terminal voltage VBUS to the second pull-up state. The clamping voltage of the VBUS pull-up clamping module 23 is greater than the establishment threshold voltage V1, and the establishment threshold voltage V1 is greater than the insertion recognition threshold voltage V2.

[0094] Step 402: In the second pull-up state, based on whether the voltage VBUS at the resistive load detection module is lower than the preset insertion recognition threshold voltage, if so, it is considered that there is a valid resistive load inserted at the charging port of the charging device. Also, based on whether the drop in voltage VBUS at the capacitive load detection module of the load insertion recognition circuit exceeds the preset voltage drop threshold, if so, it is considered that there is a valid capacitive load inserted at the charging port of the charging device.

[0095] In another exemplary embodiment of this application, if the VBUS pull-up clamping module adopts... Figure 4 As shown in the structure, in step 401 above, controlling the VBUS pull-up clamping module to switch the pull-up state of VBUS to the first pull-up state specifically includes: controlling the second switch S2 of the VBUS pull-up clamping module to close.

[0096] Accordingly, in step 401 above, controlling the VBUS pull-up clamping module to switch the pull-up state of VBUS to the second pull-up state specifically includes: controlling the second switch S2 of the VBUS pull-up clamping module to turn off.

[0097] In another exemplary embodiment of this application, if the capacitive load detection module adopts... Figure 5 The first type of capacitive load detection module shown is... Figure 6 The second type of capacitive load detection module shown is... Figure 7 The third type of capacitive load detection module shown is... Figure 8 The fourth type of capacitive load detection module shown above uses a resistive load detection module. Figure 9 Given the structure shown, step 402 specifically includes steps 501 to 503. Wherein: Step 501: Turn off the third switch S3 and close the fourth switch S4 of the resistive load detection module.

[0098] In this embodiment, the fourth switch S4 is closed, which means that the second input terminal of the third comparator A4 is connected to voltage V2.

[0099] Step 502: Detect whether the first comparator A2 of the first type of capacitive load detection module outputs a first level signal, and whether the first comparator A2 outputs a first level signal for a third target time; detect whether the first duration detection module D1 of the second type of capacitive load detection module outputs a first control signal; detect whether the second comparator A3 of the third type of capacitive load detection module outputs a third level signal, and whether the second comparator A3 outputs a third level signal for a third target time; or, detect whether the second duration detection module D2 of the fourth type of capacitive load detection module outputs a second control signal. If yes, then a valid capacitive load is considered inserted; otherwise, it is considered that no valid capacitive load is inserted. Also, detect whether the third comparator A4 of the resistive load detection module outputs a seventh level signal for a second target time, or detect whether the third duration detection module D3 of the resistive load detection module outputs a fifth control signal. If yes, then a valid resistive load is considered inserted; otherwise, it is considered that no valid resistive load is inserted.

[0100] In another exemplary embodiment of this application, if the load insertion identification circuit includes a first switch S1, then step 301 above further includes: The first switch S1 of the load insertion identification circuit is closed to connect the load insertion identification circuit to the charging port of the charging device.

[0101] In this embodiment, when charging the load, the high voltage applied will be transmitted to VBUS. To effectively protect the load insertion identification circuit and prevent it from being damaged by the high voltage, the circuit breaker is turned off during the establishment of VBUS. Once a valid load is detected, the circuit breaker turns on and transmits the voltage at the VIN terminal to VBUS to charge the inserted load. At this time, the voltage at the VIN terminal transmitted to VBUS will also damage the load insertion identification circuit. Therefore, a first switch S1 is set and turned off during charging to effectively protect the load insertion identification circuit during the charging phase.

[0102] Accordingly, the above-described load insertion identification method, after step 102, further includes: Step 103: If an effective resistive load or an effective capacitive load is inserted, the circuit tube of the charging device is closed and the first switch S1 of the load insertion identification circuit is turned off, so as to disconnect the connection between the load insertion identification circuit and the charging port of the charging device, thereby protecting the load insertion identification circuit from being damaged by the high voltage used for charging.

[0103] In one exemplary embodiment, an electronic device is also provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps in the above-described method embodiments.

[0104] In one exemplary embodiment, a computer-readable storage medium is provided storing a computer program that, when executed by a processor, implements the steps in the above-described method embodiments.

[0105] In one exemplary embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements the steps in the above-described method embodiments.

[0106] Those skilled in the art will understand that all or part of the processes in the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments described above. Any references to memory or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM).

[0107] The processors involved in the various embodiments provided in this application may be general-purpose processors, central processing units, graphics processors, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, etc., and are not limited thereto.

[0108] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0109] This document uses specific examples to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the methods and core ideas of this application. Furthermore, those skilled in the art will recognize that, based on the ideas of this application, there will be changes in the specific implementation methods and application scope. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A load insertion identification circuit, characterized in that, The load insertion identification circuit includes a resistive load detection module (21) and a capacitive load detection module (22), the input terminals of the resistive load detection module (21) and the capacitive load detection module (22) being connected to the charging port of the charging device; wherein: The resistive load detection module (21) is used to: detect whether the terminal voltage VBUS of the charging port of the charging device is successfully established in the first pull-up state; if the terminal voltage VBUS is successfully established, detect whether the terminal voltage VBUS is lower than the preset insertion identification threshold voltage in the second pull-up state; if so, it is considered that there is an effective resistive load inserted into the charging port of the charging device; wherein, the pull-up current of the first pull-up state is greater than the pull-up current of the second pull-up state, the pull-up current of the terminal voltage VBUS in the first pull-up state is greater than the first leakage current, the pull-up current of the terminal voltage VBUS in the second pull-up state is greater than the second leakage current, the first leakage current is the leakage current of the leakage cable inserted into the charging port of the charging device when the terminal voltage VBUS is the establishment threshold voltage, and the second leakage current is the leakage current of the leakage cable inserted into the charging port of the charging device when the VBUS is the insertion identification threshold voltage; The capacitive load detection module (22) is used to: if the terminal voltage VBUS is successfully established, detect whether the drop in the terminal voltage VBUS exceeds the preset voltage drop threshold; if so, it is considered that there is an effective capacitive load inserted into the charging port of the charging device.

2. The load insertion identification circuit according to claim 1, characterized in that, The load insertion identification circuit further includes a VBUS pull-up clamping module (23), the output of which is connected to the charging port of the charging device, wherein: The VBUS pull-up clamping module (23) is used for: During the process of establishing the terminal voltage VBUS of the charging port of the charging device, the pull-up state of the terminal voltage VBUS is switched to the first pull-up state, and after the terminal voltage VBUS of the charging port of the charging device is successfully established, the pull-up state of the terminal voltage VBUS is switched to the second pull-up state.

3. The load insertion identification circuit according to claim 2, characterized in that, The resistive load detection module (21) is also used for: In the first pull-up state, if the terminal voltage VBUS is greater than the establishment threshold voltage and continues for a first target time, it is considered that the terminal voltage VBUS of the charging port of the charging device has been successfully established. In the second pull-up state, if the terminal voltage VBUS drops below the insertion recognition threshold voltage and remains below the second target time, it is considered that there is an effective resistive load inserted into the charging port of the charging device; wherein, the establishment threshold voltage is greater than the insertion recognition threshold voltage.

4. The load insertion identification circuit according to claim 3, characterized in that, The capacitive load detection module (22) is also used for: In the second pull-up state, if the voltage drop of the terminal voltage VBUS exceeds the preset voltage drop threshold and continues for a third target time, it is considered that there is an effective capacitive load inserted into the charging port of the charging device.

5. The load insertion identification circuit according to claim 2, characterized in that, The load insertion identification circuit further includes a first switch S1, the first end of which is connected to the charging port of the charging device, and the second end of which is connected to the input terminal of the resistive load detection module (21), the input terminal of the capacitive load detection module (22), and the output terminal of the VBUS pull-up clamping module (23). The first switch S1 is used to: close during load insertion detection to connect the input terminal of the resistive load detection module (21), the input terminal of the capacitive load detection module (22), and the output terminal of the VBUS pull-up clamp module (23) to the charging port of the charging device; and close after a valid capacitive or resistive load insertion is detected to disconnect the input terminal of the resistive load detection module (21), the input terminal of the capacitive load detection module (22), and the output terminal of the VBUS pull-up clamp module (23) from the charging port of the charging device.

6. The load insertion identification circuit according to claim 2, characterized in that, The VBUS pull-up clamping module (23) includes a first resistor, a second resistor, a third resistor, a second switch, an adjustment transistor, an operational amplifier, and a second capacitor. The first terminal of the second switch and the first terminal of the third resistor are connected to the working voltage VCC. The second terminal of the second switch and the second terminal of the third resistor are connected to the first terminal of the adjustment transistor. The second terminal of the adjustment transistor is connected to the first terminal of the first resistor and the target output terminal vdet. The second terminal of the first resistor is connected to the non-inverting input of the operational amplifier and the first terminal of the second resistor. The second terminal of the second resistor is grounded. The inverting input of the operational amplifier is connected to the reference voltage vref. The output terminal of the operational amplifier is connected to the third terminal of the adjustment transistor and the first terminal of the second capacitor. The second terminal of the second capacitor is grounded. The target output terminal vdet is the output terminal of the VBUS pull-up clamping module (23) or the second terminal of the first switch S1. Under the action of the loop, the VBUS pull-up clamping module (23) clamps the voltage of the target output terminal vdet to (1+R1 / R2). vref, where R1 is the resistance value of the first resistor and R2 is the resistance value of the second resistor; to ensure that the terminal voltage VBUS can be successfully established, the clamping voltage of the VBUS pull-up clamping module (23) is greater than the establishment threshold voltage; The second switch is used to: close during the process of establishing the terminal voltage VBUS of the charging port of the charging device to connect the first end of the regulating tube to the working voltage VCC, so that the terminal voltage VBUS is in the first pull-up state, thereby accelerating the establishment process of VBUS; and close after the terminal voltage VBUS of the charging port of the charging device is successfully established to disconnect the first end of the regulating tube from the working voltage VCC, so that the working voltage VCC pulls up the terminal voltage VBUS through the third resistor and the regulating tube, thereby switching the pull-up state of the terminal voltage VBUS to the second pull-up state.

7. The load insertion identification circuit according to claim 6, characterized in that, The capacitive load detection module (22) includes a current source, a fourth resistor, a fifth resistor, a third capacitor, and a first comparator. The first terminal of the current source is connected to the operating voltage VCC. The second terminal of the current source is connected to the first terminal of the fourth resistor and the first input terminal of the first comparator. The second terminal of the fourth resistor is connected to the first terminal of the fifth resistor and the target output terminal VDET. The second terminal of the fifth resistor is connected to the second input terminal of the first comparator and the first terminal of the third capacitor. The second terminal of the third capacitor is grounded. The first comparator is used to: in the second pull-up state, when the drop in terminal voltage VBUS is greater than I1 When R4 is active, the first level signal is output; otherwise, the second level signal is output. Specifically, if the first input of the first comparator is the non-inverting input and the second input is the inverting input, the first level signal is low and the second level signal is high. If the first input of the first comparator is the inverting input and the second input is the non-inverting input, the first level signal is high and the second level signal is low. I1 is the output current value of the current source, and R4 is the resistance value of the fourth resistor.

8. The load insertion identification circuit according to claim 6, characterized in that, The capacitive load detection module (22) includes a sixth resistor, a seventh resistor, an eighth resistor, a fourth capacitor, and a second comparator. The first end of the sixth resistor is connected to the target output terminal vdet and the first input terminal of the second comparator. The second end of the sixth resistor is connected to the first ends of the seventh and eighth resistors. The second end of the seventh resistor is grounded. The second end of the eighth resistor is connected to the first end of the fourth capacitor and the second input terminal of the second comparator. The second end of the fourth capacitor is grounded. Wherein: The second comparator is used to: in the second pull-up state, if the drop in terminal voltage VBUS is greater than (1+R1 / R2). vref R6 / (R6+R7) outputs the third level signal; otherwise, it outputs the fourth level signal. Wherein, if the first input of the second comparator is the non-inverting input and the second input is the inverting input, then the third level signal is low and the fourth level signal is high; if the first input of the second comparator is the inverting input and the second input is the non-inverting input, then the third level signal is high and the fourth level signal is low; vref is the reference voltage, R6 is the resistance value of the sixth resistor, and R7 is the resistance value of the seventh resistor.

9. A load insertion identification method, characterized in that, The load insertion identification circuit according to any one of claims 1-8, wherein the load insertion identification method comprises: The resistive load detection module based on the load insertion identification circuit detects whether the terminal voltage VBUS of the charging port of the charging device is successfully established in the first pull-up state. If the terminal voltage VBUS is successfully established, based on the output signal of the resistive load detection module, it is detected whether the terminal voltage VBUS is lower than the preset insertion recognition threshold voltage in the second pull-up state. If so, it is considered that the charging port of the charging device has a valid resistive load inserted. Based on the output signal of the capacitive load detection module of the load insertion recognition circuit, it is detected whether the drop amplitude of the terminal voltage VBUS in the second pull-up state exceeds the preset voltage drop threshold. If so, it is considered that the charging port of the charging device has a valid capacitive load inserted. Wherein, the pull-up current in the first pull-up state is greater than the pull-up current in the second pull-up state, the pull-up current in the first pull-up state of the terminal voltage VBUS is greater than the first leakage current, the pull-up current in the second pull-up state of the terminal voltage VBUS is greater than the second leakage current, the first leakage current is the leakage current of the leakage cable plugged into the charging port of the charging device when the terminal voltage VBUS is the establishment threshold voltage, and the second leakage current is the leakage current of the leakage cable plugged into the charging port of the charging device when VBUS is the insertion recognition threshold voltage.

10. The load insertion identification method according to claim 9, characterized in that, The load insertion identification circuit includes a VBUS pull-up clamping module; If the terminal voltage VBUS is successfully established, based on the output signal of the resistive load detection module, it is detected whether the terminal voltage VBUS is lower than a preset insertion identification threshold voltage in the second pull-up state. If so, it is considered that the charging port of the charging device has a valid resistive load insertion. Furthermore, based on the output signal of the capacitive load detection module of the load insertion identification circuit, it is detected whether the drop in the terminal voltage VBUS in the second pull-up state exceeds a preset voltage drop threshold. If so, it is considered that the charging port of the charging device has a valid capacitive load insertion. Specifically, this includes: If the terminal voltage VBUS is successfully established, the VBUS pull-up clamping module is controlled to switch the pull-up state of the terminal voltage VBUS to the second pull-up state; wherein, the clamping voltage of the VBUS pull-up clamping module is greater than the establishment threshold voltage V1, and the establishment threshold voltage V1 is greater than the insertion recognition threshold voltage V2. In the second pull-up state, the voltage VBUS at the terminal of the resistive load detection module is lower than the preset insertion recognition threshold voltage. If so, it is considered that there is a valid resistive load inserted at the charging port of the charging device. The voltage drop of the voltage VBUS at the terminal of the load insertion recognition circuit exceeds the preset voltage drop threshold. If so, it is considered that there is a valid capacitive load inserted at the charging port of the charging device.

11. The load insertion identification method according to claim 10, characterized in that, In the second pull-up state, based on whether the voltage VBUS at the resistive load detection module is lower than a preset insertion recognition threshold voltage, if so, it is considered that a valid resistive load has been inserted into the charging port of the charging device. Furthermore, based on whether the drop in the voltage VBUS at the capacitive load detection module of the load insertion recognition circuit exceeds a preset voltage drop threshold, if so, it is considered that a valid capacitive load has been inserted into the charging port of the charging device. Specifically, this includes: The third switch of the resistive load detection module is turned off, and the fourth switch is closed; The system detects whether the first comparator of the first type of capacitive load detection module outputs a first-level signal, whether the first comparator outputs a first-level signal for a third target time, whether the first duration detection module of the second type of capacitive load detection module outputs a first control signal, whether the second comparator of the third type of capacitive load detection module outputs a third-level signal, whether the second comparator outputs a third-level signal for a third target time, or whether the second duration detection module of the fourth type of capacitive load detection module outputs a second control signal. If yes, it is considered that a valid capacitive load has been inserted; otherwise, it is considered that no valid capacitive load has been inserted. It also detects whether the third comparator of the resistive load detection module outputs a seventh-level signal for a second target time, or whether the third duration detection module of the resistive load detection module outputs a fifth control signal. If yes, it is considered that a valid resistive load has been inserted; otherwise, it is considered that no valid resistive load has been inserted.

12. A charging device, characterized in that, Includes the load insertion identification circuit as described in any one of claims 1-8.

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